KR20240046859A - Display panel - Google Patents

Abstract

One embodiment of the present invention includes a substrate having an opening area and a display area surrounding the opening area, a plurality of display elements located in the display area, and an organic encapsulation layer and an inorganic encapsulation layer covering the display elements. a thin film encapsulation layer, a first groove and a second groove located between the opening area and the display area and having an undercut structure that is concave in the depth direction of the substrate, and a planarization layer located between the opening area and the display area and containing an organic insulating material; and an input sensing layer located in a display area and disposed on a thin film encapsulation layer, wherein the planarization layer is disposed on top of the inorganic encapsulation layer and the organic encapsulation layer is disposed below the inorganic encapsulation layer.

Description

Display panel {Display panel}

Embodiments of the present invention relate to a display panel including grooves and a display device including the display panel.

Recently, the uses of display devices have become more diverse. In addition, the thickness of display devices is becoming thinner and lighter, and the scope of their use is expanding.

As the area occupied by the display area of the display device is expanded, various functions that are incorporated or linked to the display device are being added. As a way to expand the area and add various functions, there is a display device with an opening in the display area.

In the case of a display device having an opening, foreign matter such as moisture may penetrate into the side of the opening, and in this case, display elements surrounding the opening may be damaged.

The present invention is intended to solve various problems including the problems described above, and provides a display panel capable of preventing moisture infiltration through openings and a display device equipped therewith. However, these tasks are illustrative and do not limit the scope of the present invention.

One embodiment of the present invention includes: a substrate having an opening area and a display area surrounding the opening area; a plurality of display elements located in the display area; a thin film encapsulation layer that covers the display elements and includes an organic encapsulation layer and an inorganic encapsulation layer; a first groove and a second groove located between the opening area and the display area, concave in the depth direction of the substrate, and having an undercut structure; a planarization layer located between the opening area and the display area and including an organic insulating material; and an input sensing layer located in the display area and disposed on the thin film encapsulation layer, wherein the planarization layer is disposed above the inorganic encapsulation layer and the organic encapsulation layer is disposed below the inorganic encapsulation layer. , starts the display panel.

In this embodiment, the substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked, and the bottom surface of each of the first groove and the second groove is, It may be placed on the lower surface of the second base layer or on an imaginary surface located between the upper and lower surfaces of the second base layer.

In this embodiment, the thin film encapsulation layer may include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer that are sequentially stacked.

In this embodiment, the first inorganic encapsulation layer may cover the inner surface of at least one of the first groove and the second groove.

In this embodiment, the second inorganic encapsulation layer may be in direct contact with the first inorganic encapsulation layer between the opening area and the display area.

In this embodiment, at least a portion of the planarization layer may overlap the organic encapsulation layer.

In this embodiment, the substrate may include a first opening corresponding to the opening area, and the organic encapsulation layer may include a hole surrounding the first opening.

In this embodiment, the end of the planarization layer adjacent to the first opening may be located on the same vertical line as the end of the substrate or may be spaced a predetermined distance from the end of the substrate.

In this embodiment, a barrier layer located on the planarization layer and containing an inorganic material may be further included.

In this embodiment, the barrier layer may include the same material as at least one layer among the plurality of layers included in the input sensing layer.

In this embodiment, an additional planarization layer located on the barrier layer may be further included.

In this embodiment, the planarization layer may include the same material as the organic material included in the input sensing layer.

In this embodiment, a lower barrier layer disposed between the planarization layer and the thin film encapsulation layer may be further included.

In this embodiment, the lower barrier layer may include the same material as the inorganic material included in the input sensing layer.

In this embodiment, the lower barrier layer may be in direct contact with the inorganic encapsulation layer.

Another embodiment of the present invention includes a substrate having an opening; display elements located in a display area at least partially surrounding the opening; a thin film encapsulation layer located on the display elements and including an organic encapsulation layer and an inorganic encapsulation layer; a first groove and a second groove located in a groove area between the opening and the display area; and a planarization layer located in the groove area and disposed on the organic encapsulation layer with the inorganic encapsulation layer interposed therebetween.

In this embodiment, the planarization layer may include an organic material.

In this embodiment, the display panel includes a multilayer film including an organic material layer and at least one inorganic material layer disposed on the organic material layer, and the first groove and the second groove may be formed concave in the thickness direction of the multilayer film. there is.

In this embodiment, the substrate includes a first base layer, a first inorganic layer, a second base layer, and a second inorganic layer sequentially stacked, wherein the organic material layer includes the second base layer and the at least one The inorganic layer may include the second inorganic layer.

In this embodiment, the at least one inorganic material layer may include a first hole corresponding to each of the first groove and the second groove, and the organic material layer may include a hole or a recess corresponding to the first hole. there is.

In this embodiment, the side surface of the at least one inorganic material layer defining the first hole may protrude more toward the center of the first hole than the side surface of the organic material layer defining the hole or the recess.

In this embodiment, the first groove surrounds the opening, and the second groove surrounds the opening, and may be located between the opening and the first groove.

In this embodiment, the thin film encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer sequentially stacked, and the first inorganic encapsulation layer is formed in the first groove and the second inorganic encapsulation layer. 2 grooves can cover the inner surface of each.

In this embodiment, at least a portion of the planarization layer may overlap the organic encapsulation layer.

In this embodiment, the second inorganic encapsulation layer may be in direct contact with the first inorganic encapsulation layer.

In this embodiment, the planarization layer or the organic encapsulation layer may fill the second groove.

In this embodiment, a barrier layer on the planarization layer may be further included.

In this embodiment, the barrier layer may directly contact the inorganic encapsulation layer around the opening.

In this embodiment, the barrier layer may include at least one of a metal layer and an inorganic insulating layer.

In this embodiment, an additional planarization layer disposed on the barrier layer may be further included.

In this embodiment, a lower barrier layer interposed between the planarization layer and the thin film encapsulation layer may be further included.

In this embodiment, the lower barrier layer may be in direct contact with the inorganic encapsulation layer.

In this embodiment, the lower barrier layer may include at least one of a metal layer and an inorganic insulating layer.

In this embodiment, it is located in the display area and may further include an input sensing layer including first sensing electrodes and second sensing electrodes.

In this embodiment, the input sensing layer includes an organic insulating layer that covers the first and second sensing electrodes, and the planarization layer may include the same material as the organic insulating layer.

Other aspects, features and advantages in addition to those described above will become apparent from the following drawings, claims and detailed description of the invention.

The display device according to embodiments of the present invention can prevent moisture, etc. from penetrating toward the display element by forming a groove in the non-display area, and insulating layers on the groove, such as a portion of an organic encapsulation layer, By arranging a flattening layer or/and a lower barrier layer, it is possible to prevent or minimize the occurrence of cracks or lifting of the film around the groove, thereby preventing the display element from being damaged by moisture transmitted through the crack. However, this effect is illustrative, and the effects according to the embodiments will be described in detail later.

1 is a perspective view schematically showing a display device according to an embodiment of the present invention.
2A to 2C are cross-sectional views schematically showing display devices according to embodiments of the present invention.
Figure 3 is a plan view schematically showing a display panel according to an embodiment of the present invention.
Figure 4 is an equivalent circuit diagram schematically showing one pixel of a display panel.
Figure 5 is a plan view showing a portion of a display panel according to an embodiment of the present invention.
Figure 6 is a plan view showing a portion of a display panel according to an embodiment of the present invention.
Figure 7 is a cross-sectional view showing a display panel according to an embodiment of the present invention.
Figure 8 is an enlarged cross-sectional view of the organic light emitting diode of Figure 7.
9 to 14 are cross-sectional views showing the manufacturing process of a display panel according to an embodiment of the present invention.
Figure 15 is a cross-sectional view of a manufacturing process of a display panel according to another embodiment of the present invention.
Figure 16 is a plan view of a display panel according to an embodiment of the present invention.
Figure 17 is a plan view schematically showing an input sensing layer according to an embodiment of the present invention.
Figures 18a and 18b are plan views showing the first conductive layer and the second conductive layer of the input sensing layer according to an embodiment of the present invention, respectively.
Figure 18c is a cross-sectional view showing an input sensing layer according to an embodiment of the present invention.
Figures 19a and 19b are plan views respectively showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention.
Figure 19c is a cross-sectional view showing an input sensing layer according to another embodiment of the present invention.
Figures 20a and 20b are plan views respectively showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention.
Figure 20c is a cross-sectional view showing an input sensing layer according to another embodiment of the present invention.
Figure 21 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 22 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 23 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 24 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 25 is an enlarged cross-sectional view showing the structure of the lower barrier layer in the second groove of the display device according to an embodiment of the present invention.
Figure 26 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 27 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 28 is a cross-sectional view of a display panel according to another embodiment of the present invention.
Figure 29 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.
Figure 30 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.
FIGS. 31A and 31B are enlarged views of the third groove of FIG. 30.
Figure 32 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.
33 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.
Figure 34 is a plan view schematically showing a display panel according to another embodiment of the present invention.
Figure 35 is an enlarged plan view of the opening area of Figure 34.
Figure 36 is a plan view schematically showing a display panel according to another embodiment of the present invention.
Figure 37 is an enlarged plan view of the opening area of Figure 36.

Since the present invention can be modified in various ways and can have various embodiments, specific embodiments will be illustrated in the drawings and described in detail in the detailed description. The effects and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. When describing with reference to the drawings, identical or corresponding components will be assigned the same reference numerals and redundant description thereof will be omitted. .

In the following embodiments, terms such as first and second are used not in a limiting sense but for the purpose of distinguishing one component from another component.

In the following examples, singular terms include plural terms unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have mean that the features or components described in the specification exist, and do not exclude in advance the possibility of adding one or more other features or components.

In the following embodiments, when a part of a film, region, component, etc. is said to be on or on another part, it is not only the case where it is directly on top of the other part, but also when another film, region, component, etc. is interposed between them. Also includes cases where there are.

In cases where an embodiment can be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially at the same time, or may be performed in an order opposite to that in which they are described.

In the following embodiments, when membranes, regions, components, etc. are connected, not only are the membranes, regions, and components directly connected, but also other membranes, regions, and components are interposed between the membranes, regions, and components. This includes cases where it is indirectly connected. For example, in this specification, when membranes, regions, components, etc. are said to be electrically connected, not only are the membranes, regions, components, etc. directly electrically connected, but also other membranes, regions, components, etc. are interposed between them. This also includes cases of indirect electrical connection.

1 is a perspective view schematically showing a display device according to an embodiment of the present invention.

Referring to FIG. 1, the display device 1 includes a display area (DA) that emits light and a non-display area (NDA) that does not emit light. The non-display area (NDA) is arranged adjacent to the display area (DA). The display device 1 may provide a predetermined image using light emitted from a plurality of pixels arranged in the display area DA.

The display device 1 includes an opening area OA at least partially surrounded by a display area DA. Figure 1 shows that the opening area OA is entirely surrounded by the display area DA. The non-display area NDA may include a first non-display area NDA1 surrounding the opening area OA, and a second non-display area NDA2 surrounding the outside of the display area DA. The first non-display area (NDA1) entirely surrounds the opening area (OA), the display area (DA) entirely surrounds the first non-display area (NDA1), and the second non-display area (NDA2) entirely surrounds the display area (DA). ) can be entirely surrounded.

Hereinafter, the display device 1 according to an embodiment of the present invention will be described by taking an organic light emitting display device as an example, but the display device of the present invention is not limited thereto. As another example, various types of display devices, such as an inorganic light emitting display (EL) display device, a quantum dot light emitting display device, etc., may be used.

FIGS. 2A to 2C are briefly cross-sectional views of display devices according to embodiments of the present invention, and may correspond to the cross-section taken along line II-II' of FIG. 1 .

Referring to FIG. 2A , the display device 1 may include a display panel 10 and a component 20 corresponding to an opening area (OA) of the display panel 10 .

The display panel 10 includes a substrate 100, a display element layer 200 disposed on the substrate 100 and including display elements, a thin film encapsulation layer 300 as an encapsulation member covering the display element layer 200, and And it may include an input sensing layer 400 that senses a touch input. Although not shown, component(s) such as a polarizer and a retarder or an anti-reflection member including a color filter and a black matrix, and a transparent window may be further disposed on the input sensing layer 400. there is.

The substrate 100 may include polymer resin. The substrate 100 containing polymer resin can secure flexibility compared to a substrate made of glass. For example, the substrate 100 may include transparent polymer resin. The substrate 100 is a barrier layer that prevents penetration of external substances in addition to the polymer resin described above, and further includes a single or multiple inorganic layers containing inorganic substances such as silicon nitride (SiNx) and/or silicon oxide (SiOx). can do.

The display element layer 200 may include a display element disposed in the display area DA, for example, an organic light-emitting diode. Although not shown, the display element layer 200 may include a thin film transistor, a storage capacitor, and wires connected to the display element.

By covering the display element layer 200, the thin film encapsulation layer 300 can prevent moisture or contaminants from penetrating into the display element layer 200 from the outside. The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer.

The thin film encapsulation layer 300 covers display elements in the display area DA, but may extend to the non-display area. In this regard, FIG. 2A shows that the thin film encapsulation layer 300 extends to the first non-display area NDA1.

The input sensing layer 400 may be disposed in the display area (DA). The input sensing layer 400 can acquire coordinate information according to an external input, for example, a touch event. The input sensing layer 400 may include a sensing electrode (sensing electrode or touch electrode) and signal lines (trace lines) connected to the sensing electrode.

The process of forming the input sensing layer 400 may be carried out continuously after the process of forming the planarization layer 610, which will be described later, or may be carried out continuously after the process of forming the thin film encapsulation layer 300. Accordingly, no adhesive member may be interposed between the input sensing layer 400 and the thin film encapsulation layer 300.

The planarization layer 610 may be disposed in the first non-display area NDA1. The planarization layer 610 includes an organic insulating material. The planarization layer 610 includes photoresist (e.g., negative or positive photoresist), includes the same material as the organic encapsulation layer of the thin film encapsulation layer 300, or is the same as one of the insulating layers of the input sensing layer to be described later. It may contain substances or various other types of organic insulating materials.

As shown in FIG. 2A , the display panel 10 may include an opening 10H that corresponds to the opening area OA and penetrates the display panel 10 . The substrate 100, the display element layer 200, the thin film encapsulation layer 300, the input sensing layer 400, and the planarization layer 610 each have first to fifth openings 100H, corresponding to the opening area OA. 200H, 300H, 400H, 610H). The first opening (100H) penetrates the upper and lower surfaces of the substrate 100, the second opening (200H) penetrates from the lowest layer to the uppermost layer of the display element layer 200, and the third opening (300H) penetrates the thin film encapsulation layer 300. ) penetrates. The fourth opening 400H may penetrate from the lowest to the highest layer of the input sensing layer 400, and the fifth opening 610H may be formed to penetrate the upper and lower surfaces of the planarization layer 610.

The opening area (OA) is a location where the component 20 is placed. The component 20 is placed below the display panel 10 as shown in FIG. 2A or below the display panel 10 as shown in FIG. 2B. As shown, it may be disposed within the opening 10H to overlap the side of the opening 10H of the display panel 10.

Component 20 may include electronic elements. For example, the component 20 may be an electronic element that uses light or sound. For example, electronic elements include sensors that receive and use light such as infrared sensors, cameras that receive light and capture images, sensors that output and detect light or sound to measure distance or recognize fingerprints, etc., and small devices that output light. It may include a lamp or a speaker that outputs sound. In the case of electronic elements that use light, light of various wavelength bands such as visible light, infrared light, and ultraviolet light can be used. In some embodiments, the opening area OA may be understood as a transmission area through which light and/or sound output from the component 20 to the outside or traveling from the outside toward the electronic element can pass through.

In another embodiment, when the display panel 10 is used as a smart watch or a vehicle instrument panel, the component 20 may be a member including a clock hand or a needle indicating certain information (e.g., vehicle speed, etc.). there is. The component 20 is a component that can be disposed at a position corresponding to the opening 10H of the display panel 10 as shown in FIG. 2A or 2B, and has the functions and functions of the display panel 10 as described above. It may include related component(s) or may include components such as accessories that increase the aesthetics of the display panel 10.

As shown in FIGS. 2A and 2B, the substrate 100 may have a first opening 100H corresponding to the opening area OA. Alternatively, as shown in FIG. 2C, the substrate 100 may not include the first opening 100H. The component 20 may be placed below the display panel 10 as shown in a dotted line, or may be placed within the opening 10H of the display panel 10 as shown in a solid line. The component 20 disposed below the display panel 10 may be an electronic element that uses light. In this case, the light transmittance in the opening area (OA) of the display panel 10 may be about 50% or more, more preferably 70% or more, 75% or more, 80% or more, 85% or more, or 90% or more.

The substrate 100 may or may not include the first opening 100H, as described with reference to FIGS. 2A to 2C. If the substrate 100 includes the first opening 100H, it may be more preferable because the component 20 can be used in various ways without restrictions on the type or location. Hereinafter, for convenience of explanation, a display panel including the substrate 100 having the first opening 100H will be described. However, it goes without saying that the features described later can also be applied to the display panel shown in FIG. 2C.

FIG. 3 is a plan view schematically showing a display panel according to an embodiment of the present invention, and FIG. 4 is an equivalent circuit diagram schematically showing one pixel of the display panel.

Referring to FIG. 3 , the display panel 10 includes a display area DA and first and second non-display areas NDA1 and NDA2. FIG. 3 may be understood as a view of the substrate 100 of the display panel 10. For example, the substrate 100 may be understood as having an opening area (OA), a display area (DA), and first and second non-display areas (NDA1 and NDA2).

The display panel 10 includes a plurality of pixels P arranged in the display area DA. Each pixel P may include an organic light emitting diode (OLED). Each pixel P may emit, for example, red, green, blue, or white light through an organic light emitting diode.

Referring to FIG. 4, each pixel (P) includes a pixel circuit (PC) and a display element connected to the pixel circuit (PC), and an organic light emitting diode (OLED). The pixel circuit (PC) may include a first thin film transistor (T1), a second thin film transistor (T2), and a storage capacitor (Cst).

The second thin film transistor (T2) is a switching thin film transistor, connected to the scan line (SL) and the data line (DL), and the data voltage input from the data line (DL) according to the switching voltage input from the scan line (SL). Can be transmitted to the first thin film transistor (T1). The storage capacitor (Cst) is connected to the second thin film transistor (T2) and the driving voltage line (PL), and is connected to the voltage received from the second thin film transistor (T2) and the first power voltage (ELVDD) supplied to the driving voltage line (PL). The voltage corresponding to the difference can be stored.

The first thin film transistor (T1) is a driving thin film transistor, which is connected to the driving voltage line (PL) and the storage capacitor (Cst), and emits an organic light emitting diode (OLED) from the driving voltage line (PL) in response to the voltage value stored in the storage capacitor (Cst). The driving current flowing through the OLED can be controlled. Organic light-emitting diodes (OLEDs) can emit light with a certain brightness by driving current. The opposing electrode (e.g., cathode) of the organic light emitting diode (OLED) may be supplied with the second power voltage (ELVSS).

Figure 4 illustrates that the pixel circuit (PC) includes two thin film transistors and one storage capacitor, but the present invention is not limited thereto. Of course, the number of thin film transistors and the number of storage capacitors can vary depending on the design of the pixel circuit (PC).

Referring again to FIG. 3, the first non-display area NDA1 may surround the opening area OA. The first non-display area (NDA1) is an area where display elements such as organic light-emitting diodes that emit light are not disposed. The first non-display area (NDA1) includes pixels (P) provided around the opening area (OA). Signal lines providing signals may pass through or groove(s), which will be described later, may be disposed. The second non-display area NDA2 includes a scan driver 1100 that provides a scan signal to each pixel (P), a data driver 1200 that provides a data signal to each pixel (P), and first and second power supplies. Main power wiring (not shown) to provide voltage may be disposed. Alternatively, the data driver 1200 may be placed on a flexible printed circuit board (FPCB) connected to a pad provided on one side of the display panel 10.

Figure 5 is a plan view showing a portion of a display panel according to an embodiment of the present invention, showing signal lines located in a first non-display area.

Referring to FIG. 5, pixels P are arranged in the display area DA with the opening area OA as the center, and a first non-display area NDA1 is between the opening area OA and the display area DA. can be located

The pixels P may be arranged to be spaced apart from each other around the opening area OA. The pixels P may be arranged spaced apart above and below the opening area OA, or may be arranged spaced apart left and right around the opening area OA.

Among the signal lines that supply signals to the pixels (P), signal lines adjacent to the opening area (OA) may bypass the opening area (OA). Some of the data lines (DL) among the data lines passing through the display area (DA) extend in the y direction to provide data signals to the pixels (P) arranged above and below with the opening area (OA) in between, It is possible to detour along the edge of the opening area (OA) in the first non-display area (NDA1). Among the scan lines passing through the display area DA, some scan lines SL extend in the x-direction to provide scan signals to the pixels P arranged on the left and right with the opening area OA in between. 1You can detour along the edge of the opening area (OA) in the non-display area (NDA1).

Figure 6 is a plan view showing a portion of a display panel according to an embodiment of the present invention, showing a groove located in the first non-display area.

Grooves are located between the opening area (OA) and the display area (DA). In relation to this, FIG. 6 shows that the first to third grooves G1, G2, and G3 are located between the opening area OA and the display area DA. As another example, a greater number of grooves, for example, four or more grooves, than the first to third grooves G1, G2, and G3 may be disposed in the first non-display area NDA1.

The first to third grooves G1, G2, and G3 may have a ring shape that entirely surrounds the opening area OA in the first non-display area NDA1. The diameter of each of the first to third grooves (G1, G2, G3) may be formed to be larger than the diameter of the opening area (OA), and the first to third grooves (G1, G2, G3) may be spaced apart at a predetermined distance. can be placed. As shown in FIG. 6, the widths of at least two of the first to third grooves G1, G2, and G3 may be different from each other. Alternatively, the widths between the protruding tips of at least two of the first to third grooves G1, G2, and G3 may be changed in various ways, such as being the same.

Referring to Figures 5 and 6, the first to third grooves (G1, G2, G3) are located closer to the opening area (OA) than the bypass area of the signal lines that bypass the edge of the opening area (OA). You can.

FIG. 7 is a cross-sectional view showing a display panel according to an embodiment of the present invention, corresponding to a cross-section taken along line VII-VII' of FIG. 6, and FIG. 8 is an enlarged cross-sectional view of the organic light emitting diode of FIG. 7. FIG. 7 shows the opening area OA and the first non-display area NDA1 and display area DA around it. FIG. 7 shows that the substrate 100 includes a first opening 100H corresponding to an opening area OA. Hereinafter, the opening area OA may be understood to refer to the opening 10H of the display panel or the first opening 100H of the substrate 100.

First, look at the display area (DA) in FIG. 7.

The substrate 100 may include polymer resin. The substrate 100 may include a base layer containing a polymer resin and an inorganic layer. For example, the substrate 100 may include a first base layer 101, a first inorganic layer 102, a second base layer 103, and a second inorganic layer 104, which are sequentially stacked.

The first and second base layers 101 and 103 may each include a polymer resin. For example, the first and second base layers 101 and 103 are made of polyethersulphone (PES), polyacrylate (PAR), polyetherimide (PEI), and polyethylene naphthalate (PEN). napthalate), polyethyeleneterepthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC) , and may include polymer resins such as cellulose acetate propionate (CAP). The polymer resin may be transparent.

The first and second inorganic layers 102 and 104 are barrier layers that prevent penetration of external substances, respectively, and may be a single layer or a multilayer containing inorganic materials such as silicon nitride (SiNx) and/or silicon oxide (SiOx). You can.

A buffer layer 201 formed to prevent impurities from penetrating into the semiconductor layer of the thin film transistor may be disposed on the substrate 100. The buffer layer 201 may include an inorganic insulating material such as silicon nitride or silicon oxide, and may be a single layer or multilayer containing the above-described inorganic insulating material. In some embodiments, the second inorganic layer 104 of the substrate 100 may be understood as a partial layer of the buffer layer 201 having a multilayer structure.

A pixel circuit (PC) including a thin film transistor (TFT) and a storage capacitor (Cst) may be disposed on the buffer layer 201. A thin film transistor (TFT) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). The thin film transistor (TFT) shown in FIG. 7 may correspond to the driving thin film transistor described with reference to FIG. 4 . In this embodiment, a top gate type is shown in which the gate electrode (GE) is disposed on the semiconductor layer (Act) with the gate insulating layer 203 in the center. However, according to another embodiment, the thin film transistor (TFT) is a bottom gate type. It can be.

The semiconductor layer (Act) may include polysilicon. Alternatively, the semiconductor layer (Act) may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The gate electrode (GE) may include a low-resistance metal material. The gate electrode (GE) may contain a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed as a multilayer or single layer containing the above materials. there is.

A gate insulating layer 203 is interposed between the semiconductor layer (Act) and the gate electrode (GE), and the gate insulating layer 203 is made of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, and tantalum oxide. , and may include inorganic insulators such as hafnium oxide. The gate insulating layer 203 may be a single layer or a multilayer containing the above-described materials.

The source electrode (SE) and drain electrode (DE) may include a material with good conductivity. The source electrode (SE) and drain electrode (DE) may contain a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be a multilayer containing the above materials. Alternatively, it may be formed as a single layer. In one embodiment, the source electrode (SE) and drain electrode (DE) may be formed of a multilayer of Ti/Al/Ti.

The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 that overlap with the first interlayer insulating layer 205 therebetween. The storage capacitor (Cst) may overlap with the thin film transistor (TFT). In this regard, Figure 7 shows that the gate electrode (GE) of the thin film transistor (TFT) is the lower electrode (CE1) of the storage capacitor (Cst). As another example, the storage capacitor (Cst) may not overlap the thin film transistor (TFT). The storage capacitor Cst may be covered with the second interlayer insulating layer 207.

The first and second interlayer insulating layers 205 and 207 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxy nitride, aluminum oxide, titanium oxide, tantalum oxide, and hafnium oxide. The first and second interlayer insulating layers 205 and 207 may be a single layer or a multilayer containing the above-described materials.

The pixel circuit (PC) including a thin film transistor (TFT) and a storage capacitor (Cst) is covered with an organic insulating layer 209. The organic insulating layer 209 may be a planarization insulating layer. The organic insulating layer 209 is made of general-purpose polymers such as polymethylmethacrylate (PMMA) or polystylene (PS), polymer derivatives with phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorine polymers, p -May include organic insulators such as xylene-based polymers, vinyl alcohol-based polymers, and blends thereof. In one embodiment, the organic insulating layer 209 may include polyimide.

An organic light emitting diode (OLED) may be disposed on the organic insulating layer 209. The pixel electrode 221 of the organic light emitting diode (OLED) may be disposed on the organic insulating layer 209 and connected to the pixel circuit (PC) through a contact hole in the organic insulating layer 209.

The pixel electrode 221 is made of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ ), and indium. It may contain a conductive oxide such as gallium oxide (IGO; indium gallium oxide) or aluminum zinc oxide (AZO). In another embodiment, the pixel electrode 221 is made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), and neodymium (Nd). , it may include a reflective film containing iridium (Ir), chromium (Cr), or a compound thereof. In another embodiment, the pixel electrode 221 may further include a film formed of ITO, IZO, ZnO, or In ₂ O ₃ above and below the above-described reflective film.

The pixel definition film 211 includes an opening that exposes the top surface of the pixel electrode 221 and covers the edges of the pixel electrode 221. The pixel defining layer 211 may include an organic insulating material. Alternatively, the pixel defining layer 211 may include an inorganic insulating material, or may include an organic or inorganic insulating material.

The middle layer 222 includes a light emitting layer. The light-emitting layer may include a polymer or low-molecular organic material that emits light of a predetermined color. In one embodiment, the intermediate layer 222 includes a first functional layer 222a disposed below the light-emitting layer 222b and/or a second functional layer 222c disposed above the light-emitting layer 222b, as shown in FIG. ) may include.

The first functional layer 222a may be a single layer or a multilayer. For example, when the first functional layer 222a is formed of a polymer material, the first functional layer 222a is a single-layer hole transport layer (HTL), and is polyethylene dihydroxythiophene (PEDOT: poly-( 3,4)-ethylene-dihydroxy thiophene) or polyaniline (PANI: polyaniline). When the first functional layer 222a is formed of a low molecule material, the first functional layer 222a may include a hole injection layer (HIL) and a hole transport layer (HTL).

The second functional layer 222c is not always provided. For example, when the first functional layer 222a and the light-emitting layer 222b are formed of a polymer material, it is preferable to form the second functional layer 222c in order to improve the characteristics of the organic light-emitting diode (OLED). . The second functional layer 222c may be a single layer or a multilayer. The second functional layer 222c may include an electron transport layer (ETL) and/or an electron injection layer (EIL).

Some of the plurality of layers forming the middle layer 222, for example, functional layer(s), may be disposed not only in the display area DA but also in the first non-display area NDA1, which will be described later in the first non-display area NDA1. It is cut off by the first and second grooves G1 and G2.

The counter electrode 223 is arranged to face the pixel electrode 221 with the intermediate layer 222 interposed therebetween. The counter electrode 223 may be made of a conductive material with a low work function. For example, the counter electrode 223 is made of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), and iridium ( It may include a (semi) transparent layer containing Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. Alternatively, the counter electrode 223 may further include a layer such as ITO, IZO, ZnO, or In ₂ O ₃ on the (semi) transparent layer containing the above-mentioned material.

The organic light emitting diode (OLED) is covered with a thin film encapsulation layer 300. The thin film encapsulation layer 300 may include at least one organic encapsulation layer and at least one inorganic encapsulation layer. FIG. 7 shows that the thin film encapsulation layer 300 includes first and second inorganic encapsulation layers 310 and 330 and an organic encapsulation layer 320 sandwiched between them. In other embodiments, the number of organic encapsulation layers and the number and stacking order of inorganic encapsulation layers may be changed.

The first and second inorganic encapsulation layers 310 and 330 include one or more inorganic insulating materials such as aluminum oxide, titanium oxide, titanium oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride. It can be formed by chemical vapor deposition (CVD), etc. The organic encapsulation layer 320 may include a polymer-based material. Polymer-based materials may include acrylic resin, epoxy resin, polyimide, and polyethylene.

The input sensing layer 400 is located in the display area (DA). The input sensing layer 400 can acquire coordinate information according to an external input, for example, a touch event. The input sensing layer 400 is formed directly on the substrate 100 on which the thin film encapsulation layer 300 is formed and can contact the thin film encapsulation layer 300, and thus the input sensing layer 400 and the thin film encapsulation layer 300 A member such as an adhesive layer for joining them may be omitted. The input sensing layer 400 may include a sensing electrode (sensing electrode or touch electrode) and signal lines (trace lines) connected to the sensing electrode. The input sensing layer 400 may include first and second conductive layers 410 and 420 on which sensing electrodes are disposed, and first to third insulating layers 401, 403 and 405, and an input sensing layer related thereto. The specific structure of 400 will be described later with reference to FIGS. 17 to 20C.

Next, look at the first non-display area (NDA1) of FIG. 7.

Referring to the first non-display area (NDA1) of FIG. 7, the first non-display area (NDA1) is located in the first sub-non-display area (SNDA1) and the opening area (OA) that are relatively distant from the opening area (OA). It may include a relatively close second sub-non-display area (SNDA2).

The first sub-non-display area (SNDA1) is an area through which signal lines pass. The data lines DL shown in FIG. 7 may correspond to data lines that bypass the opening area OA described with reference to FIG. 5, and the first sub-non-display area SNDA1 is a wiring through which signal lines pass. It may be an area or a bypass area. The data lines DL may be arranged alternately with an insulating layer interposed between them, or may be arranged on the same insulating layer. When neighboring data lines DL are arranged below and above with an insulating layer (e.g., second interlayer insulating layer 207) in between, the gap (pitch) between neighboring data lines DL can be reduced. , the width of the first non-display area (NDA1) can be reduced. FIG. 7 shows data lines DL located in the first sub-non-display area SNDA1, but scan lines bypassing the opening area OA previously described with reference to FIG. 5 are also shown in the first sub-non-display area. It can be located in the area (SNDA1).

The second sub-non-display area SNDA2 is a type of groove area where grooves are arranged, and the first to third grooves G1, G2, and G3 may be located. The first to third grooves G1, G2, and G3 each have an undercut structure. The first to third grooves G1, G2, and G3 may be formed in a multilayer film of an inorganic layer and an organic layer. For example, the first to third grooves G1, G2, and G3 may be formed by removing a portion of the substrate 100 including multiple layers.

The first to third grooves G1, G2, and G3 may be formed by etching the second base layer 103 of the substrate 100 and the second inorganic layer 104 thereon. In this regard, FIG. 7 shows that first to third grooves G1, G2, and G3 are formed by removing a portion of the second base layer 103 and the second inorganic layer 104. Referring to FIG. 7, the buffer layer 201, the gate insulating layer 203, and the first and second interlayer insulating layers 205 and 207 on the second inorganic layer 104 are also removed to form the first to third grooves (G1). , G2, G3).

Each of the first to third grooves G1, G2, and G3 may have an undercut structure. The width of the portion passing through the second base layer 103 of each of the first to third grooves (G1, G2, G3) is the inorganic insulating layer(s), such as the second inorganic layer 104 and/or the buffer layer 201. ) may have an undercut structure that is larger than the width of the part passing through. A portion of the middle layer 222 and the counter electrode 223 may be cut off through the undercut structure of the first to third grooves G1, G2, and G3.

The first inorganic encapsulation layer 310 of the thin film encapsulation layer 300 may cover the inner surface of the first to third grooves G1, G2, and G3. The organic encapsulation layer 320 covers the first groove (G1) and may fill a portion of the first groove (G1). The organic encapsulation layer 320 can be formed by applying a monomer on the substrate 100 and then curing it. In order to control the flow of the monomer and secure the thickness of the monomer, the first and second grooves (G1, G2) are formed. A partition wall (500) may be provided between them. The partition wall 500 may have a stacked structure of first and second sub-wall portions 510 and 520 including an organic insulating material. The end (320E) of the organic encapsulation layer 320 may be disposed at a predetermined distance from the opening area (OA) or from the end (100E) of the substrate 100. The second inorganic encapsulation layer 330 is disposed on the organic encapsulation layer 320 and may cover the inner surfaces of the second and third grooves G2 and G3. The second inorganic encapsulation layer 330 may directly contact the first inorganic encapsulation layer 310 in the second and third grooves G2 and G3.

The planarization layer 610 may be located in the second sub-non-display area SNDA2 to cover at least one groove. The planarization layer 610 may cover the second and third grooves G2 and G3, and may fill at least one of the second and third grooves G2 and G3. As shown in FIG. 7 , the space above the second inorganic encapsulation layer 330 in the second groove G2 may be filled with the planarization layer 610. The planarization layer 610 can increase the flatness of the display panel around the opening area OA by covering an area of the second sub-non-display area SNDA2 that is not covered by the organic encapsulation layer 320 .

The planarization layer 610 includes an organic insulating material. The planarization layer 610 is spatially separated from the organic encapsulation layer 320 by the second inorganic encapsulation layer 330. For example, the planarization layer 610 is disposed above the second inorganic encapsulation layer 330 and the organic encapsulation layer 320 is disposed below the second inorganic encapsulation layer 330, such that the organic encapsulation layer 320 and The planarization layer 610 may be spatially separated from each other. The organic encapsulation layer 320 and the planarization layer 610 may not be in direct contact. The planarization layer 610 may have a thickness of, for example, 5 μm or more.

A portion of the planarization layer 610 may overlap the organic encapsulation layer 320. The first end 610E1 of the planarization layer 610 may extend onto the organic encapsulation layer 320 and overlap the organic encapsulation layer 320 . The second end 610E2 of the planarization layer 610 may be disposed at a predetermined distance from the opening area OA and/or from the end 100E of the substrate 100. Accordingly, the second end 620E2 of the barrier layer 620, which will be described later, may directly contact the second inorganic encapsulation layer 330 in the area adjacent to the opening 10H. The planarization layer 610 prevents or minimizes cracks, lifting, or peeling of the insulating layer(s) and metal/conductive layer(s) located in the first non-display area (NDA1) during the manufacturing process of the display panel. You can. The planarization layer 610 may be covered with a barrier layer 620.

The barrier layer 620 is located in the first non-display area NDA1 to cover the planarization layer 610 . The barrier layer 620 may cover the top and side surfaces of the planarization layer 610. The first end 620E1 of the barrier layer 620 may be located on the same line as the first end 610E1 of the planarization layer 610, as shown in FIG. 7 . Alternatively, the first end 620E1 of the barrier layer 620 extends beyond the end of the planarization layer 610 and onto the upper surface of the second inorganic encapsulation layer 330 to contact the second inorganic encapsulation layer 330. can do. The second end 620E2 of the barrier layer 620 may be located on the same vertical line as the end 100E of the substrate 100.

The barrier layer 620 may include an inorganic material, such as an inorganic insulating material and/or a metal. In one embodiment, the barrier layer 620 may include the same material as the inorganic insulating layer and/or metal layer included in the input sensing layer 400 disposed in the display area DA. For example, the barrier layer 620 may include first to fourth sub-barrier layers 621, 622, 623, and 624. The first and third sub-barrier layers 621 and 62 may include the same material as the first and second insulating layers 401 and 402 of the input sensing layer 400, respectively, and in this case, the material shown in FIG. 7 Unlike this, the first and third sub-barrier layers 621 and 62 may be integrally connected to the first and second insulating layers 401 and 402 of the input sensing layer 400, respectively. The second and second subbasil layers 622 and 624 may include the same material as the first and second conductive layers 410 and 420 of the input sensing layer 400, respectively, but the first and second conductive layers 622 and 624 may contain the same material as the first and second conductive layers 410 and 420 of the input sensing layer 400, respectively. They may not be connected to the layers 410 and 420 and may be positioned spaced apart from each other. In FIG. 7, the barrier layer 620 is shown as including first to fourth sub-barrier layers 621, 622, 623, and 624, but the present invention is not limited thereto. The barrier layer 620 may be a single layer or two or three layers. For example, the barrier layer 620 may include at least one layer selected from the first to fourth sub-barrier layers 621, 622, 623, and 624.

9 to 14 are cross-sectional views showing an opening area and a first non-display area according to the manufacturing process of a display panel according to an embodiment of the present invention. FIG. 9 is a cross-sectional view showing a state in which first to third grooves are formed in the display panel of FIG. 7, FIG. 10 is a cross-sectional view showing a state in which first to third grooves are formed as another embodiment, and FIG. 11 is a cross-sectional view showing a state in which first to third grooves are formed in the display panel of FIG. 7. It is a cross-sectional view showing the state in which the middle layer to the thin film encapsulation layer is formed on the display panel. FIGS. 12 and 13 are cross-sectional views showing the state in which the planarization layer and the barrier layer are formed after the process of FIG. 11, and FIG. 14 shows the first opening formed. It is a cross-sectional view showing the state after cutting, and FIG. 15 is a cross-sectional view showing the manufacturing process of the display panel according to another embodiment of the present invention, and FIG. 15 is a cross-sectional view showing the state after the cutting or scribing process according to another embodiment of FIG. 14. am.

Referring to FIG. 9, the first to third grooves G1, G2, and G3 can be formed by partially removing the multilayer film. A multilayer film is a layer including some layers of a substrate and may have a stacked structure of a layer including an organic insulating material such as polymer resin and a layer including an inorganic insulating material disposed thereon. For example, a second base layer 103 containing a polymer resin, and an inorganic insulating layer(s) such as a second inorganic layer 104 or/and a buffer layer 201 on the second base layer 103 are attached to the multilayer film. It may apply. In Figure 9, the second inorganic layer 104 and the buffer layer 201 are named as separate inorganic insulating layers between the second base layer 103 and the thin film transistor (TFT), but according to the embodiment, the second inorganic layer 104 and the buffer layer 201 are each named separately. The layer 104 may be understood as a part of the multi-layered buffer layer 201, or the buffer layer 201 may be understood as a part of the multi-layered second inorganic layer 104.

The first to third grooves G1, G2, and G3 may be formed by partially removing the second base layer 103 and the inorganic insulating layer(s) thereon. In one embodiment, Figure 9 shows a second base layer 103, a second inorganic layer 104, a buffer layer 201, a gate insulating layer 203, and first and second interlayer insulating layers 205 and 207. It shows what was removed through this etching process. The etching process for removing a portion of the second base layer 103 and the etching process for removing the inorganic insulating layer(s) on the second base layer 103 may be performed separately. A partition wall 500 may be located between the first groove (G1) and the second groove (G2), and the partition wall 500 includes a first sub-wall portion 510 formed of the same material as the organic insulating layer 209, and It may include a second sub-wall portion 520 formed of the same material as the pixel defining layer 211.

The width (W1) of the portion of the first groove (G1) that passes through the second base layer (103) is greater than the width (W2) of the hole that passes through the buffer layer (201) and the second inorganic layer (104) in the first groove (G1). It is formed large, and therefore the first groove G1 may have an undercut structure. The side surfaces of the buffer layer 201 and the second inorganic layer 104 may protrude further toward the center of the first groove G1 than the side surfaces of the second base layer 103. The portions of the buffer layer 201 and the second inorganic layer 104 that protrude further in a direction parallel to the upper surface of the substrate 100 toward the center of the first groove G1 are a pair of eaves (or a pair of protruding tips). or tip, PT). The protruding tips PT of each of the first to third grooves G1, G2, and G3 may protrude about 0.7 to 1.5 μm toward the center of the corresponding first to third grooves G1, G2, and G3. .

Like the first groove (G1), the second and third grooves (G2, G3) also have an undercut structure/eave structure. The width (W1', W1") of the portion of the second and third grooves (G2, G3) passing through the second base layer 103 is the buffer layer 201 and the second inorganic layer ( 104) may be formed to be larger than the width (W2', W2") of the portion passing through. Likewise, the sides of the buffer layer 201 and the second inorganic layer 104 that define the second and third grooves G2 and G3 are closer to the center of the first groove G1 than the sides of the second base layer 103. may protrude further toward. A pair of protruding tips PT protruding toward the centers of each of the first to third grooves G1, G2, and G3 of the buffer layer 201 and the second inorganic layer 104 form an undercut/eave structure.

The widths of at least two of the first to third grooves G1, G2, and G3 may be different from each other. For example, the width W2 between the protruding tips of the first groove G1 may be smaller than the width W2' between the protruding tips of the second groove G2, and the width W2' between the protruding tips of the second groove G2 may be smaller than the width W2' between the protruding tips of the second groove G2. The width W2' may be smaller than the width W2" between the protruding tips of the third groove G3. Alternatively, the protruding tips of at least two grooves among the first to third grooves G1, G2, and G3 The widths between the grooves may be the same. Alternatively, the width of the groove that is relatively far from the opening area (OA) among the plurality of grooves including the first to third grooves (G1, G2, G3) is the width of the opening area (OA). ) may be smaller than the width of the groove close to the width. Or, the width of the plurality of grooves including the first to third grooves G1, G2, and G3 may be arranged alternately with small and large grooves. The widths of the first to third grooves (G1, G2, G3) and other grooves (not shown) may be selected in various ways.

9 shows holes in which each of the first to third grooves G1, G2, and G3 passes through an inorganic insulating layer, for example, a hole formed in the buffer layer 201 and the second inorganic layer 104, and the second base layer 103. It shows that it consists of a recess formed in . The depth (h1, h2, h3) of each recess formed in the second base layer 103 may be smaller than the thickness (t) of the second base layer 103. Bottom surfaces of the first to third grooves G1, G2, and G3 may be placed on an imaginary surface between the upper and lower surfaces of the second base layer 103, respectively.

In another embodiment, as shown in FIG. 10, each of the first to third grooves G1, G2, and G is a hole passing through an inorganic insulating layer (e.g., a buffer layer 201 and a second inorganic layer 104). It may be composed of a hole formed in) and a hole passing through the second base layer 103. The depths (h1', h2', h3') of each hole formed in the second base layer 103 may be substantially equal to the thickness (t) of the second base layer 103, and thus the first to third grooves The bottom surfaces of (G1, G2, G3) may each be placed on the same virtual surface as the bottom surface of the second base layer 103. The depth of the above-mentioned recess or hole (h1, h2, h3, h1', h2', h3') may be about 2㎛ or more.

Hereinafter, for convenience of explanation, the description will focus on the structure of FIG. 9 in which the bottom surfaces of the first to third grooves G1, G2, and G3 are located between the upper and lower surfaces of the second base layer 103, which will be described later. In the embodiments and embodiments derived therefrom, the second base layer 103 may have the structure described with reference to FIG. 10 .

Referring to FIG. 11, an intermediate layer 222 and a counter electrode 223 are formed on the substrate 100 having the first to third grooves G1, G2, and G3. The middle layer 222 and the counter electrode 223 may be formed by a thermal evaporation method or the like. A portion of the intermediate layer, for example, the first and second functional layers 222a and 222c and the counter electrode 223, may be formed integrally in the display area DA and the first non-display area NDA1. The first and second functional layers 222a and 222c may be cut off in the first non-display area NDA1 by the undercut structure of the first to third grooves G1, G2, and G3. Likewise, the counter electrode 223 may also be cut off from the first non-display area NDA1 by the first to third grooves G1, G2, and G3.

Among the thin film encapsulation layers 300, the first inorganic encapsulation layer 310 has relatively excellent step coverage, unlike the middle layer 222 and the counter electrode 223, so the first inorganic encapsulation layer 310 is continuous without being interrupted. can be formed. The first inorganic encapsulation layer 310 may entirely cover the inner surfaces of the first to third grooves G1, G2, and G3, as shown in FIG. 11. The side and bottom surfaces of the buffer layer 201 and the second inorganic layer 104 forming the grooves (each first to third groove), and the side and bottom surfaces of the second base layer 103 are formed on the first inorganic encapsulation layer. It can be covered by (310). The first inorganic encapsulation layer 310 can cover the disconnected first and second functional layers 222a and 222c and the counter electrode 223 placed on the bottom surfaces of the first to third grooves G1, G2, and G3. there is.

Among the layers on the substrate 100, a layer containing organic material may serve as a moisture permeation path for foreign substances such as moisture or oxygen. Since the first and second functional layers 222a and 222c, which are organic materials, are cut off by the first to third grooves G1, G2, and G3, moisture flows in the lateral direction (x-direction) and flows into the organic light-emitting diode. It can prevent damage.

The first groove G1 is covered with the organic encapsulation layer 320, and the first groove G1 may be filled with the organic encapsulation layer 320. During the manufacturing process of the organic encapsulation layer 320, the flow of monomer may be controlled by the partition wall 500 between the first groove (G1) and the second groove (G2). The organic encapsulation layer 320 formed by curing the monomer whose flow is controlled by the partition wall 500 may not extend past the partition wall 500. The thickness of the organic encapsulation layer 320 may be adjusted by the partition wall 500, and the second and third grooves G2 and G3 may not be covered by the organic encapsulation layer 320.

The inner surfaces of the second and third grooves G2 and G3 are covered with the first inorganic encapsulation layer 310 as described above. The first and second inorganic encapsulation layers 310 and 330 may contact each other in the second and third grooves G2 and G3. The first and second inorganic encapsulation layers 310 and 330 may be formed not only in the display area DA (FIG. 7) and the first non-display area NDA1, but also in the opening area OA.

Referring to FIG. 12, a pre-flattening layer 610P is formed on the thin film encapsulation layer 300. The pre-planarization layer 610P may include an organic material, such as photoresist (negative or positive) or a polymer-based material. The pre-flattening layer 610P may cover the contact area of the first and second inorganic encapsulation layers 310 and 330 in the first non-display area NDA1, and a portion may cover the second inorganic encapsulation layer 330. It can be overlapped with the organic encapsulation layer 320 in between.

Referring to FIG. 13, the planarization layer 610 is formed by patterning the pre-planarization layer 610P. For example, the planarization layer 610 may be formed by removing a portion of the pre-planarization layer 610P corresponding to the opening area OA. The planarization layer 610 may cover the second and third grooves G2 and G3. As shown in FIG. 13 , the planarization layer 610 may fill a portion of the second groove G2 and the third groove G3. Depending on the process of patterning the pre-planarization layer 610P, the position of the second end 610E2 of the planarization layer 610 may be changed in the left and right directions from the position shown in FIG. 13.

Afterwards, a barrier layer 620 is formed on the planarization layer 610. The barrier layer 620 is an inorganic layer and may include an inorganic insulating layer and/or a metal layer. The barrier layer 620 may include at least one of the layers provided in the input sensing layer, as previously described with reference to FIG. 7.

The barrier layer 620 may cover the top and side surfaces of the planarization layer 610. In some areas of the opening area OA and the first non-display area NDA1, the barrier layer 620 may cover the upper surface of the second inorganic encapsulation layer 330. The barrier layer 620 is in direct contact with the top and side surfaces of the planarization layer 610 and may also be in direct contact with the top surface of the second inorganic encapsulation layer 330.

Next, when a laser cutting or scribing process is performed along the first line (SCL1) corresponding to the opening area (OA), a first opening (100H) is formed in the substrate 100 as shown in FIG. 14. can do. If a crack occurs in the inorganic insulating layer during the cutting or scribing process of the substrate 100, the crack may progress along the arrow direction (“C”) in FIG. 14. However, the crack no longer progresses toward the display area due to the undercut/eave structure of the third groove G3.

When the cutting or scribing process proceeds along the first line (SCL1) of FIG. 13, the third groove (G3) may have an eaves structure (protruding tip) in the left and right directions in the cross section, as shown in FIG. 14. . As another embodiment, when a cutting or scribing process is performed along the second line (SCL2, Figure 13) overlapping with the third groove (G3), the third groove (G3) is formed as shown in Figure 15. Only the right eaves structure (right protruding tip) can be provided.

In the above-described embodiment, a laser cutting or scribing process was described as a method of forming the first opening 100H in the substrate 100, but in other embodiments, various methods such as mechanical polishing can be used.

The structure described with reference to FIGS. 7 to 15 can be understood as a structure surrounding the opening 10H, that is, the opening area OA. For example, the planarization layer 610 between the opening area OA and the display area DA may be understood as a ring shape surrounding the opening area OA in a plan view, as shown in FIG. 16 . The organic encapsulation layer 320 covers a portion of the display area DA and the first non-display area NDA1, and the end 320E of the organic encapsulation layer 320 is spaced a predetermined distance from the opening area OA. It may overlap with the planarization layer 610.

Figure 17 is a plan view schematically showing an excerpt of an input sensing layer according to an embodiment of the present invention.

Referring to FIG. 17, the input sensing layer 400 includes a first sensing electrode (SP1) and a second sensing electrode (SP2) located in the display area (DA). The first sensing electrodes (SP1) are arranged along the x-direction, and the second sensing electrodes (SP2) are arranged along the y-direction that intersects the first sensing electrodes (SP1). The first sensing electrodes (SP1) and the second sensing electrodes (SP2) may cross each other vertically.

The first sensing electrodes (SP) and the second sensing electrodes (SP2) may be arranged at corners adjacent to each other. The first sensing electrodes SP1 may be electrically connected to each other through the first connection electrode CP1, and the second sensing electrodes SP2 may be electrically connected to each other through the second connection electrode CP2.

Figures 18a and 18b are plan views showing the first conductive layer and the second conductive layer among the input sensing layers according to an embodiment of the present invention, respectively, and Figure 18c is a cross-sectional view showing the input sensing layer according to an embodiment of the present invention. As, it can correspond to the cross section along line XVII-XVII' of FIG. 17.

Referring to FIGS. 18A and 18B, the first sensing electrode (SP1) and the second sensing electrode (SP2) may be disposed on the same layer. The first conductive layer 410 includes a first connection electrode (CP1) (see FIG. 18A), and the second conductive layer 420 includes a first sensing electrode (SP1), a second sensing electrode (SP2), and a first sensing electrode (SP2). It includes two connection electrodes (CP2) (see Figure 18b).

The second sensing electrodes (SP2) may be connected by a second connection electrode (CP2) disposed on the same layer. The first sensing electrodes (SP1) are arranged along the x-direction and may be connected by a first connection electrode (CP1) disposed on a different layer.

Referring to FIG. 18C, a second insulating layer 403 is interposed between the first conductive layer 410 and the second conductive layer 420. The first sensing electrode (SP1) disposed on the second conductive layer 420 is connected to the first connection electrode (CP1) disposed on the first conductive layer 410 through the contact hole (CNT) of the second insulating layer 403. can be connected to. The second conductive layer 420 may be covered with a third insulating layer 405, and a first insulating layer 401 may be disposed under the first conductive layer 410. The first and second insulating layers 401 and 403 may be inorganic insulating layers such as silicon nitride, and the third insulating layer 405 may be an organic insulating layer. Figure 18c shows that the first insulating layer 401 is interposed between the thin film encapsulation layer 300 and the first conductive layer 410, but in another embodiment, the first insulating layer 401 is omitted and the first conductive layer is replaced with the first insulating layer 401. Layer 410 may be located directly on top of thin film encapsulation layer 300. As another example, the first and second insulating layers 401 and 403 may be organic insulating layers.

Figures 19a and 19b are plan views showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively, and Figure 19c is a cross-sectional view showing the input sensing layer according to another embodiment of the present invention. As, it can correspond to the cross section along line XVII-XVII' of FIG. 17.

Referring to FIGS. 19A and 19B, the first conductive layer 410 includes first sensing electrodes SP1 and a first connection electrode CP1 connecting them, and the second conductive layer 420 includes the second sensing electrodes SP1. It includes sensing electrodes (SP2) and a second connection electrode (CP2) connecting them. The first conductive layer 410 may further include a second auxiliary sensing electrode (S-SP2) connected to the second sensing electrode (SP2), and the second conductive layer 420 is connected to the first sensing electrode (SP1). It may further include a first auxiliary sensing electrode (S-SP1) connected to.

Referring to the enlarged view of FIG. 19A, each first sensing electrode SP1 may include a plurality of holes H. The hole (H) is arranged to overlap the light emitting area (P-E) of the pixel. Although not shown, the second sensing electrode (SP2), the first auxiliary sensing electrode (S-SP1), and the second auxiliary sensing electrode (S-SP2) also correspond to the light emitting area (P-E) of the pixel as shown in the enlarged view of FIG. 19A. It may include a plurality of holes.

Referring to FIG. 19C, the first auxiliary sensing electrode (S-SP1) can be connected to the first sensing electrode (SP1) through the contact hole (CNT) of the second insulating layer 403, and through this structure, The resistance of the first sensing electrode (SP1) can be reduced. Likewise, the second sensing electrode (SP2) can be connected to the second auxiliary sensing electrode (S-SP2) through a contact hole in the second insulating layer (403). The first and second insulating layers 401 and 403 may be inorganic insulating layers, the first and second conductive layers 410 and 420 may be a single layer or a multilayer containing a metal such as aluminum or titanium, and the third conductive layer may be a single or multilayer layer containing a metal such as aluminum or titanium. The insulating layer 405 may include an organic insulating material.

Figures 20a and 20b are plan views showing the first conductive layer and the second conductive layer among the input sensing layers according to another embodiment of the present invention, respectively, and Figure 20c is a cross-sectional view showing the input sensing layer according to another embodiment of the present invention. As, it can correspond to the cross section along line XVII-XVII' of FIG. 17.

Referring to FIGS. 20A and 20B, the first conductive layer 410 includes first sensing electrodes SP1 and a first connection electrode CP1 connecting them, and the second conductive layer 420 includes the second sensing electrodes SP1. It includes sensing electrodes (SP2) and a second connection electrode (CP2) connecting them.

Referring to FIG. 20C, a second insulating layer 403' may be disposed between the first conductive layer 410 and the second conductive layer 420. The second insulating layer 403' does not have a separate contact hole, and the first and second sensing electrodes SP1 and SP2 may be electrically insulated with the second insulating layer 403' therebetween. The second conductive layer 420 may be covered with a third insulating layer 405'. The second insulating layer 403' may be an organic insulating layer. In another embodiment, the second insulating layer 403' may include an inorganic insulating layer or both organic and inorganic insulating layers. And the second insulating layer 403' may be an organic insulating layer, an inorganic insulating layer, or may include organic and inorganic insulating layers.

FIG. 21 is a cross-sectional view of a display panel according to another embodiment of the present invention, and may correspond to a cross-section taken along line VII-VII' of FIG. 6. The difference from the display panel described with reference to FIG. 7 is that four or more grooves are arranged in the first non-display area NDA1. In relation to this, Figure 21 shows one fourth groove (G4) located between the second groove (G2) and the third groove (G3), but in another embodiment, the second groove (G2) and the third groove (G3) are shown. A plurality of fourth grooves G4 may be located between the grooves G3. For example, the laminated structure on the fourth groove G4 may be the same as that on the second groove G2.

Of course, with reference to FIG. 21, the number of grooves and their structure can be applied not only to the above-described embodiments but also to embodiments to be described later and embodiments derived therefrom.

FIG. 22 is a cross-sectional view of a display panel according to another embodiment of the present invention, and may correspond to a cross-section taken along line VII-VII' of FIG. 6. The display panel described with reference to FIG. 7 has a structure in which the second end 610E2 of the planarization layer 610 is spaced apart from the opening area OA, for example, the end 100E of the substrate 100 by a predetermined distance. The location of second end 610E2 of layer 610 may vary as shown in FIG. 22 .

Referring to FIG. 22, the second end 610E2 of the planarization layer 610 may be located on the same vertical line as the end 100E of the substrate 100. In other words, the side surface of the planarization layer 610 may be positioned on the same vertical line as the end portion 100E.

When the process of patterning the pre-planarization layer 610P is omitted during the manufacturing process previously described with reference to FIGS. 9 to 15, the side of the planarization layer 610 is attached to the barrier layer 620, as shown in FIG. 22. It may be exposed to the opening 10H without being covered by it.

Since the side surface of the planarization layer 610 is exposed to the opening 10H, moisture flowing in through the planarization layer 610, which is an organic insulating layer, flows in the lateral direction (lateral direction in FIG. 22) toward the display area DA. You can proceed. However, since the second inorganic encapsulation layer 330 is disposed between the planarization layer 610' and the organic encapsulation layer 320, moisture passes through the second inorganic encapsulation layer 330 and moves toward the display area DA. may be blocked.

Of course, the structure of the planarization layer 610 described with reference to FIG. 22 can be applied not only to the above-described embodiments but also to embodiments to be described later and embodiments derived therefrom.

FIG. 23 is a cross-sectional view of a display panel according to another embodiment of the present invention, and may correspond to a cross-section taken along line VII-VII' of FIG. 6.

Referring to FIG. 23, a partition 500A may be further included between the first groove G1 and the display area DA. Hereinafter, in order to distinguish it from the partition wall 500 between the first and second grooves G1 and G2, the partition wall 500 between the first and second grooves G1 and G2 will be referred to as the first partition wall, and the partition wall 500 between the first and second grooves G1 and G2 will be referred to as the first partition wall. The partition wall 500A between the first groove (G1) and the display area (DA) is called the second partition wall (500A).

The second partition 500A may include an organic insulating material. For example, the second barrier rib 500A may include the same material as the pixel defining layer 211. In some embodiments, the second barrier wall 500A may overlap signal lines (eg, data lines DL) that bypass the opening area OA.

During the manufacturing process of the organic encapsulation layer 320, the flow of monomer may be controlled by the second partition 500A. In this case, the end of the organic encapsulation layer 320 may be disposed adjacent to the inside of the second partition 500A, and the organic encapsulation layer 320 does not cover the first to third grooves G1, G2, and G3. No. In the first to third grooves G1, G2, and G3, the first and second inorganic encapsulation layers 310 and 330 may contact each other.

Of course, the structure of the planarization layer 610 described with reference to FIG. 23 can be applied not only to the above-described embodiments but also to embodiments to be described later and embodiments derived therefrom.

FIG. 24 is a cross-sectional view of a display panel according to another embodiment of the present invention, and may correspond to a cross-section taken along line VII-VII' of FIG. 6. In the display panel described with reference to FIG. 7 , the planarization layer 610 is disposed immediately above the thin film encapsulation layer 300 in the first non-display area NDA1. Accordingly, the planarization layer 610 of FIG. 7 is in direct contact with the upper surface of the second inorganic encapsulation layer 330 in the first non-display area NDA1, but the display panel of FIG. 24 has the thin film encapsulation layer 300 and the planarization layer ( The lower barrier layer 700 is further disposed between 610, and therefore the thin film encapsulation layer 300 and the planarization layer 610 may not be in direct contact.

The lower barrier layer 700 may include an inorganic material. For example, the lower barrier layer 700 may include an inorganic insulating layer and/or a metal layer, and in some embodiments, the lower barrier layer 700 may include some of the layers included in the input sensing layer 400. .

Referring to the enlarged view of FIG. 24, the lower barrier layer 700 may be formed of a plurality of first to fourth lower layers 701, 702, 703, and 704. The lower barrier layer 700 may include at least one layer among the layers included in the input sensing layer 400 described above with reference to FIGS. 18A to 20C. For example, the first and third lower layers 701 and 703 may each include the same material as the first insulating layer 401 and the second insulating layer 403 of the input sensing layer 400, and the first insulating layer 401 and the second insulating layer 403 may include an inorganic insulating material as described with reference to FIG. 18C or 19C. The second and fourth lower layers 702 and 704 may include the same material as the first conductive layer 410 and the second conductive layer 420 of the input sensing layer 400, respectively. The planarization layer 610 on the lower barrier layer 700 may include the same material as the third insulating layer 405 of the input sensing layer 400, and the third insulating layer 405 is shown in FIG. 18C or 19C. It may include an organic insulating material as described with reference. In this case, the lower barrier layer 700 and the planarization layer 610 may be formed in the same process as the formation process of the input sensing layer 400.

Figure 24 shows that the ends of the planarization layer 610 and the lower barrier layer 700 are disposed at a predetermined distance from the input sensing layer 400, but the present invention is not limited thereto. The first and third lower layers 701 and 703 of the lower barrier layer 700 may be integrally connected to the first and second insulating layers 401 and 403 of the input sensing layer 400, respectively. The second and fourth lower layers 702 and 704 of the lower barrier layer 700 are the first conductive layer 410 and the second conductive layer 420 of the input sensing layer 400, respectively, as shown in FIG. 24. can be spaced apart from each other. The planarization layer 610 may be integrally connected to the third insulating layer 405 of the input sensing layer 400.

The multilayer structure of the lower barrier layer 700 described above can also be applied to the embodiment(s) described later and embodiments derived therefrom. 24 illustrates that the lower barrier layer 700 has four layers, but in other embodiments, the lower barrier layer 700 can be varied, such as one layer, two layers, three layers, or five or more layers. It can be. For example, the lower barrier layer 700 may include at least one of the first to fourth lower layers 701, 702, 703, and 704 shown in FIG. 24. In another embodiment, when the lower barrier layer 700 includes three layers, the lower barrier layer 700 includes the first conductive layer 410 and the second insulation of the input sensing layer 400 described in FIG. 20C. It may include the same material as the layer 403' and the second conductive layer 420, and the planarization layer 610 on the lower barrier layer 700 may include the same material as the third insulating layer 405' of FIG. 20C. It can be included.

FIG. 25 is an enlarged cross-sectional view showing the structure of the lower barrier layer in the second groove of the display device according to an embodiment of the present invention, and may correspond to the enlarged view XXV of FIG. 24. In FIG. 25 , for convenience of explanation, the case where the lower barrier layer 700 includes first to fourth lower layers 701, 702, 703, and 704 is described.

Referring to FIG. 25, the depth of the portion of the second groove G2 passing through the second base layer 103 is the depth of the first and second functional layers 222a and 222c, the counter electrode 223, and the first and second functional layers 222a and 222c. It may be formed to be larger than the sum of the thicknesses of the inorganic encapsulation layers 310 and 330 and the lower barrier layer 700 in the vertical direction (direction perpendicular to the top surface of the substrate, z-direction).

The lower barrier layer 700 may have a stacked structure of an inorganic insulating layer and a metal layer. For example, the first and third lower layers 701 and 703 may be inorganic insulating layers such as silicon nitride, and the second and fourth lower layers 702 and 704 may include aluminum (Al), titanium (Ti), etc. It may be a metal layer. In some embodiments, the second and fourth lower layers 702 and 704 may be multilayers such as Ti/Al/Ti. A second inorganic encapsulation layer 330 and a first inorganic encapsulation layer 310 may be disposed under the lower barrier layer 700.

The first and second inorganic encapsulation layers 310, 330 and the first and third lower layers 701, 703 may be formed through a process such as chemical vapor deposition, and the second and fourth lower layers 702, 704 Can be formed through a process such as sputtering.

Referring to FIG. 25, the first and second inorganic encapsulation layers 310 and 330 and the first and third lower layers 701 and 703 may entirely cover the inner surface of the third groove G3. On the other hand, the second and fourth lower layers 702 and 704 may have relatively lower step coverage than the inorganic insulating layer depending on process conditions, etc. In this case, as shown in FIG. 25, the second and fourth lower layers 702 and 704 may be formed to be very thin or discontinuous near the eaves structure, that is, the protruding tip PT.

In FIG. 25 , the specific structure of the lower barrier layer 700 is explained centering on the second groove G2, but the present invention is not limited thereto. The structure of the lower barrier layer 700 in the third groove G3 may also be similar to the structure shown in FIG. 25. The structure described in FIG. 25 can be equally applied not only to the embodiment described with reference to FIG. 24 but also to the embodiments described with reference to FIGS. 26 to 28 and embodiments derived therefrom.

Figures 26 to 28 are cross-sectional views according to another embodiment of the present invention, and may correspond to cross-sections taken along line VII-VII' in Figure 6.

As shown in FIG. 26, the display panel may further include at least one fourth groove (G4) in the first non-display area (NDA1), and the lower barrier layer 700 may include second to fourth grooves ( G2, G3, G4) may directly contact the second inorganic encapsulation layer 330.

As shown in FIG. 27 , the display panel may have a planarization layer 610 having a side surface located on the same vertical line as the end 100E of the substrate 100. In this case, moisture, etc. may flow in through the planarization layer 610, but the moisture moving laterally through the planarization layer 610 is caused by the multilayer structure of the lower barrier layer 700 and the second inorganic encapsulation layer 330. Since it is blocked, it is not transmitted to the organic encapsulation layer 320. Therefore, it is possible to prevent the display area DA from being damaged by moisture, etc.

As shown in FIG. 28, the display panel may further include a second barrier wall 500A, and the lower barrier layer 700 may be a second inorganic encapsulation layer in the first to third grooves G1, G2, and G3. You can contact (330) directly.

24 to 28 disclose a structure in which the upper surface of the planarization layer 610 is covered with a barrier layer 620, but in some embodiments, the barrier layer 620 may be omitted.

24 to 28 disclose a structure in which the lower barrier layer 700 is disposed in the second sub-non-display area SNDA2, but in some embodiments, the lower barrier layer 700 is disposed in the first sub-non-display area SNDA2. (SNDA1) and/or may be extended to the display area (DA). For example, as described above, when the lower barrier layer 700 includes the first and/or third lower layers 701 and 703 that are inorganic insulating layers, they are used in the first sub-non-display area SNDA1 and/or the display area. It can be extended to area (DA).

Figure 29 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention. In FIG. 29 , for convenience, a portion of the first non-display area NDA1, for example, the second sub-non-display area SNDA2 is shown, but the display panel of FIG. 29 also includes the first sub-non-display area SNDA1 and the display area. (DA) and its structure is the same as previously described with reference to FIGS. 7 to 28.

Referring to FIG. 29, a plurality of grooves, for example, first to third grooves G1, G2, and G3, are located in the second sub-non-display area (SNDA2). A partition wall may be disposed between neighboring grooves among the plurality of grooves. In this regard, Figure 29 shows a first partition 500 between the first and second grooves G1 and G2 and a partition 500B between the second and third grooves G2 and G3, hereinafter referred to as the third partition. ) is shown.

The first and third partition walls 500 and 500B may include first sub-walls 510' and 510B and second sub-walls 520 and 520B, respectively. Each of the first sub-wall portions 510' and 510B is a stack of inorganic insulating layer(s) patterned underneath, for example, a gate insulating layer 203 and the first and second interlayer insulating layers 205 and 207. (ST) can be covered. More specifically, the side of the stack (ST) may be covered by each first sub-wall portion (510', 510B), and each of the first sub-wall portions (510', 510B) is below the stack (ST). It may contact the upper surface of the buffer layer 201.

As mentioned above, a portion of the intermediate layer 222, for example, the first and second functional layers, and the counter electrode 223 may be cut off by the first to third grooves G1, G2, and G3. As described above, the inner surfaces of the first to third grooves G1, G2, and G3 may be covered by the first inorganic encapsulation layer 310.

The organic encapsulation layer 320 may cover the first to third grooves G1, G2, and G3. For example, the first part 320A of the organic encapsulation layer 320 covers the first and second grooves G1 and G2, and the second part 320B of the organic encapsulation layer 320 covers the third groove G3. ) can be covered. Although not shown, the first portion 320A of the organic encapsulation layer 320 covering the first and second grooves G1 and G2 may also cover the display area and the first sub-non-display area. The second portion 320B of the organic encapsulation layer 320 can relieve stress and thus prevent the film (eg, layers containing inorganic materials) from lifting or peeling in the corresponding area.

The organic encapsulation layer 320 is cut off at the second sub-non-display area (SNDA2). For example, the first part 320A and the second part 320B of the organic encapsulation layer 320 may be spaced apart from each other with the third partition 500B interposed, and the first part 320A and the second part 320B spaced apart from each other may be spaced apart from each other. The space between the two parts 320B can be understood as a hole 320H of the organic encapsulation layer 320. The hole 320H may be located between the second and third grooves G2 and G3, as shown in FIG. 29. The second inorganic encapsulation layer 330 on the organic encapsulation layer 320 may directly contact the first inorganic encapsulation layer 310 through the hole 320H.

The planarization layer 610 is disposed on the second inorganic encapsulation layer 330 and may cover at least one of the plurality of grooves, in one embodiment. As shown in FIG. 29, the planarization layer 610 is disposed to overlap the first and second grooves (G1, G2) and a portion of the third groove (G3), and the first and second grooves (G1, G2) ), and may cover part of the third groove (G3).

The planarization layer 610 may include a hole 610H. The hole 610H of the planarization layer 610 may overlap the third groove G3. The hole 610H of the planarization layer 610 may have a width smaller than the width W2" of the third groove G3. Alternatively, the hole 610H of the planarization layer 610 may have a width smaller than the width W2" of the third groove G3. It may have the same width (W2") or a width greater than the width (W2") of the third groove (G3). The hole (610H) of the planarization layer (610) is formed by the organic encapsulation layer (320). It may be disposed closer to the opening area (OA) than the hole 320H of the planarization layer 610. Alternatively, the hole 610H of the planarization layer 610 may be located closer to the opening area OA than the hole 320H of the organic encapsulation layer 320. It may be arranged away from. Figure 29 shows that the hole 610H of the planarization layer 610 is spaced apart from the hole 320H of the organic encapsulation layer 320 by a predetermined distance, but the present invention is not limited thereto. In another embodiment, the hole 610H of the planarization layer 610 may at least partially overlap the hole 320H of the organic encapsulation layer 320.

The barrier layer 620 is disposed on the planarization layer 610 and may directly contact the second inorganic encapsulation layer 330 through the hole 610H of the planarization layer 610. The barrier layer 620 contains an inorganic material and may be a single layer or a multilayer, and its description is the same as the embodiment previously described with reference to FIG. 7 . An additional planarization layer 630 may be further disposed on the barrier layer 620. The additional planarization layer 630 may include organic material. For example, the barrier layer 620 is an inorganic insulating layer and/or a metal layer (e.g., among the first insulating layer, first conductive layer, second insulating layer, and second conductive layer) formed on the input sensing layer as described with reference to FIG. At least one), the additional planarization layer 630 may include the same material as the third insulating layer of the input sensing layer. In this case, the additional planarization layer 630 may be integrally connected to the third insulating layer of the input sensing layer. In other words, the additional planarization layer 630 can be understood as the third insulating layer of the input sensing layer.

The structure shown in FIG. 29 can be understood as a structure surrounding the opening 10H, that is, the opening area OA. For example, in plan view, the planarization layer 610 may be understood as a ring shape surrounding the opening area OA. Additionally, the second portion 320B of the organic encapsulation layer 320 covering the third groove G3 may also be understood as a ring shape surrounding the opening area OA in a plan view. Likewise, the holes 320H and 610H provided in each of the organic encapsulation layer 320 and the planarization layer 610 may be understood as a ring shape surrounding the opening area OA in a plan view.

The hole 320H of the organic encapsulation layer 320 may be understood as an area on the substrate 100 where the organic encapsulation layer 320 is not provided. Therefore, in the embodiments described above with reference to FIGS. 7 to 28, the area between the end 100E of the substrate 100 and the end 320E of the organic encapsulation layer 320 has the hole ( 320H). Likewise, the hole 610H of the planarization layer 610 may be understood as an area on the substrate 100 where the planarization layer 610 is not provided. Accordingly, in the embodiments described above with reference to FIGS. 7 to 28 (but excluding FIGS. 22 and 27), between the end 100E of the substrate 100 and the second end 610E2 of the planarization layer 610. The area may be understood as the hole 610H of the planarization layer 610.

FIG. 29 may correspond to a cross-section of a display panel that has undergone a cutting or scribing process along the first line (SCL1) during the display panel manufacturing process. However, the present invention is not limited to this. In another embodiment, as shown in FIG. 29 , the area from the first line SCL1 to the n-th line SCLn may be understood as a cutting area CA during the manufacturing process of the display panel. That is, a cutting or scribing process may be performed along any one of the n-th lines (SCLn) from the first line (SCL1), and the resulting cross-sectional structure may be displayed according to the embodiment(s) of the present invention. It may correspond to the structure of the panel.

FIG. 30 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention, and FIGS. 31A and 31B are enlarged views of the third groove of FIG. 30.

The display panel of FIG. 30 is different from the display panel explained with reference to FIG. 29 in the second portion 320B of the organic encapsulation layer 320 on the third groove G3. As shown in FIG. 30, the second portion 320B of the organic encapsulation layer 320 is disposed on the third groove G3, but may cover only a portion of the third groove G3. The second portion 320B of the organic encapsulation layer 320 may be broken around the protruding tip of the third groove G3 (see the left protruding tip in FIG. 30). For example, the second portion 320B of the organic encapsulation layer 320 includes a 2-1 portion 320B1 and a third groove located around the third groove G3 with the protruding tip of the third groove G3 as the center. It may include a 2-2 part 320B2 located within (G3).

Referring to FIG. 31A, the 2-2 portion 320B2 is located within the third groove G3, and is a portion of the intermediate layer 222 (e.g., the first and second portions) placed on the bottom surface of the third groove G3. functional layer) and the counter electrode 223. Alternatively, referring to FIG. 31B, the 2-2 portion 320B2 may be located within the third groove G3 but only below the protruding tip PT. The 2-2 portion 320B2 is located below the pair of protruding tips PT, and the 2-2 portion 320B2 is formed to be very thin or does not exist in the center portion of the third groove G3. It may not be possible.

FIG. 30 may correspond to a cross-section of a display panel that has undergone a cutting or scribing process along the first line (SCL1) during the display panel manufacturing process. In another embodiment, as shown in FIG. 30 , the area from the first line SCL1 to the nth line SCLn may be understood as a cutting area CA during the manufacturing process of the display panel. Therefore, although not shown, the cross-sectional structure in which the cutting or scribing process was performed along any one line (a line perpendicular to the substrate) between the first line (SCL1) and the n-th line (SCLn) is the cross-sectional structure of the present invention. Of course, this corresponds to the structure of the display panel according to the embodiment(s).

Figure 32 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.

Referring to FIG. 32, the organic encapsulation layer 320 on the first to third grooves G1, G2, and G3 is the same as previously described with reference to FIGS. 30 to 31B. The planarization layer 610 of the display panel of FIG. 32 does not include the hole 610H, unlike the display panel of FIGS. 29 and 30 . For example, the planarization layer 610 of FIG. 32 may entirely cover the second sub-non-display area (NDA). The barrier layer 620 does not directly contact the second inorganic encapsulation layer 330.

FIG. 32 may correspond to a cross-section of a display panel in which a cutting or scribing process was performed along the first line SCL1 during the display panel manufacturing process. In another embodiment, although not shown, a cross-sectional structure in which a cutting or scribing process was performed along any one of the n-th lines (SCLn) from the first line (SCL1) existing in the cutting area (CA) Of course, this corresponds to the structure of the display panel according to the embodiment(s) of the present invention.

33 is a cross-sectional view schematically showing an opening area and a first non-display area of a display panel according to another embodiment of the present invention.

Referring to FIG. 33, a plurality of third grooves G3' may be located between the opening area OA and the second groove G2. Each of the third grooves G3' may have substantially the same width as the first and/or second grooves G1 and G2, or may have a width smaller than that of the first and/or second grooves G1 and G2.

The planarization layer 610 may be located on the second and third grooves G2 and G3', and the space above the second inorganic encapsulation layer 330 among the second and third grooves G2 and G3'. may be filled with the planarization layer 610. The arrangement of the plurality of third grooves G3 shown in Figure 33 can also be applied to the embodiments described above with reference to FIGS. 7 to 32 and embodiments derived therefrom. You can.

FIG. 33 may correspond to a cross-section of a display panel that has undergone a cutting or scribing process along the first line (SCL1) during the display panel manufacturing process. In another embodiment, although not shown, a cutting or scribing process may be performed along any one of the nth lines (SCLn) from the first line (SCL1) existing in the cutting area (CA), Of course, the resulting cross-sectional structure also corresponds to the structure of the display panel according to the embodiment(s) of the present invention.

The number of third grooves G3' described in FIG. 33 does not limit the present invention. In another embodiment, more third grooves may be disposed than the number of third grooves G3' shown in FIG. 33. In addition, of course, the structure of the plurality of third grooves G3' described in FIG. 33 can also be applied to the embodiments previously described with reference to FIGS. 7 to 33 and embodiments derived therefrom.

At least one of organic materials, such as an organic encapsulation layer 320, a planarization layer 610, or an additional planarization layer 630, is disposed in the cutting area CA shown in FIGS. 29, 30, 32, and 33. Therefore, unlike the case without the above-mentioned organic material, stress can be alleviated and the lifting phenomenon of the film (eg, inorganic layers) can be prevented or minimized.

The partition walls (first and third partition walls 500 and 500B) shown in FIGS. 29, 30, 32, and 33 may also be applied to the embodiment of the display panel previously described with reference to FIGS. 7 to 28. In addition, the additional planarization layer 630 shown in FIGS. 29, 30, 32, and 33 may also be applied to the embodiments previously described with reference to FIGS. 7 to 28 and embodiments derived therefrom.

FIG. 34 is a plan view showing a portion of a display panel according to another embodiment of the present invention, and FIG. 35 is an enlarged plan view of the opening area of FIG. 34.

Referring to FIGS. 34 and 35 , the opening area OA of the display panel 10' may be partially surrounded by the display area DA. Pixels P may be arranged to be spaced apart on the left and right around the opening area OA. The scan line (SL) that transmits the scan signal to the pixels (P) on the left and right of the aperture area (RA) can bypass the aperture area (OA) in the first non-display area (NDA1). there is.

The opening area OA may be surrounded by the first to third grooves G1, G2, and G3, and at least one outer groove may be located in the second non-display area NDA2. In relation to this, FIG. 34 shows the arrangement of the first and second outer grooves OG1 and OG2 provided in the second non-display area NDA2.

At least one of the grooves surrounding the opening area (OA) may be connected to the outer groove. As shown in FIG. 35, one groove surrounding the opening area OA, for example, the first groove G1, may be connected to the first outer groove OG1 provided in the second non-display area NDA2. . Alternatively, the grooves surrounding the opening area OA may be spaced apart without being connected to the outer groove.

Since the structure of the first non-display area NDA1 is the same as the embodiment previously described with reference to FIGS. 7 to 33 and the embodiments derived therefrom, the above description is replaced.

FIG. 36 is a plan view schematically showing a display panel according to another embodiment of the present invention, and FIG. 37 is an enlarged plan view of the opening area of FIG. 36.

36 and 37, the opening area OA of the display panel 10" may be partially surrounded by the display area DA. Pixels P are located above and below the opening area OA. The data line DL, which transmits data signals to the pixels P on the upper side and the pixel P on the lower side of the opening area RA, is located in the opening area in the first non-display area NDA1. (OA) You can take a detour around it.

The opening area OA may be surrounded by the first to third grooves G1, G2, and G3, and at least one outer groove may be located in the second non-display area NDA2. In relation to this, FIG. 36 shows the arrangement of the first and second outer grooves OG1 and OG2 provided in the second non-display area NDA2.

At least one of the grooves surrounding the opening area (OA) may be connected to the outer groove. As shown in FIG. 37, one groove surrounding the opening area OA, for example, the first groove G1, may be connected to the first outer groove OG1 provided in the second non-display area NDA2. there is. Alternatively, the grooves surrounding the opening area OA may be spaced apart without being connected to the outer groove.

Since the structure of the first non-display area NDA1 is the same as the embodiment previously described with reference to FIGS. 7 to 33 and the embodiments derived therefrom, the above description is replaced.

As such, the present invention has been described with reference to an embodiment shown in the drawings, but this is merely an example, and those skilled in the art will understand that various modifications and variations of the embodiment are possible therefrom. Therefore, the true scope of technical protection of the present invention should be determined by the technical spirit of the attached patent claims.

100: substrate
101: first base layer
102: First inorganic layer
103: second base layer
104: Second inorganic layer
200: Display element layer
300: Thin film encapsulation layer
310: First inorganic encapsulation layer
320: Organic bag layer
330: Second inorganic encapsulation layer
400: Input detection layer
610: Flattening layer
620: barrier layer
700: lower barrier layer

Claims (22)

a substrate including an opening, a display area surrounding the opening, and a non-display area between the opening and the display area;
a plurality of light emitting diodes located in the display area;
a thin film encapsulation layer that covers the plurality of light emitting diodes and includes a first inorganic encapsulation layer, an organic encapsulation layer on the first inorganic encapsulation layer, and a second inorganic encapsulation layer on the organic encapsulation layer; and
A display panel comprising: a planarization layer disposed on the thin film encapsulation layer in the non-display area. According to paragraph 1,
A display panel, wherein a portion of the planarization layer overlaps a portion of the organic encapsulation layer in the non-display area. According to paragraph 1,
It further includes an input sensing layer including an insulating layer and a plurality of touch electrodes,
A display panel, wherein a portion of the insulating layer of the input sensing layer overlaps the planarization layer in the non-display area. According to paragraph 1,
A display panel further comprising a partition wall disposed in the non-display area. According to paragraph 4,
On the partition wall, a portion of the second inorganic encapsulation layer is in direct contact with a portion of the first inorganic encapsulation layer. According to paragraph 1,
The display panel further includes a plurality of grooves spaced apart from each other in the non-display area, each of the plurality of grooves surrounding the opening. According to clause 6,
The plurality of grooves include a first groove and a second groove, wherein the width of the first groove is different from the width of the second groove, and the second groove is disposed between the opening and the first groove. Display panel. According to clause 6,
At least one of the plurality of grooves,
A pair of tips projecting towards each other with a gap; and
It includes a groove disposed below the pair of tips,
The display panel wherein the groove overlaps the gap of the pair of tips, and the width of the gap is smaller than the width of the top of the groove. According to clause 8,
The first inorganic encapsulation layer overlaps the inner surface of the groove and the bottom surface of the pair of tips,
Below the pair of tips, the second inorganic encapsulation layer is in direct contact with the first inorganic encapsulation layer. According to clause 8,
The first inorganic encapsulation layer overlaps the inner surface of the groove and the bottom surface of the pair of tips,
Below the pair of tips, the second inorganic encapsulation layer is spaced apart from the first inorganic encapsulation layer with an organic material interposed therebetween. A substrate having an opening;
a plurality of light emitting diodes disposed in a display area surrounding the opening;
an encapsulation layer that covers the plurality of light emitting diodes and includes a first inorganic encapsulation layer, an organic encapsulation layer on the first inorganic encapsulation layer, and a second inorganic encapsulation layer on the organic encapsulation layer;
an input sensing layer disposed on the encapsulation layer and including a plurality of touch electrodes;
a planarization layer disposed on the encapsulation layer in a non-display area between the opening and the display area; and
A display panel comprising: a partition surrounding the opening and disposed in the non-display area. According to clause 11,
On the partition wall, a portion of the second inorganic encapsulation layer is in direct contact with a portion of the first inorganic encapsulation layer. According to clause 12,
The display panel wherein the planarization layer overlaps a direct contact area of the portion of the second inorganic encapsulation layer and the portion of the first inorganic encapsulation layer. According to clause 11,
A portion of the planarization layer overlaps a portion of the organic encapsulation layer in a region between the partition wall and the display area. According to clause 11,
The display panel wherein the input sensing layer further includes an insulating layer, and a portion of the insulating layer overlaps the planarization layer in the non-display area. According to clause 11,
A display panel comprising a plurality of grooves arranged to be spaced apart from each other in the non-display area, each of the plurality of grooves surrounding the opening. According to clause 16,
The plurality of grooves include a first groove and a second groove, wherein the first groove is located between the display area and the partition wall, and the second groove is located between the partition wall and the opening. According to clause 17,
A display panel wherein the width of the first groove is different from the width of the second groove. According to clause 17,
The second groove is,
A pair of tips projecting towards each other with a gap; and
Including a groove disposed below the pair of tips,
The display panel wherein the groove overlaps the gap of the pair of tips, and the gap is smaller than a width of the top of the groove. According to clause 19,
The first inorganic encapsulation layer overlaps the inner surface of the groove of the second groove and the bottom surface of the pair of tips of the second groove,
The second inorganic encapsulation layer is in direct contact with the first inorganic encapsulation layer below the pair of tips of the second groove. According to clause 19,
The first inorganic encapsulation layer overlaps the inner surface of the groove of the second groove and the bottom surface of the pair of tips of the second groove,
Below the pair of tips of the second groove, the second inorganic encapsulation layer is spaced apart from the first inorganic encapsulation layer with an organic material interposed therebetween. According to clause 19,
A portion of the planarization layer is located within the second groove.

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