KR20240019426A - Dc-dc synchronous buck converter and current sensing circuit of high-side power transistor of dc-dc synchronous buck converter - Google Patents

Abstract

The current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter is a current sensing block that includes a sensing transistor through which the sensing current flows, and the output voltage of the compensation circuit of the DC-DC synchronous buck converter. It includes a compensation block that converts into a current form and a current comparison block that compares the magnitude of the current converted to the sensing current and the output voltage of the compensation circuit, and the current comparison block includes a sensing resistor, an offset current supply circuit, and a diode connection element. It can be included.

Description

Current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter and DC-DC synchronous buck converter {DC-DC SYNCHRONOUS BUCK CONVERTER AND CURRENT SENSING CIRCUIT OF HIGH-SIDE POWER TRANSISTOR OF DC -DC SYNCHRONOUS BUCK CONVERTER}

The present invention relates to a DC-DC synchronous buck converter and a current sensing circuit that senses the current flowing in the HS (high-side) power transistor of the DC-DC synchronous buck converter.

The current sensing circuit of the DC-DC buck converter senses the current flowing in HS (High-Side) during ON time and determines the operation timing of OFF time by comparing it with the output signal of the compensation circuit.

The current sensing circuit of the voltage comparison method using the existing sensing FET technique is shown in Figure 1. Referring to FIG. 1, during on time, current flows through the HS power transistor, and a voltage difference occurs between the LX node and VDD due to the HS power transistor. When the LX node transmits a signal to LXM, which is the input of the amplifier in the current sensing circuit, the voltage of LXM and LXP becomes the same value by the amplifier. At this time, depending on the device size ratio between the HS power transistor and MP3, a current equivalent to, for example, 1/10000 of the HS power transistor flows through MP3. The current flowing in this way is mirrored from MN1 to MN2 and from MP4 to MP5. Afterwards, the current sensed through Rsen and the slope compensation current flow, and the generated VSENSE voltage is compared with the FBOUT signal, which is the output of the compensation circuit, to determine the timing of the OFF operation. This can be expressed as [Equation 1].

[Equation 1]

However, there were several problems with using the existing current sensing circuit at various load currents and input voltages. First, when the load current is large, the size of the sensed current also becomes large, and when a large Rsen resistance is used, the voltage of VSENSE becomes very high. This causes MP5 to fall into the straight line region and causes abnormal operation of the current sensing circuit.

Second, if a low Rsen resistance is used to solve the problem at large load currents, VSENSE will also decrease when operated at low load currents. This causes the voltage value of FBOUT, the output of the compensation circuit, to also be lowered in proportion to the VSENSE value. Ultimately, the output voltage of the error amplifier inside the compensation circuit is lowered, creating the possibility of affecting the internal elements of the amplifier.

Because FBOUT may be further lowered in line regulation where the input voltage changes and load regulation where the load changes, it is difficult to operate normally and stably even with a large difference between the input voltage and load current.

Korean Patent Publication No. 2012-0129876 (published on November 28, 2012)

The present invention is intended to solve the problems of the prior art described above, and seeks to design a current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of a DC-DC synchronous buck converter. Through this, the present invention seeks to improve the input voltage and load range of the current sensing circuit of the DC-DC synchronous buck converter.

However, the technical challenges that this embodiment aims to achieve are not limited to the technical challenges described above, and other technical challenges may exist.

As a technical means for achieving the above-described technical problem, the current sensing circuit for sensing the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter according to the first aspect of the present invention is for sensing the sensing current flowing. A current sensing block containing a transistor; A compensation block that converts the output voltage of the compensation circuit of the DC-DC synchronous buck converter into a current form; and a current comparison block that compares the magnitude of the sensing current and the current obtained by converting the output voltage of the compensation circuit, and the current comparison block may include a sensing resistor, an offset current supply circuit, and a diode connection element.

The current sensing circuit for sensing the current flowing in the HS power transistor of the DC-DC synchronous buck converter according to the second aspect of the present invention includes a current sensing block including a sensing transistor through which the sensing current flows; A compensation block that converts the output voltage of the compensation circuit of the DC-DC synchronous buck converter into a current form; and a current comparison block that compares the magnitude of the sensing current and the current converted to the output voltage of the compensation circuit, wherein the current comparison block applies an offset current to determine the minimum operation of the load current of the DC-DC synchronous buck converter. The range can be expanded, and the maximum operating range of the load current of the DC-DC synchronous buck converter can be expanded by the diode connection element.

A DC-DC synchronous buck converter according to a third aspect of the present invention includes a compensation circuit for improving loop gain; A current sensing circuit including an offset current supply circuit and a diode connection element, and sensing the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter; and a PWM control circuit that performs switching based on a clock signal and an output signal of the current sensing circuit, wherein the current sensing circuit extends the minimum operating range of the load current of the DC-DC synchronous buck converter by applying an offset current. And, the maximum operating range of the load current of the DC-DC synchronous buck converter can be expanded by the diode connection element.

The above-described means for solving the problem are merely illustrative and should not be construed as limiting the present invention. In addition to the exemplary embodiments described above, there may be additional embodiments described in the drawings and detailed description of the invention.

According to one of the means for solving the problems of the present invention described above, the present invention can design a current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of a DC-DC synchronous buck converter. Through this, the present invention can improve the input voltage and load range of the current sensing circuit of the DC-DC synchronous buck converter.

Figure 1 is a diagram showing a current sensing circuit using a conventional voltage comparison method.
Figure 2 is a diagram showing a DC-DC synchronous buck converter according to an embodiment of the present invention.
Figure 3 is a block diagram of a PI compensation circuit according to an embodiment of the present invention.
FIG. 4 is a diagram illustrating the PWM control circuit shown in FIG. 2 and a simulation result using the PWM control circuit according to an embodiment of the present invention.
FIG. 5 is a diagram illustrating the current sensing circuit shown in FIG. 2 according to an embodiment of the present invention.
Figure 6 is a diagram for explaining the current sensing loop and loop stability of the current sensing circuit according to an embodiment of the present invention.
Figure 7 is a diagram showing a simulation comparing the operation between the current sensing circuit of the voltage comparison method and the current sensing circuit of the current comparison method of the present invention.
Figure 8 is a diagram showing simulation results for the variation rate of a DC-DC synchronous buck converter according to an embodiment of the present invention.
Figure 9 is a diagram showing efficiency simulation results of a DC-DC synchronous buck converter according to an embodiment of the present invention.

Below, with reference to the attached drawings, embodiments of the present invention will be described in detail so that those skilled in the art can easily implement the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. In order to clearly explain the present invention in the drawings, parts that are not related to the description are omitted, and similar parts are given similar reference numerals throughout the specification.

Throughout the specification, when a part is said to be "connected" to another part, this includes not only the case where it is "directly connected," but also the case where it is "electrically connected" with another element in between. . Additionally, when a part "includes" a certain component, this means that it may further include other components rather than excluding other components, unless specifically stated to the contrary.

In this specification, 'part' includes a unit realized by hardware, a unit realized by software, and a unit realized using both. Additionally, one unit may be realized using two or more pieces of hardware, and two or more units may be realized using one piece of hardware.

In this specification, some of the operations or functions described as being performed by a terminal or device may instead be performed on a server connected to the terminal or device. Likewise, some of the operations or functions described as being performed by the server may also be performed on a terminal or device connected to the server.

Hereinafter, specific details for implementing the present invention will be described with reference to the attached configuration diagram or processing flow diagram.

Figure 2 is a diagram showing a DC-DC synchronous buck converter according to an embodiment of the present invention.

Referring to FIG. 2, the DC-DC synchronous buck converter 100 may include a compensation circuit 110, a current sensing circuit 120, and a PWM control circuit 130.

The DC-DC synchronous buck converter 100 can be designed so that switching loss does not increase even in charging mode using a large load by using a synchronous PWM control method using a switching element as a FET. In addition, because the current mode is used in the DC-DC synchronous buck converter 100, the DC-DC synchronous buck converter 100 has fast response characteristics.

The compensation circuit 110 can stabilize frequency characteristics while improving loop gain. Since the loop gain of the DC-DC converter without the compensation circuit 110 is very low, a difference may occur between the output voltage value of the DC-DC converter and the actual output voltage value.

For example, the compensation circuit 110 may be used as the PI compensation circuit 300 mainly used in current mode, as shown in FIG. 3. Referring to FIG. 3, the PI compensation circuit 300 may be composed of, for example, a compensation amplifier (error amplifier), R _C = 50 [kΩ], and C _C = 500 [pF]. In the normal state, the compensation amplifier operates at g _m = 614.4[uA/V], r _oc = 871.71[kΩ] in mobile DC-DC mode, and g _m = 618.6[uA/V], r _oc = in charging mode. It can be designed to operate at 867.53[kΩ]. The transfer function of the PI compensation circuit 300 can be expressed as Equation 2.

[Equation 2]

As can be seen from [Equation 2], the PI compensation circuit 300 can maintain a stable output voltage value by improving the loop gain by g _m r _oc .

Meanwhile, the DC-DC synchronous buck converter 100 uses a load current of less than a preset milliampere value (e.g., 1000 [mA]) and an input voltage of a preset voltage value (e.g., 5 [V]). It can operate in charging mode.

At this time, the frequency characteristics of the DC-DC synchronous buck converter 100 may vary depending on the difference between the load current and the input voltage. For example, for mobile DC-DC mode, DC gain = 75.4[dB], PM = 84.74°, = Operates at 158.5[kHz], in charging mode, DC gain = 55.4[dB], PM = 78.55°, Since it operates at = 63 [kHz], the DC-DC synchronous buck converter 100 can operate stably.

The DC-DC synchronous buck converter 100 can operate in a charging mode that operates at a large input voltage and load current and a mobile DC-DC mode that operates at a low input voltage and load current.

The current sensing circuit 120 may include an offset current supply circuit and a diode connection element.

The current sensing circuit 120 uses a current comparison method and may be a circuit that senses the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter 100.

The current sensing circuit 120 extends the minimum operating range of the load current of the DC-DC synchronous buck converter 100 by applying an offset current (Icont), and increases the minimum operating range of the load current of the DC-DC synchronous buck converter 100 by a diode connection element. The maximum operating range of load current can be expanded.

In order to expand the minimum operating range of the load current, the current sensing circuit 120 confirms that the DC-DC synchronous buck converter 100 operates stably through the FBOUT signal and then transfers the offset current to the DC-DC synchronous buck converter 100. ) can be applied.

The current sensing circuit 120 may compare the load current generated due to the FBOUT voltage and the current of the offset current source.

During initial operation of the DC-DC synchronous buck converter 100, the FBOUT voltage may have a very low value due to the soft-start-up circuit. Due to the low FBOUT voltage and Rsense resistance, a load current lower than the offset current flows, and the current sensing circuit 120 The voltage has the value of VSS. For this reason, the offset current is turned off.

After soft-start-up operation, the load current generated by the FBOUT voltage / If is greater than the offset current, becomes VDD and the offset current / will be taken out from This allows an offset current to be applied.

The current sensing circuit 120 can expand the maximum operating range of the load current of the DC-DC synchronous buck converter 100 by using a diode connection element to nonlinearly increase the operating voltage as the load current increases. there is.

The current sensing circuit 120 increases the operating range of the load current by using a current comparison method, and applies an offset current to the DC-DC synchronous buck converter 100 to increase the operating range of the low load current. can do.

The current sensing circuit 120 may adjust the operable voltage to be non-linearly proportional as the load current increases in order to increase the high operable load current range.

The PWM control circuit 130 may perform switching of the DC-DC synchronous buck converter 100 based on the clock signal and the output signal of the current sensing circuit 120.

For example, the PWM control circuit 130 is designed as shown in (a) of FIG. 4 and can control the switching operation of the DC-DC synchronous buck converter 100.

Referring to (b) of FIG. 4, the PWM control circuit 130 receives a clock signal and operates at on time, and the VSENSE signal generated by the sensed inductor current that increases during ON time and the compensation circuit 110 It can be operated in OFF time by comparing the output signal (FBOUT_ch signal) of the current sensing circuit 120 that processes the output signal of .

When the PWM and PWMB signals generated by the PWM control circuit 130 are used as signals to control the on/off time, a short phenomenon in which the sensing transistors are driven simultaneously may occur. This can cause malfunction of the converter and dead time that adversely affects efficiency.

To prevent this, a non-over lapping circuit may be used in the PWM control circuit 130. In addition, in the case of mobile DC-DC operation of the DC-DC synchronous buck converter 100, a load current of 100 [mA] or less is used. Although there is no design problem when using such a low load current, the chip cannot be manufactured. When measuring, the ripple of the inductor current may fall below 0 [mA]. To prevent this, a reverse current protection circuit may be used in the PWM control circuit 130. Reverse current refers to a situation in which current flows to the NMOS power switch due to the energy charged in the capacitor at the output stage after the energy of the inductor charged during on-time is consumed during off-time. A reverse current protection circuit can prevent this reverse current.

If the node (LX) where the sensing transistor and the inductor are connected has a voltage greater than VSS during the off time, this means that current flows to the sensing transistor. Using this, if the LX voltage is in the off time and has a value greater than VSS, reverse current can be prevented by adjusting the switching operation so that the sensing transistor is turned off even in the off time.

FIG. 5 is a diagram illustrating the current sensing circuit shown in FIG. 2 according to an embodiment of the present invention.

Referring to FIG. 5 , the current sensing circuit 120 may include a current sensing block 500, a compensation block 510, a current comparison block 520, and a slope compensation block 530.

Existing current sensing circuits used a fixed Rsense and had the problem that the operating range was limited by the load current and input voltage. To solve this problem, the current sensing circuit 120 of the present invention can expand the low load current range by applying an offset current within the current sensing circuit 120. Additionally, the current sensing circuit 120 can expand a large load range by using a diode connection element so that the operating voltage increases non-linearly as the load current increases.

The current sensing circuit 120 can adjust the operating voltage to have non-linear characteristics depending on the offset current and load current.

Specifically, the current sensing block 500 may include a sensing transistor through which sensing current flows.

For a moment, Figure 6(a) is a circuit showing the current sensing block within the current sensing circuit 120, and Figure 6(b) is a diagram showing the frequency characteristics of the stability of the current sensing block.

Referring to (a) of FIG. 6, it is very difficult to reduce the error between the current flowing through the power transistor at ON time and 1/10000 of the current flowing through the power transistor, that is, the current sensed by the current sensing circuit 120. It is important. If the current error is large, it may affect the duty ratio of the current mode DC-DC synchronous buck converter 100, resulting in results different from the designed output voltage. The current error is very greatly affected by the difference in voltage between LXM and LXP. When loop stability is guaranteed due to the sensing amplifier and the sensing transistors MN3 and MP3, the two voltages become equal and the error has a very low value. LXM and LXP, the inputs of the current sensing amplifier, have values slightly different from VDD.

Referring to (b) of Figure 6, the charging mode is Gain = 38.8 [dB], PM = 81 [deg], in an environment of VDD = 5 [V]. = operates at 6.52[MHz], and mobile DC-DC mode is in an environment of VDD = 2.5[V], Gain = 37.9[dB], PM = 80[deg], It operates at =6.92[MHz].

The sensing error of the current sensing circuit 120 can be derived through comparison between 1/10000 of the current flowing in the power transistor and the current of the sensing transistor, as shown in [Equation 3].

[Equation 3]

In case of charging mode, Vin = 2.5[V], In an environment of = 20 ~ 100 [mA], there is a sensing error of 0.005 ~ 0.8 [%], and in mobile DC-DC mode, Vin = 5 [V], = It can be confirmed that there is a sensing error of 0.11 ~ 0.19 [%] in an environment of 1000 ~ 3000 [mA].

The compensation block 510 may convert the output voltage of the compensation circuit 110 of the DC-DC synchronous buck converter 100 into a current form.

The current comparison block 520 can compare the magnitude of the current obtained by converting the sensing current and the output voltage of the compensation circuit 110.

Here, the size of the sensing current can be measured based on the size of the current flowing in the HS power transistor of the DC-DC synchronous buck converter 100 and the size ratio of the HS power transistor and the sensing transistor.

The current comparison block 520 may include a sensing resistor, an offset current supply circuit, and a diode connection element.

The current comparison block 520 can compare the voltage difference generated by flowing the current converted from the sensing current and the output voltage of the compensation circuit 110 through each FET.

For example, the current comparison block 520 may convert the output voltage of the sensing current and compensation circuit 110 into a current using a V-to-I circuit and then compare the currents to perform a switch operation. That is, the current comparison block 520 can generate a PWM signal by comparing the VGS generated in the process of flowing each current through the FET.

The offset current supply circuit includes an offset current source, and whether or not to apply the offset current may be determined based on the magnitude of the current flowing through the sensing resistor by the output voltage of the compensation circuit 110.

The current comparison block 520 extends the minimum operating range of the load current of the DC-DC synchronous buck converter 100 by applying an offset current, and changes the load current of the DC-DC synchronous buck converter 100 by a diode connection element. The maximum range of motion can be expanded.

If the magnitude of the current flowing through the sensing resistor due to the output voltage of the compensation circuit 110 is smaller than the magnitude of the current due to the offset current source, the offset current is not applied.

If the magnitude of the current flowing through the sensing resistor due to the output voltage of the compensation circuit 110 is greater than the magnitude of the current due to the offset current source, the offset current may be applied.

In order to expand the minimum operating range of the load current, the current sensing circuit 120 confirms that the DC-DC synchronous buck converter 100 operates stably through the FBOUT signal and then transfers the offset current to the DC-DC synchronous buck converter 100. ) can be applied.

The current sensing circuit 120 may compare the load current generated due to the FBOUT voltage and the current of the offset current source.

During initial operation of the DC-DC synchronous buck converter 100, the FBOUT voltage may have a very low value due to the soft-start-up circuit. Due to the low FBOUT voltage and Rsense resistance, a load current lower than the offset current flows, and the current sensing circuit 120 The voltage has the value of VSS. For this reason, the offset current is turned off.

After soft-start-up operation, the load current generated by the FBOUT voltage / If is greater than the offset current, becomes VDD and the offset current / will be taken out from This allows the offset current to be applied by the offset current supply circuit.

By applying an offset current using an offset current supply circuit, the minimum operating range of the load current of the DC-DC synchronous buck converter 100 can be expanded.

The maximum operating range of the load current of the DC-DC synchronous buck converter 100 can be expanded by using a diode connection element to nonlinearly increase the operating voltage as the load current increases. Here, the diode connection element is

Offset current and slow compensation current are applied to the load current. The current flows, and at this time, The voltage FBOUT_ch voltage can be determined according to [Equation 4].

[Equation 4]

When D>0 or higher in current mode, the current sensing circuit 120 can process slope compensation current to operate stably.

Referring to FIG. 7 for a moment, this is a diagram showing a simulation comparing the operation between a conventional current sensing circuit (voltage comparison method) and the current sensing circuit 120 (current comparison method) of the present invention.

Referring to Figure 7, an RSEN resistance of 40 [kΩ] was used and a load current of 2000 [mA] was used. In the case of simulation (a) of the current sensing circuit using the voltage comparison method, it can be seen that when a large resistance and a large current are used, the transistor that copies the current in the current sensing circuit falls into the liner, making normal sensing operation impossible. On the other hand, in the case of simulation (b) of the current sensing circuit 120 of the present invention, it can be confirmed that it operates normally.

Returning to FIG. 5 , the slope compensation block 530 may generate a slope voltage signal in the form of a voltage and generate a slope compensation current through the slope voltage signal.

The slow voltage signal may have the form of a ramp waveform. The slow voltage signal is transmitted to the current sensing circuit 120 and converted into a current form through a V-to-I circuit. In the process of mirroring the current (slope compensation current) generated in this way, the signal is mirrored normally during the on time, but unnecessary power consumption within the current sensing circuit 120 can be prevented by using a method of not mirroring during the off time. .

By applying the offset current and slope compensation current to the current flowing in the sensing resistor by the output voltage of the compensation circuit 110, a current may be sent to the diode connection element.

The maximum operating range of the load current can be expanded by non-linearly increasing the operating voltage of the DC-DC synchronous buck converter 100 using a diode connection element.

Figure 8 is a diagram showing simulation results for the variation rate of the DC-DC synchronous buck converter 100 according to an embodiment of the present invention.

Referring to FIG. 8, (a) of FIG. 8 shows simulation results for the line voltage regulation of the DC-DC synchronous buck converter 100.

The line voltage fluctuation rate refers to the rate of change in output voltage that occurs when the input voltage changes in a situation where the load current is constant. For charging operation, the output voltage is measured varying from 4.0 to 5.0 [V] at a load current of 1000, 2000 [mA], and for mobile DC-DC operation, the output voltage is measured at 2.5 to 3.5 [V] at a load current of 50, 100 [mA]. You can check the operation by changing ]. The value of the line voltage change rate can be confirmed through [Equation 5].

[Equation 5]

Figure 8 (b) shows simulation results for load regulation of the DC-DC synchronous buck converter 100.

The load change rate refers to the rate of change in output voltage that occurs when the load current changes in a situation where the input voltage is constant. For charging operation, operation can be confirmed at load currents of 800 and 1500 [mA], and for mobile DC-DC operation, operation can be confirmed at load currents of 80 and 200 [mA]. The value of the load change rate can be confirmed through [Equation 6].

[Equation 6]

Figure 9 is a diagram showing efficiency simulation results of a DC-DC synchronous buck converter according to an embodiment of the present invention.

Referring to Figure 9, looking at the efficiency graph of the mobile DC-DC mode and charging mode, the charging mode operates with an efficiency of up to 96.5 [%], and the mobile DC-DC mode operates at an efficiency of 95.3 [%]. You can check it.

The efficiency of the DC-DC synchronous buck converter 100 can be confirmed through [Equation 7]. It can be determined through the power consumed to drive the DC-DC synchronous buck converter 100 and the power input and output through the DC-DC synchronous buck converter 100.

[Equation 7]

The description of the present invention described above is for illustrative purposes, and those skilled in the art will understand that the present invention can be easily modified into other specific forms without changing the technical idea or essential features of the present invention. will be. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. For example, each component described as unitary may be implemented in a distributed manner, and similarly, components described as distributed may also be implemented in a combined form.

The scope of the present invention is indicated by the claims described later rather than the detailed description, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. .

100: DC-DC synchronous buck converter
110: compensation circuit
120: Current sensing circuit
130: PWM control circuit
500: Current sensing block
510: Reward block
520: Current comparison block
530: Slope compensation block

Claims (10)

In the current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter,
A current sensing block including a sensing transistor through which sensing current flows;
A compensation block that converts the output voltage of the compensation circuit of the DC-DC synchronous buck converter into a current form; and
A current comparison block that compares the magnitude of the sensing current and the current converted into the output voltage of the compensation circuit;
Including,
A current sensing circuit wherein the current comparison block includes a sensing resistor, an offset current supply circuit, and a diode connection element.
According to claim 1,
The size of the sensing current is based on the size of the current flowing in the HS power transistor and the size ratio of the HS power transistor and the sensing transistor.
According to claim 1,
The current comparison block compares the voltage difference generated by flowing the sensing current and the current converted from the output voltage of the compensation circuit through each FET.
According to claim 1,
The offset current supply circuit includes an offset current source,
A current sensing circuit wherein whether to apply an offset current is determined based on the magnitude of the current flowing through the sensing resistor by the output voltage of the compensation circuit.
According to claim 4,
If the magnitude of the current flowing through the sensing resistor due to the output voltage of the compensation circuit is smaller than the magnitude of the current due to the offset current source, the offset current is not applied,
A current sensing circuit wherein an offset current is applied when the magnitude of the current flowing through the sensing resistor due to the output voltage of the compensation circuit is greater than the magnitude of the current by the offset current source.
According to claim 1,
A current sensing circuit that extends the minimum operating range of the load current of the DC-DC synchronous buck converter by applying an offset current by the offset current supply circuit.
According to claim 1,
further comprising a slope compensation block that generates a slope compensation current,
A current sensing circuit, wherein a current obtained by applying the offset current and the slope compensation current to the current flowing in the sensing resistor by the output voltage of the compensation circuit flows to the diode connection element.
According to claim 7,
A current sensing circuit that expands the maximum operating range of load current by non-linearly increasing the operating voltage of the DC-DC synchronous buck converter by the diode connection element.
In the current sensing circuit that senses the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter,
A current sensing block including a sensing transistor through which sensing current flows;
A compensation block that converts the output voltage of the compensation circuit of the DC-DC synchronous buck converter into a current form; and
a current comparison block that compares the magnitude of the sensing current and the current converted into the output voltage of the compensation circuit;
Including,
The current comparison block extends the minimum operating range of the load current of the DC-DC synchronous buck converter by applying an offset current, and expands the maximum operating range of the load current of the DC-DC synchronous buck converter by the diode connection element. A current sensing circuit that does this.
In the DC-DC synchronous buck converter,
Compensation circuit to improve loop gain;
A current sensing circuit including an offset current supply circuit and a diode connection element, and sensing the current flowing in the HS (High-Side) power transistor of the DC-DC synchronous buck converter;
A PWM control circuit that performs switching based on a clock signal and the output signal of the current sensing circuit.
Including,
The current sensing circuit extends the minimum operating range of the load current of the DC-DC synchronous buck converter by applying an offset current, and expands the maximum operating range of the load current of the DC-DC synchronous buck converter by the diode connection element. That's what it's supposed to do, a DC-DC buck converter.

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