KR20230167215A - Substrate and display device including same - Google Patents

Abstract

provided on a display device. A display device according to an embodiment includes a substrate having a display area, a first non-display area located on one side of the display area, and a second non-display area located on the other side with the display area in between, and a display area of the substrate. It includes a thin film transistor layer disposed on the thin film transistor layer and a light emitting device layer disposed on the thin film transistor layer and including a light emitting device, wherein the substrate includes a first portion located in the first non-display area and a second portion located in the display area. portion, and a third portion located in the second non-display area, wherein the third portion includes a portion whose thickness decreases as it goes outward from the boundary between the second portion and the third portion, and an end of the third portion. The thickness is thinner than the thickness of the end of the first portion.

Description

Substrate and display device including same {SUBSTRATE AND DISPLAY DEVICE INCLUDING SAME}

The present invention relates to a substrate and a display device including the same.

Display devices such as organic light emitting display devices can be made thinner and more flexible due to their driving characteristics, so much research is being done on this.

Recently, flexible display devices that form a display unit on a flexible substrate are receiving attention. When manufacturing such a flexible display device, a flexible material such as polyimide is usually applied on a rigid carrier substrate to form a flexible substrate, a display unit is formed on the flexible substrate, and then the carrier substrate and the flexible substrate are later separated. Proceed with manufacturing.

However, when separating the carrier substrate and the flexible substrate, a phenomenon in which partial separation is not performed cleanly occurs frequently. This is because some of the thin film layers formed on the flexible substrate often spread out of the flexible substrate area during the manufacturing process and come into direct contact with the carrier substrate. In the case of a flexible substrate, it is a material that is easily separated from the carrier substrate when appropriate heat is applied, but this is not the case for other thin film layers that are directly attached to the carrier substrate. Therefore, when the carrier substrate is removed in this situation, the excess portion to which the other thin film layers are directly adhered is It may not be properly separated from the carrier substrate, and as a result, a problem may occur where the surplus portion and the end of the adjacent flexible display device are forcibly torn off during the separation process.

The problem to be solved by the present invention is to provide a display device with improved reliability by cleanly and stably separating a flexible substrate from a carrier substrate.

The problems of the present invention are not limited to the problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the description below.

A display device according to an embodiment for solving the above problem includes a display area, a first non-display area located on one side of the display area, and a second non-display area located on the other side with the display area in between. A substrate having a thin film transistor layer disposed on the display area of the substrate and a light emitting device layer disposed on the thin film transistor layer and including a light emitting device, wherein the substrate is located in the first non-display area. It includes a first part, a second part located in the display area, and a third part located in the second non-display area, wherein the third part extends outward from the boundary between the second part and the third part. It includes a part whose thickness gradually decreases, and the thickness of the end of the third part is thinner than the thickness of the end of the first part.

The third part of the substrate includes an upper surface and a lower surface opposite to the upper surface, and the upper surface and the lower surface of the third part may have different roughnesses.

The third part further includes a side surface located between the upper surface and the lower surface, and the side surface of the third part may have a roughness different from the lower surface of the third part.

The first portion of the substrate includes a top surface, a bottom surface opposite the top surface, and a side surface located between the top surface and the bottom surface, wherein the side surface of the first portion is different from the side surface of the third portion. Having a roughness, the side surface of the first part and the side surface of the third part may include the same material.

The substrate further includes a first residue pattern partially located on the lower surface of the third portion, the upper surface, lower surface, and side surfaces of the third portion include a first material, and the first residual pattern is partially located on the lower surface of the third portion. The residue pattern may include a second material different from the first material.

The substrate further includes a second residue pattern partially located on the side of the third portion, and the second residue pattern may include the first material and a third material different from the second material. there is.

The first material may include polyimide, the second material may include silicon dioxide, and the third material may include a metal or an inorganic material.

The upper surface of the first part may have a flat surface, and the upper surface of the third part may have an inclined surface.

The first part and the second part may have the same thickness, and the third part may be thinner than the first part and the second part.

The thickness of the end of the third portion may be 300 nm to 500 nm.

The display device completely covers the thin film transistor layer and the light emitting device layer, and further includes a thin film encapsulation layer disposed on the substrate, wherein the maximum thickness of the thin film encapsulation layer located in the first portion is greater than that of the third portion. It may be thicker than the maximum thickness of the thin film encapsulation layer located at.

A display device according to another embodiment for solving the above problem includes a first substrate including a first portion, a second portion spaced apart from the first portion, and a third portion, and the second portion of the first substrate. A barrier layer disposed on one portion, a second substrate disposed on the first portion of the first substrate with the barrier layer interposed therebetween, a thin film transistor layer disposed on the second substrate, and the thin film transistor. It is disposed on the layer and includes a light-emitting device layer including a light-emitting device, and the third portion of the first substrate includes a portion whose thickness decreases toward the outside from the boundary between the first portion and the third portion. And the third portion does not overlap with the second substrate.

A thickness of an end of the third portion of the first substrate may be thinner than a thickness of an end of the second substrate.

A side surface of the third portion of the first substrate may have a roughness different from a side surface of the second substrate.

The side of the third portion of the first substrate and the side of the second substrate may include a first material.

The third portion may further include a residue pattern partially located on the side of the third portion, and the residue pattern may include a second material different from the first material.

The first material may include polyimide, and the second material may include a metal or an inorganic material.

A substrate according to an embodiment for solving the above other problem includes a first part, a second part spaced apart from the first part, and a third part, wherein the third part is connected to the first part. It includes a portion whose thickness decreases as it goes outward from the boundary of the third portion, the thickness of the end of the third portion is thinner than the thickness of the end of the second portion, and the side of the third portion is the second portion. It has a roughness that is different from the side of the part.

The third part further includes a residue pattern partially located on the side of the third part, the side of the second part and the side of the third part include a first material, and the residue The water pattern may include a second material different from the first material.

The first material may include polyimide, and the second material may include a metal or an inorganic material.

Specific details of other embodiments are included in the detailed description and drawings.

According to the display device according to one embodiment, the carrier substrate and the flexible substrate are neatly and stably separated, thereby providing a display device with improved reliability.

Effects according to the embodiments are not limited to the contents exemplified above, and further various effects are included in the present specification.

1 is a plan view of a display device according to an embodiment.
Figure 2 is a cross-sectional view of a display device according to an embodiment.
FIG. 3 is a schematic cross-sectional view showing an exemplary stacked structure of a display panel according to an embodiment.
FIG. 4 is a cross-sectional view taken along line II′ of FIG. 1 according to an embodiment.
Figure 5 is an enlarged view of area A of Figure 4 according to one embodiment.
Figure 6 is a cross-sectional view specifically showing a substrate according to an embodiment.
FIG. 7 is an enlarged view of area B of FIG. 6 according to an embodiment.
Figure 8 is an enlarged view of area B of Figure 6 according to another embodiment.
FIG. 9 is an enlarged view of area C of FIG. 6 according to an embodiment.
FIG. 10 is an enlarged view of area C of FIG. 6 according to another embodiment.
FIG. 11 is a cross-sectional view taken along line II′ of FIG. 1 according to another embodiment.
Figure 12 is a cross-sectional view specifically showing a substrate according to another embodiment.
FIG. 13 is an enlarged view of area D of FIG. 12 according to another embodiment.
FIG. 14 is an enlarged view of area E of FIG. 12 according to another embodiment.
Figure 15 is a flowchart showing a method of manufacturing a display device according to an embodiment.
16 to 20 are cross-sectional views for explaining a method of manufacturing a display device according to an embodiment.
Figure 21 is a graph showing the relationship between the thickness of the polyimide layer and the maximum temperature of the polyimide layer heated by the laser irradiated to the polyimide layer.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The present embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

When an element or layer is referred to as “on” another element or layer, it includes all cases where the other layer or other element is directly on top of or interposed between the other elements. Like reference numerals refer to like elements throughout the specification. The shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining the embodiments are illustrative and the present invention is not limited to the details shown.

Although first, second, etc. are used to describe various components, these components are of course not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be a second component within the technical spirit of the present invention.

Each feature of the various embodiments of the present invention can be combined or combined with each other, partially or entirely, and various technological interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, specific embodiments will be described with reference to the attached drawings.

1 is a plan view of a display device according to an embodiment. Figure 2 is a cross-sectional view of a display device according to an embodiment.

In the plan view of Figure 1, the top, bottom, left, and right directions are defined for convenience of explanation. The up-down direction is defined as the first direction (DR1) in the vertical or column direction, the left-right direction is defined as the second direction (DR2) in the horizontal or row direction, and the vertical direction is defined as the third direction (DR3). In the specification, “top edge,” “bottom edge,” “left edge,” and “right edge” of a spacer, etc. refer to edges or ends located respectively on the top, bottom, left, and right sides of a spacer, etc. on a plane. The directions mentioned in the examples should be understood as referring to relative directions, and the examples are not limited to the mentioned directions.

Referring to FIGS. 1 and 2, the display device 1 is a device that displays moving images or still images. The display device 1 is a mobile phone, a smart phone, a tablet PC (personal computer), and a smart watch or watch phone. , display screens of various products such as televisions, laptops, monitors, billboards, and the Internet of Things, as well as portable electronic devices such as mobile communication terminals, electronic notebooks, e-books, PMP (Portable Multimedia Player), navigation, UMPC (Ultra Mobile PC), etc. It can be used as Examples of the display device 1 may be an organic light emitting display device, a liquid crystal display device, a plasma display device, a field emission display device, an electrophoresis display device, an electrowetting display device, a quantum dot light emitting display device, a micro LED display device, etc. Hereinafter, the display device will be described using an organic light emitting display device as an example, but the embodiment is not limited thereto.

The display device 1 may include a display panel 10 . The display panel 10 may include a flexible substrate containing a flexible polymer material such as polyimide. Accordingly, the display panel 10 may be curved, bent, folded, or rolled.

If the part of the display panel 10 that displays the screen is defined as the display area (DA) and the part that does not display the screen is defined as the non-display area (NDA), the display area (DA) of the display panel 10 is the main area. It is placed within (MR). The remaining portion excluding the display area (DA) becomes the non-display area (NDA) of the display panel 10. In one embodiment, the main area (MR) includes the peripheral edge portion of the display area (DA) and the panel bending area (BA). ) The entire sub-area (SR) may be a non-display area (NDA). However, the present invention is not limited thereto, and the panel bending area BA and/or the sub-area SR may also include the display area DA.

The main region MR may have a shape generally similar to the planar outline of the display device 1. The main area (MR) may be a flat area located on one plane. However, the present invention is not limited to this, and at least one edge among the remaining edges in the main area MR, excluding the edge connected to the panel bending area BA, may be bent to form a curved surface or may be bent in a vertical direction.

The display area DA of the display panel 10 may be located in the center of the main area MR. The display area DA may include a plurality of pixels. Each pixel may include a light emitting layer and a circuit layer that controls the amount of light emitted by the light emitting layer. The circuit layer may include display wiring, a display electrode, and at least one transistor. The light-emitting layer may include an organic light-emitting material. The light-emitting layer may be sealed by an encapsulation layer.

The display area DA may have a rectangular shape or a rectangular shape with rounded corners. However, it is not limited thereto, and the display area DA may have various shapes, such as a square or other polygon, or a circle or oval.

If at least one edge of the main area (MR) other than the edge (side) connected to the panel bending area (BA) is curved or bent, a display area (DA) may also be placed on that edge. there is. However, the present invention is not limited to this, and a non-display area (NDA) that does not display the screen may be disposed on a curved surface or a bent edge, or the display area (DA) and the non-display area (NDA) may be disposed together.

A non-display area (NDA) may be located around the display area (DA) in the main area (MR). The non-display area NDA of the main area MR may be located in an area from the outer border of the display area DA to the edge of the display panel 10. Signal wires or driving circuits for applying signals to the display area DA may be disposed in the non-display area NDA of the main area MR.

The panel bending area (BA) is connected to the main area (MR). For example, the panel bending area BA may be connected through one end of the main area MR. The width of the panel bending area BA may be smaller than the width of the main area MR (width of the short side). The connection portion between the main region MR and the panel bending region BA may have an L-shaped cutting shape.

In the panel bending area BA, the display panel 10 may be bent with a curvature downward in the thickness direction, that is, in a direction opposite to the display surface. The panel bending area BA may have a constant radius of curvature, but is not limited thereto and may have a different radius of curvature for each section. As the display panel 10 is bent in the panel bending area BA, the surface of the display panel 10 is inverted. That is, one side of the display panel 10 that faces the top may be changed to face the outside and then the bottom again through the panel bending area BA.

The sub-area SR extends from the panel bending area BA. The sub-region SR may start after the bending is completed and extend in a direction parallel to the main region MR. The sub-region SR may overlap the main region MR in the thickness direction of the display panel 10. The sub-area SR may overlap with the non-display area (NDA) of the edge of the main area (MR) and may further overlap the display area (DA) of the main area (MR).

The width of the sub-region SR in the second direction DR2 may be the same as the width of the panel bending area BA, but is not limited thereto.

A driving chip 20 may be disposed on the sub region SR of the display panel 10. The driving chip 20 may include an integrated circuit that drives the display panel 10 . In one embodiment, the integrated circuit may be a data driving integrated circuit that generates and provides data signals, but is not limited thereto. The driving chip 20 may be mounted on the display panel 10 in the sub region SR. The driving chip 20 is mounted on one side of the display panel 10, which is the same side as the display surface, and as described above, the panel bending area BA is bent and inverted, so that the display panel 10 faces downward in the thickness direction. The upper surface of the driving chip 20 may face downward as it is mounted on the surface.

The driving chip 20 may be attached to the display panel 10 through an anisotropic conductive film or may be attached to the display panel 10 through ultrasonic bonding. The horizontal width of the driving chip 20 may be smaller than the horizontal width of the display panel 10. The driving chip 20 is disposed in the horizontal center of the sub-region SR, and the left and right edges of the driving chip 20 may be spaced apart from the left and right edges of the sub-region SR, respectively.

A pad portion may be provided at an end of the sub region SR of the display panel 10, and a display driving substrate 30 may be connected to the pad portion. The display driving substrate 30 may be a flexible printed circuit board or a film.

A plurality of signal wires may be disposed in the sub area SR, panel bending area BA, and main area MR. The signal wire may extend from the sub area SR through the panel bending area BA to the main area MR.

FIG. 3 is a schematic cross-sectional view showing an exemplary stacked structure of a display panel according to an embodiment.

Referring to FIG. 3, the display panel 10 includes a sequentially stacked substrate (SUB), transistor layer (TFTL), light emitting element layer (EML), thin film encapsulation layer (TFEL), touch layer (TSL), and anti-reflection layer (RPL). ) and a protective layer (WDL).

The substrate SUB may support components disposed thereon.

A transistor layer (TFTL) may be disposed on the substrate (SUB). The transistor layer (TFTL) may include a circuit that drives the light emitting element layer (EML) of the pixel. The transistor layer TFTL may include a plurality of thin film transistors. Additionally, the transistor layer TFTL may include at least one inorganic insulating layer and at least one organic insulating layer.

A light emitting device layer (EML) may be disposed on the transistor layer (TFTL). The light emitting device layer (EML) may include an organic light emitting layer. The light emitting device layer (EML) can emit light with various brightnesses depending on the driving signal transmitted from the transistor layer (TFTL).

A thin film encapsulation layer (TFEL) may be disposed on the light emitting device layer (EML). The thin film encapsulation layer (TFEL) may include an inorganic film or a stacked film of an inorganic film and an organic film. As another example, glass or an encapsulation film may be applied as a thin film encapsulation layer (TFEL).

A touch layer (TSL) may be disposed on the thin film encapsulation layer (TFEL). The touch layer (TSL) is a layer that recognizes touch input and can perform the function of a touch member. The touch layer (TSL) may include a plurality of sensing areas and sensing electrodes.

An anti-reflection layer (RPL) may be disposed on the touch layer (TSL). The anti-reflection layer (RPL) can play a role in reducing external light reflection. The anti-reflection layer (RPL) may be attached in the form of a polarizing film. The anti-reflection layer (RPL) may be omitted. Instead of the illustrated anti-reflection layer (RPL), the display panel 10 may further include a color filter layer therein to reduce external light reflection. In this case, the anti-reflection layer (RPL) may include a color filter that selectively transmits light of a specific wavelength.

A protective layer (WDL) may be disposed on the anti-reflection layer (RPL). The protective layer (WDL) may include, for example, a window member. The protective layer (WDL) may be attached to the anti-reflection layer (RPL) using an optically clear adhesive or the like.

A detailed description of the substrate (SUB), transistor layer (TFTL), light emitting element layer (EML), and thin film encapsulation layer (TFEL) will be described later in conjunction with FIG. 4.

FIG. 4 is a cross-sectional view taken along line II′ of FIG. 1 according to an embodiment.

Referring to FIG. 4 , the display panel 10 may include a display unit (DU). Although not shown in FIG. 4 , the display panel 10 may further include a touch sensing unit disposed on the display unit DU.

The display unit (DU) includes a substrate (SUB), a transistor layer (TFTL) disposed on the substrate (SUB), a light emitting element layer (EML) disposed on the transistor layer (TFTL), and the transistor layer (TFTL) and the light emitting element. It may include a thin film encapsulation layer (TFEL) covering the layer (EML).

The substrate SUB may include a display area DA and a non-display area NDA. That is, the substrate SUB may be disposed in the first non-display area NDA1 and the second non-display area NDA2 spaced apart in the second direction DR2 with the display area DA in between.

One end of the substrate (SUB) may be thinner than the other end located opposite to the one end. Specifically, the substrate SUB located in the first non-display area NDA1 and the display area DA extends along the second direction DR2, has the same thickness, and is located in the second non-display area NDA2. The thickness of the substrate SUB may become thinner as it moves from the boundary between the display area DA and the second non-display area NDA2 to the second display area NDA2. A detailed description of the substrate SUB will be described later in conjunction with FIGS. 6 to 10.

The transistor layer TFTL may be disposed on the substrate SUB. Specifically, the transistor layer TFTL may be disposed on the substrate SUB located in the display area DA, but may not be disposed on the first non-display area NDA1 and the second non-display area NDA2.

In the transistor layer (TFTL), not only thin film transistors of each pixel, but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and data lines may be formed. there is. Each of the thin film transistors may include a semiconductor layer, a gate electrode, a source electrode, and a drain electrode.

The light emitting device layer (EML) may be disposed on the transistor layer (TFTL). The light emitting layer (EML) may include pixels including a first electrode, an emitting layer, and a second electrode, and a pixel defining layer defining the pixels. The light-emitting layer may be an organic light-emitting layer containing an organic material. At this time, the light emitting layer may include a hole transporting layer, an organic light emitting layer, and an electron transporting layer. For example, the first electrode can receive a predetermined voltage through a thin film transistor of the transistor layer TFTL, and the second electrode can receive a cathode voltage. In this way, when each of the first and second electrodes is applied with a predetermined voltage, holes and electrons can each move to the organic light-emitting layer through the hole transport layer and the electron transport layer, and can combine with each other in the organic light-emitting layer to cause the organic light-emitting layer to emit light.

The thin film encapsulation layer (TFEL) may be disposed on the light emitting device layer (EML) and cover the transistor layer (TFTL) and the light emitting device layer (EML). Specifically, the thin film encapsulation layer (TFEL) may be disposed in both the display area (DA) and the non-display area (NDA). That is, as shown in FIG. 4, the thin film encapsulation layer TFEL is disposed in the display area DA, the first non-display area NDA, and the second non-display area NDA2, and the transistor layer TFTL and the entire light emitting element layer (EML) and may be in direct contact with the upper surface of the substrate (SUB).

In FIG. 4 , the thin film encapsulation layer TFEL is shown to cover a portion of the substrate SUB located in the first non-display area NDA1 and the second non-display area NDA2, but the present invention is not limited thereto, and some embodiments are not limited thereto. The thin film encapsulation layer TFEL may be disposed to extend further in the second direction DR2, and the entire upper surface of the substrate SUB located in the first non-display area NDA1 and the second non-display area NDA2. can cover.

As described above, the thickness of the end of the substrate (SUB) located at one end of the substrate (SUB) is thinner than the thickness of the end of the substrate (SUB) located at the other end, so the thickness of the end of the substrate (SUB) located at one end of the substrate (SUB) is thinner. The thickness T2 of the thin film encapsulation layer TFEL located on the (SUB) may be thicker than the thickness T1 of the thin film encapsulation layer TFTL located on the substrate SUB located on the other side.

Specifically, the thickness of the substrate SUB located in the first non-display area NDA1 is thicker than the thickness of the substrate SUB located in the second non-display area NDA2, so the first non-display area NDA1 The maximum thickness T1 of the thin film encapsulation layer TFEL disposed on the substrate SUB located in It may be thinner than the maximum thickness (T2).

In addition, the thickness of the substrate SUB located in the second non-display area NDA2 decreases as it goes outward from the boundary between the display area DA and the second non-display area NDA2. ) The upper surface of the substrate (SUB) located at may include an inclined surface. Accordingly, the thin film encapsulation layer TFEL, which contacts the inclined surface of the substrate SUB and is disposed on the inclined surface, may be disposed along the inclined surface of the substrate SUB.

The thin film encapsulation layer (TFEL) can prevent oxygen or moisture from penetrating into the light emitting device layer (EML). To this end, the thin film encapsulation layer (TFEL) may include at least one inorganic film. For example, the inorganic layer may be a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but is not limited thereto. Additionally, the thin film encapsulation layer (TFEL) can protect the light emitting device layer (EML) from foreign substances such as dust. To this end, the thin film encapsulation layer (TFEL) may include at least one organic layer. For example, the organic layer may be acryl resin, epoxy resin, phenolic resin, polyamideresin, or polyimide resin, but is not limited thereto. .

Figure 5 is an enlarged view of area A of Figure 4 according to one embodiment.

Referring to FIG. 5, the display unit DU may include a substrate SUB, a transistor layer TFTL disposed on the substrate SUB, a light emitting device layer EML, and a thin film encapsulation layer TFEL. .

The transistor layer (TFTL) includes a buffer layer (BF), a thin film transistor (TFT), a first gate insulating layer (GI1), a first gate conductive layer (GAT1), a second gate insulating layer (GI2), and a second gate conductive layer ( GAT2), an interlayer insulating layer (ILD), a first metal conductive layer (SD1), a second metal conductive layer (SD2), a first via insulating layer (VIA1), and a second via insulating layer (VIA2). .

Since the substrate (SUB) can be applied in the same manner as described above, its description is omitted.

The buffer layer BF may be disposed on the substrate SUB. The buffer layer (BF) is disposed on one side of the substrate (SUB) to protect the thin film transistors (TFTs) and the light emitting layer (EL) of the light emitting element layer (EML) from moisture penetrating through the substrate (SUB), which is vulnerable to moisture permeation. You can. The buffer layer BF may be composed of a plurality of inorganic films alternately stacked. For example, the buffer layer BF may be made of a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked. In some embodiments, the buffer layer (BF) may be omitted.

A transistor layer (TFTL) may be disposed on the buffer layer (BF). A thin film transistor (TFT) may include an active layer (ACT), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE). In FIG. 5, it is illustrated that the gate electrode (GE) of the thin film transistor (TFT) is arranged in a top gate (top gate) manner located on top of the active layer (ACT), but the present invention is not limited thereto. For example, in some embodiments, thin film transistors (TFTs) are of the bottom gate type, in which the gate electrode (GE) is located below the active layer (ACT), or the gate electrode (GE) is located below the active layer (ACT). It can be arranged in a double gate manner, located both at the top and bottom of the ACT.

Specifically, the active layer (ACT) may be disposed on the buffer layer (BF). The active layer (ACT) may include polycrystalline silicon, single crystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. For example, oxide semiconductors include binary compounds (ABx) and ternary compounds (ABxCy) containing indium, zinc, gallium, tin, titanium, aluminum, hafnium (Hf), zirconium (Zr), magnesium (Mg), etc. , may include a four-component compound (ABxCyDz). For example, the active layer (ACT) may include ITZO (oxide containing indium, tin, and titanium) or IGZO (oxide containing indium, gallium, and tin). Although not shown in FIG. 5 , in some embodiments, a light blocking layer may be disposed between the buffer layer BF and the active layer ACT to block external light incident on the active layer ACT.

A first gate insulating layer (GI1) may be disposed on the active layer (ACT). The first gate insulating layer GI1 may be made of an inorganic layer, for example, a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. In FIG. 5 , it is illustrated that the first gate insulating layer GI1 is disposed in areas other than those overlapping with the gate electrode GE, but the present invention is not limited thereto. For example, in some embodiments, the first gate insulating layer GI1 may be disposed only in an area that overlaps the gate electrode GE.

A first gate conductive layer (GAT1) may be disposed on the first gate insulating layer (GI1). The first gate conductive layer (GAT1) may include the gate electrode (GE) of the thin film transistor (TFT), the first electrode (CE1) of the sustain capacitor (Cst), and a scan wire (not shown).

The first gate conductive layer (GAT1) is made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be made of a single layer or multiple layers of one or two alloys.

A second gate insulating layer (GI2) may be disposed on the first gate conductive layer (GAT1). The second gate insulating layer GI2 may serve to insulate the first gate conductive layer GAT1 and the second gate conductive layer GAT2. The second gate insulating layer GI2 may be disposed on the first gate insulating layer GI1 on which the first gate conductive layer GAT1 is disposed and cover the first gate conductive layer GAT1. The second gate insulating layer GI2 may be disposed to have substantially the same thickness along the profile of the first gate conductive layer GAT1. In one embodiment, the second gate insulating layer GI2 may include the same material as the first gate insulating layer GI1. However, it is not limited to this.

The second gate conductive layer (GAT2) may be disposed on the second gate insulating layer (GI2). The second gate conductive layer (GAT2) may be located directly on one surface of the second gate insulating layer (GI2). That is, the second gate conductive layer (GAT2) may directly contact one surface of the second gate insulating layer (GI2).

The second gate conductive layer (GAT2) may include the second electrode (CE2) of the sustain capacitor (Cst). For example, as shown in FIG. 5, the second electrode CE2 may form a sustain capacitor Cst with the first electrode CE1. The second electrode CE2 may overlap the first electrode CE1 in the third direction DR3.

The interlayer insulating layer (ILD) may serve to insulate the second gate conductive layer (GAT2) and the first metal conductive layer (SD1), which will be described later. The interlayer insulating layer (ILD) may be disposed on the second gate insulating layer (GI2) on which the second gate conductive layer (GAT2) is disposed. The interlayer insulating layer (ILD) may be made of an inorganic layer, for example, a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

The first metal conductive layer SD1 may be disposed on the interlayer insulating layer ILD. The first metal conductive layer SD1 may include the source electrode (SE) and drain electrode (DE) of the thin film transistor (TFT).

Each of the source electrode (SE) and the drain electrode (DE) is connected to the active layer (ACT) through a contact hole penetrating the first gate insulating layer (G1), the second gate insulating layer (GI2), and the interlayer insulating layer (ILD). can be connected to. The source electrode (SE) and drain electrode (DE) are made of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). ) It may be composed of a single layer or multiple layers made of any one or an alloy thereof. However, it is not limited thereto, and in some embodiments, the first metal conductive layer SD1 may have a multi-layer structure. For example, the first metal conductive layer SD1 may have a two-layer structure of Ti/Al or a Ti/Al two-layer structure. It may have a three-layer structure of /Ti.

The first via insulating layer (VIA1) partially insulates the first metal conductive layer (SD1) and the second metal conductive layer (SD2), which will be described later, and serves to flatten the level difference caused by the element of the thin film transistor (TFT). can do. The first via insulating layer (VIA1) may be disposed on the interlayer insulating layer (ILD) on which the first metal conductive layer (SD1) is disposed. The first via insulation layer (VIA1) may be made using an organic insulating material such as acrylic resin, polyimide resin, or polyamide resin. For example, the first via insulation layer (VIA1) is made of acryl resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. It may be made of an organic film.

The second metal conductive layer SD2 may be disposed on the first via insulating layer VIA1. The second metal conductive layer (SD2) includes a connection electrode (CNE) electrically connected to the source electrode (SE) or drain electrode (DE) of the thin film transistor (TFT), a data line (DL), and an initialization voltage line (not shown). ), etc. may be included. For example, the second metal conductive layer SD2 may include a connection electrode CNE that is electrically connected to the drain electrode DE, as shown in FIG. 5 . The connection electrode CNE may be electrically connected to the drain electrode DE through a contact hole formed through the first via insulating layer VIA1.

The second metal conductive layer SD2 may include metal. For example, the second metal conductive layer SD2 includes molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), and nickel ( Contains one or more metals selected from Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). You can. In some embodiments, the second metal conductive layer SD2 may have a multi-layer structure. For example, the second metal conductive layer SD2 may have a two-layer structure of Ti/Al or a three-layer structure of Ti/Al/Ti. You can have it.

The second via insulating layer VIA2 may be disposed on the first via insulating layer VIA1 on which the second metal conductive layer SD2 is disposed. The second via insulating layer VIA2 may be formed using an organic insulating material such as acrylic resin, polyimide resin, or polyamide resin. One side of the second via insulating layer (VIA2) in the third direction (DR3) is a top surface on which the pixel defining layer (PDL) is disposed, and the other side in the third direction (DR3) is a top surface on which the first via insulating layer (VIA1) is disposed. It could be the other side.

A light emitting device layer (EML) is formed on the transistor layer (TFTL). The light emitting element layer (EML) includes light emitting elements (LEL) and a pixel defining layer (PDL).

Each of the light emitting elements (LEL) may include an anode electrode (ANO), a light emitting layer (EL), and a cathode electrode (CAT), and the light emitting elements (LEL) and the pixel defining layer (PDL) may include a second via insulating layer. It is formed on (VIA2).

As shown in FIG. 5, the anode electrode (ANO) of the light emitting element (LEL) is electrically connected to the connection electrode (CNE) through a contact hole formed through the second via insulating layer (VIA2) to form a thin film transistor (TFT). ) can be electrically connected to the drain electrode (DE).

In the top emission structure, which emits light in the direction of the cathode electrode (CAT) based on the light emitting layer (EL), the anode electrode (ANO) has a stacked structure of aluminum and titanium (Ti/Al/Ti), and a stacked structure of aluminum and ITO. It can be formed of a highly reflective metal material such as (ITO/Al/ITO), APC alloy, and a laminated structure of APC alloy and ITO (ITO/APC/ITO). The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). Alternatively, the anode electrode (ANO) may be made of a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), and aluminum (Al).

In the bottom structure that emits light in the direction of the anode electrode (ANO) based on the light emitting layer (EL), the anode electrode (ANO) is a transparent metal material (TCO, Transparent Conductive Material) such as ITO or IZO that can transmit light. , or it may be made of a semi-transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

The pixel defining layer (PDL) may be arranged to partition the anode electrode (ANO) on the second via insulating layer (VIA2) to serve as a pixel defining layer that defines the emission areas (EMA). The pixel defining layer (PDL) may be arranged to cover the edge of the anode electrode (ANO). The pixel defining layer (PDL) may be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. there is.

In each of the light emitting areas (EMA), an anode electrode (ANO), a light emitting layer (EL), and a cathode electrode (CAT) are sequentially stacked so that holes from the anode electrode (ANO) and electrons from the cathode electrode (CAT) pass through the light emitting layer ( EL) indicates areas that combine with each other to emit light.

A light emitting layer (EL) may be disposed on the anode electrode (ANO) and the pixel defining layer (PDL). In one embodiment, the light emitting layer EL may include an organic material and emit light of a predetermined color. For example, the light emitting layer EL may include a hole transporting layer, an organic material layer, and an electron transporting layer.

The cathode electrode (CAT) is formed on the light emitting layer (EL). The cathode electrode (CAT) may be disposed to cover the light emitting layer (EL). The cathode electrode (CAT) may be a common layer commonly formed in pixels. Although not shown in FIG. 5, in some embodiments, a capping layer may be disposed on the cathode electrode (CAT).

In the upper light emitting structure, the cathode electrode (CAT) is a transparent metal material (TCO, Transparent Conductive Material) such as ITO or IZO that can transmit light, or magnesium (Mg), silver (Ag), or magnesium (Mg) and silver. It may be made of a semi-transmissive conductive material such as an alloy of (Ag).

In the lower light emitting structure, the cathode electrode (CAT) has a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of APC alloy and ITO ( It may be made of a highly reflective metal material such as ITO/APC/ITO). The APC alloy may be an alloy of silver (Ag), palladium (Pd), and copper (Cu). However, the present invention is not limited thereto, and in some embodiments, the cathode electrode (CAT) may be made of a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or ITO.

A thin film encapsulation layer (TFEL) may be disposed on the light emitting device layer (EML). Specifically, the thin film encapsulation layer (TFEL) may be disposed on the cathode electrode (CAT). The thin film encapsulation layer (TFEL) may include at least one inorganic layer to prevent oxygen or moisture from penetrating into the light emitting layer (EL) and the cathode electrode (CAT). Additionally, the thin film encapsulation layer (TFEL) may include at least one organic layer to protect the light emitting device layer (EML) from foreign substances such as dust.

For example, the thin film encapsulation layer (TFEL) includes a first inorganic layer 171 disposed on the cathode electrode CAT, an organic layer 172 disposed on the first inorganic layer 171, and an organic layer 172. It may include a second inorganic film 173 disposed on the surface. The first inorganic layer 171 and the second inorganic layer 173 may be made of a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but are not limited thereto. The organic layer 172 may be made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc., but is limited thereto. It doesn't work.

Figure 6 is a cross-sectional view specifically showing a substrate according to an embodiment. FIG. 7 is an enlarged view of area B of FIG. 6 according to an embodiment. Figure 8 is an enlarged view of area B of Figure 6 according to another embodiment. FIG. 9 is an enlarged view of area C of FIG. 6 according to an embodiment. FIG. 10 is an enlarged view of area C of FIG. 6 according to another embodiment.

Referring to FIG. 6 , as described above, the substrate SUB may be disposed in the first non-display area NDA1, the display area DA, and the second non-display area NDA2. That is, the substrate SUB may include a first non-display area NDA1, a display area DA, and a second non-display area NDA2. In other words, the substrate SUB has a first part located in the first non-display area NDA1, a second part located in the display area DA, and a third part located in the second non-display area NDA2. It may include, and the first part, the second part, and the third part of the substrate SUB may be formed as one body.

The substrate (SUB) has a top surface (ST), a bottom surface (SB) that is opposite to the top surface, a side surface (SS) located between the top surface (ST) and the bottom surface (SB), and the top surface (ST), bottom surface (SB), and side surface. It may include a body portion (SM) surrounded by (SS).

Specifically, the top surface ST of the substrate SUB includes a first top surface ST1 located in the first portion of the substrate SUB, a second top surface ST2 located in the second portion of the substrate SUB, and It may include a third upper surface ST3 located in the third portion of the substrate SUB.

The first upper surface ST1 and the second upper surface ST2 have a flat surface, and unlike the first upper surface ST1 and the second upper surface ST2, the third upper surface ST3 may include an inclined surface. That is, the thickness of the third part of the substrate SUB becomes thinner as it goes from the boundary between the second part and the third part of the substrate SUB to the outside of the second non-display area NDA2. In other words, the third part becomes thinner. Since the thickness becomes thinner as it moves from the boundary between the second part and the third part to the end of the third part of the substrate SUB along the second direction DR2, the third upper surface located in the third part of the substrate SUB accordingly. (ST3) may include a slope. In FIG. 6 , the third upper surface ST3 is shown as an inclined surface having a straight shape, but the present invention is not limited thereto, and in some embodiments, the third upper surface ST3 may be an inclined surface having a curved shape.

The lower surface SB of the substrate SUB includes a first lower surface SB1 located on the first portion of the substrate SUB, a second lower surface SB2 located on the second portion of the substrate SUB, and a second lower surface SB2 located on the second portion of the substrate SUB. ) may include a third lower surface (SB3) located in the third portion of the.

Unlike the upper surface ST of the lower surface SB of the substrate SUB, the first lower surface SB1, the second lower surface SB2, and the third lower surface SB3 may all be flat.

The side surface (SS) located between the upper surface (ST) and the lower surface (SB) of the substrate (SUB) is connected to the first side (SS1) located in the first part of the substrate (SUB) and the third part of the substrate (SUB). It may include a second side (SS2) positioned. That is, the first side SS1 is located at the end of the first part of the substrate SUB, the second side SS2 is located at the end of the third part of the substrate SUB, and in the second direction DR2 can face each other.

Additionally, the thickness d1 of the end of the substrate SUB where the first side SS1 is located may be thicker than the thickness d2 of the end of the substrate SUB where the second side SS2 is located.

Referring to FIG. 6 , the third portion of the substrate SUB may have a trapezoidal cross-sectional shape due to the third upper surface ST3, second side surface SS2, and third lower surface SB3. However, it is not limited to this, and in some embodiments, when the third upper surface ST3 of the substrate SUB has a curved inclined surface, the shape of the third upper surface ST3 of the substrate SUB may be different. .

The body SM of the substrate SUB includes a first body SM1 located in the first portion of the substrate SUB, a second body SM2 located in the second portion, and a third body portion SM2 located in the third portion of the substrate SUB. It may include a third body portion (SM3). As shown in FIG. 6, the first body portion (SM1) and the second body portion (SM2) may have the same area in cross-section, and the third body portion (SM3) may have the same area as the first body portion (SM1) and the second body portion (SM2). It may have a smaller area than the body portion (SM2).

In one embodiment, the substrate SUB may be a flexible substrate capable of bending, folding, rolling, etc. If the substrate (SUB) is a flexible substrate, it may be made of polyimide (PI), but is not limited thereto, and in some embodiments, the substrate (SUB) may be made of an insulating material such as glass, quartz, or polymer resin. . For example, polymer resins include polyethersulphone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), and polyethylene napthalate (polyethylene napthalate). PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose

It may be made of cellulose triacetate (CAT), cellulose acetate propionate (CAP), or a combination thereof. However, the present invention is not limited thereto, and in another embodiment, the substrate SUB may include a metal material.

Specifically, referring to FIGS. 7 and 9 , in one embodiment, the top surface (ST), body portion (SM), side surface (SS), and bottom surface (SB) of the substrate (SUB) may include polyimide. .

The method of manufacturing the display device 1, which will be described later in connection with FIGS. 15 to 20, includes a carrier substrate 100 including one side and the other side opposite to the one side, and having an edge stopper (ES) on an edge portion of one side. It may include a process of depositing a substrate (SUB) on the substrate (SUB), irradiating a laser on the other side of the carrier substrate (100), and detaching the substrate (SUB) from one side of the carrier substrate (100).

Referring to FIGS. 8 and 10, in another embodiment, the lower surface (SB) of the substrate (SUB) in direct contact with one surface of the carrier substrate 100 mainly composed of silicon dioxide (SiO2) is partially covered with the first residue. It may include a pattern (EP1). Specifically, in the process of attaching and detaching the substrate (SUB) from one side of the carrier substrate 100 by irradiating a laser on the other side of the carrier substrate 100, heat is applied to one side of the carrier substrate 100 by the laser and the carrier One side of the substrate 100 may be partially melted, and accordingly, in the process of detaching the substrate SUB from the carrier substrate 100, the lower surface SB of the substrate SUB is partially included in the carrier substrate 100. There may be a first residue pattern EP1 containing the same material as the used material. That is, polyimide and silicon dioxide (SiO2), a main component of the carrier substrate 100, may coexist on the lower surface SB of the substrate SUB. In other words, the lower surface (SB) of the substrate (SUB) includes a polyimide material, and the surface of the lower surface (SB) of the substrate (SUB) has a first residue pattern (EP1) partially including silicon dioxide (SiO2). This can exist.

In addition, in another embodiment, it is not in direct contact with one side of the carrier substrate 100, but is disposed on the edge portion of one side of the carrier substrate 100, and is made of a metal material such as aluminum (Al), molybdenum (Mo), or silicon nite. The second side (SS2) of the substrate (SUB) in direct contact with the edge stopper (ES) containing an inorganic material such as silicon oxide, silicon oxynitride, silicon oxide, titanium oxide, or aluminum oxide is the lower surface of the substrate (SUB) ( As with SB), in the process of irradiating a laser on the other side of the carrier substrate 100 to detach the substrate SUB from one side of the carrier substrate 100, the second side SS2 and the second side SS2 of the substrate SUB are separated by the laser. As heat is applied to one side of the edge stopper (ES) in contact, one side of the edge stopper (ES) may be partially melted, and thus the edge stopper (ES) may partially melt on the second side (SS2) of the substrate (SUB). A second residue pattern containing a material identical to a metal material such as aluminum (Al), molybdenum (Mo), or an inorganic material such as silicon nitride, silicon oxy nitride, silicon oxide, titanium oxide, or aluminum oxide ( EP2) may exist. That is, on the second side (SS2) of the substrate (SUB), metal materials such as aluminum (Al) and molybdenum (Mo), which are the main components of polyimide and the edge stopper (ES), or silicon nitride, silicon oxy nitride, and silicon oxide Inorganic substances such as , titanium oxide, or aluminum oxide may exist mixed. In other words, the second side SS2 of the substrate SUB includes a polyimide material, and the surface of the second side SS2 of the substrate SUB includes a polyimide material partially containing the same material as the edge stopper ES. 2 A residue pattern (EP2) may be present.

Referring again to FIGS. 7 and 8, as described above, it includes a first lower surface (SB1), a second lower surface (SB2), and a third lower surface (SB3) that are in direct contact with one surface of the carrier substrate 100. The lower surface (SB) may be partially melted as heat is applied by the laser in the process of detaching the substrate (SUB) from one side of the carrier substrate 100 by irradiating a laser on the other side of the carrier substrate 100. , during the process of detaching the substrate SUB from the carrier substrate 100, the lower surface SB of the substrate SUB may be curved.

In comparison, the upper surface ST and 1 The side surface (SS1) is not in direct contact with the laser, so heat from the laser is not applied, and it is not directly detached from the carrier substrate 100, so unlike the bottom surface (SB) of the substrate (SUB), it has a smooth surface without curves. You can have it.

In addition, as described above, the second side surface SS2 of the substrate SUB is in direct contact with the edge stopper ES located at the edge of one side of the carrier substrate 100, and the second side surface SS2 of the substrate SUB is in direct contact with the edge stopper ES located on the edge of one side of the carrier substrate 100. Since heat from the laser may be applied during the process of detaching the substrate SUB from one surface of the carrier substrate 100 by irradiating a laser thereto, the substrate SUB may have a curve similar to the lower surface SB of the substrate SUB.

Therefore, the top surface (ST) and first side surface (SS1) of the substrate (SUB) have a smooth surface, and the bottom surface (SB) and second side surface (SS2) of the substrate (SUB) have a curved surface. The top surface (ST) and the first side surface (SS1) may have a different surface roughness than the bottom surface (SB) and the second side surface (SS2) of the substrate SUB. In addition, unlike the laser being irradiated to the second side surface (SS2) of the substrate (SUB) in a direction opposite to the lower surface (SB) of the substrate (SUB), the laser is irradiated parallel to the second side surface (SS2). , the degree of curvature of the second side surface SS2 of the substrate SUB may be different from the degree of curvature of the lower surface SB of the substrate SUB. That is, the second side surface SS2 and the bottom surface SB of the substrate SUB may have different surface roughnesses.

Hereinafter, other embodiments of the display device will be described. In the following embodiments, the same components as the previously described embodiments will be referred to by the same reference numerals, redundant descriptions will be omitted or simplified, and differences will be mainly explained.

FIG. 11 is a cross-sectional view taken along line II′ of FIG. 1 according to another embodiment.

Referring to FIG. 11, unlike the embodiment according to FIG. 4, the substrate SUB_1 included in the display panel 10_1 according to this embodiment includes a first substrate SUB1, a barrier layer BR, and a second substrate. (SUB2) may be included. That is, the first substrate SUB1, the barrier layer BR, and the second substrate SUB2 may be sequentially stacked along the third direction DR3.

Since the substrate SUB according to the embodiment shown in FIG. 4 is substantially the same as the first substrate SUB1 according to the present embodiment, the above-described content can be applied in the same manner, and thus the description thereof is omitted.

A barrier layer BR may be disposed on the first substrate SUB1. Specifically, the barrier layer BR may be disposed on the top surface of the first substrate SUB1 located in the display area DA.

The barrier layer (BR) may serve to protect the thin film transistors of the transistor layer (TFTL) and the light emitting layer of the light emitting device layer (EML) from moisture penetrating through the substrate (SUB_1), which is vulnerable to moisture penetration.

The barrier layer (BR) may be composed of a plurality of inorganic films stacked alternately. For example, the barrier layer (BR) may be formed as a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxy nitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately laminated. However, it is not limited to this.

The second substrate SUB2 may be disposed on the first substrate SUB1 with the barrier layer BR interposed therebetween. Specifically, the second substrate SUB2, like the barrier layer BR, is disposed on the upper surface of the first substrate SUB1 located in the display area DA, and the barrier layer disposed on the first substrate SUB1 It can be in direct contact with the upper surface of (BR).

In this embodiment, the second substrate SUB2 may include the same material as the first substrate SUB1. For example, like the first substrate SUB1, the second substrate SUB2 may include a flexible polymer material such as polyimide. However, the present invention is not limited thereto, and in some embodiments, the first substrate SUB1 and the second substrate SUB2 may include different materials.

Figure 12 is a cross-sectional view specifically showing a substrate according to another embodiment. FIG. 13 is an enlarged view of area D of FIG. 12 according to another embodiment. FIG. 14 is an enlarged view of area E of FIG. 12 according to another embodiment.

12 to 14, the first substrate SUB1 has a first portion located in the first non-display area NDA1, a second portion located in the display area DA, and a second non-display area NDA2. ) may include a third portion located at the top, side (SS1), and bottom (SB1) of the first substrate (SUB1), ) may include a body portion (SM1) surrounded by. The description of the first substrate SUB1 may be applied in the same manner as the content of the substrate SUB described above in connection with FIG. 6 .

The barrier layer BR may be disposed on the second top surface SM1_2 located in the second portion of the first substrate SUB. In this embodiment, it is shown as being disposed on the second top surface (ST1_2) of the first substrate (SUB1), but it is not limited thereto, and in some embodiments, the barrier layer (BR) extends further in the second direction (DR2). It may be disposed on the first top surface (ST1_1) and the third top surface (ST1_3) of the first substrate (SUB1) located in the first non-display area (NDA1) and the second non-display area (NDA2). When the barrier layer BR is disposed on the third upper surface ST1_3 of the first substrate SUB1, the third upper surface ST1_3 of the first substrate SUB1 has an inclined surface, so the third upper surface ST1_3 The barrier layer BR disposed on the top may partially include an inclined surface by following the shape of the third upper surface ST1_3.

The second substrate SUB2, like the first substrate SUB1, has a top surface (ST2), a side surface (SS2), a bottom surface (SB), and a body surrounded by the top surface (ST2), the side surface (SS2), and the bottom surface (SB). It may include part (SM2).

Unlike the first substrate SUB1, the second substrate SUB2 is not disposed in the first non-display area NDA1 and the second non-display area NDA2, but is disposed only in the display area DA, and is disposed on the first substrate ( Unlike SUB1), the second substrate SUB2 extends in the second direction DR2, and the end of the second substrate SUB2 and the body SM2 of the second substrate SUB2 may have the same thickness d3. there is. Accordingly, the second substrate SUB2 does not include the same inclined surface as the third portion of the first substrate SUB1. In this embodiment, the thickness of the first substrate (SUB1) and the second substrate (SUB2) are shown to be the same, but this is not limited, and in some embodiments, the thickness of the first substrate (SUB1) and the second substrate (SUB2) is may be different.

The lower surface SB2 of the second substrate SUB2 is in direct contact with the upper surface of the barrier layer BR and may be disposed on the second portion of the first substrate SUB1 with the barrier layer BR interposed therebetween. . In this embodiment, the second substrate SUB2 is shown as being disposed on the upper surface of the barrier layer BR located in the display area DA, but it is not limited thereto, and in some embodiments, the second substrate SUB2 is The first top surface (ST1_1) and the third top surface (ST1_3) of the first substrate (SUB1) extend further in the second direction (DR2) and are located in the first non-display area (NDA1) and the second non-display area (NDA2). can be placed in When the second substrate SUB2 is further extended in the second direction DR2 and disposed on the third upper surface ST1_3 of the first substrate SUB1, the third upper surface ST_3 of the first substrate SUB1 is Since it has an inclined surface, the second substrate SUB2 disposed on the third upper surface ST1_3 may partially include an inclined surface by following the shape of the third upper surface ST1_3. That is, it may have the same shape as the first substrate SUB1.

Unlike the first substrate SUB1, the bottom surface SB2 and the side surface SS2 of the second substrate SUB2 are irradiated with a laser on the other side of the carrier substrate 100 to connect the substrate SUB_1 to that of the carrier substrate 100. Since it does not directly contact the laser and the carrier substrate 100 during the detachment process step on one side, the surface of the second substrate SUB does not have a curve, unlike the first substrate SUB1. That is, the top surface (ST2), bottom surface (SB2), and side surface (SS2) of the second substrate (SUB2) may have smooth surfaces like the top surface (ST1) and first side surface (SS1) of the first substrate (SUB1). there is. In other words, the top surface (ST2), bottom surface (SB2), and side surface (SS2) of the second substrate (SUB2) may have the same roughness as the top surface (ST1) and first side surface (SS1) of the first substrate (SUB1); , the top surface (ST2), bottom surface (SB2), and side surface (SS2) of the second substrate (SUB2) may have a different surface roughness from the bottom surface (SB1) and the second side surface (SS2) of the first substrate (SUB1).

In addition, unlike the first substrate SUB1, the second substrate SUB2 uses a laser beam in the process step of attaching and detaching the substrate SUB_1 from one side of the carrier substrate 100 by irradiating a laser onto the other side of the carrier substrate 100. , Since there is no direct contact with the carrier substrate 100 and the edge stopper (ES), the top surface (ST2), bottom surface (SB2), side surface (SS2), and body portion (SM2) of the second substrate (SUB2) are all the same. May contain substances. For example, the top surface (ST2), bottom surface (SB2), side surface (SS2), and body portion (SM2) of the second substrate SUB2 may all include polyimide.

Hereinafter, a method of manufacturing a display device according to an embodiment will be described.

Figure 15 is a flowchart showing a method of manufacturing a display device according to an embodiment.

16 to 20 are cross-sectional views for explaining a method of manufacturing a display device according to an embodiment.

First, as shown in FIG. 16, prepare a carrier substrate 100 equipped with an edge stopper (ES). (S100)

Specifically, referring to FIG. 16, a carrier substrate 100 is prepared, which includes one side and the other side opposite to the first side, and is provided with an edge stopper (ES) on the edge portion of one side. The step of preparing the carrier substrate 100 equipped with the edge stopper (ES) (S100) may further include cleaning one surface of the carrier substrate 100.

Specifically, before depositing the substrate (SUB) on the carrier substrate 100, the surface of the carrier substrate 100 is cleaned. That is, the surface of the carrier substrate 100 on which the substrate SUB will be deposited is cleaned to remove fine remaining organic substances. This is because when one side of the carrier substrate 100 is cleaned before depositing the substrate (SUB), the morphological characteristics improve and the van der Waals force with the substrate (SUB) increases, thereby improving the adhesion force. The cleaning method is possible, but is not limited to wet cleaning using a cleaning liquid, and various cleaning methods such as dry cleaning using air and wind power are possible.

In one embodiment, the carrier substrate 100 may be glass containing silicon dioxide (SiO2) as a main component. However, the present invention is not limited thereto, and in some embodiments, at least one of borosilicate glass, fused silica glass, and quartz glass may be used. As such, the reason for using glass as the carrier substrate 100 is that the laser must be able to pass through in the detachment process (S400) of the substrate (SUB), which will be described later, so a transparent material is used. Additionally, the carrier substrate 100 is made of a rigid material because it must support the display device to be formed on the top surface. However, it is not limited to this.

In one embodiment, the edge stopper (ES) disposed on the edge portion of one side of the carrier substrate 100 is made of a metal material such as aluminum (Al), molybdenum (Mo), or silicon nitride, silicon oxy nitride, silicon oxide, It may contain inorganic substances such as titanium oxide or aluminum oxide. However, it is not limited to this.

The edge stopper (ES) applies a preliminary substrate (SUB_P) for depositing the substrate (SUB) on the carrier substrate 100 in the step (S200) of forming the substrate (SUB) on the carrier substrate 100, which will be described later. At this time, the edge portion of the carrier substrate 100 comes into contact with the end of the preliminary substrate (SUB_P) and serves to enable the end of the preliminary substrate (SUB_P) to be coated to a certain thickness or more. Specifically, the edge stopper (ES) is in contact with the end of the preliminary substrate (SUB_P) and serves to enable the end of the preliminary substrate (SUB_P) to be deposited with a thickness of 300 nm to 500 nm, so the edge stopper (ES) The thickness (h) may be 300 nm to 500 nm. However, the thickness (h) of the edge stopper (ES) is not limited to the numerical range described above, and in some embodiments, the thickness (h) of the edge stopper (ES) is the thickness of the end of the target preliminary substrate (SUB_P). If is different, it may have the same thickness.

Additionally, the edge stopper ES may have a square shape, as shown in FIG. 16 . This is to ensure that the edge stopper (ES) is in contact with the preliminary substrate (SUB_P) and the end of the preliminary substrate (SUB_P) has a certain thickness or more. When the edge stopper (ES) is square in shape, the preliminary substrate (SUB_P) This is because, when applied on one surface of the carrier substrate 100, it can have an end portion of a certain thickness. However, the shape of the edge stopper (ES) is not limited to this, and in some embodiments, the shape of the edge stopper (ES) may vary. For example, the edge stopper ES may partially include a curved surface or may have a polygonal shape other than a square.

Second, as shown in FIG. 17, a substrate (SUB) can be formed on one side of the carrier substrate 100 (S200).

Specifically, the preliminary substrate SUB_P may be applied on one surface of the carrier substrate 100. In one embodiment, the preliminary substrate (SUB_P) has excellent heat resistance to withstand the temperature applied in the LTPS (Low temperature poly silicon) manufacturing process or the desorption process by laser, and the preliminary substrate (SUB_P) is formed into a substrate (substrate) through a process described later. In the case of SUB), it must have flexible properties, so it can include polyimide with heat resistance and flexibility properties. However, it is not limited to this.

The preliminary substrate (SUB_P) may be applied on one surface of the carrier substrate 100 through the coating device 110. For example, the preliminary substrate SUB_P may be coated using a slit die coating method. However, it is not limited thereto, and in some embodiments, the preliminary substrate (SUB_P) may be coated using a spin coating method or the like.

The preliminary substrate SUB_P is applied from one end of the carrier substrate 100 on which the edge stopper ES is not disposed to the other end of the carrier substrate 100 on which the edge stopper ES is disposed. Specifically, the preliminary substrate (SUB_P) is applied on one surface of the carrier substrate 100 through the coating device 110 in the form of a solution containing a polyimide material, so that the preliminary substrate (SUB_P) starts at the point where application of the preliminary substrate (SUB_P) begins. The thickness of the preliminary substrate (SUB_P) at the point where application of the preliminary substrate (SUB_P) is completed may be thinner than the thickness of the substrate (SUB_P). That is, the thickness of the preliminary substrate SUB_P may be maintained constant along the horizontal direction from the point where application of the preliminary substrate SUB_P begins, and may decrease at the point where application of the preliminary substrate SUB_P ends. Therefore, as described above, the edge stopper (ES) is placed at the edge of the carrier substrate 100 where application of the preliminary substrate (SUB_P) is completed to maintain the thickness of the end of the preliminary substrate (SUB_P) at a certain level or more. You can. In this process, the end of the preliminary substrate (SUB_P) comes into contact with one surface of the edge stopper (ES) and can be applied to the same thickness as the edge stopper (ES).

The step of forming a substrate (SUB) on the carrier substrate 100 (S200) involves applying a preliminary substrate (SUB_P) on one side of the carrier substrate 100, and then drying the preliminary substrate (SUB_P) in a vacuum chamber (Vacuum Chamber Dryer). ) and curing the preliminary substrate (SUB_P) to evaporate the solvent and curing the preliminary substrate (SUB_P). The curing process may be a process of curing and stabilizing the insulating preliminary substrate (SUB_P). For example, the curing process may be a process of applying heat to the preliminary substrate (SUB_P) at a certain temperature or more for a certain period of time. However, the process of curing the preliminary substrate SUB_P is not limited to this, and the substrate SUB can be formed by curing the preliminary substrate SUB_P using a curing method known in the technical field of the present invention.

Third, referring to FIG. 18, a transistor layer (TFTL), a light emitting device layer (EML), and a thin film encapsulation layer (TFEL) may be formed on the substrate (SUB) (S300). In this step, the transistor layer (TFTL), light emitting device layer (EML), and thin film encapsulation layer (TFEL) can be sequentially stacked on the substrate (SUB) by various methods known in the art.

The substrate SUB formed on the carrier substrate 100 may be coupled to the upper surface of the carrier substrate 100. That is, the lower surface of the substrate SUB and the upper surface of the carrier substrate 100 are connected to each other as the substrate SUB is cured during the curing process of the substrate SUB described above. Accordingly, the lower surface of the substrate SUB and the upper surface of the carrier substrate 100 may be combined.

Fourth, referring to FIGS. 19 and 20, the substrate (SUB) can be detached from the carrier substrate 100 (S400).

Specifically, the substrate (SUB) can be detached from the carrier substrate 100 by irradiating the laser L to the other surface of the carrier substrate 100. In one embodiment, the laser L may be an excimer laser that generates a laser beam of short wavelength, high power, and high efficiency. Excimer lasers may include inert gases, inert gas halides, mercury halides, inert gas oxide compounds, multiatomic excimers, etc. For example, inert gases are Ar2, Kr2, Xe2, etc., inert gas halides are ArF, ArCl, KrF, KrCl, XeF, KrO, XeO, etc., and the multiatomic excimer may be Kr2F, Xe2F, etc.

The laser (L) is applied to the carrier substrate 100 along the direction from one end of the carrier substrate 100 where the edge stopper (ES) is not disposed to the other end of the carrier substrate 100 where the edge stopper (ES) is disposed. If you ride it, it can be investigated. The wavelength of the laser L irradiated on the other side of the carrier substrate 100 may be about 308 nm.

The laser (L) is irradiated opposing the lower surface of the substrate (SUB) disposed on one side of the carrier substrate 100, and is irradiated to a portion where one side of the substrate (SUB) contacts one side of the edge stopper (ES). Accordingly, the bond between the polyimide molecules contained in the bottom and side of the substrate (SUB) is broken, the bottom of the substrate (SUB) and the top of the carrier substrate 100 are separated, and one side of the substrate (SUB) and the edge stopper ( ES) can be separated.

Figure 21 is a graph showing the relationship between the thickness of the polyimide layer and the maximum temperature of the polyimide layer heated by the laser irradiated to the polyimide layer.

Referring to FIG. 21, the X-axis represents the thickness of the polyimide layer, and the Y-axis represents the maximum temperature of the polyimide layer heated by the laser irradiated to the polyimide layer. This means that as the thickness of the polyimide layer increases, the absorption rate of energy by the laser irradiated to the polyimide layer increases, and the temperature of the polyimide layer increases accordingly.

Specifically, when the thickness of the polyimide layer is less than about 350 nm, as described above, as the thickness of the polyimide layer increases, the energy absorption rate by the laser irradiated to the polyimide layer increases, resulting in an increase in the maximum temperature of the polyimide layer. shows a tendency to However, when the thickness of the polyimide layer is 350 nm or more, even if the thickness of the polyimide layer increases, the maximum temperature of the polyimide layer does not increase any further and converges to about 1300°C. This means that when the thickness of the polyimide layer is 350 nm or more, all of the energy of the laser irradiated to the polyimide layer is absorbed and the energy absorption rate becomes 100%, so the heat generated by absorbing the laser energy irradiated to the polyimide layer is reduced. This means that the maximum temperature of the polyimide layer no longer increases and converges. For example, even when the thickness of the polyimide layer is 800 nm, the energy absorption rate of the irradiated laser is 100% as in the case where the polyimide layer is 350 nm thick, so it occurs due to the absorption of the energy of the irradiated laser. The maximum temperature of the polyimide layer due to the heat generated may be the same.

As a result, when the polyimide layer has a thickness of 300 nm to 500 nm, the thickness is sufficient to absorb all the energy of the laser irradiated to the polyimide layer, so the substrate is In the step (S400) of detaching (SUB) from one side of the carrier substrate 100, one end of the substrate (SUB) may have a thickness of 300 nm to 500 nm by the edge stopper (ES), so that the polyimide containing The substrate (SUB) can absorb 100% of the energy of the laser (L) irradiated on the other side of the carrier substrate 100, and thus separation of the carrier substrate 100 and the substrate (SUB) can be performed neatly and stably. This makes it possible to provide a display device (1) with improved reliability, which can improve productivity and reduce the risk of product damage.

Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention can be implemented in other specific forms without changing its technical idea or essential features. You will be able to understand it. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive.

1: display device 10: display panel
20: driving chip 30: display driving board
100: carrier substrate 110: coating device
SUB: Substrate TFTL: Transistor layer
EML: Light emitting device layer TFEL: Thin film encapsulation layer
DU: Display unit ST: Top view
SB: Bottom SS: Side
SM: body EP1: first residue pattern
EP2 2nd residue pattern ES: Edge stopper

Claims (20)

A substrate having a display area, a first non-display area located on one side of the display area, and a second non-display area located on the other side with the display area interposed therebetween;
a thin film transistor layer disposed on the display area of the substrate; and
a light emitting device layer disposed on the thin film transistor layer and including a light emitting device; Includes,
The substrate includes a first part located in the first non-display area, a second part located in the display area, and a third part located in the second non-display area,
The third portion includes a portion whose thickness decreases toward the outside from the boundary between the second portion and the third portion,
A display device in which a thickness of an end of the third portion is thinner than a thickness of an end of the first portion. According to claim 1,
The third portion of the substrate includes an upper surface and a lower surface opposite to the upper surface,
The upper surface and the lower surface of the third portion have different roughnesses. According to clause 2,
The third part further includes a side surface located between the upper surface and the lower surface,
The side surface of the third portion has a roughness different from the bottom surface of the third portion. According to clause 3,
The first portion of the substrate includes an upper surface, a lower surface opposite the upper surface, and a side surface located between the upper surface and the lower surface,
The side surface of the first part has a different roughness than the side surface of the third part,
The side surface of the first portion and the side surface of the third portion include the same material. According to clause 4,
The substrate further includes a first residue pattern partially located on the lower surface of the third portion,
The top, bottom, and sides of the third portion comprise a first material,
The first residue pattern includes a second material different from the first material. According to clause 5,
The substrate further includes a second residue pattern partially located on the side of the third portion,
The second residue pattern includes the first material and a third material different from the second material. According to clause 6,
The first material includes polyimide, the second material includes silicon dioxide, and the third material includes a metal or an inorganic material. According to clause 4,
The upper surface of the first portion has a flat surface, and the upper surface of the third portion has an inclined surface. According to claim 1,
The first portion and the second portion have the same thickness, and the third portion has a thickness that is thinner than the first portion and the second portion. According to claim 1,
The display device wherein the end of the third portion has a thickness of 300 nm to 500 nm. According to claim 1,
Covering all of the thin film transistor layer and the light emitting device layer, and further comprising a thin film encapsulation layer disposed on the substrate,
A display device in which the maximum thickness of the thin film encapsulation layer located in the first portion is thicker than the maximum thickness of the thin film encapsulation layer located in the third portion. A first substrate including a first part, a second part spaced apart from the first part, and a third part;
a barrier layer disposed on the first portion of the first substrate;
a second substrate disposed on the first portion of the first substrate with the barrier layer interposed therebetween;
a thin film transistor layer disposed on the second substrate; and
a light emitting device layer disposed on the thin film transistor layer and including a light emitting device; Includes,
The third portion of the first substrate includes a portion whose thickness decreases toward the outside from the boundary between the first portion and the third portion,
The third portion does not overlap the second substrate. According to claim 12,
A display device in which a thickness of an end of the third portion of the first substrate is thinner than a thickness of an end of the second substrate. According to claim 12,
A display device wherein a side surface of the third portion of the first substrate has a roughness different from a side surface of the second substrate. According to claim 14,
The display device wherein the side of the third portion of the first substrate and the side of the second substrate include a first material. According to claim 15,
the third portion further includes a residue pattern partially located on the side of the third portion,
The display device wherein the residue pattern includes a second material different from the first material. According to claim 16,
A display device wherein the first material includes polyimide and the second material includes a metal or an inorganic material. It includes a first part, a second part spaced apart from the first part, and a third part,
The third portion includes a portion whose thickness decreases toward the outside from the boundary between the first portion and the third portion,
The thickness of the end of the third part is thinner than the thickness of the end of the second part,
A substrate wherein a side surface of the third portion has a roughness different from a side surface of the second portion. According to clause 18,
The third portion further includes a residue pattern partially located on the side of the third portion,
the side of the second portion and the side of the third portion comprise a first material,
The substrate wherein the residue pattern includes a second material different from the first material. According to clause 19,
A substrate wherein the first material includes polyimide and the second material includes a metal or an inorganic material.

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