KR20230124056A - Method for predicting occurrence of defects in epitaxial silicon wafer and manufacturing method for epitaxial silicon wafer - Google Patents

Abstract

Provided is a method for predicting the occurrence of defects (SF: stacking faults) in an epitaxial silicon wafer for the case of an arbitrary phosphorus concentration and thermal history of a crystal. The method for predicting the generation of defects is a step of calculating the cooling curve of a silicon single crystal, a step of calculating at least the interstitial phosphorus concentration in each temperature process from the concentration of doped phosphorus, and a step of calculating the interstitial phosphorus supersaturation during cooling, cooling Calculating the size and density of the precipitates of phosphorus and silicon upon completion, and estimating the density of defects (SF: stacking faults) in the epitaxially grown silicon wafer from the size and density of the precipitates of phosphorus and silicon It includes a defect estimation step.

Description

Method for predicting occurrence of defects in epitaxial silicon wafers and method for manufacturing epitaxial silicon wafers

The present invention relates to a method for predicting occurrence of defects in an epitaxial silicon wafer and a method for manufacturing an epitaxial silicon wafer.

An epitaxial silicon wafer for a power MOS transistor is required to have a low substrate resistivity. For this reason, a silicon wafer doped with phosphorus (P) at a high concentration is used as a substrate for epitaxial growth.

On the other hand, it is known that when the resistivity of the substrate is lower than 0.9 mΩcm, many stacking faults (hereinafter referred to as SF) occur in the epitaxial film. These SFs (Stacking Faults) can be detected by etching, can be confirmed with the naked eye or under an optical microscope, and can generate density. This SF (Stacking Fault) causes problems in fabricating power MOS transistors. Accordingly, various methods have been attempted to suppress the occurrence of the defect.

For example, in Patent Literature 1, the cause of SF (stacking foam) generated in an epitaxial film is a cluster formed by bonding phosphorus and oxygen formed in the process of crystal growth of a substrate crystal, and they are It is estimated that the interface is the origin of occurrence of SF (stacking fault). Then, by examining the relationship with the thermal history during cooling of the crystal, the density of SF has a correlation with the residence time for the crystal to pass through the temperature range of 570 ° C ± 70 ° C (500 ° C to 640 ° C), and its stay It is said that when the time is 200 minutes or more, the number of SF (stacking faults) in the epitaxial wafer increases. However, in Patent Literature 1, the existence of a cluster generated by bonding of phosphorus and oxygen has not been confirmed. In addition, the reason why the cluster formed by combining phosphorus and oxygen in Patent Document 1 was assumed as the cause of SF is that phosphorus atoms cannot diffuse in the temperature range of 570 ° C ± 70 ° C, so oxygen atoms that can diffuse are phosphorus atoms. because it was assumed to gather around atoms.

Further, in Patent Literature 2, when annealing is performed for 30 minutes in an argon atmosphere at 1200 ° C. before epitaxial growth, the density and phosphorus concentration of SF (stacking fault) generated after epitaxial growth, 570 ° C ± 70 ° C. An empirical formula for the relationship between the residence time in the temperature range of , the charge temperature in argon annealing, and the epitaxial growth temperature has been proposed.

In addition, in Non-Patent Document 3, a crystal of 1.0 mΩcm of phosphorus dope is subjected to additional heat treatment for 500 hours at each step while raising the temperature in steps of 25 ° C from 400 ° C to 800 ° C, and the change in precipitation of phosphorus is investigated. . As a result, it is shown that SiP precipitates between 500 ° C and 700 ° C, but when heated to 775 ° C, SiP generated at the low temperature stage dissolves and disappears, and only SF and dislocations are observed. Some of the present inventors, when epitaxial growth treatment at 1130 ° C. is applied to crystals in which high-density SiP precipitates exist, SiP in the bulk portion of the wafer disappears, and SF having the same density as the density of SiP present in As-grown (stacking fault) is being observed.

Patent Document 1: Japanese Patent No. 5890587 Patent Document 2: Japanese Unexamined Patent Publication No. 2019-142733

Non-Patent Document 1: Senda Takeshi, Ishikawa Takashi, Fujimori Hiroyuki, Matsumura Hisashi, Narimatsu Shingo, Abe Yoshiaki, Horikawa Tomoyuki: The 78th Applied Physics Society Autumn Academic Lecture Preview (2017 Fukuoka International Conference Center), 7p-PB6-5 Non-Patent Document 2: Vladimir Voronkov, Robert Falster, Maria Porrini, and Januscia Duchini, Physica status solidi a, Volume 209, No. 10,(2012) page 1898 Non-Patent Document 3: P. Ostoja, D. Nobili, A. Armigliato, and R. Angelucci, Journal of Electrochemical Society, Volume 123 (1976) page 124 Non-Patent Document 4: V.V. Voronkov, R. Falster, Journal of Crystal Growth Volume 194 (1998) page 76

As described above, a method of suppressing the occurrence of SF (stacking fault) in an epitaxial film has been proposed, but as described below, it is still in a situation where it is not sufficient. In addition, the following analysis was made by the present inventors.

For example, Patent Literature 1 states that the cause of SF (stacking fault) occurring in an epitaxial film is a cluster formed by bonding of phosphorus and oxygen formed in the course of crystal growth of a substrate crystal. However, some of the present inventors, in Non-Patent Document 1, observed by TEM that high-density SiP precipitates exist in the As-grown (as-grown) state in crystals with high phosphorus doping (resistivity: 0.87 mΩcm) reported by Here, SiP is a compound of silicon and phosphorus, and unlike speculation in Patent Document 1, does not contain oxygen.

Further, in Patent Document 1, in an epitaxial film using a substrate having a resistivity of 0.7 mΩcm or more and 0.9 mΩcm or less in phosphorus doping, in order to set the SF (stacking fault) to 0.1 piece/cm ² or less, in the crystal growth process of the substrate crystal, It is said that it is necessary to make the stay time between the temperature range of 500 degreeC and 640 degreeC in 200 minutes or less. However, in phosphorus dope, it is disclosed that the temperature range during crystal growth to be managed in the case of 0.7 mΩcm or more and 0.9 mΩcm or less is 500 ° C. to 640 ° C., but the temperature range to be managed when the resistivity is outside the above range is unknown. Since the temperature range to be managed is considered to correspond to the temperature range in which SiP precipitates are generated and grown, and is considered to change depending on the resistivity (phosphorus concentration), in order to apply the method of Patent Document 1, management is performed for each resistivity It is necessary to obtain the temperature range to be performed by experimentation, which requires a very large number of experiments.

In addition, since the method described in Patent Literature 2 is also an empirical formula, it can be applied only within the range of conditions of the sample from which the empirical formula was derived. In addition, in Patent Document 2, the resistivities of the samples from which the empirical formula was derived are 0.6725, 0.68375, and 0.7225 mΩcm, and the application range is very narrow. In addition, it can be applied only when annealing in an argon atmosphere at 1200 ° C. for 30 minutes is performed before epitaxial growth.

Further, in Patent Document 2, as one of the mechanisms for reducing SF (stacking fault) by lowering the temperature in the furnace when the wafer is introduced in the pre-annealing process, the amount of interstitial silicon introduced into the wafer is I'm holding something less. However, as disclosed in Non-Patent Document 2, in a phosphorus-doped crystal, most of the phosphorus atoms exist at positions substituted for lattice positions where silicon atoms exist, but some phosphorus atoms exist between the lattices of silicon. In general, the diffusion coefficient of an interstitial atom is several orders of magnitude larger than that of an atom at a substitution site. On the other hand, the method described in Patent Literature 2 does not consider the influence of interstitial phosphorus.

In this way, a method of suppressing the occurrence of SF (stacking fault) in an epitaxial film has been proposed, but it is not applicable to an arbitrary resistivity (ie, phosphorus concentration). In addition, the application range regarding the thermal history of crystals is also limited.

The present invention has been made in view of the above problems, and provides a method for predicting the occurrence of defects in an epitaxial silicon wafer and a method for manufacturing an epitaxial silicon wafer for the case of an arbitrary phosphorus concentration and crystal thermal history aims to

A method for predicting the occurrence of defects in an epitaxial silicon wafer according to the present invention made to achieve the above object is an epitaxial silicon wafer produced by growing an epitaxial film using a phosphorus-doped silicon single crystal as a substrate, As a method for predicting the occurrence of defects in

A thermal history calculation step of calculating a cooling curve of the silicon single crystal from the temperature characteristics and pulling speed including a pulling device for producing the silicon single crystal;

A concentration calculation step of calculating, from the concentration of phosphorus doped in the silicon single crystal, the concentration of at least interstitial phosphorus in each temperature course of the cooling curve;

A precipitate calculation step of calculating the size and density of precipitates of phosphorus and silicon at the completion of cooling from the supersaturation of interstitial phosphorus during cooling of the silicon single crystal;

and a defect estimation step of estimating the density of defects (SF: stacking faults) in the epitaxially grown silicon wafer from the size and density of the precipitates of phosphorus and silicon.

In the method for predicting the occurrence of defects in an epitaxial silicon wafer having the above structure, the precipitates of phosphorus and silicon, which cause stacking faults (SF: stacking faults) in the epitaxial silicon wafer, are smaller than the phosphorus present at the replacement position. , since interstitial phosphorus is thought to be the cause, it is possible to improve the generation prediction method of defects by calculating the concentration of interstitial phosphorus as the center.

In addition, in the concentration calculation step, it is preferable to calculate not only the interstitial phosphorus concentration, but also the concentration of vacancies, interstitial silicon, and a reactant between phosphorus and vacancies.

This is because interstitial phosphorus undergoes various reactions with vacancies, interstitial silicon, and reactants of phosphorus and vacancies in the crystal cooling process.

In the defect estimation step, it is preferable to estimate the density of defects in the epitaxially grown silicon wafer using a threshold value for the size of precipitates of phosphorus and silicon to be detected determined in a prior experiment.

This is because the size of the SF (stacking fault) to be annealed out also varies depending on the conditions of the prebake performed in the previous stage of the evitaxial growth.

For example, if the critical value of the size of the precipitate of phosphorus and silicon is 12 nm, prebaking is performed for 60 seconds in a hydrogen atmosphere at 1130 ° C., and then an epitaxial film of 3 μm is grown at 1130 ° C. suitable for the case

Further, in the method for manufacturing an epitaxial silicon wafer according to the present invention, the generation of defects is predicted, and when the density of the predicted defects does not satisfy a prescribed level, the pulling rate is adjusted. It is preferable to manufacture a silicon single crystal doped with phosphorus under the condition that the defect density satisfies a prescribed level, and grow an epitaxial film using the silicon single crystal as a substrate. Yield is improved by predicting the density of defects before actual manufacturing. It is also conceivable to adjust the conditions of the prebaking performed in the previous stage of the epitaxial growth.

According to the present invention, it is possible to provide a method for predicting the occurrence of defects in an epitaxial silicon wafer and a method for manufacturing an epitaxial silicon wafer, targeting the case of an arbitrary phosphorus concentration and thermal history of a crystal.

1 is a schematic diagram of an example of a single crystal pulling device by the CZ method.
Fig. 2 is a graph showing the resistivity at each position of a straight body of crystal (1) and crystal (2).
Fig. 3 is a graph showing cooling curves at each position of the linear motion of the crystal (1).
Fig. 4 is a graph showing cooling curves at each position of the linear motion of the crystal (2).
Fig. 5 is a graph showing the density of SF (stacking fault) after epitaxial growth when the crystal at each linear position in crystal (1) and crystal (2) is used as a substrate.
Fig. 6 is a graph showing the density of SiP calculated for Crystal (1).
7 is a graph showing the density of SiP calculated for crystal (2).
Fig. 8 is a graph comparing experimental results and calculation results of the relationship between the SF (stacking fault) density and linear motion position of the epitaxial film in crystal (1).
Fig. 9 is a graph comparing experimental results and calculation results of the relationship between the SF (stacking fault) density and linear motion position of the epitaxial film in crystal (2).
Fig. 10 is a flowchart schematically showing the procedure of a defect occurrence prediction method.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a defect occurrence prediction method in an epitaxial silicon wafer according to an embodiment of the present invention will be described based on the drawings. However, the method for predicting occurrence of defects in an epitaxial silicon wafer according to an embodiment of the present invention is not limited to the embodiment described below. The accompanying drawings are typical, and the dimensions, ratios, etc. of each element may differ from actual ones.

First, considering the results of Non-Patent Document 1 and Non-Patent Document 3 and the results of Patent Document 1 together, the SF (stacking fault) in the epitaxial film in the case of using a substrate wafer of 0.9 mΩcm or less in phosphorus dope It is inferred that the occurrence is produced by the following process.

(1) In a phosphorus dope crystal of 0.9 mΩcm or less, SiP is generated and grown during the temperature range of 570°C ± 70°C (500°C to 640°C) during the cooling process of the crystal.

(2) During the prebaking heating performed in the previous stage of the epitaxial growth, SiP is dissolved and SF remains in the crystal.

(3) In the cooling process in crystal growth, when the residence time between the temperature range of 570°C ± 70°C (500°C to 640°C) is short, the size of SiP is small, so the size of generated SF is also small , SF (stacking fault) near the surface layer is annealed out in the process of prebaking, and when epitaxial growth is started, SF does not remain in the surface layer.

(4) On the other hand, when the residence time between the temperature range of 570 ° C ± 70 ° C (500 ° C to 640 ° C) is long in the cooling process in crystal growth, the size of SiP increases, so SF (stacking fault) that occurs The size of is also large, so SF (stacking fault) near the surface layer is not annealed out during the prebaking process. Then, when epitaxial growth is started, SF remaining in the surface layer is propagated as SF in the epitaxial film.

Considering that SF of the epitaxial film on the low-resistivity substrate is formed in this process, it is important to predict the density of SiP precipitates serving as nuclei that propagate as SF in the epitaxial film. Then, the relationship between the predicted size distribution of SiP and the stacking fault density of the epitaxial film is obtained, and the stacking fault of the epitaxial film is estimated from the relationship.

First, a method for determining the relationship between the predicted size distribution of SiP and the SF (stacking fault) density of the epitaxial film will be described.

(1) Calculate the cooling curve during crystal growth.

(2) Calculate the generation and growth of SiP during cooling from the phosphorus concentration and the cooling curve.

(3) Determine the size distribution of SiP after cooling.

(4) Evaluate the SF (stacking fault) density of the epitaxial film for the corresponding phosphorus concentration and cooling curve by experiment.

(5) Grasp the relationship between the size distribution of SiP and the SF (stacking fault) in the epitaxial film.

Hereinafter, each of the processes (1) to (5) will be described.

1 is a schematic diagram of an example of a single crystal pulling device by a Czochralski (CZochralski) method. The pulling device shown in FIG. 1 has a general structure, and a quartz crucible 3 filled with a raw material melt 2 is rotatably installed at the center of the furnace 1. Around the quartz crucible 3, a side heater 4 for heating the quartz crucible 3 from the side periphery and a bottom heater 5 for heating the quartz crucible 3 from the bottom are provided. Further, above the quartz crucible 3, a radiation shield 6 for temperature control of the raw material melt 2 in the quartz crucible 3 and the pulled crystal 9 is provided.

In the single crystal pulling device using the CZ method, the seed crystal 8 held at the lower end of the wire 7 is brought into contact with the surface of the raw material melt 2 in the quartz crucible 3, and the quartz crucible 3 and the seed crystal ( The crystal 9 is grown by pulling the wire 7 while rotating each of the 8).

The structure of the puller used for crystal growth as shown in FIG. 1 is modeled with a mesh structure, the physical properties of each member are input, and the pulling speed corresponding to the length position of the crystal is input. Then, the surface temperature distribution of each member is calculated based on the calorific value of the heater and the emissivity of each member. On the other hand, the internal temperature distribution of each member is calculated by solving the heat conduction equation based on the surface temperature distribution and thermal conductivity of each member. In this way, the temperature distribution inside the pulled crystal is calculated. In addition, the cooling curve of the entire crystal including the temperature distribution inside the crystal is calculated by considering the pulling speed of the crystal.

These calculation processes can be calculated using software for general heat transfer analysis generally used by the technicians concerned. There are three types of software for comprehensive electrothermal analysis, for example: 1) CGSim (STR), 2) CrysMAS (Crystal Growth Laboratory of the Fraunhofer Institute of Integrated Systems and Device Technology), and 3) FEMAG (FEMAG soft). of can be exemplified. Incidentally, CGSim is used in the calculation examples described below.

Next, the process of condensing phosphorus atoms to form SiP during the cooling process is calculated. As disclosed in Non-Patent Document 2, it is thought that phosphorus atoms in silicon mainly exist at positions where silicon lattice points are substituted, and some exist at interstitial sites of silicon. The diffusion coefficient of the phosphorus atom present at the substitution site is well known, and it is known that it hardly moves in the temperature range where SiP is thought to occur. On the other hand, atoms present in the interstitial generally diffuse at a high speed. Therefore, it is considered that interstitial phosphorus rather than phosphorus present at the substitution site forms SiP.

Therefore, first, the reaction of phosphorus during crystal cooling is explained according to Non-Patent Document 2. Here, the reaction between a phosphorus atom and a point defect in a silicon crystal is assumed as follows. As a form of phosphorus in silicon, the case where it exists at a position where a silicon atom in a lattice point is substituted is P _S , and the case where it exists between the lattices of silicon is P _i . Further, atomic vacancies are V and interstitial silicon is I.

P _S +V＝PV . . . (One)

P _S+ +I＋2e ^- =P _i- . (2)

Here, PV is a reactant between phosphorus and a vacancy, P _s+ is positively charged phosphorus at a substitution site, e is an electron, and _Pi- is a negatively charged interstitial phosphorus. In equation (1) representing the reaction with vacancies, it is assumed that the compound of vacancies and phosphorus is electrically neutral. In equation (2), since it is assumed that the interstitial P _i is negatively charged, the change in charge is taken into consideration. This assumption was referred to Document 2 of the non-patent.

If the reaction constants in formulas (1) and (2) are respectively K _V and K _I , the relationship of the following formulas (3) and (4) is obtained by the law of mass action.

C _V N/C _PV =K _V … (3)

C _I N/C _Pi =K _I (n _i /n) ² … (4)

Here, C _V is the vacancy concentration, N is the phosphorus concentration, C _PV is the concentration of PV, C _I is the concentration of interstitial silicon, C _Pi is the concentration of _Pi , n is the concentration of electrons, and n _i is the intrinsic is the electron concentration. Here, n _i is represented by equation (5).

n _i ( cm ^-3 )=1.568×10 ¹⁵ T ^3/2 exp[-{1.17-(4.9×10 ^-4 T ² /(T+655))}/2k _B T]… (5)

Here, T is the absolute temperature (K) and k _B is the Boltzmann constant 8.6257×10 ^-5 (eV/K).

The relationship between the electron concentration n and the donor-type impurity concentration N is expressed by the following equation (6).

n=N/2+[N ² /4+n _i ² ] ^1/2 … (6)

Here, it can be seen from Equation (3) that C _PV is proportional to N. On the other hand, from equations (4) and (6), C _Pi changes as follows. From equation (6), the electron concentration n becomes n=n _i when N<<n _i , and n=N when N>>n _i . Therefore, when the phosphorus concentration is low, N<< _ni , C _Pi is proportional to N, and when the phosphorus concentration is high, N>>n _i , C _Pi is proportional to the third power of N. . That is, when the phosphorus concentration N exceeds the intrastitial electron concentration, it is expected that the interstitial phosphorus concentration C _Pi increases rapidly. This indicates that the interstitial phosphorus concentration C _Pi becomes dominant in the phosphorus concentration N, which is a problem in the present invention.

By the way, another reaction that occurs during crystal growth is a large extinction reaction between vacancies and interstitial silicon shown in Equation (7).

V+I=0 … (7)

And, the reaction rate of the extinction reaction is represented by Equation (8).

dC _V /dt=dC _I /dt=-K _IV (C _V C _I -C _V ^eq C _I ^eq )… (8)

Here, C _V ^eq and C _I ^eq are thermal equilibrium concentrations of vacancies and interstitial silicon, respectively.

Also, K _IV is represented by equation (9).

K _IV =4πa _c (D _V +D _I )exp(-ΔG/k _B T)… (9)

Here, a _c =0.543×10 ^-7 cm, and D _V and D _I are diffusion coefficients of vacancies and interstitial silicon, respectively. ΔG is a barrier for a large extinction reaction, and since ΔG is generally zero, it was set to zero here.

Next, changes in the concentrations of C _V , C _I , C _PV , and C _Pi during the cooling process of the crystal are shown. V, PV, I, and P _i were assumed to change while the reactions of equations (1) and (2) always maintained a steady state of balance. That is, equations (3) and (4) are always satisfied.

First, the relationship between C _V and C _PV is shown. Here, since C _PV << N, the change in the phosphorus concentration N due to the formation of PV is ignored. Then, the sum of the concentrations of V and PV is C _V ^T as in Equation (10).

C _V ^T =C _V +C _PV … (10)

Then, equation (3) becomes equation (11).

(C _V ^T -C _PV )N/C _PV =K _V … (11)

That is, if C _V ^T is known, C _PV can be obtained using equation (12).

C _PV =C _V ^T /(K _V /N+1)… (12)

Next, the relationship between the concentrations of C _I and C _Pi is obtained from Equation (4). Here, since C _Pi << N, the change in the phosphorus concentration N due to the formation of _Pi is ignored. In addition, the ratio of the equilibrium concentration of P _i and the concentration of _PS is R as shown in Equation (13).

R=C _Pi ^eq /N... (13)

Here, since a new parameter called R is shown, the relationship with K _I is shown below. First, since equation (4) holds even when each component is at an equilibrium concentration, it can be written as equation (14).

C _I N/C _Pi =C _I ^eq N/C _Pi ^eq . (14)

thus,

C _I N/C _Pi =C _I ^eq /R… (15)

Also, from equations (13) and (14), it can be seen that the relationship between R and K _I is equation (16).

R=C _I ^eq (n/n _i ) ² /K _I ... (16)

In addition, the sum of the concentrations of I and _Pi is C _I ^T as in Equation (17).

C _I ^T =C _I +C _Pi … (17)

Then, from equation (15), equation (18) is obtained.

C _Pi /N=R(C _I ^T -C _Pi )/C _I ^eq . (18)

Expanding and arranging this, equation (19) is obtained.

C _Pi =C _I ^T /{C _I ^eq /(NR)+1}… (19)

By the way, the change of V, I, PV, and _Pi during cooling can be calculated by the formula derived so far. Next, the specific calculation sequence is shown. Here, the solid-liquid interface, that is, the concentration at 1685 K is used as the initial condition. And, at the solid-liquid interface, all concentrations are assumed to be thermal equilibrium concentrations. That is, the initial concentration is given by the following formula (20).

C _V =C _V ^eq at 1685K

C _I =C _I ^eq at 1685K

C _PV =C _V ^eq N/K _V at 1685K

C _Pi =NR at 1685K … (20)

Changes in V and I during cooling are obtained by equation (8) for each decrease in temperature, and changes in C _V and C _I are determined. Then, the changes in C _V ^T and C ^I _T are obtained from the changes in C _V and C _I , and C _PV and C _Pi are obtained from equations (12) and (19). By obtaining this for each step of temperature decrease, the concentration change of V, I, PV, and _Pi is obtained.

In addition, each parameter of temperature dependence is set as shown in equation (26) in equation (21).

C _V ^eq =6.49×10 ¹⁴ exp[-3.94{1/(k _B T)-1/(1685 k _B )}]... (21)

C _I ^eq =4.84×10 ¹⁴ exp[-4.05{1/(k _B T)-1/(1685 k _B )}]... (22)

D _V =4.45×10 ^-5 exp[-0.3{1/(k _B T)-1/(1685 k _B )}]... (23)

D _I =5.0×10 ^-4 exp[-0.9{1/(k _B T)-1/(1685 k _B )}]... (24)

K _V =9.61×10 ¹⁹ exp[-1.0{1/(k _B T)-1/(1685 k _B )}]... (25)

K _I =3.5×10 ²⁰ exp[-1.2{1/(k _B T)-1/(1685 k _B )}]... (26)

k _B here is 8.6257×10 ^-5 (eV/K).

Next, a model representing the nucleation and growth process of SiP is explained. As a nucleus generation rate model, a model related to a vacancy cluster proposed in Non-Patent Document 4 is referred to and applied to SiP.

In the classical nucleation theory, nucleation is considered as a process in which the energy barrier involved in cluster formation is exceeded by thermal fluctuations. Here, SiP is assumed to be a sphere. Assuming that the nucleus is a sphere, the free energy change accompanying the generation of a particle of radius R is given as:

ΔG(R)=-(4πR ³ /3Ω)f+4πR ² σ … (27)

f=k _B Tln(C _Pi /C _Pi ^eq )... (28)

Here, Ω is the volume per molecule of SiP (4.08×10 ^-23 cm ³ ). In addition, f is the chemical potential of phosphorus, and -f represents the energy change of the system when one SiP is precipitated. The term 4πR ² σ represents the surface energy, and σ is the surface energy per unit area of SiP (σ = 556 erg/cm ² ). In addition, k _B in Expressions (27) and (28) is 1.381 × 10 ^-16 (erg/K).

ΔG(R) takes a maximum value as the radius increases. The radius at the maximum value is the critical radius R _cri , and the maximum value of ΔG(R) is ΔG*. ΔG* represents the energy barrier accompanying cluster formation.

R _Cri =2σΩ/f … (29)

ΔG*＝16πσ ³ Ω ² /(3f) ² … (30)

The frequency of generation of nuclei is defined as the frequency at which nuclei having a size of R _cri are generated due to thermal fluctuations and the frequency at which another atom is added to the nucleus and becomes a precipitate beyond the mountain of the maximum value. At that time, the normal nucleus generation rate I is expressed by equation (31).

I=βZρ ^eq … (31)

Here, β is the capture rate of an element into the critical nucleus, and Z is called a Zeldovich factor and is a coefficient correcting the ratio of the thermal equilibrium density to the density in a steady state. ρ ^eq is the thermal equilibrium density of the critical nucleus.

ρ ^eq =ρexp(-ΔG*/k _B T)... (32)

Here, ρ is the density of silicon sites (5×10 ²² cm ^-3 ).

β=4πR _cri D _Pi C _Pi … (33)

Here, D _Pi is the diffusion coefficient of interstitial phosphorus.

Z=f(12πΔG*k _B T) ^-1/2 … (34)

Therefore, each generation rate I is expressed by the following formula (35).

I=(4πR _cri D _Pi C _Pi )Zρexp(-ΔG*/k _B T)(1/sec·cm ³ )… (35)

That is, during crystal cooling, SiP is generated at the rate shown in equation (35). The density of SiP generated during that time is integrated every 30 seconds, and the growth of SiP generated in each time interval and the absorption of interstitial phosphorus are calculated until the cooling is completed.

The growth rate of SiP is expressed by equation (36).

dR/dt =ΩD _Pi (C _Pi -C _Pi ^eq )/R… (36)

With the initial size as R _Cri , the change in radius dR for each time step was obtained by equation (36), and the radius was obtained as R=R+dR. The phosphorus absorption flux by SiP is shown in equation (37).

J=4πRD _Pi (C _Pi -C _Pi ^eq )… (37)

Equation (37) above represents the interstitial phosphorus absorbed by one SiP. This is integrated and added to the change in interstitial phosphorus concentration. Here, D _Pi is given by equation (38).

D _Pi =3×10 ^-7 exp[-1.1{1/(k _B T)-1/(1685k _B )}]... (38)

Here, k _B is 8.6257×10 ^-5 (eV/K).

As described above, the concentrations of atomic vacancies V, interstitial silicon I, phosphorus-vacancy reactant PV, and interstitial phosphorus P _i during the cooling process of the crystal are obtained to calculate the generation and growth of SiP.

Next, the relationship between the size distribution of SiP estimated by calculation and the density of SF (stacking fault) in the epitaxial film under the corresponding experimental conditions is investigated.

<Experiment>

The crystals used for the evaluation were two crystals, crystal (1) and crystal (2), with a diameter of 200 mm. Fig. 2 is a graph showing the resistivity at each position of the linear bodies of crystal (1) and crystal (2). As shown in Fig. 2, the resistivity of crystal (1) changes from 0.9 mΩcm to 0.7 mΩcm, and the resistivity of crystal (2) changes from 0.75 mΩcm to 0.55 mΩcm. By using crystal (1) and crystal (2), occurrence of defects in a wide range of resistivities is evaluated.

3 is a graph showing cooling curves at each position of the linear motion of crystal 1, and FIG. 4 is a graph showing cooling curves at each position of linear motion of crystal 2.

<Epitaxial conditions>

The manufacturing conditions of the epitaxial film are as follows. First, as a prebaking, prebaking for 60 seconds is performed in a hydrogen atmosphere at 1130°C. After that, as epitaxial growth, an epitaxial film of 3 μm is grown at 1130°C.

<SF: Stacking fault evaluation>

A stacking fault inspection is performed on the epitaxial silicon wafer prepared as described above. By etching, SF (Stacking Fault) can be detected, confirmed with the naked eye or under an optical microscope, and the density can be determined.

Fig. 5 is a graph showing the density of SF (stacking fault) after epitaxial growth when the crystal at each linear position in crystal (1) and crystal (2) is used as a substrate. This experiment result is compared with the SiP calculated|required by the above-mentioned calculation method.

6 and 7 are graphs showing the density of SiP calculated by the method described above for crystal (1) and crystal (2), respectively. Fig. 6 shows the radii of SiP >4, >6, >8, >10, >12, >14, and >16 nm, respectively, calculated under the production conditions of the crystal (1), and the density and linear motion. It shows the relationship with location. Fig. 7 shows the same calculation results under the production conditions of Crystal (2).

6 and 7 show the number of SiPs per unit volume (pieces/cm ³ ), whereas the experimental results of FIG. 5 show the density of SF (stacking faults) per unit area (pieces/cm ² ) . Therefore, the two cannot be directly compared. Therefore, I think the following.

First, SiP is dissolved in the process of hydrogen baking performed prior to epitaxial treatment, leaving SF, but small SF (stacking fault) near the surface layer disappears. And, the size of SF remaining after SiP is dissolved is determined by the size of SiP. Therefore, the longer the time to pass 570 ° C. ± 70 ° C., which is considered to be the generation and growth period of SiP, the larger the size of SiP, and the more SF that does not disappear in the process of hydrogen baking. Here, it is assumed that the size of SF generated after SiP is dissolved is equal to the size of SiP.

Then, by exposing a part of it to the surface, the density at which SF ^is transferred to the epitaxial film is 2rD(r) becomes In addition, when the radius of SiP is smaller than the critical value R _cri , it is considered that SF generated after dissolution of SiP disappears by hydrogen fake. Therefore, the number per area exposed to the surface of a large radius r was calculated from the critical value R _cri . The density SF(R) (piece/cm ² ) at which particles equal to or greater than the threshold value R appear on the surface is expressed as in Equation (39) below.

Here, SF(R) in formula (39) represents SiP with a radius R or larger, that is, the number of SFs per area exposed on the surface.

8 and 9 show the experimental results of the relationship between the SF (stacking fault) density and linear motion position of the epitaxial film in crystal (1) and crystal (2), respectively, and the threshold values of 8, 10, 12, 14, This is a comparison of the relationship between the SF (stacking fault) density and the linear motion position calculated at 16 nm. It can be seen from Figs. 8 and 9 that the calculated SF (stacking fault) density with a threshold value of 12 nm coincides with the experimental results.

From the above results, it can be seen that the following method for predicting occurrence of defects is effective in an epitaxial silicon wafer manufactured by growing an epitaxial film using phosphorus-doped silicon as a substrate. Fig. 10 is a flowchart schematically showing the procedure of a defect occurrence prediction method.

First, as a preparation step, temperature characteristics including a pulling device for producing a silicon single crystal doped with phosphorus are acquired (Step S1). Since the pulling device has a structure as shown in FIG. 1, for example, the capacity of the side heater 4 and the bottom heater 5, the positional relationship of the radiation shield 6 and the like, and the physical property values of each member It is used to obtain information for electrothermal analysis.

After that, the cooling curve of the crystal is calculated from the pulling rate for producing a silicon single crystal actually doped with phosphorus (Step S2).

On the other hand, at least the interstitial phosphorus concentration in each temperature process of the cooling curve is calculated from the phosphorus concentration doped into the silicon single crystal (Step S3). As described above, phosphorus and silicon precipitates (SiP), which cause stacking faults (SF: stacking faults) in epitaxial silicon wafers, are caused by interstitial phosphorus (P _i ) rather than phosphorus present in the replacement position. because it is thought

However, this is not limited to calculating only the concentration of interstitial phosphorus (P _i ). This is because interstitial phosphorus (P _i ) undergoes various reactions with vacancies (V), interstitial silicon (I), and a reactant (PV) of phosphorus and vacancies in the crystal cooling process. Therefore, in the calculation in Step S3, it is preferable to calculate not only the concentration of interstitial phosphorus, but also the concentrations of vacancies (V), interstitial silicon (I), and a reactant (PV) of phosphorus and vacancies.

Thereafter, from the supersaturation of interstitial phosphorus (P _i ) during cooling of the crystal, the size and density of precipitates of phosphorus and silicon (SiP) at the time of completion of cooling are calculated (Step S4).

Then, the defect density in the silicon wafer after epitaxial growth is estimated from the size and density of the precipitate of phosphorus and silicon (SiP) at the time of completion of cooling (Step S5). In addition, in this estimation, an experiment is conducted in advance about the relationship between the size and density of phosphorus and silicon precipitates (SiP) and the density of defects in a silicon wafer after epitaxial growth, and phosphorus and silicon precipitates to be detected ( It is desirable to set a threshold value for the size of SiP). This is because the size of the SF (stacking fault) to be annealed out also varies depending on the conditions of the prebake performed in the previous stage of the evitaxial growth.

In addition, as an epitaxial condition, in the case of prebaking for 60 seconds in a hydrogen atmosphere at 1130 ° C. and then growing an epitaxial film of 3 μm at 1130 ° C., the critical value of the size of the precipitate of phosphorus and silicon (SiP) With 12 nm, the SF (stacking fault) density agrees with the experimental results.

The method for predicting occurrence of defects described above can also be implemented as a method for manufacturing an epitaxial silicon wafer in which an epitaxial film is grown using phosphorus-doped silicon as a substrate.

That is, the occurrence of defects is predicted from the concentration of phosphorus doped in the silicon single crystal and the pulling rate of the crystal, and when the predicted density of defects does not satisfy the specified level, the defect predicted by adjusting the pulling rate. It is conceivable to manufacture an epitaxial silicon wafer under the condition that the density of the silicon wafer satisfies a prescribed level.

In the case where the predicted defect density does not satisfy the prescribed level, it is also conceivable to adjust the prebaking conditions performed in the previous stage of the avitaxial growth.

As mentioned above, although this invention has been demonstrated based on embodiment, this invention is not limited by said embodiment.

by 1
2 raw material melt
3 quartz crucible
4 side heater
5 bottom heater
6 radiation shield
7 wire
8 seed crystals
9 decisions

Claims (6)

A method for predicting the occurrence of defects in an epitaxial silicon wafer manufactured by growing an epitaxial film using a silicon single crystal doped with phosphorus as a substrate,
A thermal history calculation step of calculating a cooling curve of the silicon single crystal from the temperature characteristics and pulling speed including a pulling device for producing the silicon single crystal;
A concentration calculation step of calculating at least an interstitial phosphorus concentration in each temperature course of the cooling curve from the concentration of phosphorus doped in the silicon single crystal;
A precipitate calculation step of calculating the size and density of precipitates of phosphorus and silicon at the completion of cooling from the supersaturation of interstitial phosphorus during cooling of the silicon single crystal;
A defect estimation step of estimating the density of defects in the epitaxially grown silicon wafer from the size and density of the phosphorus and silicon precipitates
A method for predicting the occurrence of defects in an epitaxial silicon wafer, including a. According to claim 1,
In the concentration calculation step, not only the concentration of interstitial phosphorus, but also the concentration of vacancies, interstitial silicon, and a reactant between phosphorus and vacancies are calculated together. According to claim 1 or 2,
In the defect estimation step, the density of defects in the silicon wafer after the epitaxial growth is estimated using a threshold value of the size of precipitates of phosphorus and silicon to be detected determined in a previous experiment. A method for predicting the occurrence of defects in According to claim 3,
A method for predicting the occurrence of defects in an epitaxial silicon wafer, wherein the threshold value of the size of the phosphorus and silicon precipitates is set to 12 nm. Defect density predicted by predicting the occurrence of defects according to any one of claims 1 to 4 and adjusting the pulling speed when the predicted defect density does not satisfy the specified level. A method for manufacturing an epitaxial silicon wafer, wherein a silicon single crystal doped with phosphorus is manufactured under the conditions that satisfies the level of the regulation, and an epitaxial film is grown using the silicon single crystal as a substrate. According to claim 5,
Additionally, a method for manufacturing an epitaxial silicon wafer, which is to adjust conditions for prebaking performed in a previous step of epitaxial growth.