KR20230047339A - Wiring film and display device including the same - Google Patents

Abstract

A display device according to one embodiment of the present invention includes a substrate including a plurality of pixels, a plurality of first electrodes disposed on the upper surface of the substrate, a plurality of second electrodes disposed on the lower surface of the substrate, and a wiring film in which a plurality of wires are formed. The wiring film is located on the side of the substrate to electrically connect the first electrode and the second electrode.

Description

Wiring film and display device including the same {WIRING FILM AND DISPLAY DEVICE INCLUDING THE SAME}

The present invention relates to a wiring film and a display device including the wiring film, and more particularly, to a wiring film formed with wiring and a display device including the wiring film.

Liquid Crystal Display Device (LCD) and Organic Light Emitting Display Display (OLED), which have been widely used up to now, are gradually expanding their application range.

Liquid crystal display devices and organic light emitting display devices are widely applied to the screens of everyday electronic devices, such as mobile phones and laptops, due to the advantages of providing high-resolution screens and being lightweight and thin, and their range is gradually increasing. is expanding

However, the liquid crystal display and the organic light emitting display have limitations in reducing the size of a bezel area recognized by a user as an area in which an image is not displayed on the display device. For example, in the case of a liquid crystal display device, since a sealant must be used to seal the liquid crystal and bond the upper substrate and the lower substrate, there is a limit to reducing the size of the bezel area. In addition, in the case of an organic light emitting display device, since an organic light emitting element is made of an organic material and is very vulnerable to moisture or oxygen, an encapsulation must be placed to protect the organic light emitting element, so there is a limit to reducing the size of the bezel area. there is. In particular, since it is impossible to implement a super-large screen with one panel, when a super-large screen is implemented by arranging a plurality of liquid crystal display panels or a plurality of organic light emitting display panels in a tile form, a bezel between adjacent panels A problem in that the region is recognized by the user may occur.

As an alternative to this, a display device including an LED has been proposed. Since the LED is made of an inorganic material rather than an organic material, it has excellent reliability and has a longer lifespan than a liquid crystal display or an organic light emitting display. In addition, the LED is a device suitable for application to a super-large screen because it not only has a fast lighting speed, but also consumes little power, has excellent stability due to strong impact resistance, and can display a high-brightness image.

Accordingly, LED devices are generally used in display devices for providing a super-large screen capable of minimizing a bezel area.

According to the inventors of the present invention, LEDs have higher luminous efficiency than organic light emitting diodes, so that a display device including an LED emits light having the same luminance as the size of one pixel compared to a display device using an organic light emitting device. It was recognized that the size of the light emitting area required for this is very small. Therefore, when the inventors of the present invention implement a display device using LEDs, the distance between light emitting regions of adjacent pixels is greater than the distance between light emitting regions of adjacent pixels in an organic light emitting display device having the same resolution. I realized that it is very long. Therefore, the inventors of the present invention, when implementing a tiling display implemented by arranging a plurality of panels in the form of tiles, the distance between the outermost LED of one panel and the outermost LED of another adjacent panel is one. Since it can be implemented at the same interval as the interval between LEDs in the panel of , it was recognized that a zero bezel implementation in which a bezel area does not substantially exist is possible.

However, as described above, in order to realize the same distance between the outermost LED of one panel and the outermost LED of another adjacent panel as the distance between LEDs within one panel, the upper surface of the panel has been conventionally Various driving units, such as the gate driving unit and the data driving unit, which were located on the panel, should be located on the rear surface, not on the upper surface of the panel. Accordingly, the inventors of the present invention invented a display device having a new structure in which elements such as thin film transistors and LEDs are disposed on the upper surface of the panel, and driving units such as gate driving units and data driving units are disposed on the rear surface of the panel. In addition, the inventors of the present invention invented a manufacturing technique of forming side wires on the side of the panel to connect elements disposed on the upper surface of the panel and driving units disposed on the rear surface of the panel.

However, in the case of conventional technologies for forming side wires, printing accuracy is low when a process is long and the defect rate is high when printing is performed multiple times using a pad. Therefore, in the case of one-time printing using the pad, it is difficult to connect the wiring on the upper surface of the panel and the wiring on the rear surface because the length of the wiring on the side is short. In addition, when side wiring is manufactured by printing using a pad, the contact surface of the pad is damaged or deformed and the printing quality deteriorates. Therefore, the pad must be replaced periodically, but the pad is expensive, and every time the pad is replaced There is a hassle of having to newly change the setting values of the manufacturing equipment. In addition, when side wiring is formed on the side of a panel, it is necessary to grind the edge of the panel. However, if the grinding is performed in consideration of the process margin, there is a risk that the distance between LEDs between adjacent panels may become farther apart.

Accordingly, the inventors of the present invention invented a new protective film capable of realizing zero bezel and at the same time connecting elements disposed on the upper surface of the panel with driving units disposed on the rear surface of the panel with a simpler structure and process, and a display device using the same.

The tasks of the present invention are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

In order to solve the above problems, a display device according to an exemplary embodiment of the present invention includes a substrate including a plurality of pixels, a plurality of first electrodes disposed on an upper surface of the substrate, and a plurality of electrodes disposed on a lower surface of the substrate. It includes a second electrode and a wiring film on which a plurality of wirings are formed. Here, the wiring film is positioned on the side surface of the substrate and electrically connects the first electrode and the second electrode.

Other embodiment specifics are included in the detailed description and drawings.

The present invention can simplify the manufacturing process for forming the lateral wiring and reduce the manufacturing cost by attaching the wiring film to the side surface of the substrate.

Also, according to the present invention, a process margin for a grinding process can be reduced by attaching a wiring film to form side wiring, thereby minimizing the visibility of the boundary portion of the tiling display.

In addition, the present invention can omit a separate protective layer for protecting the wiring by attaching a wiring film including the wiring to form the side wiring, thereby simplifying and manufacturing the manufacturing process for forming the side wiring. can reduce cost.

Effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the present specification.

1 is a side view of a display device according to an exemplary embodiment of the present invention.
2A to 2F are schematic process diagrams for explaining a display device and a method of manufacturing the display device according to an exemplary embodiment of the present invention.
3 is a bird's eye view for explaining a display device according to an exemplary embodiment of the present invention.
4A to 4C are partial enlarged views of the display device shown in FIG. 3 .

Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, only these embodiments make the disclosure of the present invention complete, and common knowledge in the art to which the present invention belongs. It is provided to fully inform the holder of the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, so the present invention is not limited to the details shown. In addition, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification is used, other parts may be added unless 'only' is used. In the case where a component is expressed in the singular, the case including the plural is included unless otherwise explicitly stated.

In interpreting the components, even if there is no separate explicit description, it is interpreted as including the error range.

In the case of a description of a positional relationship, for example, 'on top of', 'on top of', 'at the bottom of', 'next to', etc. Or, unless 'directly' is used, one or more other parts may be located between the two parts.

When an element or layer is referred to as (on) another element or layer, it includes all cases where another element or layer is directly on top of another element or another layer or another element is interposed therebetween.

Although first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Like reference numbers designate like elements throughout the specification.

The size and thickness of each component shown in the drawings are shown for convenience of description, and the present invention is not necessarily limited to the size and thickness of the illustrated components.

Each feature of the various embodiments of the present invention can be partially or entirely combined or combined with each other, and as those skilled in the art can fully understand, various interlocking and driving operations are possible, and each embodiment can be implemented independently of each other. It may be possible to implement together in an association relationship.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a side view of a display device according to an exemplary embodiment of the present invention. 2A to 2F are schematic process diagrams for explaining a display device and a manufacturing method of the display device according to an exemplary embodiment of the present invention. 2A is a schematic top view of the first substrate 111 before a bonding process. 2B is a schematic rear view of the second substrate 112 before a bonding process. 2C is a schematic cross-sectional view of a state in which the first substrate 111 and the second substrate 112 are bonded. 2D is a schematic top view of the first substrate 111 after the scribing process is completed. 2E is a schematic cross-sectional view of a state in which the scribing process is completed. 2F is a schematic cross-sectional view of a state in which the wiring film 190 is attached to the side surface of the first substrate 111 .

In one embodiment of the present invention shown in FIG. 1, wiring films 190 are attached to the side surfaces of the substrates 111 and 112 to facilitate electrical connection of wires disposed on the upper and lower portions of the substrates 111 and 112. Thus, a complicated process of forming wires on the side surfaces of the substrates 111 and 112 can be omitted. Hereinafter, the structure of the display device including the wiring film 190 and the wiring film 9190 will be described in detail with reference to FIGS. 2A to 2F .

First, referring to FIGS. 1 and 2A , the pixel unit 110 is disposed in the display area AA, and the gate line GL and the gate link line GLL are disposed in the non-display area NA.

Subsequently, a plurality of thin film transistors 120 , a plurality of LEDs 130 , a plurality of gate lines GL, and a plurality of data lines DL are formed on the upper surface of the first substrate.

The first substrate 111 shown in FIG. 2A is a substrate supporting components disposed on the display device and may be an insulating substrate. For example, the first substrate 111 may be made of glass or resin. Also, the first substrate 111 may be made of polymer or plastic. In some embodiments, the first substrate 111 may be made of a flexible plastic material.

A display area AA and a non-display area NA surrounding the display area AA may be defined on the first substrate 111 . The display area AA is an area where an image is actually displayed in the display device, and an LED 130 and a thin film transistor 120 for driving the LED 130, which will be described later, may be disposed in the display area AA. The non-display area NA is an area in which an image is not displayed and may be defined as an area surrounding the display area AA. Various wires, such as a gate line GL and a data line DL connected to the LED 130 and the thin film transistor 120 disposed in the display area AA, may be disposed in the non-display area NA. In the present specification, the first substrate 111 has been described as being defined by the display area AA and the non-display area NA, but is not limited thereto and may be defined as having no non-display area NA. That is, when a tiling display is implemented using the display device manufactured by the display device manufacturing method according to an embodiment of the present invention, the outermost LED 130 of one panel and the outermost LED 130 of another panel adjacent to the tiling display. Since the distance between the outer LEDs 130 can be implemented to be the same as the distance between the LEDs 130 within one panel, a zero bezel area in which a bezel area does not substantially exist can be implemented. Accordingly, it may be described that the first substrate 111 is defined as having only the display area AA and the non-display area NA is not defined on the first substrate 111 .

A plurality of pixels PX are defined in the display area AA of the first substrate 111 . Each of the plurality of pixels PX is an individual unit emitting light, and the plurality of pixels PX may include a red pixel, a green pixel, and a blue pixel, but are not limited thereto. A thin film transistor 120 and an LED 130 are formed in each of the plurality of pixels PX. A more detailed description of the thin film transistor 120 and the LED 130 will be described later with reference to FIG. 2c.

A scribing line SL may be defined on the first substrate 111 . The scribing line SL is a cutting line used to cut the display device in units of cells after the bonding process of the first substrate 111 and the second substrate 112 . That is, the scribing line SL may be defined for a scribing process of cutting the display device in units of cells after simultaneously forming a plurality of display devices or forming one display device on the mother substrate. . The scribing line SL may be a line shape as shown in FIG. 2A or may have a plurality of patterns.

Subsequently, a plurality of gate link wires (GLL) and a plurality of data link wires (DLL) are formed on the rear surface of the second substrate 112 .

Referring to FIG. 2B , the second substrate 112 is a substrate supporting components disposed below the display device and may be an insulating substrate. For example, the second substrate 112 may be made of glass or resin. Also, the second substrate 112 may be made of polymer or plastic. The second substrate 112 may be made of the same material as the first substrate 111 . In some embodiments, the second substrate 112 may be made of a plastic material having flexibility.

A plurality of gate link wires (GLL) and a plurality of data link wires (DLL) are formed on the rear surface of the second substrate 112 . The plurality of gate link wires (GLL) are wires for connecting the plurality of gate wires (GL) formed on the upper surface of the first substrate 111 and the gate driver, and the plurality of data link wires (DLL) are wires for connecting the plurality of gate wires (GL) formed on the upper surface of the first substrate 111 ) is a wiring for connecting the plurality of data lines DL formed on the upper surface of the data driver to the data driver. The plurality of gate link wires (GLL) and the plurality of data link wires (DLL) may extend from an end of the second substrate 112 toward the center of the second substrate 112 .

Although not shown in FIG. 2B , the gate driver is disposed on the rear surface of the second substrate 112 to be electrically connected to the plurality of gate link wires (GLL), and the data link to be electrically connected to the plurality of data link wires (DLL). A driving unit may be disposed. In this case, the gate driving unit and the data driving unit may be directly formed on the rear surface of the second substrate 112, may be disposed on the rear surface of the second substrate 112 in a COF (Chip on Film) method, or may be formed on a printed circuit board (PCB). ), but may be disposed on the rear surface of the second substrate 112 in a manner disposed on, but is not limited thereto.

Subsequently, the first substrate 111 and the second substrate 112 are bonded.

Referring to FIG. 2C , the first substrate 111 and the second substrate 112 are bonded through a bonding layer 118 . The bonding layer 118 may be made of a material capable of bonding the first substrate 111 and the second substrate 112 by being cured through various curing methods. The bonding layer 118 may be disposed on the entire area between the first substrate 111 and the second substrate 112 or may be disposed only on a partial area.

Referring to FIG. 2C and examining components disposed on the upper surface of the first substrate 111 in more detail, the thin film transistor 120 is formed on the first substrate 111 . Specifically, the gate electrode 121 is disposed on the first substrate 111 , and the active layer 122 is disposed on the gate electrode 121 . A gate insulating layer 113 is disposed between the gate electrode 121 and the active layer 122 to insulate the gate electrode 121 and the active layer 122 . A source electrode 123 and a drain electrode 124 are disposed on the active layer 122, and a passivation layer 114 for protecting the thin film transistor 120 is disposed on the source electrode 123 and the drain electrode 124. . However, the passivation layer 114 may be omitted according to embodiments.

Referring to FIG. 2C , a gate line GL is formed on the same layer as the gate electrode 121 . The gate line GL may be made of the same material as the gate electrode 121 . The gate line GL is disposed in the display area AA and the non-display area NA, is formed beyond the scribing line SL, and may extend to a corner of the first substrate 111 . Although the gate line GL is illustrated in FIG. 2C , the data line DL may also be formed in the same manner as the gate line GL.

Referring to FIG. 2C , a common wire CL is disposed on the gate insulating layer 113 . The common line CL is a line for applying a common voltage to the LED 130 and may be spaced apart from the gate line GL or the data line DL. Also, the common line CL may extend in the same direction as the gate line GL or the data line DL. As shown in FIG. 2C , the common line CL may be made of the same material as the source electrode 123 and the drain electrode 124, but is not limited thereto and may be made of the same material as the gate electrode 121.

A reflective layer 143 is disposed on the passivation layer 114 in the display area AA. The reflective layer 143 is a layer for reflecting the light emitted toward the first substrate 111 from among the light emitted from the LED 130 toward the upper portion of the display device and outputting the light to the outside of the display device. The reflective layer 143 may be made of a metal material having high reflectance.

An adhesive layer 115 is disposed on the reflective layer 143 . The adhesive layer 115 is an adhesive layer 115 for bonding the LED 130 on the reflective layer 143, and may insulate the LED 130 from the reflective layer 143 made of a metal material. The adhesive layer 115 may be made of a heat curing material or a light curing material, but is not limited thereto.

An LED 130 is disposed on the adhesive layer 115 . The LED 130 includes an n-type layer 131, an active layer 132, a p-type layer 133, an n-electrode 135, and a p-electrode 134. Hereinafter, it will be described that the LED 130 having a lateral structure is used as the LED 130, but the structure of the LED 130 is not limited thereto.

Describing the stacked structure of the LED 130 in more detail, the n-type layer 131 may be formed by injecting n-type impurities into gallium nitride (GaN) having excellent crystallinity. An active layer 132 is disposed on the n-type layer 131 . The active layer 132 is a light emitting layer that emits light from the LED 130 and may be formed of a nitride semiconductor, for example, indium gallium nitride (InGaN). A p-type layer 133 is disposed on the active layer 132 . The p-type layer 133 may be formed by implanting p-type impurities into gallium nitride (GaN). However, the constituent materials of the n-type layer 131, the active layer 132, and the p-type layer 133 are not limited thereto.

As described above, the LED 130 is formed by sequentially stacking the n-type layer 131, the active layer 132, and the p-type layer 133, etching a predetermined portion, and then forming the n-electrode 135 and the p-electrode. (134). At this time, a predetermined portion is a space for separating the n-electrode 135 and the p-electrode 134, and the predetermined portion may be etched to expose a portion of the n-type layer 131. In other words, the surfaces of the LED 130 on which the n-electrode 135 and the p-electrode 134 are disposed may have different height levels rather than being flattened.

As such, the n-electrode 135 may be disposed on the etched region, that is, on the n-type layer 131 exposed through the etching process. The n-electrode 135 may be made of a conductive material, for example, a transparent conductive oxide. Meanwhile, a p-electrode 134 may be disposed on an unetched region, that is, on the p-type layer 133 . The p-electrode 134 may also be made of a conductive material, for example, a transparent conductive oxide. Also, the p-electrode 134 may be made of the same material as the n-electrode 135 .

As described above, in the state where the n-type layer 131, the active layer 132, the p-type layer 133, the n-electrode 135, and the p-electrode 134 are formed, the n-type layer 131 is formed on the n-electrode 135 and The LED 130 may be disposed closer to the reflective layer 143 than the p-electrode 134 .

Subsequently, a first planarization layer 116 is disposed on the thin film transistor 120 in the display area AA. The first planarization layer 116 may be formed to planarize an upper portion of the area excluding the area where the LED 130 is disposed and the contact hole. In addition, a second planarization layer 117 may be disposed on the first planarization layer 116 . The second planarization layer 117 may be disposed on the thin film transistor 120 and the LED 130 in regions other than the contact hole. In this case, the second planarization layer 117 may be formed such that partial regions of the p-electrode 134 and the n-electrode 135 of the LED 130 are open. Although FIG. 2C shows that two planarization layers are used in manufacturing the display device, this is to prevent an excessive increase in process time when a single planarization layer is used. Accordingly, the planarization layer does not have to be formed of a plurality of layers as shown in FIG. 2C, and may be formed of a single planarization layer.

The first electrode 141 is an electrode for connecting the thin film transistor 120 and the p-electrode 134 of the LED 130. The first electrode 141 is the source electrode 123 of the thin film transistor 120 through contact holes formed in the first planarization layer 116, the second planarization layer 117, the passivation layer 114, and the adhesive layer 115. and the p-electrode 134 of the LED 130 through the contact hole formed in the second planarization layer 117. However, it is not limited thereto, and the first electrode 141 may be defined as being in contact with the drain electrode 124 of the thin film transistor 120 according to the type of the thin film transistor 120 .

The second electrode 142 is an electrode for connecting the common wire CL and the n-electrode 135 of the LED 130 . The second electrode 142 is in contact with the common line CL through contact holes formed in the first planarization layer 116, the second planarization layer 117, the passivation layer 114, and the adhesive layer 115, and is in contact with the second planarization layer CL. It contacts the n-electrode 135 of the LED 130 through the contact hole formed in the layer 117 .

Accordingly, when the display device is turned on, different voltage levels applied to the source electrode 123 and the common wiring CL of the thin film transistor 120 are applied to the first electrode 141 and the second electrode ( 142) to the p-electrode 134 and the n-electrode 135 so that the LED 130 can emit light. In FIG. 2C , it has been described that the thin film transistor 120 is electrically connected to the p-electrode 134 and the common wire CL is electrically connected to the n-electrode 135, but is not limited thereto, and the thin film transistor 120 The n-electrode 135 may be electrically connected, and the common line CL may be electrically connected to the p-electrode 134 .

Although not shown in FIG. 2C , a bank may be formed on the LED 130 and the second planarization layer 117 to define an emission area of each pixel PX. At this time, in order to prevent interference between adjacent pixels PX, such as transmission of light emitted from the LED 130 to the adjacent pixels PX, the bank may be made of a black material.

Referring to FIG. 2C , a gate link line GLL is formed on the rear surface of the second substrate 112 . The gate link line GLL may be made of the same material as the gate electrode 121 . The gate link line GLL is disposed in the display area AA and the non-display area NA, is formed beyond the scribing line SL, and may extend to a corner of the second substrate 112 . Although the gate link line GLL is illustrated in FIG. 2C , the data link line DLL may also be formed in the same manner as the gate link line GLL.

Then, the first substrate 111 and the second substrate 112 are scribed in units of cells.

Referring to FIGS. 2D and 2E , the first substrate 111 and the second substrate 112 are scribed along the scribing lines SL of the first substrate 111 and the second substrate 112. , the first substrate 111 and the second substrate 112 may be separated in units of cells. That is, as shown in FIG. 2C , in a state where the first substrate 111 and the second substrate 112 are bonded, the laser is irradiated along the scribing line SL or the mechanical method is used. By scribing the first substrate 111 and the second substrate 112 , the first substrate 111 and the second substrate 112 may be separated in units of cells. As the first substrate 111 and the second substrate 112 are scribed along the scribing line SL, the gate line GL and the data line DL are formed on the upper surface of the first substrate 111. The gate link line (GLL) and the data link line (DLL) extend to the end of the rear surface of the second substrate 112.

Subsequently, a wiring film 190 is first applied to connect the plurality of gate lines GL and the plurality of gate link lines GLL, and to connect the plurality of data lines DL and the plurality of data link lines DLL. It adheres to the side surfaces of the substrate 111 and the second substrate 112 .

Referring to FIG. 2F , the wiring film 190 includes a base film 191 , wiring 192 , and a colored layer 193 .

The base film 191 is a substrate on which the wiring 192 or the colored layer 193 is formed. The base film 191 may extend in one direction along the side surface of the first substrate 111 . As shown in FIG. 2F , since the base film 191 may be adhered to the top or bottom as well as the side of the first substrate 111, the base film 191 may be made of a flexible material. For example, the base film 191 may be made of polyethylene terephthalate (PET).

A plurality of wirings 192 are disposed on the base film 191 . Each wiring 192 electrically connects the gate wiring GL located on the upper surface of the first substrate 111 and the gate link wiring GLL located on the rear surface of the second substrate 112, and the first substrate ( 111) and the data link line DLL located on the rear surface of the second substrate 112 are electrically connected. The wiring 192 may be made of a highly conductive material such as silver (Ag). The wiring 192 is formed on the base film 191 by mixing a material with high conductivity in a powder form with a fixing solution such as ink and printing, or by irradiating a laser on a base member on which a metal transfer layer is formed to form the base film 191. can be formed in

Referring to FIG. 2F , a colored layer 193 is disposed on the base film 191 . The colored layer 193 may block light from the LED 130 from leaking to the side of the first substrate 111 or the second substrate 112 . One surface of the colored layer 193 may be made of a highly reflective material. Also, the colored layer 193 may be made of resin including black pigment. In the embodiment shown in FIG. 2F , the colored layer 193 is disposed between the base film 191 and the wiring 192, but is not necessarily limited thereto. For example, the colored layer 193 may be disposed on one surface on which the wiring 192 is not formed, or may be disposed between the wiring 192 and the side surface of the first substrate 111 .

Referring to FIG. 2F , the wiring 192 is attached to the side surfaces of the first substrate 111 and the second substrate 112, and both ends of the wiring 192 are connected to the first substrate 111 and the second substrate 112. It can be attached in a bent shape so as to overlap the top or bottom of the. That is, the wiring 192 is electrically connected to the first wiring part 192a positioned on the side surface of the first substrate 111 or the second substrate 112 and the gate link wiring GLL on the second substrate 112. A second wiring part 192b connected thereto and a third wiring part 192c electrically connected to the gate wiring GL on the first substrate 111 are included.

A conductive layer 195 may be disposed between the gate line GL and the gate link line GLL and the wiring film 190 . Accordingly, the second wiring part 192b may be electrically connected to the gate link line GLL, and the third wiring part 192c may be electrically connected to the gate line GL. Similarly, the data link line DLL may be electrically connected to the data line DL through the line 192 and the conductive layer 195 . The conductive layer 195 may be an anisotropic conductive film (ACF), but is not necessarily limited thereto.

Referring to FIG. 2F , the conductive layer 195 is also disposed between the first wiring part 192a and the substrates 111 and 112, but is not necessarily limited thereto. The conductive layer 195 may not be disposed between the first wiring part 192a and the side surfaces of the substrates 111 and 112, and a non-conductive material layer having only adhesive properties may be disposed.

Referring back to FIG. 1 , the wiring film 190 according to an embodiment of the present invention may extend to overlap the display area AA of the display device. That is, the base film 191 may include a plurality of wires 192 corresponding to the side surface of the first substrate 111 and may extend to cover the entire pixel unit 110 . In other words, the display device may include a protective film 190' covering the pixel unit 110 to protect the pixel unit 110 and a wiring film 190 to electrically connect the top and bottom of the substrate. However, the protective film 190' and the wiring film 190 may share at least one layer. In this case, the protective film 190 ′ may minimize damage to the first substrate 111 from external impact or simultaneously serve to protect a user from fragments when the first substrate 111 is damaged. Meanwhile, the protective film 190' may further include a strength enhancing layer, an anti-fingerprint layer, and the like. The embodiment shown in FIG. 1 is different from the embodiment described with reference to FIGS. 2A to 2F except for the wiring film 190 and the protective film 190', and other components are substantially the same, so duplicate descriptions are not necessary. omit

Referring to FIGS. 1 and 2F , to briefly describe the structure of the wiring film 190 and the display device, the thin film transistor 120 and the LED 130 described in FIG. 2C are expressed as the pixel unit 110 . An adhesive layer may be disposed between the base film 191' and the pixel unit 110 to fix the wiring film 190' to the first substrate 111. The adhesive layer may be composed of a double-sided tape or a liquid material such as Optical Clear Resin (OCR).

3 is a bird's eye view for explaining a display device according to an exemplary embodiment of the present invention, and FIGS. 4A to 4C are partially enlarged views of the display device shown in FIG. 3 .

Referring to FIG. 3 , a wiring film 190 ′ is disposed on the first substrate 111 . The wiring film 190' may extend to the side surface of the first substrate 111 and cover the side surface of the first substrate 111, but is not necessarily limited thereto. For example, it may have a shape that surrounds two adjacent side surfaces of the first substrate 111, or may have a shape that covers at least a portion of one side surface. Meanwhile, a conductive adhesive layer or a transparent adhesive layer may be disposed between the wiring film 190 ′ and the first substrate 111 .

FIG. 4A is an enlarged view of area A of the first substrate 111 and second substrate 112 shown in FIG. 3, and FIG. 4B is an enlarged view of area B of the wiring film 190' shown in FIG. It is an enlarged view. 4C shows a state in which the wiring films 190' are attached to the side surfaces of the first substrate 111 and the second substrate 1120.

Referring to FIGS. 3 and 4A to 4C , the pitch P of the lines 192 disposed on the wiring film 190' may be different from the pitches of the gate lines GL and gate link lines GLL. there is.

Referring to FIG. 4C , the pitch P2 of the lines 192 is smaller than the pitches P1 of the gate lines GL and gate link lines GLL. Accordingly, the plurality of wires 192 disposed on the wiring film 190' include the dummy wires 192' not connected to any of the gate wires GL and the gate link wires GLL and the gate wires GL. and a link wire 192'' connecting the gate link wire GLL. In FIG. 4C , the base film 191 and the colored layer 193 are omitted for ease of understanding.

The line width W1 of the gate line GL may be the same as the line width of the gate link line GLL. Also, the line width W2 of the link wire 192'' may be the same as that of the dummy wire 192'. Meanwhile, the line width W2 of the link line 192'' is smaller than the line width W1 of the gate line GL. For example, one gate line GL may be connected to two or more link lines 192''. Accordingly, a separate align key is not required when attaching the wiring film 190 to the first substrate 111, and the gate line GL and the gate link line GLL are connected without an alignment process. can make it As such, since the alignment process can be omitted during the wiring film 190 attachment process, process costs can be saved.

In FIG. 4C , it is illustrated that the gate line GL completely overlaps the gate link line GLL electrically connected to the gate line GL in the vertical direction, but is not necessarily limited thereto. For example, the gate line GL may be vertically offset from the gate link line GLL electrically connected to the gate line GL. In this case, the dummy wires 192' and the link wires 192'' may be disposed in an oblique shape or a curved shape on the base film 190'.

As described above, since the display device according to an exemplary embodiment of the present invention does not need to directly form wires on the side surface of the substrate, process costs can be reduced accordingly.

In addition, in the conventional structure, a separate protective layer must be formed to protect side wiring, whereas in the display device according to an embodiment of the present invention, the base film 191 of the wiring film 190 functions as a protective layer. Therefore, it is possible to reduce process time and process cost for forming a separate protective layer.

In a display device according to an exemplary embodiment of the present invention, side wirings of a display device substrate are replaced with a wiring film. Therefore, even when the shape of the corner of the first substrate 111 or the second substrate 112 is angular, it is possible to easily form a plurality of side wirings, and the gate wiring GL and the gate link wiring GLL In addition, the data line DL and the data link line DLL may be normally connected. Accordingly, the display device according to an exemplary embodiment of the present invention includes the first substrate 111 and the first substrate 111 to connect the gate line GL and the gate link line GLL and the data line DL and the data link line DLL. 2 A process of grinding the edges of the substrate 112 may be omitted. In addition, when the grinding process is performed, since the sides of the first substrate 111 and the second substrate 112 have a round shape or a polygonal shape, the non-display area is larger than when the grinding process is not performed. The size of (NA) can be increased. Accordingly, in the method for manufacturing a display device according to an exemplary embodiment of the present invention, the size of the non-display area NA may be reduced. However, some grinding may be required to prevent the wiring 192 of the wiring film from contacting the edge of the substrate and thus causing the wiring 192 to be worn and disconnected.

In addition, in the display device according to an exemplary embodiment, the colored layer 193 made of a black material is disposed on the wiring film 190 so that external light is reflected from the plurality of wiring lines 192 or emitted from the LED 130. The problem of the reflected light being reflected by the plurality of wires 192 and being recognized by the user can be solved. Accordingly, when display devices according to an embodiment of the present invention are arranged in a tile form to implement a super-large screen, light leakage between display devices adjacent to each other can be prevented.

In some embodiments, the display device may be manufactured using only one substrate instead of using two substrates, the first substrate 111 and the second substrate 112 , to manufacture the display device. That is, the process may be performed by disposing the data line DL and the gate line GL on the top surface of one substrate, and disposing the data link line DLL and data line DL on the back surface of the same substrate.

Although the embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and may be variously modified without departing from the technical spirit of the present invention. . Therefore, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but to explain, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The protection scope of the present invention should be construed according to the claims below, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

111: first substrate
112: second substrate
113: gate insulating layer
114: passivation layer
115: adhesive layer
116: first planarization layer
117: second planarization layer
118: bonding layer
120: thin film transistor
121: gate electrode
122: active layer
123: source electrode
124: drain electrode
130: LEDs
131: n-type layer
132: active layer
133: p-type layer
134: p-electrode
135: n-electrode
141: first electrode
142: second electrode
143: reflective layer
190: wiring film
190': protective film
191, 191': base film
192: wiring
192': dummy wiring
192'': link wiring
193: colored layer
195: conductive layer
SL: scribing line
PX: pixels
DL: data wire
DLL: data link wiring
GL: gate wiring
GLL: gate link wiring
CL: common wiring
AA: display area
NA: non-display area

Claims (30)

a first substrate in which a plurality of pixels are defined in a display area;
a thin film transistor disposed on the first substrate and including a gate electrode, an active layer, a source electrode, and a drain electrode;
a plurality of first electrodes disposed on an upper surface of the first substrate;
a second substrate disposed below the first substrate;
a plurality of second electrodes disposed on a lower surface of the second substrate;
a bonding layer bonding the first substrate and the second substrate; and
A wiring film disposed on side surfaces of the first substrate and the second substrate, electrically connecting the first electrode and the second electrode, and having a plurality of wires formed thereon;
A display device, wherein a portion of the bonding layer contacts the wiring film. According to claim 1,
an LED disposed on the first substrate;
a gate insulating layer disposed between the gate electrode and the active layer; and
The display device further includes a passivation layer disposed on the source electrode and the drain electrode. According to claim 1,
The active layer is located on top of the gate electrode,
The source electrode and the drain electrode are positioned on the active layer. According to claim 3,
The first electrode is formed of the same material on the same layer as the gate electrode. According to claim 1,
The first electrode extends to an end of the upper surface of the first substrate,
The second electrode extends to an end of the rear surface of the second substrate. According to claim 2,
and a common wiring disposed on the gate insulating layer and applying a common voltage to the LEDs. According to claim 6,
The common wire extends in the same direction as the first electrode and is spaced apart from the first electrode. According to claim 2,
The display device further comprises a reflective layer disposed on the passivation layer in the display area. According to claim 8,
The reflective layer is made of a metal material, the display device. According to claim 8,
and an adhesive layer disposed on the reflective layer and insulating the reflective layer from the LED. According to claim 10,
The adhesive layer is
A display device made of a thermal curing material or a light curing material. According to claim 2,
The LED,
A display device comprising: an n-type layer, an active layer on the n-type layer, a p-type layer on the active layer, an n-electrode on the n-type layer, and a p-electrode on the p-type layer. According to claim 12,
The n-type layer is formed by implanting n-type impurities into gallium nitride (GaN). According to claim 12,
The active layer is a light emitting layer made of a nitride semiconductor,
The nitride semiconductor includes indium gallium nitride (InGaN). According to claim 12,
The p-type layer is formed by implanting p-type impurities into gallium nitride (GaN). According to claim 12,
The n-electrode and the p-electrode are made of a conductive material,
The conductive material includes a transparent conductive oxide. According to claim 16,
The n-electrode and the p-electrode are made of the same material. According to claim 12,
The LED,
A portion of the n-type layer is exposed by etching predetermined portions of the active layer and the p-type layer in the laminated structure of the n-type layer, the active layer, and the p-type layer sequentially stacked,
The n-electrode is disposed on an exposed portion of the n-type layer;
The p-electrode is disposed on the unetched p-type layer,
The display device, wherein the n-electrode and the p-electrode are separated from each other by a portion of the predetermined portion where the active layer and the p-type layer are etched. According to claim 12,
The LED,
The display device, wherein the n-electrode and the p-electrode are positioned at different heights with respect to a top surface of the n-type layer. According to claim 12,
Further comprising a reflective layer disposed on the passivation layer in the display area,
The n-type layer is disposed closer to the reflective layer than the n-electrode and the p-electrode. According to claim 1,
The display device further comprises a conductive layer disposed between the first and second electrodes and the wiring film. According to claim 1,
The first substrate and the second substrate,
A display device comprising any one of glass, resin, polymer material, plastic, and plastic material having flexibility. The method of claim 22,
The display device, wherein the first substrate and the second substrate are made of the same material. According to claim 1,
Further comprising a protective film covering the pixel on the first substrate,
The display device, wherein the wiring film and the protective film share at least one layer. According to claim 1,
The wiring is
a first wiring part electrically connected to the first electrode;
a second wiring part electrically connected to the second electrode; and
and a third wiring part connecting the first wiring part and the second wiring part. According to claim 25,
A conductive layer is disposed between the first wiring part and the first electrode, and between the second wiring part and the second electrode,
An adhesive layer is disposed between the third wiring part and side surfaces of the first and second substrates. According to claim 1,
A width of the wiring is smaller than a width of the first electrode. The method of claim 27,
The display device, wherein the wiring includes a first wiring electrically connected to the first electrode and a second wiring insulated from the first electrode. According to claim 28,
The first electrode is electrically connected to at least two or more first wires,
The second wire is floating, the display device. According to claim 1,
The wiring film further includes a colored layer,
The colored layer is disposed to overlap the plurality of wires and covers a side surface of the substrate.

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