KR102635781B1 - Wiring film and display device including the same - Google Patents

Abstract

A display device according to an embodiment of the present invention includes a substrate including a plurality of pixels, a plurality of first electrodes disposed on the upper surface of the substrate, a plurality of second electrodes disposed on the lower surface of the substrate, and a plurality of wires. It includes a formed wiring film. The wiring film is located on the side of the substrate to electrically connect the first electrode and the second electrode.

Description

Wiring film and display device including the same {WIRING FILM AND DISPLAY DEVICE INCLUDING THE SAME}

The present invention relates to a wiring film and a display device including the wiring film, and more specifically, to a wiring film on which wiring is formed and a display device including the wiring film.

Liquid crystal display devices (LCD) and organic light emitting display devices (OLED), which are widely used to date, are gradually expanding their application range.

Liquid crystal displays and organic light emitting displays are widely used in screens of everyday electronic devices, such as cell phones and laptops, due to their advantages of being able to provide high-resolution screens and being lightweight and thin, and their range is gradually expanding. It is expanding.

However, liquid crystal display devices and organic light emitting display devices have limitations in reducing the size of the bezel area, which is an area in the display device where images are not displayed and is visible to the user. For example, in the case of a liquid crystal display device, a sealant must be used to seal the liquid crystal and bond the upper and lower substrates, so there is a limit to reducing the size of the bezel area. In addition, in the case of organic light emitting display devices, the organic light emitting elements are made of organic materials and are very vulnerable to moisture or oxygen, so an encapsulation must be placed to protect the organic light emitting elements, so there is a limit to reducing the size of the bezel area. there is. In particular, since it is impossible to implement a very large screen with a single panel, when implementing a very large screen by arranging a plurality of liquid crystal display panels or a plurality of organic light emitting display panels in a type of tile, the bezel between adjacent panels Problems may arise where the area is visible to the user.

As an alternative to this, a display device including LEDs has been proposed. Since LEDs are made of inorganic materials rather than organic materials, they are highly reliable and have a longer lifespan than liquid crystal displays or organic light emitting displays. In addition, LED not only has a fast lighting speed, but also consumes less power, has excellent stability due to strong impact resistance, and can display high-brightness images, making it a device suitable for application to ultra-large screens.

Accordingly, LED devices are generally used in display devices to provide ultra-large screens that can minimize the bezel area.

The inventors of the present invention believe that since LEDs have better luminous efficiency than organic light-emitting devices, display devices including LEDs emit light of the same luminance, i.e., the size of one pixel, compared to display devices using organic light-emitting devices. It was recognized that the size of the light emitting area required for this is very small. Accordingly, when the inventors of the present invention implement a display device using LEDs, the distance between the light emitting areas of adjacent pixels is greater than the distance between the light emitting areas of adjacent pixels in an organic light emitting display device having the same resolution. I realized it was very long. Accordingly, the inventors of the present invention, when implementing a tiling display implemented by arranging a plurality of panels in the form of tiles, set the gap between the outermost LED of one panel and the outermost LED of the other panel adjacent to it to one. It was recognized that it is possible to implement a zero bezel with virtually no bezel area since it can be implemented the same as the spacing between LEDs in the panel.

However, as described above, in order to make the spacing between the outermost LED of one panel and the outermost LED of another adjacent panel the same as the spacing between LEDs within one panel, the upper surface of the panel is already used. Various driving units, such as the gate driver and data driver, which were located in , should be located on the back of the panel, not the top. Accordingly, the inventors of the present invention invented a display device with a new structure in which elements such as thin film transistors and LEDs are placed on the top of the panel, and driving units such as gate drivers and data drivers are placed on the back of the panel. Additionally, the inventors of the present invention invented a manufacturing technology for forming side wiring on the side of the panel to connect the elements arranged on the top of the panel and the driving units arranged on the back of the panel.

However, in the case of conventional technologies for forming side wiring, the process is long and the defect rate is high when printing multiple times using a pad is required, resulting in low printing accuracy. Accordingly, when printing in one pass using a pad, the length of the side wires is short, making it difficult to connect the wires on the top and the back of the panel. In addition, when manufacturing side wiring by printing using pads, the contact surface of the pad is damaged or deformed and the printing quality deteriorates. Therefore, the pad must be replaced periodically, but the pad is expensive and each time the pad is replaced. There is the inconvenience of having to change the settings of new manufacturing equipment. In addition, when forming side wiring on the side of a panel, the edge of the panel must be ground. However, if grinding is done taking the process margin into consideration, there is a risk that the gap between LEDs between adjacent panels may increase.

Accordingly, the inventors of the present invention have invented a new protective film and a display device using the same that can connect elements arranged on the top of the panel and driving units arranged on the back of the panel with a simpler structure and process while realizing zero bezel.

The problems of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to solve the problems described above, a display device according to an embodiment of the present invention includes a substrate including a plurality of pixels, a plurality of first electrodes disposed on the upper surface of the substrate, and a plurality of first electrodes disposed on the lower surface of the substrate. It includes a second electrode and a wiring film on which a plurality of wiring lines are formed. Here, the wiring film is located on the side of the substrate to electrically connect the first electrode and the second electrode.

Specific details of other embodiments are included in the detailed description and drawings.

The present invention can simplify the manufacturing process for forming side wiring and reduce manufacturing costs by attaching the wiring film to the side of the substrate.

In addition, the present invention can reduce the process margin for the grinding process by attaching a wiring film to form a side wiring, thereby minimizing the visibility of the border of the tiling display.

In addition, the present invention attaches a wiring film containing wiring to form the side wiring, thereby omitting a separate protective layer to protect the wiring, thereby simplifying the manufacturing process for forming the side wiring and manufacturing. Costs can be reduced.

The effects according to the present invention are not limited to the contents exemplified above, and further various effects are included in the present specification.

1 is a side view of a display device according to an embodiment of the present invention.
2A to 2F are schematic process diagrams for explaining a display device and a method of manufacturing a display device according to an embodiment of the present invention.
Figure 3 is a bird's eye view for explaining a display device according to an embodiment of the present invention.
FIGS. 4A to 4C are partial enlarged views of the display device shown in FIG. 3 .

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms. The present embodiments only serve to ensure that the disclosure of the present invention is complete and that common knowledge in the technical field to which the present invention pertains is not limited. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shapes, sizes, proportions, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative, and the present invention is not limited to the matters shown. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'includes', 'has', 'consists of', etc. mentioned in this specification are used, other parts may be added unless 'only' is used. In cases where a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting components, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

When an element or layer is referred to as being on another element or layer, it includes all cases where another layer or other element is interposed directly on or in the middle of another element.

Although first, second, etc. are used to describe various elements, these elements are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The size and thickness of each component shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the size and thickness of the components shown.

Each feature of the various embodiments of the present invention can be partially or fully combined or combined with each other, and as can be fully understood by those skilled in the art, various technical interconnections and operations are possible, and each embodiment may be implemented independently of each other. It may be possible to conduct them together due to a related relationship.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings.

1 is a side view of a display device according to an embodiment of the present invention. 2A to 2F are schematic process diagrams for explaining a display device and a method of manufacturing a display device according to an embodiment of the present invention. FIG. 2A is a schematic top view of the first substrate 111 before the bonding process. Figure 2b is a schematic rear view of the second substrate 112 before the bonding process. FIG. 2C is a schematic cross-sectional view of the first substrate 111 and the second substrate 112 in a bonded state. Figure 2d is a schematic top view of the first substrate 111 in a state in which the scribing process has been completed. Figure 2e is a schematic cross-sectional view of the scribing process in a completed state. FIG. 2F is a schematic cross-sectional view of the wiring film 190 attached to the side of the first substrate 111.

One embodiment of the present invention shown in FIG. 1 adheres a wiring film 190 to the side of the substrates 111 and 112 to facilitate electrical connection of wiring disposed on the top and bottom of the substrates 111 and 112. Thus, it has the advantage of being able to omit the complicated process of forming wiring on the sides of the substrates 111 and 112. Hereinafter, the structure of the display device including the wiring film 190 and the wiring film 9190 will be described in detail with reference to FIGS. 2A to 2F.

First, referring to FIGS. 1 and 2A , the pixel unit 110 is disposed in the display area AA, and the gate wire GL and the gate link wire GLL are arranged in the non-display area NA.

Next, a plurality of thin film transistors 120, a plurality of LEDs 130, a plurality of gate wires GL, and a plurality of data wires DL are formed on the upper surface of the first substrate.

The first substrate 111 shown in FIG. 2A is a substrate that supports components disposed on the upper part of the display device and may be an insulating substrate. For example, the first substrate 111 may be made of glass or resin. Additionally, the first substrate 111 may be made of polymer or plastic. In some embodiments, the first substrate 111 may be made of a flexible plastic material.

A display area AA and a non-display area NA surrounding the display area AA may be defined on the first substrate 111 . The display area AA is an area where an image is actually displayed in the display device. An LED 130, which will be described later, and a thin film transistor 120 for driving the LED 130 may be disposed in the display area AA. The non-display area (NA) is an area where an image is not displayed and may be defined as an area surrounding the display area (AA). In the non-display area (NA), various wires, such as a gate wire (GL) and a data wire (DL) connected to the LED 130 and the thin film transistor 120 arranged in the display area (AA), may be disposed. In this specification, the first substrate 111 is described as being defined by a display area (AA) and a non-display area (NA), but it is not limited thereto and may be defined as having no non-display area (NA). That is, when implementing a tiling display using a display device manufactured by the display device manufacturing method according to an embodiment of the present invention, the outermost LED 130 of one panel and the outermost LED 130 of another panel adjacent thereto Since the spacing between the outer LEDs 130 can be implemented to be the same as the spacing between the LEDs 130 within one panel, it is possible to implement zero bezel with virtually no bezel area. Accordingly, the first substrate 111 may be defined as having only the display area AA, and the non-display area NA may be described as not being defined in the first substrate 111 .

A plurality of pixels (PX) are defined in the display area (AA) of the first substrate 111. Each of the plurality of pixels (PX) is an individual unit that emits light, and the plurality of pixels (PX) may include, but are not limited to, a red pixel, a green pixel, and a blue pixel. A thin film transistor 120 and an LED 130 are formed in each of the plurality of pixels (PX). A more detailed description of the thin film transistor 120 and LED 130 will be described later with reference to FIG. 2C.

A scribing line SL may be defined on the first substrate 111. The scribing line SL is a cutting line used to cut the display device cell by cell after the bonding process of the first substrate 111 and the second substrate 112. That is, after forming a plurality of display devices simultaneously or forming one display device on a mother substrate, a scribing line SL may be defined for a scribing process of cutting the display device on a cell basis. . The scribing line SL may have a line shape as shown in FIG. 2A or may have a plurality of patterns.

Next, a plurality of gate link wires (GLL) and a plurality of data link wires (DLL) are formed on the rear surface of the second substrate 112.

Referring to FIG. 2B, the second substrate 112 is a substrate that supports components disposed below the display device and may be an insulating substrate. For example, the second substrate 112 may be made of glass or resin. Additionally, the second substrate 112 may be made of polymer or plastic. The second substrate 112 may be made of the same material as the first substrate 111. In some embodiments, the second substrate 112 may be made of a plastic material with flexibility.

A plurality of gate link lines (GLL) and a plurality of data link lines (DLL) are formed on the rear surface of the second substrate 112. The plurality of gate link wires (GLL) are wires for connecting the plurality of gate wires (GL) formed on the upper surface of the first substrate 111 and the gate driver, and the plurality of data link wires (DLL) are wires for connecting the gate driver to the plurality of gate wires (GL) formed on the upper surface of the first substrate 111. ) is a wire for connecting a plurality of data wires (DL) formed on the upper surface of the data driver to the data driver. A plurality of gate link lines (GLL) and a plurality of data link lines (DLL) may extend from the ends of the second substrate 112 toward the center of the second substrate 112 .

Although not shown in FIG. 2B, a gate driver is disposed on the back of the second substrate 112 to be electrically connected to a plurality of gate link lines (GLL), and a data driver is electrically connected to a plurality of data link lines (DLL). The driving unit may be disposed. At this time, the gate driver and the data driver may be formed directly on the back of the second substrate 112, or may be disposed on the back of the second substrate 112 in a COF (Chip on Film) method, or on a printed circuit board (PCB). ) may be disposed on the back of the second substrate 112, but is not limited thereto.

Next, the first substrate 111 and the second substrate 112 are bonded.

Referring to FIG. 2C, the first substrate 111 and the second substrate 112 are bonded through the bonding layer 118. The bonding layer 118 may be made of a material that can be hardened through various curing methods to bond the first substrate 111 and the second substrate 112. The bonding layer 118 may be disposed in the entire area between the first substrate 111 and the second substrate 112, or may be disposed only in a partial area.

Looking in more detail at the components disposed on the top surface of the first substrate 111 with reference to FIG. 2C, a thin film transistor 120 is formed on the first substrate 111. Specifically, the gate electrode 121 is disposed on the first substrate 111, and the active layer 122 is disposed on the gate electrode 121. A gate insulating layer 113 is disposed between the gate electrode 121 and the active layer 122 to insulate the gate electrode 121 and the active layer 122. A source electrode 123 and a drain electrode 124 are disposed on the active layer 122, and a passivation layer 114 to protect the thin film transistor 120 is disposed on the source electrode 123 and the drain electrode 124. . However, the passivation layer 114 may be omitted depending on the embodiment.

Referring to FIG. 2C, the gate wire GL is formed on the same layer as the gate electrode 121. The gate wire GL may be made of the same material as the gate electrode 121. The gate wire GL is disposed in the display area AA and the non-display area NA, is formed beyond the scribing line SL, and may extend to a corner of the first substrate 111 . Although the gate line GL is shown in FIG. 2C, the data line DL may also be formed in the same manner as the gate line GL.

Referring to FIG. 2C, the common wiring CL is disposed on the gate insulating layer 113. The common wiring (CL) is a wiring for applying a common voltage to the LED 130, and may be arranged to be spaced apart from the gate wiring (GL) or the data wiring (DL). Additionally, the common line CL may extend in the same direction as the gate line GL or the data line DL. As shown in FIG. 2C, the common wiring CL may be made of the same material as the source electrode 123 and the drain electrode 124, but is not limited thereto and may be made of the same material as the gate electrode 121.

The reflective layer 143 is disposed on the passivation layer 114 in the display area AA. The reflective layer 143 is a layer for reflecting light emitted from the LED 130 toward the first substrate 111 toward the upper part of the display device and emitting light to the outside of the display device. The reflective layer 143 may be made of a metal material with high reflectivity.

An adhesive layer 115 is disposed on the reflective layer 143. The adhesive layer 115 is used to adhere the LED 130 to the reflective layer 143, and may insulate the LED 130 from the reflective layer 143 made of a metal material. The adhesive layer 115 may be made of a heat-curable material or a light-curable material, but is not limited thereto.

The LED 130 is disposed on the adhesive layer 115. The LED 130 includes an n-type layer 131, an active layer 132, a p-type layer 133, an n-electrode 135, and a p-electrode 134. Hereinafter, it will be described that an LED 130 having a lateral structure is used as the LED 130, but the structure of the LED 130 is not limited thereto.

To describe the stacked structure of the LED 130 in more detail, the n-type layer 131 can be formed by injecting n-type impurities into gallium nitride (GaN), which has excellent crystallinity. The active layer 132 is disposed on the n-type layer 131. The active layer 132 is a light-emitting layer that emits light from the LED 130, and may be made of a nitride semiconductor, for example, indium gallium nitride (InGaN). A p-type layer 133 is disposed on the active layer 132. The p-type layer 133 may be formed by implanting p-type impurities into gallium nitride (GaN). However, the constituent materials of the n-type layer 131, the active layer 132, and the p-type layer 133 are not limited thereto.

As described above, the LED 130 is made by sequentially stacking the n-type layer 131, the active layer 132, and the p-type layer 133, etching a predetermined portion, and then forming the n-electrode 135 and the p-electrode. It can be manufactured in a way that forms (134). At this time, the predetermined portion is a space for separating the n-electrode 135 and the p-electrode 134, and the predetermined portion may be etched to expose a portion of the n-type layer 131. In other words, the surface of the LED 130 on which the n-electrode 135 and the p-electrode 134 are disposed may have different height levels rather than a flat surface.

In this way, the n-electrode 135 may be disposed on the etched area, that is, on the n-type layer 131 exposed through the etching process. The n-electrode 135 may be made of a conductive material, for example, a transparent conductive oxide. Meanwhile, a p-electrode 134 may be disposed on an area that is not etched, that is, on the p-type layer 133. The p-electrode 134 may also be made of a conductive material, for example, a transparent conductive oxide. Additionally, the p electrode 134 may be made of the same material as the n electrode 135.

As described above, in the state where the n-type layer 131, the active layer 132, the p-type layer 133, the n-electrode 135, and the p-electrode 134 are formed, the n-type layer 131 is connected to the n-electrode 135 and The LED 130 may be disposed closer to the reflective layer 143 than the p-electrode 134.

Next, the first planarization layer 116 is disposed on the thin film transistor 120 in the display area AA. The first planarization layer 116 may be formed to planarize the upper part of the area excluding the area where the LED 130 is disposed and the contact hole. Additionally, a second planarization layer 117 may be disposed on the first planarization layer 116. The second planarization layer 117 may be disposed on the thin film transistor 120 and the LED 130 in the area excluding the contact hole. At this time, the second planarization layer 117 may be formed so that some areas of the p electrode 134 and n electrode 135 of the LED 130 are open. In FIG. 2C, it is shown that two planarization layers are used when manufacturing a display device, but this is to prevent excessive increase in process time when forming a single planarization layer. Accordingly, the planarization layer does not have to be composed of a plurality of layers as shown in FIG. 2C, but may be composed of a single planarization layer.

The first electrode 141 is an electrode for connecting the thin film transistor 120 and the p electrode 134 of the LED 130. The first electrode 141 is connected to the source electrode 123 of the thin film transistor 120 through the contact hole formed in the first planarization layer 116, the second planarization layer 117, the passivation layer 114, and the adhesive layer 115. and contacts the p-electrode 134 of the LED 130 through the contact hole formed in the second planarization layer 117. However, the present invention is not limited thereto, and depending on the type of the thin film transistor 120, the first electrode 141 may be defined as being in contact with the drain electrode 124 of the thin film transistor 120.

The second electrode 142 is an electrode for connecting the common wiring CL and the n electrode 135 of the LED 130. The second electrode 142 is in contact with the common wiring CL through the contact hole formed in the first planarization layer 116, the second planarization layer 117, the passivation layer 114, and the adhesive layer 115, and the second planarization layer 115 It contacts the n-electrode 135 of the LED 130 through a contact hole formed in the layer 117.

Accordingly, when the display device is turned on, different voltage levels applied to each of the source electrode 123 and the common wiring CL of the thin film transistor 120 are applied to the first electrode 141 and the second electrode ( It is transmitted to the p electrode 134 and the n electrode 135 through 142, so that the LED 130 can emit light. In FIG. 2C, it is explained that the thin film transistor 120 is electrically connected to the p electrode 134 and the common wiring (CL) is electrically connected to the n electrode 135, but the thin film transistor 120 is not limited thereto. It may be electrically connected to the n electrode 135 and the common wiring CL may be electrically connected to the p electrode 134.

Although not shown in FIG. 2C, a bank may be formed on the LED 130 and the second planarization layer 117 to define the light emitting area of each pixel PX. At this time, in order to prevent interference between adjacent pixels (PX), such as light emitted from the LED 130 being transmitted to adjacent pixels (PX), the bank may be made of a black material.

Referring to FIG. 2C, a gate link line (GLL) is formed on the rear surface of the second substrate 112. The gate link line (GLL) may be made of the same material as the gate electrode 121. The gate link line (GLL) is disposed in the display area (AA) and the non-display area (NA), is formed beyond the scribing line (SL), and may extend to the edge of the second substrate 112. Although the gate link line (GLL) is shown in FIG. 2C, the data link line (DLL) may also be formed in the same manner as the gate link line (GLL).

Next, the first substrate 111 and the second substrate 112 are scribed cell by cell.

Referring to FIGS. 2D and 2E, the first substrate 111 and the second substrate 112 are scribed along the scribing lines SL of the first substrate 111 and the second substrate 112. , the first substrate 111 and the second substrate 112 may be separated on a cell basis. That is, as shown in FIG. 2C, in a state in which the first substrate 111 and the second substrate 112 are bonded, the laser is irradiated along the scribing line SL or a mechanical method is used. By scribing the first substrate 111 and the second substrate 112, the first substrate 111 and the second substrate 112 can be separated into cells. As the first substrate 111 and the second substrate 112 are scribed along the scribing line SL, the gate wire GL and the data wire DL are formed on the upper surface of the first substrate 111. It extends to the end, and the gate link line (GLL) and data link line (DLL) extend to the end of the rear surface of the second substrate 112.

Next, the wiring film 190 is first formed to connect the plurality of gate wires (GL) and the plurality of gate link wires (GLL) and the plurality of data wires (DL) and the plurality of data link wires (DLL). It is attached to the side surfaces of the substrate 111 and the second substrate 112.

Referring to FIG. 2F, the wiring film 190 includes a base film 191, a wiring 192, and a colored layer 193.

The base film 191 is a substrate on which the wiring 192 or the colored layer 193 is formed. The base film 191 may have a shape extending in one direction along the side of the first substrate 111 . As shown in FIG. 2F, the base film 191 can be attached not only to the side of the first substrate 111 but also to the top or bottom of the first substrate 111, so it may be desirable for the base film 191 to be made of a flexible material. For example, the base film 191 may be made of polyethylene terephthalate (PET).

A plurality of wires 192 are disposed on the base film 191. Each wiring 192 electrically connects the gate wiring (GL) located on the top surface of the first substrate 111 and the gate link wiring (GLL) located on the rear surface of the second substrate 112, and the first substrate ( The data line (DL) located on the top surface of 111) and the data link line (DLL) located on the back side of the second substrate 112 are electrically connected. The wiring 192 may be made of a highly conductive material such as silver (Ag). The wiring 192 is formed on the base film 191 by printing a highly conductive material mixed with a fixative solution such as ink in powder form, or by irradiating a laser on a base member with a metal transfer layer formed on the base film 191. can be formed in

Referring to FIG. 2F, the colored layer 193 is disposed on the base film 191. The colored layer 193 may block light from the LED 130 from leaking to the side of the first substrate 111 or the second substrate 112. One side of the colored layer 193 may be made of a material with high reflectivity. Additionally, the colored layer 193 may be made of resin containing black pigment. In one embodiment shown in FIG. 2F, the colored layer 193 is disposed between the base film 191 and the wiring 192, but the present invention is not limited thereto. For example, the colored layer 193 may be disposed on one side where the wiring 192 is not formed, or may be disposed between the wiring 192 and the side surface of the first substrate 111.

Referring to FIG. 2F, the wiring 192 is attached to the side surfaces of the first substrate 111 and the second substrate 112, and both ends of the wiring 192 are connected to the first substrate 111 and the second substrate 112. It can be attached in a curved shape to overlap the top or bottom of the. That is, the wiring 192 is electrically connected to the first wiring portion 192a located on the side of the first substrate 111 or the second substrate 112 and the gate link wiring (GLL) on the second substrate 112. It includes a second wiring portion 192b connected to the second wiring portion 192b, and a third wiring portion 192c electrically connected to the gate wiring GL on the first substrate 111.

A conductive layer 195 may be disposed between the gate wiring GL and the gate link wiring GLL and the wiring film 190 . Accordingly, the second wiring portion 192b may be electrically connected to the gate link wiring (GLL), and the third wiring portion 192c may be electrically connected to the gate wiring (GL). Likewise, the data link line (DLL) may be electrically connected to the data line (DL) through the line 192 and the conductive layer 195. The conductive layer 195 may be an anisotropic conductive film (ACF), but is not necessarily limited thereto.

Referring to FIG. 2F, the conductive layer 195 is also disposed between the first wiring portion 192a and the substrates 111 and 112, but the conductive layer 195 is not necessarily limited to this. The conductive layer 195 may not be disposed between the first wiring portion 192a and the side surfaces of the substrates 111 and 112, or a material layer having only adhesive properties and no conductivity may be disposed.

Referring again to FIG. 1 , the wiring film 190 according to an embodiment of the present invention may be extended to overlap the display area AA of the display device. That is, the base film 191 may include a plurality of wires 192 corresponding to the side surfaces of the first substrate 111 and may extend to cover the entire pixel portion 110 . In other words, the display device may include a protective film 190' covering the pixel portion 110 to protect the pixel portion 110, and a wiring film 190 for electrically connecting the upper and lower portions of the substrate. The protective film 190' and the wiring film 190 may share at least one layer. At this time, the protective film 190' can simultaneously minimize damage to the first substrate 111 from external impacts or protect the user from debris when the first substrate 111 is damaged. Meanwhile, the protective film 190' may further include a strength improvement layer, an anti-fingerprint layer, etc. The embodiment shown in FIG. 1 is different from the embodiment described with reference to FIGS. 2A to 2F only in the wiring film 190 and the protective film 190', and other components are substantially the same, so duplicate description is required. Omit it.

Referring to FIGS. 1 and 2F , in order to briefly explain the structure of the wiring film 190 and the display device, the thin film transistor 120 and the LED 130 described in FIG. 2C are represented as the pixel portion 110. An adhesive layer is disposed between the base film 191' and the pixel portion 110 so that the wiring film 190' can be fixed to the first substrate 111. The adhesive layer may be composed of double-sided tape or a liquid material such as OCR (Optical Clear Resin).

FIG. 3 is a bird's eye view for explaining a display device according to an embodiment of the present invention, and FIGS. 4A to 4C are partially enlarged views of the display device shown in FIG. 3 .

Referring to FIG. 3 , a wiring film 190' is disposed on the first substrate 111. The wiring film 190' may extend to the side of the first substrate 111 and may have a shape that surrounds the side of the first substrate 111, but is not necessarily limited to this. For example, it may be shaped to surround two adjacent sides of the first substrate 111, or may be shaped to surround at least a portion of one side. Meanwhile, a conductive adhesive layer or a transparent adhesive layer may be disposed between the wiring film 190' and the first substrate 111.

FIG. 4A is an enlarged view of area A of the first and second substrates 111 and 112 shown in FIG. 3, and FIG. 4b is an enlarged view of area B of the wiring film 190' shown in FIG. 3. This is an enlarged view. And FIG. 4C shows a state in which the wiring film 190' is attached to the sides of the first substrate 111 and the second substrate 1120.

3 and 4A to 4C, the pitch P of the wires 192 located on the wire film 190' may be different from the pitch of the gate wire GL and the gate link wire GLL. there is.

Referring to FIG. 4C, the pitch P2 of the wire 192 is smaller than the pitch P1 of the gate wire GL and the gate link wire GLL. Accordingly, the plurality of wires 192 disposed on the wire film 190' include dummy wires 192' and gate wires GL that are not connected to any of the gate wires GL and gate link wires GLL. and a link wire 192'' connecting the gate link wire GLL. In FIG. 4C , the base film 191 and the colored layer 193 are omitted to facilitate understanding.

The line width W1 of the gate line GL may be the same as the line width of the gate link line GLL. Additionally, the line width W2 of the link wire 192'' may be the same as the line width of the dummy wire 192'. Meanwhile, the line width W2 of the link wire 192'' is smaller than the line width W1 of the gate wire GL. For example, one gate wire GL may be connected to two or more link wires 192''. Accordingly, a separate align key is not required when attaching the wiring film 190 to the first substrate 111, and the gate wiring (GL) and the gate link wiring (GLL) are connected without an alignment process. You can do it. In this way, the alignment process can be omitted when attaching the wiring film 190, thereby saving process costs.

In FIG. 4C, the gate wire GL is shown to completely overlap the gate link wire GLL electrically connected to the gate wire GL in the vertical direction, but the present invention is not limited to this. For example, the gate wiring GL may be arranged to be vertically offset from the gate link wiring GLL that is electrically connected to the gate wiring GL. In this case, the dummy wire 192' and the link wire 192'' may be arranged in a diagonal or curved shape on the base film 190'.

As such, the display device according to an embodiment of the present invention does not need to form wiring directly on the side of the substrate, thereby reducing process costs.

In addition, while in the conventional structure a separate protective layer must be formed to protect the side wiring, in the display device according to an embodiment of the present invention, the base film 191 of the wiring film 190 functions as a protective layer. Therefore, the process time and process cost for forming a separate protective layer can be reduced.

The display device according to an embodiment of the present invention replaces the side wiring of the display device substrate with a wiring film. Therefore, even when the corners of the first substrate 111 or the second substrate 112 are angled, it is possible to easily form a plurality of side wires, and the gate wire GL and the gate link wire GLL And the data line (DL) and data link line (DLL) can be connected normally. Therefore, the display device according to an embodiment of the present invention includes a first substrate 111 and a first substrate 111 to connect the gate line GL and the gate link line GLL and the data line DL and the data link line DLL. 2 The process of grinding the corners of the substrate 112 can be omitted. In addition, when the grinding process is performed, the sides of the first substrate 111 and the second substrate 112 have a round shape or a polygonal shape, so the non-display area is larger than when the grinding process is not performed. The size of (NA) can be increased. Accordingly, in the display device manufacturing method according to an embodiment of the present invention, the size of the non-display area (NA) can be reduced. However, in order to prevent the wires 192 of the wiring film from coming into contact with the edges of the substrate, causing wear and disconnection of the wires 192, some grinding may be necessary.

In addition, in the display device according to an embodiment of the present invention, a colored layer 193 made of a black material is disposed on the wiring film 190, so that external light is reflected from the plurality of wirings 192 or emitted from the LED 130. The problem of the light being reflected from the plurality of wires 192 and being visible to the user can be solved. Accordingly, when display devices according to an embodiment of the present invention are arranged in a tile form to implement a very large screen, light leakage between adjacent display devices can be prevented.

In some embodiments, instead of using two substrates, the first substrate 111 and the second substrate 112, the display device may be manufactured using only one substrate. That is, the process may be performed by placing the data line (DL) and the gate line (GL) on the top surface of one substrate, and the data link line (DLL) and the data line (DL) on the back side of the same substrate.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention, but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

111: first substrate
112: second substrate
113: Gate insulating layer
114: Passivation layer
115: Adhesive layer
116: first planarization layer
117: second planarization layer
118: bonding layer
120: thin film transistor
121: Gate electrode
122: Active layer
123: source electrode
124: drain electrode
130: LED
131: n-type layer
132: active layer
133: p-type layer
134: p electrode
135: n electrode
141: first electrode
142: second electrode
143: reflective layer
190: wiring film
190': Protective film
191, 191': Base film
192: Wiring
192': Dummy wiring
192'': Link wiring
193: Colored people
195: conductive layer
SL: Scribing line
PX: pixel
DL: data wiring
DLL: data link wiring
GL: Gate wiring
GLL: Gate link wiring
CL: Common wiring
AA: display area
NA: Non-display area

Claims (30)

A first substrate with a plurality of pixels defined in the display area;
a thin film transistor disposed on the first substrate and including a gate electrode, an active layer, a source electrode, and a drain electrode;
a plurality of first electrodes disposed on the upper surface of the first substrate;
a second substrate disposed below the first substrate;
a plurality of second electrodes disposed on the lower surface of the second substrate;
a bonding layer that bonds the first and second substrates; and
a wiring film located on a side surface of the first substrate and the second substrate, electrically connecting the first electrode and the second electrode, and having a plurality of wiring lines formed thereon;
A display device wherein a portion of the bonding layer is in contact with the wiring film. According to paragraph 1,
an LED disposed on top of the first substrate;
a gate insulating layer disposed between the gate electrode and the active layer; and
The display device further comprising a passivation layer disposed on top of the source electrode and the drain electrode. According to paragraph 1,
The active layer is located on top of the gate electrode,
The source electrode and the drain electrode are located on top of the active layer. According to paragraph 3,
The first electrode is formed of the same material on the same layer as the gate electrode. According to paragraph 1,
The first electrode extends to an end of the upper surface of the first substrate,
The second electrode extends to an end of the rear surface of the second substrate. According to paragraph 2,
The display device further includes a common wiring disposed on the gate insulating layer and applying a common voltage to the LED. According to clause 6,
The common wiring extends in the same direction as the first electrode and is disposed to be spaced apart from the first electrode. According to paragraph 2,
The display device further includes a reflective layer disposed on the passivation layer in the display area. According to clause 8,
A display device, wherein the reflective layer is made of a metal material. According to clause 8,
The display device further includes an adhesive layer disposed on the reflective layer and insulating the reflective layer and the LED. According to clause 10,
The adhesive layer is,
A display device made of a heat-curable material or a light-curable material. According to paragraph 2,
The LED is,
A display device comprising an n-type layer, an active layer on the n-type layer, a p-type layer on the active layer, an n electrode on the n-type layer, and a p electrode on the p-type layer. According to clause 12,
The n-type layer is formed by implanting n-type impurities into gallium nitride (GaN). According to clause 12,
The active layer is a light-emitting layer made of a nitride semiconductor,
A display device wherein the nitride semiconductor includes indium gallium nitride (InGaN). According to clause 12,
The p-type layer is formed by implanting p-type impurities into gallium nitride (GaN). According to clause 12,
The n electrode and the p electrode are made of a conductive material,
A display device wherein the conductive material includes a transparent conductive oxide. According to clause 16,
The n-electrode and the p-electrode are made of the same material. According to clause 12,
The LED is,
In a stacked structure of the n-type layer, the active layer, and the p-type layer sequentially stacked, a portion of the n-type layer is exposed by etching a predetermined portion of the active layer and the p-type layer,
The n electrode is disposed on the exposed portion of the n-type layer,
The p electrode is disposed on the unetched p-type layer,
A display device wherein the n electrode and the p electrode are spaced apart by a portion of the predetermined portion where the active layer and the p-type layer are etched. According to clause 12,
The LED is,
A display device in which the n electrode and the p electrode are positioned at different heights based on the top surface of the n-type layer. According to clause 12,
Further comprising a reflective layer disposed on the passivation layer in the display area,
The n-type layer is disposed closer to the reflective layer than the n electrode and the p electrode. According to paragraph 1,
The display device further includes a conductive layer disposed between the first and second electrodes and the wiring film. According to paragraph 1,
The first substrate and the second substrate are,
A display device comprising any one of glass, resin, polymer material, plastic, and flexible plastic material. According to clause 22,
The first substrate and the second substrate are made of the same material. According to paragraph 1,
Further comprising a protective film covering the pixel on the first substrate,
The display device wherein the wiring film and the protective film share at least one layer. According to paragraph 1,
The wiring is,
a first wiring portion electrically connected to the first electrode;
a second wiring portion electrically connected to the second electrode; and
A display device comprising a third wiring unit connecting the first wiring unit and the second wiring unit. According to clause 25,
A conductive layer is disposed between the first wiring portion and the first electrode, and the second wiring portion and the second electrode,
A display device wherein an adhesive layer is disposed between the third wiring portion and side surfaces of the first and second substrates. According to paragraph 1,
A display device wherein the width of the wiring is smaller than the width of the first electrode. According to clause 27,
The display device includes a first wire electrically connected to the first electrode and a second wire insulated from the first electrode. According to clause 28,
The first electrode is electrically connected to at least two or more first wires,
The display device wherein the second wiring is floating. According to paragraph 1,
The wiring film further includes a colored layer,
The colored layer is arranged to overlap the plurality of wires and covers a side surface of the substrate.