KR20230009334A - Manufacturing method of multi-layered printed circuit board of deep cavity structure - Google Patents

Abstract

Disclosed are a multi-layered printed circuit board of a deep cavity structure, which is designed to implement a multi-layered cavity through laser drilling without limitation on a material, and a manufacturing method and a semiconductor package thereof. The multi-layered printed circuit board of the deep cavity structure according to the present invention comprises: a first resin layer having a first via hole passing through an edge portion and a through hole passing through a central portion; a first via electrode disposed in the first via hole; a through electrode disposed in the through hole; a second resin layer for covering an upper surface of the first resin layer on which the first via electrode and the through electrode are disposed, and having a second via hole passing through an edge portion; a second via electrode disposed in the second via hole of the second resin layer, and connected to the first via electrode; a third resin layer for covering an upper surface of the second resin layer on which the second via electrode is disposed, and having a third via hole passing through an edge portion; a third via electrode disposed in the third via hole of the third resin layer, and connected to the second via electrode; and a cavity passing through central portions of the second and third resin layers, and removing a partial thickness of the first resin layer to expose the through electrode disposed in the central portion of the first resin layer.

Description

Manufacturing method of multilayer printed circuit board with deep cavity structure

The present invention relates to a multilayer printed circuit board having a deep cavity structure, a method for manufacturing the same, and a semiconductor package thereof, and more particularly, a deep cavity structure designed to realize multilayer cavities through laser drilling without limitation on materials. It relates to a multi-layer printed circuit board, a manufacturing method thereof, and a semiconductor package thereof.

In recent years, with the high performance of electrical and electronic products, the volume of electronic devices is reduced and the weight is reduced to meet the demand for lightness and shortness, and thinning, high density and high mounting of semiconductor packages are emerging as important factors.

Currently, with the increase in memory capacity of computers, laptops and mobile phones, the capacity of chips such as large-capacity RAM (Random Access Memory) and flash memory is increasing, but the trend of miniaturization of packages is prominent. situation.

Accordingly, the size of packages used as core components is being researched and developed in a trend toward miniaturization, and various technologies for mounting a larger number of packages on a substrate of a limited size have been proposed and studied.

As such, since the demand for high functionality and miniaturization of electronic components is rapidly increasing, research on a cavity printed circuit board having a cavity is being actively conducted in order to increase mounting efficiency per unit area of a semiconductor package.

Accordingly, there is a need for research and development on a cavity printed circuit board capable of mounting a plurality of component elements for multi-function and high-function operation despite the limited board size and surface area.

As a related prior literature, there is Korean Patent Publication No. 10-2012-0028010 (published on March 22, 2012), which describes an embedded printed circuit board and a manufacturing method thereof.

An object of the present invention is to provide a multilayer printed circuit board having a deep cavity structure designed to realize multilayer cavities through laser drilling without limitations on materials, a manufacturing method thereof, and a semiconductor package thereof.

In order to achieve the above object, a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention includes a first resin layer having a first via hole passing through an edge portion and a through hole passing through a central portion; a first via electrode disposed in the first via hole and a through electrode disposed in the through hole; a second resin layer covering an upper surface of the first resin layer on which the first via electrode and through electrode are disposed and having a second via hole penetrating an edge portion; a second via electrode disposed in the second via hole of the second resin layer and connected to the first via electrode; a third resin layer covering an upper surface of the second resin layer on which the second via electrode is disposed and having a third via hole penetrating an edge portion; a third via electrode disposed in the third via hole of the third resin layer and connected to the second via electrode; and a cavity penetrating central portions of the second and third resin layers and exposing the through electrode disposed in the central portion of the first resin layer by removing a partial thickness of the first resin layer. to be characterized

A deep cavity structure semiconductor package according to an embodiment of the present invention for achieving the above object includes a multilayer printed circuit board having a tip cavity structure; a metal bump disposed on the through electrode exposed by the cavity; and a semiconductor chip mounted in the cavity of the multilayer printed circuit board via the metal bump.

In order to achieve the above object, a method for manufacturing a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention includes (a) forming a second via hole penetrating the edge portion of a second resin layer having copper foil on both sides ; (b) forming a metal layer with the copper foil as a medium, and then selectively patterning to form a second via electrode disposed in the second via hole and a dummy pattern disposed at a central portion of the lower surface of the second resin layer; ; (c) stacking a first resin layer having a first seed layer and a third resin layer having a second seed layer on both surfaces of the second resin layer on which the second via electrode and the dummy pattern are formed; (d) first via holes and third vias exposing upper and lower portions of the second electrode by removing edges and central portions of the first and second seed layers and the first and third resin layers, respectively; forming holes and through holes; (e) after forming a metal plating layer through the first and second seed layers, selectively patterning the first via electrodes, which are disposed in the first and third via holes, respectively, and connected to the second via electrodes; and forming a third via electrode and a through electrode disposed in the through hole; (f) forming a mask pattern covering the lower surface of the first resin layer and the edge portion of the upper surface of the third resin layer; (g) forming a cavity by sequentially removing the third resin layer and the second resin layer exposed to the outside of the mask pattern by laser drilling; and (h) removing the dummy pattern and the mask pattern exposed by the cavity.

A multilayer printed circuit board having a deep cavity structure and a method of manufacturing the same, and a semiconductor package having a deep cavity structure according to the present invention form a mask pattern during a cavity formation process to form a deep cavity, then form a cavity using laser drilling, and then form a mask pattern and This was solved by wet etching the dummy pattern together.

Accordingly, a multilayer printed circuit board having a deep cavity structure, a manufacturing method thereof, and a semiconductor package according to the present invention form a mask pattern on a resin layer in which a cavity is to be formed, and a plurality of resin layers are collectively formed through laser drilling. It may be possible to implement a pad-free deep cavity in which an electrode pad does not exist in the cavity by removing the mask pattern and the dummy pattern together by wet etching after forming the cavity.

As a result, the multilayer printed circuit board having a deep cavity structure, the manufacturing method thereof, and the semiconductor package according to the present invention can implement cavities for the resin layer of the multilayer structure through laser drilling, and the material for the resin layers In addition, there is no limitation in the design, and there is no electrode pad in the cavity, so the effect of increasing the degree of freedom in the design can be exhibited.

In addition, a multilayer printed circuit board having a deep cavity structure, a method for manufacturing the same, and a semiconductor package according to the present invention are embedded in which several semiconductor chips for multi-function and high-function operation are mounted in a cavity of the multilayer printed circuit board having a deep cavity structure. Therefore, it is possible to meet the demand for high functionality and miniaturization without reducing the thickness.

1 is a cross-sectional view showing a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention.
Figure 2 is an enlarged cross-sectional view of part A of Figure 1;
3 is a cross-sectional view illustrating a deep cavity structure semiconductor package according to an embodiment of the present invention.
4 to 13 are process flow charts illustrating a method of manufacturing a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention.

Advantages and features of the present invention, and methods of achieving them, will become clear with reference to the detailed description of the following embodiments taken in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various forms different from each other, only these embodiments make the disclosure of the present invention complete, and common knowledge in the art to which the present invention pertains. It is provided to completely inform the person who has the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numbers designate like elements throughout the specification.

Hereinafter, a multi-layer printed circuit board having a deep cavity structure according to a preferred embodiment of the present invention, a manufacturing method thereof, and a semiconductor package thereof will be described in detail with reference to the accompanying drawings.

1 is a cross-sectional view showing a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention, and FIG. 2 is an enlarged cross-sectional view of part A of FIG. 1 .

1 and 2, a multilayer printed circuit board 100 having a deep cavity structure according to an embodiment of the present invention includes a first resin layer 110, a first via electrode 112, a through electrode 114, It includes a second resin layer 120 , a second via electrode 122 , a third resin layer 130 , a third via electrode 132 and a cavity C.

The first resin layer 110 may have a plate shape having an upper surface and a lower surface opposite to the upper surface. The first resin layer 110 has a first via hole V1 penetrating the edge portion and a through hole T penetrating the central portion.

At this time, in FIG. 1, the first via hole V1 is disposed at both edge portions of the first resin layer 110, and two through holes T are disposed at the central portion of the first resin layer 110. Although shown, it will be obvious that this is an example and that the number and position can be variously changed.

For the first resin layer 110, one or more materials selected from prepreg, polyimide resin, epoxy resin, resin coated copper (RCC), and photo-image able dielectric (PID) may be used.

The first via electrode 112 is disposed in the first via hole V1 , and the through electrode 114 is disposed in the through hole T. Here, the first via electrode 112 and the through electrode 114 are preferably formed of copper (Cu) having excellent conductivity, but are not necessarily limited thereto, and any metal material having conductivity may be used without limitation.

The first via electrode 112 is disposed inside the first via hole V1 and on the lower surface of the first resin layer 110 . In addition, the through electrode 114 is disposed inside the through hole T and on the lower surface of the first resin layer 110 .

Here, the through electrode 114 is buried inside the through hole T, and a portion disposed on the same line as the upper surface of the first resin layer 110 is exposed to the outside through the cavity C.

The second resin layer 120 covers the upper surface of the first resin layer 110 on which the first via electrode 112 and the through electrode 114 are disposed. The second resin layer 120 has a second via hole V2 passing through an edge portion.

Here, the second resin layer 120, like the first resin layer 110, is made of prepreg, polyimide resin, epoxy resin, RCC (resin coated copper), PID (Photo-Image able Dielectric), etc. Any one or more selected materials may be used.

The second via electrode 122 is disposed in the second via hole V2 of the second resin layer 120 . The second via electrode 122 is disposed inside the second via hole V2 and on the upper and lower surfaces of the second resin layer 120, respectively, and is electrically connected to the first via electrode 112. To this end, it is preferable that the second via hole V2 of the second resin layer 120 is disposed at substantially the same position as the first via hole V1 of the first resin layer 110 .

In this case, the second via electrode 122 is preferably formed of copper (Cu) having excellent conductivity, but is not necessarily limited thereto, and any metal material having conductivity may be used without limitation.

The third resin layer 130 covers the upper surface of the second resin layer 120 on which the second via electrode 122 is disposed. The third resin layer 130 has a third via hole V3 passing through an edge portion.

Here, the third resin layer 130, like the first and second resin layers 110 and 120, is a prepreg, polyimide resin, epoxy resin, RCC (resin coated copper), PID (Photo- Any one or more materials selected from Image able Dielectric) and the like may be used.

The third via electrode 132 is disposed in the third via hole V3 of the third resin layer 130 . The third via electrode 132 is disposed inside the third via hole V3 and on the upper surface of the third resin layer 130 and is electrically connected to the second via electrode 122 . To this end, the third via hole V3 of the third resin layer 130 is substantially at the same position as the first and second via holes V1 and V2 of the first and second resin layers 110 and 120. It is preferable to place

The cavity (C) passes through the central portion of the second and third resin layers 120 and 130, removes a portion of the thickness of the first resin layer 110, and places it in the central portion of the first resin layer 110. The through electrode 114 is exposed.

Accordingly, the central portion of the first resin layer 110 has a first thickness, and the edge portion of the first resin layer 110 has a second thickness thicker than the first thickness.

At this time, an undercut U is further formed on the inner wall exposed by the cavity C to the inside of the second and third resin layers 120 and 130 by removing a portion of the sidewall of the first resin layer 110 . The undercut (U) is formed by removing the dummy pattern disposed on the upper surface of the first resin layer 110 exposed by the cavity (C) together in the process of removing the mask pattern by wet etching.

In addition, the multilayer printed circuit board 100 having a deep cavity structure according to an embodiment of the present invention may further include a first solder mask 140 and a second solder mask 142 .

The first solder mask 140 is formed to cover the lower surface of the first resin layer 110 except for portions of the first via electrode 112 and the through electrode 114 .

The second solder mask 142 is formed to cover the upper surface of the third resin layer 130 except for a portion of the third via electrode 132 .

The first and second solder masks 140 and 142 are one selected from a photo solder resist, a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, and the like. of materials can be used.

Conventional cavity production was carried out by wet etching. When forming a cavity by wet etching, there is no problem in a single-layer structure, but when implementing a multi-layer printed circuit board, there is a limited problem with the material of multiple resin layers. It is also difficult to remove the resin layer at once, making it impossible to manufacture a multilayer printed circuit board.

In contrast, in the multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention, a mask pattern is formed during a cavity formation process to form a deep cavity, and then a cavity is formed using laser drilling, and a mask pattern and a dummy pattern are formed. Together, they were solved by removing them by wet etching.

Accordingly, in the multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention, a mask pattern is formed on a resin layer to form a cavity, and a plurality of resin layers are collectively removed through laser drilling to form a cavity, Then, it may be possible to implement a pad-free deep cavity in which an electrode pad does not exist in the cavity by removing the mask pattern and the dummy pattern together by wet etching.

As a result, in the multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention, it is possible to implement a cavity for a resin layer having a multilayer structure through laser drilling, and there is no limitation on the material for the resin layers. , there is no electrode pad in the cavity, so there is an effect of increasing the degree of freedom in design.

Meanwhile, FIG. 3 is a cross-sectional view illustrating a deep cavity structure semiconductor package according to an embodiment of the present invention.

Referring to FIG. 3 , a deep cavity structure semiconductor package 300 according to an embodiment of the present invention includes a deep cavity multilayer printed circuit board 100 , a metal bump 230 and a semiconductor chip 200 .

The deep cavity multilayer printed circuit board 100 may be substantially the same as that described with reference to FIGS. 1 and 2 .

The metal bump 230 is stacked on the through electrode 114 exposed by the cavity C of the multilayer printed circuit board 100 . A solder ball, a metal stud, or the like may be used as the metal bump 230, but is not limited thereto.

The semiconductor chip 200 is mounted in the cavity C of the multilayer printed circuit board 100 in an embedded form via the metal bump 230 .

As such, the semiconductor chip 200 may be mounted using a flip chip bonding method in which the bonding pads 210 of the semiconductor chip 200 are directly connected to each other through the metal bump 230 . In addition, various methods such as a bonding method using a metal wire and a bonding method using a through via (TVS) may be applied to the semiconductor chip 200 .

Although FIG. 3 shows a structure in which one semiconductor chip 200 is mounted in the cavity C, this is exemplary and two or more semiconductor chips 200 may be mounted in the cavity C.

The semiconductor chip 200 may include a memory semiconductor chip, a driving semiconductor chip, and the like, but is not limited thereto.

In the deep cavity structure semiconductor package according to the embodiment of the present invention described above, since several semiconductor chips for multi-function and high-function operation can be embedded in a cavity of a multi-layer printed circuit board having a deep cavity structure, high functionality and miniaturization can be achieved without reducing the thickness. be able to meet your needs.

Hereinafter, a method of manufacturing a multi-layer printed circuit board having a deep cavity structure according to an embodiment of the present invention will be described with reference to the accompanying drawings.

4 to 13 are process flow charts illustrating a method of manufacturing a multilayer printed circuit board having a deep cavity structure according to an embodiment of the present invention.

As shown in FIG. 4, a second resin layer 120 in which copper foil 10 is laminated on both sides is prepared. Here, as the second resin layer 120, one or more materials selected from prepreg, polyimide resin, epoxy resin, resin coated copper (RCC), and photo-image able dielectric (PID) may be used.

Next, as shown in FIG. 5 , a second via hole V2 penetrating the edge portion of the second resin layer 120 having the copper foil 10 on both sides is formed.

Here, the second via hole V2 may be formed by any one method selected from a laser drilling method, a punching method, an etching method, and the like.

Although the second via holes V2 may be formed at both edges of the second resin layer 120, it is obvious that this is an example and the number and location may be changed in various forms.

As shown in FIG. 6, after forming a metal layer via the copper foil (10 in FIG. 5) disposed on both sides of the second resin layer 120 on which the second via hole V2 is formed, and then selectively patterning the second A second via electrode 122 disposed in the via hole V2 and a dummy pattern 124 disposed in the central portion of the lower surface of the second resin layer 120 are formed.

Here, the second via electrode 122 is disposed inside the second via hole V2 and on the upper and lower surfaces of the second resin layer 120 , respectively. Also, the dummy pattern 124 is disposed on the lower surface of the second resin layer 120 and is formed at a position corresponding to the cavity forming region.

Here, the second via electrode 122 and the dummy pattern 124 are preferably formed of copper (Cu) having excellent conductivity, but are not necessarily limited thereto, and any metal material having conductivity may be used without limitation.

Next, as shown in FIG. 7 , the first resin layer having the first seed layer 20 on both sides of the second resin layer 120 on which the second via electrode 122 and the dummy pattern 124 are formed ( 110) and the third resin layer 130 having the second seed layer 30 are laminated.

Accordingly, the third resin layer 130 and the second seed layer 30 are sequentially stacked on the upper surface of the second resin layer 120, and the first resin layer 110 is formed on the lower surface of the second resin layer 120. and the first seed layer 20 are sequentially stacked.

Here, each of the first and third resin layers 110 and 130, like the second resin layer 120, is a prepreg, polyimide resin, epoxy resin, RCC (resin coated copper), PID (Photo) -Image able Dielectric) and the like may be used.

As shown in FIG. 8 , the first and second seed layers 20 and 30 and the edges and central portions of the first and third resin layers 110 and 130 are removed, respectively, so that the second via electrode 122 A through hole T is formed with a first via hole V1 and a third via hole V3 exposing upper and lower portions, respectively.

At this time, the first via hole V1 is disposed at a position corresponding to the second via hole V2 to expose the lower portion of the second via electrode V2, and the third via hole V3 has the first and second via holes V3. It is disposed at a position corresponding to the via holes V1 and V2 and exposes an upper portion of the second via electrode V2.

In addition, at least one penetration electrode 114 is disposed in the central portion of the first resin layer 110 to expose a portion of the dummy pattern 124 .

Accordingly, portions of both sides of the second via electrode 122 are exposed to the outside by the first and third via holes V1 and V3, and a portion of the dummy pattern 124 is exposed to the outside by the through hole T. exposed as

Here, the first and third via holes V1 and V3 and the through hole T may be formed by any one method selected from a laser drilling method, a punching method, and an etching method.

Next, as shown in FIG. 9 , after forming a metal plating layer through the first and second seed layers ( 20 and 30 in FIG. 8 ), and then selectively patterning the first and third via holes V1 and V3 ) to form the first via electrode 112 and the third via electrode 132 respectively connected to the second via electrode 122, and the through electrode 114 disposed within the through hole T. .

Accordingly, the first and third via electrodes 112 and 132 are disposed in the first and third via holes V1 and V3, respectively, and the through electrode 114 is disposed in the through hole T. Here, the first and third via electrodes 112 and 132 and the through electrode 114 are preferably formed of copper (Cu) having excellent conductivity, but are not necessarily limited thereto, and are limited as long as they are conductive metal materials can be used without

The first via electrode 112 is disposed inside the first via hole V1 and on the lower surface of the first resin layer 110, and is electrically connected to the second via electrode 122, and the third via electrode ( 132 is disposed inside the third via hole V3 and on the upper surface of the third resin layer 130 and is electrically connected to the second via electrode 122 . Accordingly, since the first via electrode 112, the second via electrode 122, and the third via electrode 132 are electrically connected on the same line, the electrical connection path is shortened to efficiently cope with high-speed operation. it may be possible to do

As shown in FIG. 10 , the first solder mask 140 covering the lower surface of the first resin layer 110 excluding parts of the first via electrode 112 and the through electrode 114 and the third via electrode ( A second solder mask 142 covering the upper surface of the third resin layer 130 except for a part of 132) is formed.

At this time, in the present invention, the first and second solder masks 140 and 142 are illustrated as being formed before forming the cavity, but this is exemplary and may be formed after forming the cavity.

Here, the first and second solder masks 140 and 142 are made of a photo solder resist, a liquid photosensitive coverlay, a photo polyimide film, an epoxy resin, or the like. Any one selected material may be used.

Next, as shown in FIG. 11 , a mask pattern covering the lower surface of the first resin layer 110 and the edge portion of the upper surface of the third resin layer 130 on which the first and second solder masks 140 and 142 are formed. (150).

Accordingly, the first and second solder masks 140 and 142, the first to third via electrodes 112, 122 and 132, and the through electrode 114 are protected by the mask pattern 150, and the third number The central portion of the upper surface of the stratum 130 is exposed to the outside.

As shown in FIG. 12 , the third resin layer 130 and the second resin layer 120 exposed to the outside of the mask pattern 150 are sequentially removed by laser drilling to form a cavity C.

As such, in the present invention, the deep cavity (C) is formed by forming the deep cavity (C) by a laser drilling method of locally irradiating a laser after forming the mask pattern 150 during the cavity formation process to form the deep cavity (C). It may become possible to implement deep cavities.

Next, as shown in FIG. 13 , the dummy pattern ( 124 of FIG. 12 ) and the mask pattern ( 150 of FIG. 12 ) exposed by the cavity C are removed.

Here, the dummy pattern and the mask pattern are removed by wet etching. By removing the dummy pattern, an undercut U formed by removing a portion of the sidewall of the first resin layer 110 toward the inside of the second and third resin layers 120 and 130 is formed on the inner wall exposed by the cavity C. is formed That is, the undercut U is formed by removing the dummy pattern disposed on the upper surface of the first resin layer 110 exposed by the cavity C while removing the mask pattern by wet etching.

As a result, the through electrode 114 is buried inside the through hole T, and a portion disposed on the same line as the upper surface of the first resin layer 110 is exposed to the outside through the cavity C.

As described above, in the present invention, after forming a mask pattern on the resin layer to form the cavity (C), and then removing a plurality of resin layers at once through laser drilling to form the cavity (C), the mask pattern and the dummy The pattern is removed together with wet etching to implement a pad-free deep cavity in which no electrode pad exists in the cavity (C).

As a result, in the present invention, it is possible to implement the cavity (C) for multiple resin layers through laser drilling, and the material for the resin layers can be used without limitation, and there is no electrode pad in the cavity (C). It can exert the effect of increasing the degree of freedom in design.

Through the above process, the multilayer printed circuit board 100 having a deep cavity structure according to an embodiment of the present invention can be manufactured.

Although the above has been described based on the embodiments of the present invention, various changes or modifications may be made at the level of a technician having ordinary knowledge in the technical field to which the present invention belongs. Such changes and modifications can be said to belong to the present invention as long as they do not deviate from the scope of the technical idea provided by the present invention. Therefore, the scope of the present invention will be determined by the claims described below.

100: multilayer printed circuit board 110: first resin layer
112: first via electrode 114: through electrode
120: second resin layer 122: second via electrode
130: third resin layer 132: third via electrode
140: first solder mask 142: second solder mask
V1, V2, V3: first, second, third via holes T: through holes
C: Cavity U: Undercut

Claims (2)

(a) forming a second via hole passing through an edge portion of a second resin layer having copper foil on both sides;
(b) forming a metal layer with the copper foil as a medium, and then selectively patterning to form a second via electrode disposed in the second via hole and a dummy pattern disposed at a central portion of the lower surface of the second resin layer; ;
(c) stacking a first resin layer having a first seed layer and a third resin layer having a second seed layer on both surfaces of the second resin layer on which the second via electrode and the dummy pattern are formed;
(d) first via holes and third via holes exposing upper and lower portions of the second via electrode by removing edges and central portions of the first and second seed layers and the first and third resin layers, respectively; forming via holes and through holes;
(e) after forming a metal plating layer through the first and second seed layers, selectively patterning the first via electrodes, which are disposed in the first and third via holes, respectively, and connected to the second via electrodes; and a first solder mask covering a lower surface of the first resin layer excluding a portion of the first via electrode and a portion of the through electrode after forming the third via electrode and the through electrode disposed in the through hole, and the third via electrode. forming a second solder mask covering an upper surface of the third resin layer except for a part of the;
(f) forming a mask pattern covering the lower surface of the first resin layer and the edge portion of the upper surface of the third resin layer on which the first and second solder masks are formed;
(g) forming a cavity by sequentially removing the third resin layer and the second resin layer exposed to the outside of the mask pattern by laser drilling; and
(h) removing the dummy pattern and the mask pattern exposed by the cavity;
The through-electrode is disposed inside the through-hole and on the lower surface of the first resin layer, the through-electrode is buried inside the through-hole, and a portion disposed on the same line with the upper surface of the first resin layer is externally blocked by the cavity. exposed as
An undercut from which a portion of the sidewall of the first resin layer is removed is further formed on the inner wall exposed by the cavity to the inside of the second and third resin layers,
The central portion of the first resin layer has a first thickness, and the edge portion of the first resin layer has a second thickness thicker than the first thickness,
A value obtained by subtracting the first thickness from the second thickness has a value equal to a thickness protruding from the lower surface of the second resin layer toward the lower surface of the first resin layer among the total thickness of the second via electrode,
In the step (h), the dummy pattern and the mask pattern are removed by wet etching, so that a value obtained by subtracting the first thickness from the second thickness has the same thickness as the dummy pattern;
In the step (g), the cavity is formed to pass through the central portion of the second and third resin layers by sequentially removing the third resin layer and the second resin layer of the multi-layer structure through laser drilling,
In the step (h), the undercut is formed by removing a part of the thickness of the first resin layer by removing the dummy pattern and the mask pattern exposed by the cavity together by wet etching Of the deep cavity structure, characterized in that Method for manufacturing a multi-layer printed circuit board.
According to claim 1,
In step (d),
The first via hole is disposed at a position corresponding to the second via hole to expose a lower portion of the second via electrode;
The third via hole is disposed at a position corresponding to the first and second via holes to expose an upper portion of the second via electrode;
The method of manufacturing a multilayer printed circuit board having a deep cavity structure, characterized in that at least one through hole is disposed in a central portion of the first resin layer to expose a portion of the dummy pattern.

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