KR20220147888A - Multilayer ceramic capacitor manufacturing method - Google Patents

Abstract

The present invention relates to a method for manufacturing a multilayer ceramic capacitor. The method for manufacturing a multilayer ceramic capacitor comprises the steps of: forming a plurality of dielectric layers; forming internal electrode layers by applying an internal electrode paste to one surface of each of the plurality of dielectric layers; forming a green chip by stacking and compressing the plurality of dielectric layers so that the internal electrode layers cross each other; forming a fired chip by firing the green chip; and forming an external electrode at one end of one side or the other side of the fired chip to be connected to each of the internal electrode layers. The internal electrode paste is formed using metal powder, a ceramic co-material, an organic solvent, a binder and a dispersant, and the ceramic co-material is formed by using a material containing plate-shaped graphene or plate-shaped graphene oxide. Accordingly, a multilayer ceramic capacitor having a higher capacitance in the same volume can be manufactured.

Description

Multilayer ceramic capacitor manufacturing method

The present invention relates to a method for manufacturing a multilayer ceramic capacitor, and in particular, plate-like graphene or plate-like graphene oxide by using a ceramic material containing plate-like graphene or plate-shaped graphene oxide as a ceramic material included in an internal electrode paste used for manufacturing an internal electrode layer. The present invention relates to a method for manufacturing a multilayer ceramic capacitor capable of preventing a short circuit by forming an internal electrode layer flat by preventing metal powder from protruding due to mechanical strength of a pin.

For multilayer ceramic capacitors, a technology of making a dielectric layer and an internal electrode layer thin, respectively, and then stacking them in multiple layers is being developed for miniaturization and high capacity. In multilayer ceramic capacitors, when the dielectric layer and the internal electrode layer are each manufactured as thin layers and stacked in multiple layers, delamination or cracks easily occur due to reasons such as an increase in the interface between the dielectric layer and the internal electrode layer. As a result, a short defect may occur.

A technique for preventing short-circuit due to delamination or crack generation due to miniaturization and high-capacity multilayer ceramic capacitors is disclosed in Korean Patent No. 10-0800220 (Patent Document 1). Patent Document 1 relates to a method of manufacturing a multilayer ceramic electronic component, wherein a conductive paste for forming an internal electrode layer includes a first common material and a second common material. The first common material is composed of at least conductive particles and ceramic powder, and the average particle diameter of the first common material is 1/20 to 1/2 that of the average particle diameter of the conductive particles. The second common material is composed of ceramic powder and has a larger average particle diameter than the first common material, and the average particle diameter of the second common material is 1/10 to 1/2 of the average thickness of the internal electrode layer after firing. use.

The internal electrode layer of the conventional multilayer ceramic capacitor as in Patent Document 1 is larger than the average particle diameter of the first common material and manufactured using a second common material having a size of 1/10 to 1/2 of the average thickness of the internal electrode layer. The common material, that is, the ceramic powder protrudes and increases the bonding strength between the internal electrode layer and the dielectric layer due to the anchor effect, thereby effectively preventing the occurrence of cracks (especially, the occurrence of cracks due to delamination). When the dielectric layer is formed to protrude, the internal electrode layer cannot be formed flat, and the conductive particles, that is, metal particles, may be formed to protrude into the dielectric layer due to the protruding ceramic powder. There are possible problems.

Patent Document 1: Korean Patent Publication No. 10-0800220

An object of the present invention is to solve the above-mentioned problems, by using a ceramic material included in the internal electrode paste used for manufacturing the internal electrode layer containing plate-shaped graphene or plate-shaped graphene oxide plate-shaped graphene or plate-shaped oxide An object of the present invention is to provide a method for manufacturing a multilayer ceramic capacitor capable of preventing a short circuit by forming an internal electrode layer flat by preventing metal powder from protruding due to the mechanical strength of graphene.

Another object of the present invention is to use a ceramic material included in the internal electrode paste containing plate-shaped graphene or plate-shaped graphene oxide, so that metal powder, etc. is printed to protrude due to the mechanical strength of plate-shaped graphene or plate-shaped graphene oxide. The product reliability of the multilayer ceramic capacitor can be improved by preventing the occurrence of short circuit by forming the internal electrode layer flat by preventing An object of the present invention is to provide a method for manufacturing a multilayer ceramic capacitor capable of manufacturing a multilayer ceramic capacitor having a capacity.

The method for manufacturing a multilayer ceramic capacitor according to the present invention includes the steps of forming a plurality of dielectric layers, forming internal electrode layers by applying internal electrode paste to one surface of each of the plurality of dielectric layers, and forming a plurality of dielectric layers such that the internal electrode layers cross each other. forming a green chip by stacking and pressing the green chips, firing the green chip to form a fired chip, and forming an external electrode at one or the other end of the fired chip to be connected to the internal electrode layer, respectively. wherein the internal electrode paste is formed using metal powder, ceramic material, organic solvent, binder, and dispersant, and the ceramic material is formed using a ceramic material including plate-shaped graphene or plate-shaped graphene oxide. do.

The method for manufacturing a multilayer ceramic capacitor of the present invention uses a ceramic material containing plate-shaped graphene or plate-shaped graphene oxide as a ceramic material included in an internal electrode paste used for manufacturing an internal electrode layer, thereby producing mechanical properties of plate-shaped graphene or plate-shaped graphene oxide. There is an advantage in that it is possible to prevent short circuit by forming the internal electrode layer flat by preventing metal powder from protruding due to strength, and there is an advantage in that it is possible to improve the product reliability of the multilayer ceramic capacitor, and the dielectric layer or the There is an advantage in that the multilayer ceramic capacitor having a higher capacity in the same volume can be manufactured by increasing the number of stacked layers by making the internal electrode layer thin.

1 is a process flow diagram of a method for manufacturing a multilayer ceramic capacitor according to the present invention;
2 is a perspective view of an internal electrode layer manufactured by the method for manufacturing a multilayer ceramic capacitor shown in FIG. 1;
3 is a cross-sectional view of a green chip manufactured by the method for manufacturing a multilayer ceramic capacitor shown in FIG. 1;
FIG. 4 is a cross-sectional view of a fired chip having external electrodes manufactured by the method of manufacturing a multilayer ceramic capacitor shown in FIG. 1;

Hereinafter, an embodiment of a method for manufacturing a multilayer ceramic capacitor of the present invention will be described with reference to the accompanying drawings.

1 and 2 , in the method of manufacturing a multilayer ceramic capacitor according to the present invention, first, a step ( S110 ) of forming a plurality of dielectric layers 111 is performed. When the plurality of dielectric layers 111 are formed, the step of forming the internal electrode layers 112 by applying an internal electrode paste to one surface of the plurality of dielectric layers 111, respectively (S120) is performed. Here, the internal electrode paste is formed using a metal powder, a ceramic common material, an organic solvent, a binder, and a dispersing agent, and the ceramic common material is formed using a ceramic common material included in the plate-shaped graphene 112a or the plate-shaped graphene oxide 112b. . When the internal electrode layer 112 is formed, a step (S130) of forming a green chip 110a (shown in FIG. 3) by stacking and pressing a plurality of dielectric layers 111 so that the internal electrode layers 112 cross each other is performed. When the green chip 110a is formed, the green chip 110a is fired to form the fired chip 110 (shown in FIG. 4 ) ( S140 ). When the fired chip 110 is formed, the step of forming external electrodes 113 and 114 to be connected to the internal electrode layer 112 at one or the other end of the fired chip 110, respectively (S150) is performed.

A specific embodiment of the method for manufacturing a multilayer ceramic capacitor of the present invention will be described as follows.

In order to manufacture the multilayer ceramic capacitor, first, as shown in FIGS. 1 and 2 , a step ( S110 ) of forming a plurality of dielectric layers 111 , which are green sheets, is performed. The plurality of dielectric layers 111 are each slurried by adding a dielectric powder having an average particle diameter (D ₅₀ ) of 80 to 150 nm and PVB (Polyvinyl Butyral) used as an organic binder, and then using a doctor blade method to obtain a thickness (T1) is formed to be 0.5 to 1.0 μm, the dielectric powder is formed by mixing calcined powder and rare earth glass frit, and the calcined powder is mixed with BaTiO ₃ powder and additive powder and pulverized at 600 to 1200° C. Formed by calcination in MgO, Mn ₃ O ₄ , Cr ₂ O ₃ , Al ₂ O ₃ , CaCO ₃ , ZrO ₂ , Y ₂ O ₃ , Dy ₂ O ₃ and at least seven of Yb ₂ O ₃ is selected and mixed, rare-earth glass frit is formed by adding rare-earth oxide to the glass frit, BaO, CaO, and SiO ₂ are used for the glass frit, and the rare-earth oxide is Y ₂ O ₃ , Dy ₂ O ₃ and Yb ₂ O Two or more of the _three are selected and mixed.

When the plurality of dielectric layers 111 are formed, the step of forming the internal electrode layers 112 by applying internal electrode paste to one surface of the plurality of dielectric layers 111, respectively, as shown in FIGS. 1 and 2 (S120) is performed. As described above, the internal electrode layer 112 is formed to have a thickness T2 of 0.5 to 1.2 μm by printing the internal electrode paste on one surface of the dielectric layer 111 by a screen printing method.

The internal electrode paste uses a metal powder, a ceramic material, an organic solvent, a binder and a dispersant, and the internal electrode paste has a viscosity of 5,000 to 10,000 cps (centi poise) so that the plate-shaped graphene 112a or the plate-shaped graphene oxide 112b is evenly spread. ), and the ceramic common material is formed using a ceramic common material included in the plate-shaped graphene 112a or the plate-shaped graphene oxide 112b. More specifically, the internal electrode paste includes a metal powder and a ceramic material. The metal powder included in the internal electrode paste has an average particle diameter (D ₅₀ ) of 100 to 200 nm, and the ceramic material includes at least one of BaTiO ₃ and plate-shaped graphene 112a and plate-shaped graphene oxide 112b. , BaTiO ₃ An average particle diameter (D ₅₀ ) of 30 to 100 nm is used.

The internal electrode paste for forming the internal electrode layer 112 is more specifically formed by mixing 40 to 52 wt% of a metal powder, 10 to 15 wt% of a ceramic material, and 38 to 45 wt% of a paste manufacturing additive, and the material of the metal powder Silver Ni is used. The paste manufacturing additive is an additive material for making metal powder and ceramic materials into a paste state, and an organic solvent, a binder, and a dispersant are used. and 1 to 4% by weight of a dispersant. The organic solvent is terpineol, the binder is ethyl cellulose, and the dispersant is glycerol-alpha-monooleate or nonylphenol ethoxylate phosphate. ethoxylate phosphate ester) is used.

The ceramic material is formed by mixing BaTiO ₃ , BaCO ₃ , MgO, SiO ₂ , La ₂ O ₂ , Dy ₂ O ₂ plate-shaped graphene 112a and plate-shaped graphene oxide 112b. Specific examples of the ceramic material include BaTiO ₃ 93.45 to 99.97% by weight, BaCO ₃ 0 to 1.5% by weight, MgO 0 to 1% by weight, La ₂ O ₂ 0 to 1.3% by weight, Dy ₂ O ₂ 0 to 1.0% by weight, It is formed by mixing 0.03 to 0.75 wt% of plate-shaped graphene and 0 to 1.0 wt% of plate-shaped graphene oxide. Here, the plate-shaped graphene 112a and the plate-shaped graphene oxide 112b are each used as a single layer.

When the internal electrode layer 112 is formed, as shown in FIGS. 1 and 3, a plurality of dielectric layers 111 are stacked so that the internal electrode layers 112 are crossed with each other and pressed to form a green chip 110a (shown in FIG. 3). Step S130 is performed. That is, the green chip 110a is formed by stacking a plurality of dielectric layers 111 on which the internal electrode layers 112 are formed so that the internal electrode layers 112 cross each other as shown in FIG. 3 , and then using a press (not shown), etc. It is formed by compression at 1300kgf/cm2.

When the green chip 110a is formed, as in FIGS. 1 and 4 , the green chip 110a is fired to form the fired chip 110 (shown in FIG. 4 ) ( S140 ). The fired chips 110 are prepared by degreasing the green chips 110a at 200 to 800° C. to remove the binder, and after firing the binder-degreased green chips 110a at 1260 to 1360° C. in a reducing atmosphere, 800 to 1000° C. It is formed by oxidation treatment with

When the fired chip 110 is formed, as shown in FIGS. 1 and 4 , forming external electrodes 113 and 114 to be connected to the internal electrode layer 112 at one or the other end of the fired chip 110, respectively (S150). carry out The external electrodes 113 and 114 are formed at one end or the other end of the fired chip 110 to be connected to the internal electrode layer 112 , respectively, and then are formed by heat treatment at 600 to 700°C. The external electrodes 113 and 114 are respectively formed to surround the ends of one side or the other side of the fired chip 110 as shown in FIG. 4 , and the material is formed by selecting one or more of Ni, Cu, Al, and Cr.

Examples 1 to 35 and Comparative Examples 1 to 4 shown in Tables 1 and 2 were used to check the electrical characteristics or the short-circuit occurrence rate of the multilayer ceramic capacitor manufactured by the method of manufacturing the multilayer ceramic capacitor of the present invention. A multilayer ceramic capacitor was manufactured using an internal electrode paste and a ceramic material.

Internal electrode paste composition ratio Metal powder (% by weight) Ceramic material (wt%) Paste Making Additives (wt%) Example 1 40 15 45 Example 2 40 15 45 Example 3 40 15 45 Example 4 40 15 45 Example 5 40 15 45 Example 6 40 15 45 Example 7 40 15 45 Example 8 40 15 45 Example 9 40 15 45 Example 10 40 15 45 Example 11 40 15 45 Example 12 40 15 45 Example 13 45 10 45 Example 14 45 12 43 Example 15 45 12 43 Example 16 45 10 45 Example 17 45 12 43 Example 18 45 15 40 Example 19 45 10 45 Example 20 45 12 43 Example 21 50 10 40 Example 22 50 12 Example 23 50 10 40 Example 24 50 10 40 Example 25 50 12 Example 26 50 10 40 Example 27 50 10 40 Example 28 50 10 40 Example 29 50 10 40 Example 30 52 10 Example 31 52 10 Example 32 52 10 Example 33 52 10 Example 34 52 10 Example 35 52 10 Comparative Example 1 40 15 45 Comparative Example 2 45 12 43 Comparative Example 3 50 10 40 Comparative Example 4 52 10

Composition ratio of ceramic materials BaTiO ₃ (wt%) BaCO ₃ (wt%) MgO (wt%) La ₂ O ₂ (wt%) Dy ₂ O ₃ (wt%) Plate-like graphene (wt%) Plate graphene oxide (wt%) Example 1 99.97 0 0 0 0 0.03 0 Example 2 99.94 0 0 0 0 0.03 0.03 Example 3 99 0.1 0.3 0 0.5 0.05 0.05 Example 4 0.5 0.85 0.5 0 0.1 0.05 Example 5 97.75 0.5 0.5 0 0.5 0 0.75 Example 6 97.5 0 One 0.5 0.5 0.2 0.3 Example 7 96.9 0.5 0.6 0.5 0.5 0.5 0.5 Example 8 97 0.7 0.6 0.3 One 0.1 0.3 Example 9 96.25 One 0.5 0.5 0.5 0.75 0.5 Example 10 96.25 0.7 0.7 One 0.75 0.1 0.5 Example 11 93.45 1.5 One 1.3 One 0.75 One Example 12 96 1.5 0.4 One One 0.05 0.05 Example 13 99.97 0 0 0 0 0.03 0 Example 14 99.95 0 0 0 0 0.05 0 Example 15 99 0.1 0.3 0 0.5 0.05 0.05 Example 16 0.5 0.5 0 0.5 0 0.5 Example 19 97 0.7 0.6 0.15 One 0.25 0.3 Example 20 97.1 One 0.5 0.5 0.5 0.15 0.25 Example 21 96.5 0.7 0.7 One 0.75 0.1 0.25 Example 22 95.15 1.5 One One One 0.15 0.2 Example 23 99.94 0 0 0 0 0.03 0.03 Example 24 99.7 0 0 0 0 0.05 0.25 Example 25 99 0.1 0.3 0 0.5 0.05 0.05 Example 26 98.65 0 0.5 0.5 0 0.1 0.25 Example 27 98.1 0.5 0.25 0 0.5 0.15 0.5 Example 28 97.45 0 0.5 0.25 0.5 0.3 One Example 29 97.1 0.5 0.6 0.5 0.5 0.05 0.75 Example 31 97 One 0.5 0.5 0.5 0.025 0.25 Example 33 96 1.5 0 1.3 One 0.1 0.1 Example 34 99.94 0 0 0 0 0.03 0.03 Example 35 99.7 0 0 0 0 0.05 0.25 Example 36 99 0.1 0.3 0 0.5 0.05 0.05 Example 37 98.65 0 0.5 0.5 0 0.1 0.25 Example 38 98.1 0.5 0.25 0 0.5 0.15 0.5 Example 39 96.65 0.5 0.6 0.5 0.5 0.5 0.75 Comparative Example 1 100 0 0 0 0 0 0 Comparative Example 2 100 0 0 0 0 0 0 Comparative Example 3 100 0 0 0 0 0 0 Comparative Example 4 100 0 0 0 0 0 0

In the method of manufacturing a multilayer ceramic capacitor using the internal electrode pastes according to Examples 1 to 17 and Comparative Examples 1 and 2 described in Tables 1 and 2, first, a plurality of dielectric layers 111 serving as green sheets were prepared. . Each of the plurality of dielectric layers 111 is slurried by adding a dielectric powder having an average particle diameter (D ₅₀ ) of 80 nm and PVB (Polyvinyl Butyral) used as an organic binder, and then using a doctor blade method to have a thickness (T1) of 0.5 It was formed to be ㎛. Dielectric powder was formed by mixing calcined powder and rare-earth glass frit, and calcined powder was formed by mixing BaTiO ₃ powder and additive powder, pulverizing, and calcining at 600 ° C. The additive powder was MgO, Mn ₃ O ₄ , Cr ₂ O ₃ , CaCO ₃ , Y ₂ O ₃ , Dy ₂ O ₃ and Yb ₂ O ₃ were mixed. The rare earth glass frit was formed by adding a rare earth oxide to the glass frit. BaO, CaO and SiO ₂ were used as the glass frit, and Y ₂ O ₃ and Dy ₂ O ₃ were used as the rare earth oxide.

After forming the plurality of dielectric layers 111, internal electrode paste was printed on one surface, ie, the upper surface, of the dielectric layer 111 by a screen printing method to form the internal electrode layer 112 so that the thickness T2 was 0.5 μm. The internal electrode paste was formed using metal powder, ceramic materials, and paste manufacturing additives, and the plate-like graphene (112a) or plate-like graphene oxide (112b) was evenly spread and the viscosity was 5,000 cps. and an average particle diameter (D ₅₀ ) of 100 nm was used. As the paste preparation additive, an organic solvent, a binder and a dispersing agent were mixed, the organic solvent was terpineol, the binder was ethyl cellulose, and the dispersant was glycerol monooleic acid (glycerol). -alpha-monooleate) was used. The ceramic material was formed by mixing BaTiO ₃ , BaCO ₃ , MgO, La ₂ O ₂ , Dy ₂ O ₂ , plate-shaped graphene 112a and plate-shaped graphene oxide 112b, and plate-shaped graphene 112a and plate-shaped oxide. Graphene 112b was used as a single layer, respectively, and BaTiO ₃ had an average particle diameter (D ₅₀ ) of 30 nm. Here, the plate-shaped graphene 112a and the plate-shaped graphene oxide 112b are each dispersed in a state evenly spread in the internal electrode paste by a dispersant so that the plate shape is maintained in a 3-roll mill or a basket mill. ) to disperse.

After the internal electrode layer 112 is formed, a plurality of dielectric layers 111 are stacked so that the internal electrode layers 112 are crossed with each other, and compressed at 800 kgf/cm 2 using a press (not shown) to form a green chip 110a (shown in FIG. 3 ). ) was formed, and 800 dielectric layers 111 having internal electrode layers 112 formed on the upper surface were stacked. After the green chips 110a are formed, the binder is removed by degreasing at 200° C., and the green chips 110a from which the binder has been degreased are fired in a reducing atmosphere at 1260° C. and then oxidized at 800° C. to obtain the fired chips 110. formed. After the firing chip 110 was formed, external electrodes 113 and 114 were formed using a dipping method. The external electrodes 113 and 114 are connected to the internal electrode layer 112 and are formed by selecting and forming Cu to surround the ends of one side and the other side of the fired chip 110, and then heat-treating it at 600° C. to manufacture a multilayer ceramic capacitor.

The multilayer ceramic capacitors according to Examples 1 to 17 and Comparative Examples 1 and 2 were manufactured in the same manner as described above, except that the composition ratio of the internal electrode paste and the composition ratio of the internal electrode paste as shown in Tables 1 and 2 were There is a difference in the composition ratio of ceramic materials.

The internal electrode paste according to Example 1 was formed by mixing 40 wt% of a metal powder, 15 wt% of a ceramic material, and 45 wt% of a paste preparation additive as shown in Table 1, and the paste preparation additive contained 92 wt% of an organic solvent, and a binder 4% by weight and 4% by weight of the dispersant were mixed and used. As shown in Table 2, the ceramic material according to Example 1 was formed by mixing 99.97 wt% of BaTiO ₃ and 0.03 wt% of plate-shaped graphene. The internal electrode paste according to Example 2 was formed by mixing 40 wt% of a metal powder, 15 wt% of a ceramic additive, and 45 wt% of a paste preparation additive as shown in Table 1, and the paste preparation additive was an organic solvent 92 wt%, a binder 4% by weight and 4% by weight of the dispersant were mixed and used. As shown in Table 2, the ceramic material according to Example 1 was formed by mixing 99.97 wt% of BaTiO ₃ , 0.03 wt% of graphene plate, and 0.03 wt% of graphene oxide plate. As described above, the internal electrode pastes according to Examples 3 to 17, Comparative Example 1 and Comparative Example 2 were mixed and formed as in Table 1 and Table 2 as in Example 1 and Example 2, respectively, and then using the same. An internal electrode layer 112 was formed.

In the method of manufacturing a multilayer ceramic capacitor using the internal electrode pastes according to Examples 18 to 35, Comparative Examples 3 and 4 described in Tables 1 and 2, each of the plurality of dielectric layers 111 has an average particle diameter (D ₅₀ ). ) of 150 nm was slurried by adding PVB used as an organic binder, and then formed to have a thickness (T1) of 1.0 μm using a doctor blade method. The dielectric powder was mixed with calcined powder and rare earth glass frit. was formed. The calcined powder was formed by mixing and pulverizing BaTiO ₃ powder and additive powder and calcining at 1200° C. The additive powder was MgO, Mn ₃ O ₄ , Cr ₂ O ₃ , Al ₂ O ₃ , CaCO ₃ , ZrO ₂ , Y ₂ O ₃ , Dy ₂ O ₃ and Yb ₂ O ₃ were used, the rare earth glass frit was formed by adding rare earth oxide to the glass frit, BaO, CaO and SiO ₂ were used for the glass frit, and the rare earth oxide was Y ₂ O ₃ , Dy ₂ O ₃ and Yb ₂ O ₃ were used.

After the plurality of dielectric layers 111 were formed, internal electrode paste was printed on one surface, that is, the upper surface of the dielectric layer 111 by a screen printing method to form the internal electrode layer 112 so that the thickness T2 was 1.2 μm. The internal electrode paste was formed using metal powder, ceramic materials and paste manufacturing additives, and the viscosity of the plate-shaped graphene 112a or the plate-shaped graphene oxide 112b was uniformly spread to 10,000 cps, and the metal powder was made of Ni material. and an average particle diameter (D ₅₀ ) of 200 nm was used. As the paste preparation additive, an organic solvent, a binder and a dispersant were mixed, the organic solvent was terpineol, the binder was ethyl cellulose, and the dispersant was monooleic acid (glycerol-alpha). -monooleate) and nonylphenol ethoxylate phosphate ester were mixed and used. The ceramic material was formed by mixing BaTiO ₃ , BaCO ₃ , MgO, La ₂ O ₂ , Dy ₂ O ₂ , plate-shaped graphene 112a and plate-shaped graphene oxide 112b, and plate-shaped graphene 112a and plate-shaped oxide. Graphene 112b was used as a single layer, respectively, and BaTiO ₃ had an average particle diameter (D ₅₀ ) of 30 nm. Here, the plate-shaped graphene 112a and the plate-shaped graphene oxide 112b are each dispersed in a state evenly spread in the internal electrode paste by a dispersant so that the plate shape is maintained in a 3-roll mill or a basket mill. ) to disperse.

After the internal electrode layer 112 is formed, a plurality of dielectric layers 111 are stacked so that the internal electrode layers 112 are crossed with each other, and the green chip 110a is shown in FIG. ) was formed, and 600 dielectric layers 111 having internal electrode layers 112 formed on the upper surface were stacked. After the green chip 110a is formed, the binder is removed by degreasing at 800° C., and the green chip 110a from which the binder is degreased is fired in a reducing atmosphere at 1360° C. and then oxidized at 1000° C. to obtain the fired chip 110. formed. After the firing chip 110 was formed, external electrodes 113 and 114 were formed using a dipping method. The external electrodes 113 and 114 are connected to the internal electrode layer 112 and are formed into multi-layers by sequentially dipping using a material of Ni, Cu, Al and Cr so as to surround the ends of one side and the other side of the fired chip 110, and then at 700°C. It was formed by heat treatment to manufacture a multilayer ceramic capacitor.

The multilayer ceramic capacitors according to Examples 18 to 35, Comparative Examples 3 and 4 were prepared in the same manner as described above, except that the composition ratio of the internal electrode paste and the composition ratio of the internal electrode paste as shown in Tables 1 and 2 were There is a difference in the composition ratio of ceramic materials.

The internal electrode paste according to Example 18 was formed by mixing 445 wt% of a metal powder, 15 wt% of a ceramic material, and 40 wt% of a paste preparation additive as shown in Table 1, and the paste preparation additive contained 98 wt% of an organic solvent, and a binder 1% by weight and 1% by weight of the dispersant were mixed and used. As shown in Table 2, the ceramic material according to Example 18 was BaTiO ₃ 97.10 wt%, BaCO ₃ 0.5 wt%, MgO 0.5 wt%, La ₂ O ₂ 0.5 wt%, Dy ₂ O ₂ 0.5 wt%, plate-shaped graphene It was formed by mixing 0.15 weight% and 0.25 weight% of plate-shaped graphene oxide. The internal electrode paste according to Example 19 was formed by mixing 45 wt% of a metal powder, 10 wt% of a ceramic material, and 45 wt% of a paste preparation additive as shown in Table 1, and the paste preparation additive contained 98 wt% of an organic solvent, and a binder 1% by weight and 1% by weight of the dispersant were mixed and used. As shown in Table 2, the ceramic material according to Example 19 was BaTiO ₃ 96.50 wt%, BaCO ₃ 0.7 wt%, MgO 0.7 wt%, La ₂ O ₂ 1.0 wt%, Dy ₂ O ₂ 0.75 wt%, plate-shaped graphene It was formed by mixing 0.10 weight% and 0.25 weight% of plate-shaped graphene oxide. As described above, the internal electrode pastes according to Examples 20 to 35, Comparative Examples 3 and 4 were mixed and formed as in Table 1 and Table 2 as in Example 1 and Example 2, respectively, and then using the same. An internal electrode layer 112 was formed.

The plate-shaped graphene 112a and the plate-shaped graphene oxide 112b included in the manufacture of the multilayer ceramic capacitor using the internal electrode pastes according to Examples 1 to 35 are evenly spread in the internal electrode paste by the dispersant, respectively. In the internal electrode layer 112 printed on the upper surface of the dielectric layer 111 as shown in FIG. 2 by dispersing it using a 3-roll mill or a basket mill so that the plate shape is maintained and dispersed in a sheet shape within It is printed in an unfolded state, which prevents the metal powder from protruding due to the mechanical strength of the plate-shaped graphene 112a or the plate-shaped graphene oxide 112b after lamination as shown in FIGS. 3 and 4 . By keeping the internal electrode layer 112 flat even after compression and firing, it is possible to prevent a short from occurring due to protrusion of metal powder or BaTiO ₃ having a large average particle diameter.

In this way, multilayer ceramic capacitors were manufactured using the internal electrode pastes according to Examples 1 to 35 and Comparative Examples 1 to 4, and according to the prepared Examples 1 to 35 and Comparative Examples 1 to 4, The electrical characteristics of the multilayer ceramic capacitor were examined, and the results are shown in Table 3.

capacitance
[㎌] dielectric loss
[%] Withstand voltage [V/㎛] Insulation Resistance
[MΩ] short rate
(%) Example 1 8.9 5.04 91 280 2.9 Example 2 9 5.05 94 310 2.9 Example 3 9 7.8 223 4.2 Example 4 9.2 5.34 102 278 1.9 Example 5 9.4 7.2 89 168 1.86 Example 6 9.4 5.34 1.85 Example 7 9.4 5.8 78 157.3 4.5 Example 8 9.6 5.34 105 310 Example 9 9.6 7.6 78 145.2 5.8 Example 10 9.4 5.26 96 268 1.2 Example 11 9.3 8.07 228 4.1 Example 12 9.2 8.1 218 5.1 Example 13 9.2 5.82 267 5 Example 14 9.5 5.05 106 321 2.76 Example 15 9.7 5.6 104 298 1.98 Example 16 9.4 5.61 104 298 1.12 Example 17 9.6 5.32 102 301 0.98 Example 18 9.2 8.12 99 238 2.4 Example 19 9.75 5.33 105 289 1.04 Example 20 9.7 5.67 105 299 1.02 Example 21 9.5 5.45 89 245 0.35 Example 22 9.6 5.78 91 0.32 Example 23 9.7 5.34 280 0.43 Example 24 9.7 5.56 105 312 0.01 Example 25 9.8 5.63 256 0.04 Example 26 9.8 8.04 89 5.89 Example 27 10.1 7.04 87 105 5.22 Example 28 10.2 5.12 234 0.12 Example 29 10 5.22 281 0.06 Example 30 9.8 5.54 108 302 0.21 Example 31 9.9 5.5 301 0.11 Example 32 10.2 5.35 99 286 0.1 Example 33 10.4 5.67 92 244 0.09 Example 34 10.5 5.66 90 240 3.3 Example 35 10.2 6.03 82 5.22 Comparative Example 1 8.7 5.6 86 8.3 Comparative Example 2 9.2 5.93 89 238 8.1 Comparative Example 3 9.5 5.89 238 9.1 Comparative Example 4 9.9 5.18 231 6.5

As shown in Table 3, 100 multilayer ceramic capacitors manufactured by using the internal electrode pastes according to Examples 1 to 35 and Comparative Examples 1 to 4 were prepared for each Example or Comparative Example, so that capacitance, dielectric loss, Discharge resistance, insulation resistance, and short-circuit rate were tested, and in particular, the short-circuit rate was tested by manufacturing 10,000 pieces per Example or Comparative Example in order to improve the reliability of test evaluation.

Capacitance and dielectric loss were measured using a capacitance measuring instrument (3504-50C HiTester, HIOKI), and capacitance and dielectric loss were measured at 1 kHz, voltage 0.5 Vrms, and 25°C. The withstand voltage was applied at 25°C at a rate of 5V/min, and when the leakage current was 100mA using a general withstand voltage measuring device, the breakdown voltage and withstand voltage were measured. ) was used, and a DC voltage of 10 to 50 V was applied at 25° C. for 60 seconds. As for the short-circuit rate, 10,000 pieces were manufactured per Example or Comparative Example, and those with a short-circuit rate of 100 kΩ or less were judged to have occurred using a resistance measuring device.

As shown in Table 3, the multilayer ceramic capacitors manufactured using the internal electrode pastes according to Examples 1 to 35 had a capacitance of 8.9 to 10.5 [㎌] and a dielectric loss of 5.04 to 8.12 [%]. . The multilayer ceramic capacitors manufactured using the internal electrode pastes according to Examples 1 to 35 had a withstand voltage of 78 to 108 [V/㎛], and an insulation resistance of 89 to 321 [㏁]. In particular, the short-circuit rate of the multilayer ceramic capacitors manufactured by using the internal electrode pastes according to Examples 1 to 35 was measured to be 0.01 to 5.89 [%], which was in a plate shape on the internal electrode paste as in Examples 24 and 25. It was found that when both the graphene 112a and the graphene oxide plate 112b are included, the short-circuit rate, that is, the short-circuit occurrence rate is small.

As shown in Table 3, the multilayer ceramic capacitors manufactured using the internal electrode pastes according to Comparative Examples 1 to 4 had capacitances of 8.7 to 9.9 [㎌] and dielectric losses of 5.18 to 5.60 [%]. , the withstand voltage was measured to be 86 to 98 [V/㎛], and the insulation resistance was measured to be 231 to 250 [㏁]. On the other hand, the short-circuit ratio of the multilayer ceramic capacitors manufactured using the internal electrode pastes according to Comparative Examples 1 to 4 was measured to be 6.50 to 8.30 [%], which is a plate-shaped graphene 112a or plate-shaped oxide in the internal electrode paste. Since the graphene 112b is not included, a planarization coating defect may occur when the internal electrode layer 112 is formed to be thin. In this way, the flattening coating of the internal electrode layer 112 is poor, after forming the dielectric layer 111 and the internal electrode layer 112 in a thin shape, stacking them, and pressing and firing metal powder such as Ni included in the internal electrode layer 112 . It protrudes from the internal electrode layer 112 and passes through the dielectric layer 111 to be connected to the next internal electrode layer 112 , which may result in a high short-circuit rate.

The multilayer ceramic capacitor manufacturing method of the present invention is applied to the multilayer ceramic capacitor manufacturing industry.

110: sintered chip 110a: green chip
111: dielectric layer 112: internal electrode layer
112a: plate-shaped graphene 112b: plate-shaped graphene oxide
113, 114: external electrode

Claims (9)

forming a plurality of dielectric layers;
forming an internal electrode layer by applying an internal electrode paste to one surface of the plurality of dielectric layers, respectively;
forming a green chip by stacking and compressing a plurality of dielectric layers such that the internal electrode layers cross each other;
forming a fired chip by firing the green chip;
and forming an external electrode at one end or the other end of the fired chip to be connected to the internal electrode layer, respectively,
The internal electrode paste is formed using a metal powder, a ceramic material, an organic solvent, a binder, and a dispersant, and the ceramic material is formed using a ceramic material including plate-shaped graphene or plate-shaped graphene oxide. According to claim 1,
In the step of forming the plurality of dielectric layers, the plurality of dielectric layers are each slurried by adding a dielectric powder having an average particle diameter (D ₅₀ ) of 80 to 150 nm and PVB (Polyvinyl Butyral) used as an organic binder, followed by a doctor blade method. is formed to have a thickness of 0.5 to 1.0 _μm using It is formed by calcining at 600 to 1200° C., and the additive powder is MgO, Mn ₃ O ₄ , Cr ₂ O ₃ , Al ₂ O ₃ , CaCO ₃ , ZrO ₂ , Y ₂ O ₃ , Dy ₂ O ₃ and Yb Seven or more of ₂ O ₃ are selected and mixed, the rare earth glass frit is formed by adding a rare earth oxide to the glass frit, BaO, CaO and SiO ₂ are used as the glass frit, and the rare earth oxide is Y ₂ O ₃ , Dy ₂ O ₃ and Yb ₂ O ₃ A method of manufacturing a multilayer ceramic capacitor in which two or more are selected and mixed. According to claim 1,
In the step of forming the internal electrode layer, the internal electrode layer is formed to have a thickness of 0.5 to 1.2 μm by printing an internal electrode paste on one surface of the dielectric layer by a screen printing method, and the internal electrode paste includes a metal powder and a ceramic material, The metal powder has an average particle diameter (D ₅₀ ) of 100 to 200 nm, and the ceramic material includes at least one of BaTiO ₃ and plate-shaped graphene and plate-shaped graphene oxide, and BaTiO ₃ has an average particle diameter (D ₅₀ ). ) of 30 to 100 nm is a multilayer ceramic capacitor manufacturing method used. According to claim 1,
In the step of forming the internal electrode layer, the internal electrode paste is formed by mixing 40 to 52 wt% of a metal powder, 10 to 15 wt% of a ceramic material, and 38 to 45 wt% of a paste preparation additive, and the material of the metal powder is Ni is used, the paste manufacturing additive uses an organic solvent, a binder and a dispersant, the organic solvent is terpineol, the binder is ethyl cellulose, and the dispersant is used. A method of manufacturing a multilayer ceramic capacitor in which glycerol-alpha-monooleate or nonylphenol ethoxylate phosphate ester is used. 5. The method of claim 4,
The ceramic material includes BaTiO ₃ , BaCO ₃ , MgO, SiO ₂ , La ₂ O ₂ , Dy ₂ O ₂ , graphene in a plate shape, and graphene oxide in a plate shape. 5. The method of claim 4,
The ceramic material is BaTiO ₃ 93.45 to 99.97 wt%, BaCO ₃ 0 to 1.5 wt%, MgO 0 to 1 wt%, La ₂ O ₂ 0 to 1.3 wt%, Dy ₂ O ₂ 0 to 1.0 wt%, plate-shaped graphene A method for manufacturing a multilayer ceramic capacitor comprising 0.03 to 0.75% by weight and 0 to 1.0% by weight of graphene oxide plate. 7. The method of claim 5 or 6,
The method for manufacturing a multilayer ceramic capacitor, wherein each of the plate-shaped graphene and the plate-shaped graphene oxide is a single layer. According to claim 1,
In the forming of the internal electrode layer, the internal electrode paste is formed to have a viscosity of 5,000 to 10,000 cps (centi poise). According to claim 1,
In the step of stacking and compressing the plurality of dielectric layers to form a green chip, the green chip is formed by stacking a plurality of dielectric layers and pressing at 800 to 1300 kgf/cm 2 , and in forming the fired chip, the fired chip is The green chips are degreased at 200 to 800° C. to remove the binder, and the binder-degreasing green chips are fired in a reducing atmosphere at 1260 to 1360° C. and then oxidized at 800 to 1000° C. to form the external electrode. In the step of forming the external electrode to be connected to the internal electrode layer at one end or the other end of the sintered chip, respectively, the multilayer ceramic capacitor manufacturing method is formed by heat treatment at 600 to 700 ℃.

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