KR20220111814A - Display apparatus - Google Patents

Abstract

The present invention relates to a display device for minimizing leakage currents between sub-pixels. The display device includes: a substrate; a 1-1 light emitting device and 1-2 light emitting device disposed on the substrate and including a first light emitting layer and a first potential generation layer; a second light emitting device including a second light emitting layer disposed to be adjacent to the 1-1 light emitting device and including a material making a color different from the first light emitting layer and a second potential generation layer spaced apart from the first potential generation layer; and a pixel definition film provided with an opening exposing a central part of a pixel electrode of each of the 1-1 light emitting device, the 1-2 light emitting device, and the second light emitting device. The display device is provided with a first groove concave toward the substrate on an upper surface of the pixel definition film located between the 1-1 light emitting device and the 1-2 light emitting device. The first potential generation layer is cut off based on the first groove.

Description

Display apparatus

Embodiments of the present invention relate to a display device, and more particularly, to a display device for minimizing leakage current between sub-pixels.

A display device is a device that visually displays data. Such a display device includes a substrate divided into a display area and a peripheral area. The display area is formed by insulating scan lines and data lines from each other, and includes a plurality of sub-pixels. In addition, a thin film transistor corresponding to each of the sub-pixels and a sub-pixel electrode electrically connected to the thin film transistor are provided in the display area. In addition, a counter electrode commonly provided to the sub-pixels may be provided in the display area. In the peripheral area, various wires for transmitting electrical signals to the display area, a scan driver, a data driver, a controller, a pad, and the like may be provided.

Among such display devices, a display device such as an organic light emitting diode display may have a structure in which a plurality of layers are stacked to emit light of each sub-pixel in the display area.

An object of the present invention is to provide a display device for minimizing leakage current between sub-pixels. However, these problems are exemplary, and the scope of the present invention is not limited thereto.

According to one aspect of the present invention, a substrate, a 1-1 light emitting device and a 1-2 light emitting device disposed on the substrate and including a first light emitting layer and a first charge generation layer, the 1-1 light emitting device and The second light emitting device and the 1-1 light emitting device including a second light emitting layer disposed adjacently and including a material emitting a color different from that of the first light emitting layer and a second charge generating layer spaced apart from the first light emitting layer , a pixel defining film having an opening exposing the center of each pixel electrode of the first and second light emitting devices and the second light emitting device, and is positioned between the 1-1 light emitting device and the 1-2 light emitting device A display device is provided with a first groove concave in the direction of the substrate on an upper surface of the pixel defining layer, and the first charge generation layer is disconnected from the first groove.

The first groove may have a closed shape in plan view.

The first groove may have a reverse tapered shape.

and a third light emitting device disposed adjacent to the 1-1 light emitting device and the second light emitting device and emitting a color different from that of the first 1-1 light emitting device and the second light emitting device, wherein the first- The distance between the center of the first light emitting device and the center of the first and second light emitting devices may be greater than the distance between the center of the second light emitting device and the center of the third light emitting device.

Areas of the light emitting regions of the first-first light emitting device and the first-second light emitting device may be larger than an area of the light emitting region of the second light emitting device.

The 1-1 light emitting device and the 1-2 light emitting device may include a material emitting light having a wavelength between 450 nm and 500 nm.

It may further include a counter electrode disposed on the pixel defining layer, wherein the counter electrode may include a portion surrounding the first groove.

A second groove concave in the direction of the substrate may be provided on an upper surface of the pixel defining layer positioned between the second light emitting device and the first-first light emitting device.

It may further include a counter electrode disposed on the pixel defining layer, and the counter electrode may include a portion surrounding the first groove and the second groove, respectively.

A top surface of the pixel defining layer between the second light emitting device and the first-first light emitting device may be flat.

The first light emitting layer may include a first sub light emitting layer and a second sub light emitting layer stacked.

The first sub-emissive layer and the second sub-emissive layer may include a material emitting the same color.

It further includes an auxiliary layer disposed to surround at least a portion of the first groove, and at least a portion of the auxiliary layer may protrude toward the center of the first groove.

The auxiliary layer may include at least one of silicon oxynitride, silicon oxide, and silicon nitride.

It may further include a first functional layer overlapping the first charge generation layer and cut off about the first groove, and a second functional layer overlapping the second charge generation layer and spaced apart from the first functional layer. .

According to another aspect of the present invention, the substrate is disposed on the substrate and includes a first light emitting layer and a first functional layer, the 1-1 light emitting device and the 1-2 light emitting device adjacent to the 1-1 light emitting device A second light emitting device including a second light emitting layer including a material emitting a different color from the first light emitting layer and a second functional layer spaced apart from the first functional layer and the 1-1 light emitting device, the first - The pixel defining film having an opening exposing the center of each pixel electrode of the second light emitting device and the second light emitting device, and the pixel definition positioned between the 1-1 light emitting device and the 1-2 light emitting device The display device is provided with a first groove concave in the direction of the substrate on an upper surface of the film, and the first functional layer is cut off around the first groove.

The first groove may have a reverse tapered shape.

A second groove concave in the direction of the substrate may be provided on an upper surface of the pixel defining layer positioned between the second light emitting device and the first-first light emitting device.

It may further include a first charge generating layer overlapping the first functional layer and cut off about the first groove, and a second charge generating layer overlapping the second functional layer and spaced apart from the first charge generating layer. have.

It further includes an auxiliary layer disposed to surround at least a portion of the first groove, and at least a portion of the auxiliary layer may protrude toward the center of the first groove.

Other aspects, features and advantages other than those described above will become apparent from the following detailed description, claims and drawings for carrying out the invention.

As described above, according to an embodiment of the present invention, a display device for minimizing leakage current between sub-pixels can be implemented. Of course, the scope of the present invention is not limited by these effects.

1 is a plan view schematically illustrating a display device according to an exemplary embodiment of the present invention.
FIG. 2 is an enlarged plan view of area A of FIG. 1 .
FIG. 3 is a cross-sectional view taken along line III-III' of FIG. 2 .
4A to 4C are cross-sectional views schematically illustrating a first light emitting device according to the present embodiments.
FIG. 5 is a cross-sectional view taken along line V-V' of FIG. 2 .
6 is a cross-sectional view schematically illustrating a second light emitting device according to an exemplary embodiment.
7 is a plan view schematically illustrating a display device according to an embodiment of the present invention.
FIG. 8 is a cross-sectional view taken along line VIII-VIII' of FIG. 7 .
9 is a plan view schematically illustrating a display device according to an exemplary embodiment.
FIG. 10 is a cross-sectional view taken along line X-X of FIG. 9 .

Since the present invention can apply various transformations and can have various embodiments, specific embodiments are illustrated in the drawings and described in detail in the detailed description. Effects and features of the present invention, and a method for achieving them, will become apparent with reference to the embodiments described below in detail in conjunction with the drawings. However, the present invention is not limited to the embodiments disclosed below and may be implemented in various forms.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and when described with reference to the drawings, the same or corresponding components are given the same reference numerals, and the overlapping description thereof will be omitted. .

In the following embodiments, terms such as first, second, etc. are used for the purpose of distinguishing one component from another without limiting meaning.

In the following embodiments, the singular expression includes the plural expression unless the context clearly dictates otherwise.

In the following embodiments, terms such as include or have means that the features or components described in the specification are present, and do not preclude the possibility that one or more other features or components will be added. .

In the following embodiments, when it is said that a part such as a film, region, or component is on or on another part, other films, regions, components, etc. are interposed therebetween not only when it is directly on the other part. Including cases where

In the drawings, the size of the components may be exaggerated or reduced for convenience of description. For example, since the size and thickness of each component shown in the drawings are arbitrarily indicated for convenience of description, the present invention is not necessarily limited to the illustrated bar.

In cases where certain embodiments are otherwise practicable, a specific process sequence may be performed different from the described sequence. For example, two processes described in succession may be performed substantially simultaneously, or may be performed in an order opposite to the order described.

As used herein, "A and/or B" refers to A, B, or A and B. And, "at least one of A and B" represents the case of A, B, or A and B.

In the following embodiments, when a film, region, or component is connected, when the film, region, or component is directly connected, or/and in the middle of another film, region, or component It includes cases where they are interposed and connected indirectly. For example, in the present specification, when it is said that a film, region, component, etc. are electrically connected, when the film, region, component, etc. are directly electrically connected, and/or another film, region, component, etc. is interposed therebetween. to indicate an indirect electrical connection.

The x-axis, y-axis, and z-axis are not limited to three axes on a Cartesian coordinate system, and may be interpreted in a broad sense including them. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, but may refer to different directions that are not orthogonal to each other.

1 is a plan view schematically illustrating a display device 1 according to an embodiment of the present invention.

As shown in FIG. 1 , the display device 1 includes a display area DA displaying an image and a peripheral area PA disposed around the display area DA. The display device 1 may provide an image to the outside by using light emitted from the display area DA. Of course, since the display device 1 includes the substrate 100 , it may be said that the substrate 100 has such a display area DA and a peripheral area PA.

The substrate 100 may be made of various materials such as glass, metal, or plastic. According to an embodiment, the substrate 100 may include a flexible material. Here, the flexible material refers to a substrate that can be bent, bent, and folded or rolled. The substrate 100 made of such a flexible material may be made of ultra-thin glass, metal, or plastic.

A plurality of sub-pixels PX including various light emitting devices such as organic light-emitting diodes (OLEDs) may be disposed in the display area DA of the substrate 100 . The plurality of sub-pixels PX may provide a predetermined image by emitting light. The sub-pixels PX may emit red, green, and blue lights, respectively. One pixel P may be implemented by the rendering driving of the sub-pixels PX. For example, the pixel P may include a red subpixel PX, a green subpixel PX, and a blue subpixel PX.

The plurality of sub-pixels PX may be arranged in a stripe arrangement as shown in FIG. 1 . However, the present invention is not limited thereto. The plurality of sub-pixels PX may be arranged in various forms, such as a pentile arrangement, a mosaic arrangement, and the like to implement an image.

When the display area DA is viewed in a planar shape, the display area DA may have a rectangular shape as shown in FIG. 1 . In another embodiment, the display area DA may have a polygonal shape, such as a triangle, a pentagon, or a hexagon, or a circular shape, an oval shape, or an irregular shape.

The peripheral area PA of the substrate 100 is an area disposed around the display area DA, and may be an area in which an image is not displayed. The peripheral area PA may completely or partially surround the display area DA. In the peripheral area PA, various wirings that transmit electrical signals to be applied to the display area DA, and a pad part PAD to which a printed circuit board or a driver IC chip is attached may be located.

FIG. 2 is an enlarged plan view of area A of FIG. 1 . 2 illustrates an arrangement of a first pixel P1 and a second pixel P2 according to an exemplary embodiment.

In the exemplary embodiment shown in FIG. 2 , the first pixel P1 includes a 1-1 sub-pixel PX1-1, a second sub-pixel PX2, and a third sub-pixel PX3, The second pixel P2 may include a first-second sub-pixel PX1-2, a second sub-pixel PX2, and a third sub-pixel PX3. The first pixel P1 and the second pixel P2 may be disposed adjacent to each other in the column direction (y-direction). The first pixels P1 and the second pixels P2 may be alternately disposed in a column direction (y-direction).

Hereinafter, the arrangement of each sub-pixel will be described with reference to FIG. 2 . In the exemplary embodiment shown in FIG. 2 , the 1-1 sub-pixel PX1-1, the 1-2 sub-pixel PX1-2, the second sub-pixel PX2, and the third sub-pixel PX3 may be arranged in a matrix shape. In the exemplary embodiment shown in FIG. 2 , the row direction may be the x direction and the column direction may be the y direction. One pixel may be disposed at a position where one row and one column intersect.

An n-th column of the plurality of pixels may include second sub-pixels PX2 and third sub-pixels PX3 that are alternately arranged. An n+1-th column adjacent to the n-th column may include the first-first sub-pixels PX1-1 and the first-second sub-pixels PX1-2 that are alternately arranged. The n+2 column adjacent to the n+1th column may include second sub-pixels PX2 and third sub-pixels PX3 that are alternately arranged. The arrangement of sub-pixels included in column n+2 may be the same as the arrangement of sub-pixels included in column n. Column n+3 adjacent to column n+2 may include first-first sub-pixels PX1-1 and first-second sub-pixels PX1-2 that are alternately arranged. The arrangement of sub-pixels included in column n+3 may be the same as that of sub-pixels included in column n+1.

The m-th row of the plurality of pixels may include the second sub-pixels PX2 and the first-first sub-pixels PX1-1 that are alternately arranged. An m+1-th column adjacent to the m-th column may include third sub-pixels PX3 and first-first sub-pixels PX1-1 that are alternately arranged. An m+2 th column adjacent to the m+1 th column may include second sub-pixels PX2 and first-second sub-pixels PX1 - 2 that are alternately arranged. An m+3 th column adjacent to the m+2 th column may include third sub-pixels PX3 and first-second sub-pixels PX1 - 2 that are alternately arranged.

That is, the 1-1th subpixels PX1-1 may be integrally disposed at a position where the n+1 column and the m row meet and a position where the n+1 column and the m+1 row meet. The first-second sub-pixels PX1 - 2 may be integrally disposed at a position where the n+1 column and the m+2 row meet and a position where the n+1 column and the m+3 row meet.

The second subpixels PX2 may be disposed at a position where n columns and m rows meet, and the third subpixels PX3 may be disposed at a position where n columns and m+1 rows meet. In this case, n and m may be natural numbers, that is, integers greater than 0.

By being arranged as above, the area of the light emitting region of the first-first sub-pixel PX1-1 and the area of the light-emitting region of the first-second sub-pixel PX1-2 are equal to the light emission area of the second sub-pixel PX2 or the second sub-pixel PX2. It may be larger than the emission area of the third sub-pixel PX3 . For example, the area of the emission region of the first-first sub-pixel PX1-1 and the area of the emission region of the 1-2-th sub-pixel PX1-2 are the emission area of the second sub-pixel PX2 or the third part. It may be approximately twice the emission area of the pixel PX3 . Accordingly, the distance D1 between the center of the first-first sub-pixel PX1-1 and the center of the 1-2-th sub-pixel PX1-2 is the center of the second sub-pixel PX2 and the third sub-pixel. It may have a feature greater than the distance D2 between the centers of (PX3). By configuring in this way, the emission lifetimes of the 1-1 sub-pixel PX1-1 and the 1-2 sub-pixel PX1-2 can be improved.

2 illustrates that the sub-pixels PX are arranged in a stripe arrangement. However, the present invention is not limited thereto. The plurality of sub-pixels PX may be arranged in various forms, such as a pentile arrangement, a mosaic arrangement, and the like.

The first-first sub-pixel PX1-1 and the first-second sub-pixel PX1-2 disposed adjacent to each other may include the same first intermediate layer 120 . The second sub-pixel PX2 disposed adjacent to the first-first sub-pixel PX1-1 or the first-second sub-pixel PX1-2 is a second intermediate layer 130 spaced apart from the first intermediate layer 120 . ) may be included. The third sub-pixel PX3 may be disposed adjacent to the first-first sub-pixel PX1-1 and the second sub-pixel PX2 . Alternatively, the third sub-pixel PX3 may be disposed adjacent to the first-second sub-pixel PX1 - 2 and the second sub-pixel PX2 . The third subpixel PX3 may include a third intermediate layer 140 spaced apart from the first intermediate layer 120 and the second intermediate layer 130 .

The second sub-pixel PX2 may emit a color different from that of the first-first sub-pixel PX1-1. For example, the first-first sub-pixel PX1-1 may emit blue light, and the second sub-pixel PX2 may emit red light. The third sub-pixel PX3 may emit a color different from that of the first-first sub-pixel PX1-1 and the second sub-pixel PX2 . For example, the first-first sub-pixel PX1-1 may emit blue light, the second sub-pixel PX2 may emit red light, and the third sub-pixel PX3 may emit green light.

A first groove H1 concave toward the substrate 100 may be disposed between the first-first sub-pixel PX1-1 and the first-second sub-pixel PX1-2. The first intermediate layer 120 may be cut around the first groove H1 . The first groove H1 may have a closed shape on a plane when viewed from the z-axis direction. For example, the first groove H1 may have a rectangular shape when viewed from the z-axis direction. In the exemplary embodiment of FIG. 2 , the first groove H1 has a rectangular shape extending in the x-axis direction. In this case, the length L1 of the long side of the first groove H1 may be longer than the length L2 of the first intermediate layer 120 in the x-axis direction. That is, one end of the first groove H1 extends further in the +x direction than the boundary in the +x direction of the first intermediate layer 120 , and the other end of the first groove H1 has a greater -x than the boundary in the -x direction. direction is extended further. As the first groove H1 is disposed in this way, the first intermediate layer 120 may be cut off.

The first groove H1 may be provided on the upper surface of the pixel defining layer 119 (refer to FIG. 3 ). A 1-1 sub-pixel PX1-1, a 1-2 sub-pixel PX1-2, a second sub-pixel PX2, and a third sub-pixel PX3 are formed on the pixel defining layer 119 (FIG. 3). A counter electrode 123 covering all of them may be disposed. The counter electrode 123 may cover the entire display area DA. However, a portion of the counter electrode 123 may be cut off by the first groove H1 . In other words, the counter electrode 123 may cover the entire display area DA and include a portion surrounding the first groove H1 .

FIG. 3 is a cross-sectional view taken along line III-III' of FIG. 2 , and FIGS. 4A to 4C are cross-sectional views schematically illustrating organic light emitting diodes that may be employed as the light emitting device of FIG. 3 . Specifically, FIGS. 4A to 4C show the pixel electrode 121 and the first pixel electrode 121 included in the 1-1 organic light emitting diode OLED1-1 or the 1-2 organic light emitting diode OLED1-2 according to the embodiments. It may be a cross-sectional view of the intermediate layer 120 and the counter electrode 123 .

As shown in FIG. 3 , the display device 1 includes a substrate 100 , a buffer layer 111 , a first gate insulating layer 112 , a second gate insulating layer 113 , an interlayer insulating layer 115 , and planarization. The layer 117 , the pixel defining layer 119 , the first intermediate layer 120 , and the counter electrode 123 may have a stacked structure.

The substrate 100 may include glass, metal, or polymer resin. When at least a portion of the display device is bent or the display device has a flexible characteristic, the substrate 100 needs to have a flexible or bendable characteristic. In this case, the substrate 100 may be, for example, polyethersulphone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, or polyphenylene. It may include a polymer resin such as sulfide (polyphenylene sulfide), polyarylate (polyarylate), polyimide (polyimide), polycarbonate (polycarbonate), or cellulose acetate propionate (cellulose acetate propionate). Of course, the substrate 100 has a multilayer structure including two layers each containing such a polymer resin and a barrier layer including an inorganic material (eg, silicon oxide, silicon nitride, silicon oxynitride, etc.) interposed between the layers. Various modifications are possible. Furthermore, if the substrate 100 is not bent, the substrate 100 may include glass or the like.

The buffer layer 111 may be disposed on the substrate 100 to reduce or block penetration of foreign substances, moisture, or external air from the lower portion of the substrate 100 , and may provide a flat surface on the substrate 100 . The buffer layer 111 may include an inorganic material such as an oxide or nitride, an organic material, or an organic/inorganic composite, and may have a single-layer or multi-layer structure of an inorganic material and an organic material. A barrier layer (not shown) that blocks penetration of external air may be further included between the substrate 100 and the buffer layer 111 . The buffer layer 111 may include silicon oxide (SiO ₂ ) or silicon nitride (SiN _X ).

A thin film transistor (TFT) may be disposed on the buffer layer 111 . The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. The thin film transistor (TFT) may be connected to the organic light emitting diode (OLED) to drive the organic light emitting diode (OLED).

The semiconductor layer Act may be disposed on the buffer layer 111 and may include polysilicon. In another embodiment, the semiconductor layer Act may include amorphous silicon. In another embodiment, the semiconductor layer Act may include indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), It may include an oxide of at least one material selected from the group consisting of chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer Act may include a channel region and a source region and a drain region doped with impurities.

The first gate insulating layer 112 may cover the semiconductor layer Act. The first gate insulating layer 112 is silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum It may include an inorganic insulating material such as oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO ₂ ). The first gate insulating layer 112 may be a single layer or a multilayer including the aforementioned inorganic insulating material.

A gate electrode GE may be disposed on the first gate insulating layer 112 to overlap the semiconductor layer Act. The gate electrode GE includes molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and the like, and may be formed of a single layer or multiple layers. For example, the gate electrode GE may have a multilayer structure including a molybdenum (Mo) layer and an aluminum (Al) layer.

The second gate insulating layer 113 may cover the gate electrode GE. The second gate insulating layer 113 is silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO ₂ ) It may include an inorganic insulating material such as. The second gate insulating layer 113 may be a single layer or a multilayer including the aforementioned inorganic insulating material.

An upper electrode CE2 of the storage capacitor Cst may be disposed on the second gate insulating layer 113 . The upper electrode CE2 of the storage capacitor Cst may overlap the gate electrode GE. In this case, the gate electrode GE may be the lower electrode CE1 of the storage capacitor Cst. The upper electrode CE2 and the lower electrode CE1 may form a storage capacitor Cst. The upper electrode CE2 includes aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), and iridium (Ir). , chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and/or copper (Cu), and may be a single layer or multiple layers of the aforementioned materials. .

The interlayer insulating layer 115 may cover the upper electrode CE2 . The interlayer insulating layer 115 is silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide (Ta) ₂ O ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO ₂ ) It may include an inorganic insulating material. The interlayer insulating layer 115 may have a single-layer structure or a multi-layer structure including the aforementioned inorganic insulating material.

The source electrode SE and the drain electrode DE of the thin film transistor TFT may be disposed on the interlayer insulating layer 115 . The source electrode SE and the drain electrode DE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), or the like, and a multilayer including the above material. It may be a structure or a single-layer structure. For example, the source electrode SE and the drain electrode DE may have a multilayer structure of Ti/Al/Ti.

The planarization layer 117 may be disposed on the interlayer insulating layer 115 to cover the source electrode SE and the drain electrode DE. The planarization layer 117 may include an organic material or an inorganic material, and may have a single-layer structure or a multi-layer structure. The planarization layer 117 may include a first planarization layer 117a and a second planarization layer 117b. Accordingly, a conductive pattern such as a wiring may be formed between the first planarization layer 117a and the second planarization layer 117b, which may be advantageous for high integration. A connection electrode CM may be disposed on the first planarization layer 117a.

The planarization layer 117 is a general-purpose polymer such as Benzocyclobutene (BCB), polyimide, HMDSO (Hexamethyldisiloxane), PMMA (Polymethylmethacrylate), or PS (Polystyrene), a polymer derivative having a phenolic group, an acrylic polymer, It may include an imide-based polymer, an arylether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, or a vinyl alcohol-based polymer. On the other hand, the planarization layer 117 is silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), silicon oxynitride (SiO _x N _y ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), tantalum oxide ( Ta ₂ O ₅ ), hafnium oxide (HfO ₂ ), or zinc oxide (ZnO ₂ ) It may include an inorganic insulating material such as. After forming the planarization layer 117 , chemical mechanical polishing may be performed on the top surface of the planarization layer 117 to provide a flat top surface.

Organic light emitting diodes OLED1-1 and OLED1-2 may be disposed on the second planarization layer 117b. The pixel electrode 121 of each of the organic light emitting diodes OLED1-1 and OLED1-2 is disposed on the second planarization layer 117b and may be electrically connected to the thin film transistor TFT through the connection electrode CM. .

The pixel electrode 121 includes indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In ₂ O ₃ : indium oxide), and indium. It may include a conductive oxide such as indium gallium oxide (IGO) or aluminum zinc oxide (AZO). The pixel electrode 121 includes silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), and iridium (Ir). , chromium (Cr) or a reflective film including a compound thereof may be included. For example, the pixel electrode 121 may have a structure in which layers including ITO, IZO, ZnO, or In ₂ O ₃ are disposed above and below the aforementioned reflective layer. For example, the pixel electrode 121 may have a stacked structure of ITO/Ag/ITO.

The pixel defining layer 119 may cover the edge of the pixel electrode 121 on the planarization layer 117 , and may include an opening OP exposing the central portion of the pixel electrode 121 . The size and shape of the light emitting area of the organic light emitting diode OLED, that is, the subpixel PX may be defined by the opening OP. The pixel defining layer 119 increases the distance between the edge of the pixel electrode 121 and the counter electrode 123 on the top of the pixel electrode 121 , thereby generating an arc at the edge of the pixel electrode 121 . can play a role in preventing The pixel defining layer 119 may include an organic insulating material such as polyimide, polyamide, acrylic resin, hexamethyldisiloxane (HMDSO) and phenol resin, and may be formed by spin coating or the like. .

A first intermediate layer 120 may be disposed on the pixel defining layer 119 and the pixel electrode 121 . The first intermediate layer 120 may include a first light-emitting layer 124 that emits light, a first functional layer 126 that helps the first light-emitting layer 124 to emit light, and a first charge generation layer 125 . .

3 and 4A, the first intermediate layer 120 of the organic light emitting diode according to an embodiment of the present invention includes a first light emitting layer 124, a first charge generating layer 125, and a first functional layer. (126).

The first light-emitting layer 124 may include a first sub-emission layer EML1 and a second sub-emission layer EML2 that are stacked apart from each other. The first light emitting layer 124 may be a layer in which holes and electrons combine to emit light. The first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting the same color. For example, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting light having a wavelength between 450 nm and 500 nm. That is, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting blue light. Accordingly, the 1-1 th organic light emitting diode OLED1-1 or the 1-2 th organic light emitting diode OLED1-2 may include a material emitting light having a wavelength between 450 nm and 500 nm.

The first charge generating layer 125 may serve to help electrons and holes move by lowering the Fermi barrier. The first charge generation layer 125 includes a plurality of N-type charge generation layers including an N-type dopant material and an N-type host material, and a P-type charge generation layer including a P-type dopant material and a P-type host material. It may consist of layers.

The first functional layer 126 may overlap the first charge generation layer 125 . The first functional layer 126 may include a first sub-functional layer 1261 and a second sub-functional layer 1262 . The first sub-functional layer 1261 may include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). The hole injection layer HIL may be a layer into which holes transferred from the pixel electrode 121 or the charge generation layer are injected. The hole transport layer HTL may transfer holes transferred from the hole injection layer HIL to the first light emitting layer 124 . The electron injection layer EIL may be a layer into which electrons transferred from the counter electrode 123 or the charge generation layer are injected. The electron transport layer ETL may transfer electrons transferred from the electron injection layer EIL to the emission layer. That is, the hole injection layer HIL, the hole transport layer HTL, the first sub-emission layer EML1, the electron transport layer ETL, and the electron injection layer EIL are sequentially stacked to emit light.

The second sub-functional layer 1262 may also have the same stacked structure as the first sub-functional layer 1261 . That is, the second sub-functional layer 1262 may also have a stacked structure of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Accordingly, the hole injection layer HIL, the hole transport layer HTL, the second sub-emission layer EML2, the electron transport layer ETL, and the electron injection layer EIL are sequentially stacked to emit light.

In FIG. 4A , the first sub-functional layer 1261 and the second sub-functional layer 1262 include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Although illustrated, the first sub-functional layer 1261 and the second sub-functional layer 1262 may not include the electron injection layer EIL.

Hereinafter, a stacked structure of each layer will be described in detail with reference to FIG. 4A . The first intermediate layer 120 may be disposed between the pixel electrode 121 and the counter electrode 123 . On the pixel electrode 121 , a hole injection layer (HIL), a hole transport layer (HTL), a first sub-emission layer (EML1), an electron transport layer (ETL), an electron injection layer (EIL), a first charge generation layer (125), and holes An injection layer HIL, a hole transport layer HTL, a second sub-emission layer EML2, an electron transport layer ETL, an electron injection layer EIL, and a counter electrode 123 may be sequentially stacked.

Referring to FIG. 4B , the stacked structure of the organic light emitting diode according to an embodiment of the present invention is as follows. The first light emitting layer 124 of the organic light emitting diode according to an embodiment of the present invention may include a first sub light emitting layer EML1, a second sub light emitting layer EML2 and a third sub light emitting layer EML3 that are stacked apart from each other. can The first sub-emission layer EML1 , the second sub-emission layer EML2 , and the third sub-emission layer EML3 may include a material emitting the same color. For example, the first sub-emitting layer EML1 , the second sub-emitting layer EML2 , and the third sub-emitting layer EML3 may include a material emitting light having a wavelength between 450 nm and 500 nm. That is, the first sub-emitting layer EML1 , the second sub-emitting layer EML2 , and the third sub-emitting layer EML3 may include a material emitting blue light.

The first charge generation layer 125 may include a first sub charge generation layer CGL1 and a second sub charge generation layer CGL2 . The first sub-charge generation layer CGL1 and the second sub-charge generation layer CGL2 are formed by forming an N-type charge generation layer including an N-type dopant material and an N-type host material, respectively, and a P-type dopant material and a P-type host material. It may be composed of a plurality of layers including a P-type charge generation layer including

The first functional layer 126 may include a first sub-functional layer 1261 , a second sub-functional layer 1262 , and a third sub-functional layer 1263 . The third sub-functional layer 1263 may also have the same stacked structure as that of the above-described first sub-functional layer 1261 . That is, the third sub-functional layer 1263 may also have a stacked structure of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Accordingly, the hole injection layer (HIL), the hole transport layer (HTL), the third sub-emission layer (EML3), the electron transport layer (ETL), and the electron injection layer (EIL) are sequentially stacked to emit light. In FIG. 4B , the first sub-functional layer 1261 , the second sub-functional layer 1262 , and the third sub-functional layer 1263 include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL) and electrons. Although illustrated as including the injection layer EIL, the first sub-functional layer 1261 , the second sub-functional layer 1262 , and the third sub-functional layer 1263 may not include the electron injection layer EIL. have.

Although FIG. 4A illustrates a structure in which two sub-emission layers of the organic light emitting diode are stacked, the present invention is not limited thereto. Various modifications are possible, such as three or more sub-emissive layers stacked as shown in FIG. 4B or only one sub-emissive layer may be included as shown in FIG. 4C.

Referring to FIG. 4B , the first intermediate layer 120 may be disposed between the pixel electrode 121 and the counter electrode 123 . On the pixel electrode 121 , a hole injection layer (HIL), a hole transport layer (HTL), a first sub-emission layer (EML1), an electron transport layer (ETL), an electron injection layer (EIL), a first sub-charge generation layer (CGL1), Hole injection layer (HIL), hole transport layer (HTL), second sub-emission layer (EML2), electron transport layer (ETL), electron injection layer (EIL), second sub-charge generation layer (CGL2), hole injection layer (HIL) , the hole transport layer (HTL), the third sub-emission layer (EML3), the electron transport layer (ETL), the electron injection layer (EIL), and the counter electrode 123 may be sequentially stacked.

Referring to FIG. 4C , the stacked structure of the organic light emitting diode according to another embodiment of the present invention is as follows. The first intermediate layer 120 may be disposed between the pixel electrode 121 and the counter electrode 123 . The first intermediate layer 120 may include a first functional layer 126 and a first emission layer 124 . Specifically, on the pixel electrode 121 , a hole injection layer (HIL), a hole transport layer (HTL), a first light emitting layer 124 , an electron transport layer (ETL), an electron injection layer (EIL), and a counter electrode 123 are sequentially formed. can be stacked. In the embodiment of FIG. 4C , the charge generation layer may not be stacked.

The counter electrode 123 may be disposed on the first intermediate layer 120 . The counter electrode 123 may include a conductive material having a low work function. For example, the counter electrode 123 may include silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium ( Ir), chromium (Cr), lithium (Li), calcium (Ca), or an alloy thereof may include a (semi) transparent layer. Alternatively, the counter electrode 123 may further include a layer such as ITO, IZO, ZnO, or In ₂ O ₃ on the (semi)transparent layer including the above-described material.

The layers from the pixel electrode 121 to the counter electrode 123 may form an organic light emitting diode (OLED). An upper layer (not shown) for protecting the counter electrode and increasing light extraction efficiency may be formed on the counter electrode 123 .

A first groove H1 may be disposed between the first-first sub-pixel PX1-1 and the first-second sub-pixel PX1-2. The first groove H1 may have a concave shape in the direction of the substrate 100 from the top surface of the pixel defining layer 119 . The first groove H1 may have a reverse taper shape in cross-sectional view. In other words, the first groove H1 may have an undercut shape. By providing the first groove H1 having such a shape, the first intermediate layer 120 may be disconnected from the first groove H1.

That is, the first charge generating layer 125 and the first functional layer 126 may be cut off with the first groove H1 as the center. When a plurality of light emitting layers are stacked as in the embodiment of FIGS. 4A and 4B , a charge generating layer may be disposed between the light emitting layers. In this case, leakage current is generated by the charge generation layer, so that the adjacent organic light emitting diodes can emit light. Current flows through the first charge generation layer 125 to the first-second organic light-emitting diodes OLED1-2, so that the first-second organic light-emitting diodes OLED1-2 may minutely emit light. In this embodiment, the leakage current can be minimized by forming the first groove H1 to cut off the first intermediate layer 120 .

4C , the organic light emitting diode may not include the first charge generation layer 125 . However, there may still be a problem that a leakage current flows through the first functional layer 126 . Accordingly, the first intermediate layer 120 according to the embodiment of FIG. 4C is also cut off by the first groove H1 to minimize leakage current.

FIG. 5 is a cross-sectional view taken along line V-V' of FIG. 2 . 6 is a cross-sectional view schematically illustrating the second organic light emitting diode OLED2 of FIG. 5 . Specifically, FIG. 6 may be a cross-sectional view of the pixel electrode 121 , the second intermediate layer 130 , and the counter electrode 123 included in the second organic light emitting diode OLED2 . The same reference numerals as in FIG. 3 refer to the same members, and a duplicate description thereof will be omitted.

5 and 6, the second intermediate layer 130 of the organic light emitting diode according to an embodiment of the present invention includes a second light emitting layer 134, a second charge generating layer 135, and a second functional layer. (136). The second light-emitting layer 134 may include a first sub-emission layer EML1 and a second sub-emission layer EML2 that are stacked apart from each other. The first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting the same color. For example, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting light having a wavelength between 610 nm and 760 nm. That is, the first sub-emission layer EML1 and the second sub-emission layer EML2 may include a material emitting red light. Since the second organic light emitting diode OLED2 includes the second light emitting layer 134 , it can be said that the second organic light emitting diode OLED2 includes a material emitting light having a wavelength between 610 nm and 760 nm.

The second charge generation layer 135, like the first charge generation layer 125, includes an N-type charge generation layer including an N-type dopant material and an N-type host material, and a P-type dopant material and a P-type host material. It may be composed of a plurality of layers including a P-type charge generation layer.

Like the first functional layer 126 , the second functional layer 136 may include a first sub-functional layer 1361 and a second sub-functional layer 1362 .

The stacking order of the light emitting layer, the functional layer, and the charge generating layer included in the second intermediate layer 130 may be the same as the stacking order of the light emitting layer, the functional layer, and the charge generating layer included in the first intermediate layer 120 . However, the light emitting layer included in the second intermediate layer 130 may include a material emitting a color different from that of the first light emitting layer 124 and may be a second light emitting layer 134 spaced apart from the first light emitting layer 124 . Also, the charge generation layer included in the second intermediate layer 130 may be a second charge generation layer 135 spaced apart from the first charge generation layer 125 . In addition, the functional layer included in the second intermediate layer 130 may be a second functional layer 136 that overlaps the second charge generation layer 135 and is spaced apart from the first functional layer 126 . In FIG. 6 , the organic light emitting diode according to an embodiment of the present invention includes a first sub light emitting layer EML1 and a second sub light emitting layer EML2 stacked to be spaced apart from each other, and a second charge generating layer 135 in one layer. is shown to include. However, the present invention is not limited thereto. The second intermediate layer 130 may have a structure including one light emitting layer or three light emitting layers as shown in FIGS. 4B and 4C .

The second intermediate layer 130 including the second light emitting layer 134 and the second charge generation layer 135 may be disposed to be spaced apart from the first intermediate layer 120 . Accordingly, there may be no problem in that adjacent organic light emitting diodes emit light due to leakage current between the second organic light emitting diode OLED2 and the 1-1th organic light emitting diode OLED1-1. Accordingly, no groove is formed in the pixel defining layer 119 between the second organic light emitting diode OLED2 and the 1-1 organic light emitting diode OLED1-1, and the top surface of the pixel defining layer 119 may be flat. .

The third organic light emitting diode (not shown) according to an embodiment of the present invention may be an organic light emitting diode including the light emitting region of the third sub-pixel PX3. The third organic light emitting diode may include a third intermediate layer 140 . The third intermediate layer 140 includes a light emitting layer emitting different light from the first light emitting layer 124 and the second light emitting layer 134 . For example, the light emitting layer included in the third intermediate layer 140 may include a material emitting light having a wavelength between 500 nm and 570 nm. That is, the light emitting layer included in the third intermediate layer 140 may include a material that emits green light. The stacking order of the light emitting layer, the functional layer, and the charge generating layer included in the third intermediate layer 140 is the same as the stacking order of the light emitting layer, the functional layer and the charge generating layer included in the first intermediate layer 120 or the second intermediate layer 130 . Since they may be the same, they are omitted below.

The third intermediate layer 140 may be disposed to be spaced apart from the first intermediate layer 120 and the second intermediate layer 130 . Therefore, there is a problem that adjacent organic light emitting diodes emit light due to leakage current between the third organic light emitting diode and the second organic light emitting diode OLED2 or between the third organic light emitting diode and the 1-1 organic light emitting diode OLED1-1. there may not be Therefore, no groove is formed in the pixel defining film 119 between the third organic light emitting diode and the second organic light emitting diode OLED2 or between the third organic light emitting diode and the 1-1 organic light emitting diode OLED1-1, A top surface of the pixel defining layer 119 may be flat.

7 is a plan view schematically illustrating a display device according to an embodiment of the present invention. FIG. 8 is a cross-sectional view taken along line VIII-VIII' of FIG. 7 .

7 and 8 , a second groove concave in the direction of the substrate 100 in the upper surface of the pixel defining layer 119 between the first-first sub-pixel PX1-1 and the second sub-pixel PX2 is shown in FIGS. 7 and 8 . (H2) may be disposed. As described above, since the first intermediate layer 120 and the second intermediate layer 130 are spaced apart from each other, there is no problem that adjacent sub-pixels emit light due to leakage current from the charge generation layer or the functional layer. However, due to a process problem, the ends of the first intermediate layer 120 and the second intermediate layer 130 may be formed to overlap. In this case, the first charge generation layer 125 of the first intermediate layer 120 and the second charge generation layer 135 of the second intermediate layer 130 may be electrically connected to each other, thereby generating a leakage current. To prevent this, the second groove H2 may be formed between the first-first sub-pixel PX1-1 and the second sub-pixel PX2. A cross-sectional shape of the second groove H2 may be the same as a cross-sectional shape of the first groove H1 . That is, the second groove H2 may include a reverse tapered structure or may have an undercut shape.

For the same reason, the third groove H3 may be disposed between the first-first sub-pixel PX1-1 and the third sub-pixel PX3. Also, a fourth groove H4 may be disposed between the third subpixel PX3 and the second subpixel PX2 . Similarly, the second groove H2 is also disposed between the first-second sub-pixel PX1-2 and the second sub-pixel PX2, and the first-second sub-pixel PX1-2 and the third sub-pixel PX2 A third groove H3 may also be disposed between the PX3 .

As described above, the pixel defining layer 119 includes the 1-1 sub-pixel PX1-1, the 1-2 sub-pixel PX1-2, the second sub-pixel PX2, and the third sub-pixel PX3. Each pixel electrode 121 may have a shape having an opening exposing a central portion thereof. On the pixel defining layer 119 , the first-first sub-pixel PX1-1, the 1-2-th sub-pixel PX1-2, the second sub-pixel PX2 and the third sub-pixel PX3 are oppositely covered. An electrode 123 may be disposed. A portion of the counter electrode 123 may be cut off by the first grooves H1 to H4 . That is, the counter electrode 123 may cover the entire display area DA and include portions surrounding the grooves H1 , H2 , H3 , and H4 , respectively.

Although it appears that the counter electrode 123 is disconnected in the cross-sectional view of FIG. 8 , referring to the plan view of FIG. 7 , the counter electrode 123 is disconnected in the grooves H1 , H2 , H3 , and H4 , but the grooves H1 and H2 , H3 , and H4 are connected at a portion where they are not disposed, so that the sub-pixels PX may receive a common voltage from the same counter electrode 123 .

9 is a plan view schematically illustrating a display device according to an exemplary embodiment. FIG. 10 is a cross-sectional view taken along line X-X of FIG. 9 .

9 and 10 , the auxiliary layer 200 may be disposed on the pixel defining layer 119 to surround at least a portion of the first groove H1 when viewed from the z-axis. At least a portion of the auxiliary layer 200 may protrude toward the center of the first groove H1 . The auxiliary layer 200 may include at least one of silicon oxide (SiO ₂ ), silicon nitride (SiN _x ), and silicon oxynitride (SiO _x N _y ). The auxiliary layer 200 has a different selectivity from that of the pixel defining layer 119 , so that the degree of etching may be different during the etching process. Due to the difference in the selection ratio, a portion of the auxiliary layer 200 may be formed to protrude toward the center of the first groove H1. As a portion of the auxiliary layer 200 protrudes toward the center of the first groove H1 , the undercut shape may be easily formed. Accordingly, the first intermediate layer 120 including the first functional layer 126 and the first charge generating layer 125 may help to be disconnected.

Although the present invention has been described with reference to one embodiment shown in the drawings, it will be understood that this is merely exemplary, and that those skilled in the art can make various modifications and variations therefrom. Accordingly, the true technical protection scope of the present invention should be determined by the technical spirit of the appended claims.

1: Display
100: substrate
PX1-1: sub-pixel 1-1
PX1-2: sub-pixel 1-2
PX2: second sub-pixel
124: first light emitting layer
125: first charge generation layer
134: second light emitting layer
135: second charge generation layer
121: pixel electrode
119: pixel defining layer
123: counter electrode
H1: first home
H2: 2nd home
EML1: first sub-emission layer
EML2: second sub-emission layer
126: first functional layer
136: second functional layer
200: auxiliary layer

Claims (20)

Board;
a 1-1 light emitting device and a 1-2 light emitting device disposed on the substrate and including a first light emitting layer and a first charge generation layer;
A second light emitting layer disposed adjacent to the first light emitting device and including a second light emitting layer including a material emitting a color different from that of the first light emitting layer and a second charge generating layer spaced apart from the first light emitting layer device; and
a pixel defining film having an opening exposing the center of each pixel electrode of the 1-1 light emitting device, the 1-2 light emitting device, and the second light emitting device;
a first groove concave in the direction of the substrate is provided on the upper surface of the pixel defining layer positioned between the 1-1 light emitting device and the 1-2 light emitting device;
and the first charge generating layer is cut off about the first groove. According to claim 1,
and the first groove has a closed shape in plan view. According to claim 1,
The first groove includes a reverse tapered shape in cross-section. According to claim 1,
and a third light emitting device disposed adjacent to the 1-1 light emitting device and the second light emitting device and emitting a color different from that of the 1-1 light emitting device and the second light emitting device,
A distance between the central portion of the 1-1 light emitting device and the central portion of the 1-2 light emitting device is greater than a distance between the central portion of the second light emitting device and the central portion of the third light emitting device. According to claim 1,
The area of the light emitting region of the 1-1 light emitting device and the light emitting region of the 1-2 light emitting device is larger than the area of the light emitting region of the second light emitting device. 6. The method of claim 5,
The display device of claim 1, wherein the 1-1 light emitting device and the 1-2 light emitting device include a material emitting light having a wavelength between 450 nm and 500 nm. According to claim 1,
Further comprising a counter electrode disposed on the pixel defining layer,
and the counter electrode includes a portion surrounding the first groove. According to claim 1,
and a second groove concave in the direction of the substrate on an upper surface of the pixel defining layer positioned between the second light emitting element and the 1-1 light emitting element. 9. The method of claim 8,
Further comprising a counter electrode disposed on the pixel defining layer,
and the counter electrode includes a portion surrounding the first groove and the second groove, respectively. According to claim 1,
and a top surface of the pixel defining layer between the second light emitting device and the first-first light emitting device is flat. According to claim 1,
The first light emitting layer is provided by stacking a first sub light emitting layer and a second sub light emitting layer. 12. The method of claim 11,
and the first sub-emissive layer and the second sub-emissive layer include a material emitting the same color. According to claim 1,
and an auxiliary layer disposed to surround at least a portion of the first groove, wherein at least a portion of the auxiliary layer protrudes toward a center of the first groove. 14. The method of claim 13,
The auxiliary layer includes at least one of silicon oxynitride, silicon oxide, and silicon nitride. According to claim 1,
Display, further comprising: a first functional layer overlapping the first charge generating layer and disconnected from the first groove; and a second functional layer overlapping the second charge generating layer and spaced apart from the first functional layer Device. Board;
a 1-1 light emitting device and a 1-2 light emitting device disposed on the substrate and including a first light emitting layer and a first functional layer;
a second light emitting device disposed adjacent to the first light emitting device and including a second light emitting layer including a material emitting a color different from that of the first light emitting layer and a second functional layer spaced apart from the first light emitting layer; and
a pixel defining film having an opening exposing the center of each pixel electrode of the 1-1 light emitting device, the 1-2 light emitting device, and the second light emitting device;
a first groove concave in the direction of the substrate is provided on the upper surface of the pixel defining layer positioned between the 1-1 light emitting device and the 1-2 light emitting device;
and the first functional layer is cut off around the first groove. 17. The method of claim 16,
The first groove includes a reverse tapered shape in cross-section. 17. The method of claim 16,
and a second groove concave in the direction of the substrate on an upper surface of the pixel defining layer positioned between the second light emitting element and the 1-1 light emitting element. 19. The method of claim 18,
Further comprising: a first charge generating layer overlapping the first functional layer and disconnected from the first groove; and a second charge generating layer overlapping the second functional layer and spaced apart from the first charge generating layer, display device. 16. The method of claim 15,
and an auxiliary layer disposed to surround at least a portion of the first groove, wherein at least a portion of the auxiliary layer protrudes toward a center of the first groove.

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