KR20220023115A - Method of trransferring light emitting portion - Google Patents

Abstract

The present disclosure provides a method for transporting a semiconductor light emitting part. The method comprises the steps of: preparing a carrier provided with a growth substrate having a plurality of semiconductor light emitting parts and a fixture made of porous PDMS; attaching the plurality of semiconductor light emitting parts to the fixture; and removing a growth substrate from the plurality of semiconductor light emitting parts.

Description

Method of transporting semiconductor light emitting part {METHOD OF TRRANSFERRING LIGHT EMITTING PORTION}

The present disclosure (Disclosure) relates to a method of transporting a semiconductor light emitting part as a whole, and in particular, attaching a mini LED (a device with a width of about 100 μm or a micro LED with a width of less than 100 μm) to a panel, but most of the processes are performed at the wafer level It relates to a method of transporting a semiconductor light emitting unit made in.

Here, the semiconductor light emitting device means a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device (LED, LD). The group III nitride semiconductor is composed of a compound of Al(x)Ga(y)In(1-x-y)N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). In addition, a GaAs-based semiconductor light emitting device used for red light emission may be exemplified.

Herein, background information related to the present disclosure is provided, and they do not necessarily mean prior art (This section provides background information related to the present disclosure which is not necessarily prior art).

1 is a view showing an example of a method of manufacturing a semiconductor light emitting device panel presented in U.S. Patent No. 8,349,116, transferring the semiconductor light emitting device 200 to a substrate 300 using a carrier 100 for transport. The process of (transfer) is presented. 210 is a bonding layer, 220 is an electrode layer, 250 is a micro LED light emitting part, 260 is a dielectric protective film, 310 is an electrical contact.

2 is a view showing an example of a method of manufacturing a semiconductor light emitting device panel presented in US Patent No. 8,794,501, first, a support carrier to a support substrate 400, a wafer state micro LED light emitting unit 250 ) is attached (a), the growth substrate 240 is removed by a method such as laser lift-off, wet etching, etc. (b), and the semiconductor lower layer 230 is removed by a method such as polishing, wet etching, dry etching, etc. By doing so, a technique for individualizing the micro LED light emitting unit 250 is proposed. In this state, after going through the necessary processes, the micro LED light emitting unit 250 is transferred to the substrate 300 using a carrier 100 as shown in FIG. 1 to manufacture a semiconductor light emitting device panel.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure (This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to an aspect of the present disclosure (According to one aspect of the present disclosure), there is provided a method of manufacturing a semiconductor light emitting device panel, the method comprising: forming a removal layer on a growth substrate; growing a semiconductor light emitting part on the removal layer; Separating the semiconductor light emitting unit into a growth substrate; wherein, in a state in which the semiconductor light emitting unit is individualized into a plurality of semiconductor light emitting units, a removal layer between the growth substrate and each semiconductor light emitting unit is partially removed so that only a part of the removal layer is left. There is provided a method of manufacturing a semiconductor light emitting device panel comprising: separating the semiconductor light emitting unit from the growth substrate; and attaching a portion or all of the plurality of semiconductor light emitting units to the substrate so that they are electrically conductive.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in the wafer for a semiconductor light emitting device, a growth substrate; a buffer layer formed on the growth substrate; A growth prevention film formed on the buffer layer and having a plurality of numbers, the growth prevention film having a longest width of each opening of 100 µm or less; A plurality of semiconductor light emitting units grown from the buffer layer in each opening and grown apart from each other, wherein the longest width of each semiconductor light emitting unit is 100 μm or less. A wafer is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), the method comprising: forming a plurality of semiconductor light emitting units on a growth substrate; forming a first fixture on the growth substrate to cover the plurality of semiconductor light emitting units; removing a portion of the first fixture to expose top surfaces of the plurality of semiconductor light emitting units; attaching the carrier provided with the second fixture to the plurality of semiconductor light emitting units from the opposite side of the growth substrate; removing the growth substrate; and removing the first fixture so that the upper surface of the plurality of semiconductor light emitting parts is attached to the second fixture.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in the wafer for a semiconductor light emitting device, a growth substrate; a buffer layer formed on the growth substrate; A growth prevention film formed on the buffer layer and having a plurality of numbers, the growth prevention film having a longest width of each opening of 100 µm or less; A plurality of semiconductor light emitting units grown from the buffer layer in each opening and grown to be spaced apart from each other, wherein the longest width of each semiconductor light emitting unit is 100 μm or less, the longitudinal cross-section has a trapezoidal shape, and a first semiconductor having first conductivity a region, an active region generating light by recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, wherein a side active region suppression layer is formed under the first semiconductor region A wafer for a semiconductor light emitting device is provided, including a plurality of semiconductor light emitting units.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of transporting a semiconductor light emitting unit, a carrier provided with a growth substrate formed with a plurality of semiconductor light emitting units and a fixture made of porous PDMS is prepared. step; attaching a plurality of semiconductor light emitting units to a fixture; And, there is provided a method of transporting the semiconductor light emitting unit comprising; removing the growth substrate from the plurality of semiconductor light emitting unit.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

1 is a view showing an example of a method of manufacturing a semiconductor light emitting device panel presented in US Patent No. 8,349,116,
2 is a view showing an example of a method for manufacturing a semiconductor light emitting device panel presented in US Patent No. 8,794,501;
3 is a view showing an example of a method of manufacturing a semiconductor light emitting unit according to the present disclosure;
4 is a view showing another example of a method of manufacturing a semiconductor light emitting unit according to the present disclosure;
5 is a view showing another example of a method of manufacturing a semiconductor light emitting unit according to the present disclosure;
6 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
7 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
8 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
9 to 11 are views showing still other examples of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
12 to 15 are views showing examples of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
16 and 17 are views showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
18 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
19 is a view showing examples of a method of selectively transferring a semiconductor light emitting unit according to the present disclosure;
20 is photos showing examples of semiconductor light emitting units actually grown according to the method shown in FIG. 4;
21 is a view showing an example of a cross-sectional structure in which a semiconductor light-emitting part is grown according to the present disclosure and an example of a cross-sectional structure in which a semiconductor light-emitting part is grown using conventional selective growth;
22 is a view showing an example of a detailed structure of a semiconductor light emitting unit according to the present disclosure;
23 is a view illustrating various forms of a semiconductor light emitting unit manufactured according to the present disclosure;
24 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
25 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
26 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
27 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
28 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
29 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
30 is a diagram illustrating an example of a method of manufacturing a carrier according to the present disclosure;
31 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure;
32 is a view showing an example of a method of making a permanent magnet (30M) according to the present disclosure;
33 is a photograph taken of a semiconductor light emitting unit manufactured according to the present disclosure;
34 is graphs showing experimental data for the present disclosure;
35 is a view showing an example of an electronic device that can be used in the present disclosure;
36 shows another example of a method of manufacturing a carrier according to the present disclosure;
37 is a view showing an example of using the carrier shown in FIG. 36;
38 is a view showing other examples of a semiconductor light emitting unit according to the present disclosure;
39 is a view showing examples of the shape of a growth prevention film pattern used for manufacturing the semiconductor light emitting part shown in FIG. 38;
40 is a view showing other examples of the shape of the growth prevention film pattern used for manufacturing the semiconductor light emitting part shown in FIG. 38;
41 is a view showing another example of the shape of a growth prevention film pattern used for manufacturing the semiconductor light emitting part shown in FIG. 38;
42 is a view showing a semiconductor light emitting part grown using the growth prevention film pattern shown in FIG. 41;
43 to 45 are views showing various examples of growth prevention film patterns;
46 and 47 are views showing an example of a method of transporting a semiconductor light emitting unit or a semiconductor light emitting device presented in US Patent Publication No. 2019/0181122;
48 and 49 are views illustrating an example of a method of transporting a semiconductor light emitting unit or a semiconductor light emitting device to a carrier according to the present disclosure;
50 is a view showing another example of a detailed structure of a semiconductor light emitting part according to the present disclosure;
51 is a photograph showing examples of the shape of a semiconductor light emitting part according to the presence or absence of a side active region suppression layer;
52 is a photograph showing another example of the shape of a semiconductor light emitting part according to the presence or absence of a side active region suppression layer;
53 is a photograph showing examples of actual measurements of a semiconductor light emitting unit provided with a side active region suppression layer;
54 is a photograph actually taken of the semiconductor light emitting part or the semiconductor light emitting device manufactured according to the method shown in FIGS. 46 and 47;
55 is a photograph taken in reality of the form shown in FIG. 46;
Figure 56 is a diagram schematically showing the state presented in Figure 55;
57 is a view showing another example of a method of transporting a semiconductor light emitting unit or a semiconductor light emitting device to a carrier according to the present disclosure;
58 is an actual photograph of a semiconductor light emitting unit or a semiconductor light emitting device manufactured according to the method shown in FIG. 57;
59 is a photograph showing an example of a fixture made of sponge-like porous PDMS.

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings (The present disclosure will now be described in detail with reference to the accompanying drawing(s)).

3 is a view showing an example of a method of manufacturing a semiconductor light emitting part according to the present disclosure, and first, a growth substrate 10 (eg, a sapphire substrate) is prepared (step ①). The growth substrate 10 may be made of a material such as sapphire (Al ₂ O ₃ ), SiC, or Si, and there is no particular limitation as long as semiconductor growth is possible. Hereinafter, a group III nitride semiconductor is taken as an example and a sapphire substrate is used as the growth substrate 10 as an example. Next, a buffer layer or a seed layer 20 (eg, AlN) for stable growth of a semiconductor is prepared on the growth substrate 10 (step ②). The buffer layer 20 may be made of a material such as GaN, AlGaN, AlN, CrN, etc., and it is a material capable of overcoming the difference in lattice constant and thermal expansion coefficient between the growth substrate 10 and the semiconductor and growing a high-quality semiconductor. there is no Finally, the semiconductor light emitting part 30 (eg, LED) is formed on the buffer layer 20 (step ③). For example, the semiconductor light emitting unit 30 may include an n-type semiconductor layer (Si-doped GaN), an active layer (eg, InGaN/GaN multi-quantum well structure), and a p-type semiconductor layer (Mg-doped GaN). The semiconductor light emitting unit 30 is not particularly limited as long as it has a structure that uses a PN junction and emits light using recombination of electrons and holes. The buffer layer 20 and the semiconductor light emitting part 30 may be grown through a deposition method such as MOCVD.

4 is a view showing another example of a method of manufacturing a semiconductor light emitting part according to the present disclosure. First, a growth substrate 10 (eg, a sapphire substrate) is prepared (step ①; see FIG. 3 ). Next, a buffer layer 20 is formed on the growth substrate 10 (step ②; see FIG. 3 ). Next, a semiconductor growth prevention layer 21 (eg, SiO ₂ ) is formed on the buffer layer 20 (step ④). Next, a plurality of semiconductor growth openings 22 are formed in the semiconductor growth prevention film 21 (step 5). The plurality of semiconductor growth openings 22 may be formed by exposing the buffer layer 20 by patterning the semiconductor growth prevention layer 21 through a photolithography process and etching (wet or dry). In addition, the semiconductor growth prevention film 21 having a plurality of semiconductor growth openings 22 is formed with a photoresist (PR) to correspond to the plurality of semiconductor growth openings 22, and then the semiconductor growth prevention film 21 is deposited, , can be formed by removing the photoresist. The semiconductor growth prevention layer 21 may be made of a dielectric material such as SiO ₂ , SiN _x , and is not particularly limited as long as it is a material that inhibits the growth of semiconductors. It is also possible to first form the semiconductor growth prevention film 21 having a plurality of semiconductor growth openings 22 , and then to form the buffer layer 20 . The shape of the plurality of semiconductor growth openings 22 may include, for example, a hexagonal shape, a quadrangular shape (eg, trapezoidal shape, a rhombic shape), and the like, and is not particularly limited as long as the semiconductor layer can be grown. As an example, when C-plane sapphire is used as the growth substrate 10 , the surface of each semiconductor growth opening 22 may have a hexagonal shape, a quadrilateral shape, and the like to have an a-axis direction. If the surface of the growth opening 22 is in the a-axis direction, that is, the surface of the growth substrate 10 exposed by the growth opening 22 is in the a-axis direction, and the Each side is formed with an m-plane. The m-plane of the group III nitride semiconductor layer (eg, GaN) has a characteristic that it does not grow well in the m-axis direction. surface) may have the same shape as the shape of the growth opening 22 . Furthermore, by adjusting the growth conditions, the area of the upper surface of the semiconductor light emitting unit 30 may be made smaller than the area of the growth opening 22 , thereby preventing each semiconductor light emitting unit 30 from being coalesced. It becomes possible to ensure certainty, and it becomes possible to arrange the growth openings 22 more densely. In this case, the side surface of the semiconductor light emitting unit 30 is inclined to increase light extraction efficiency. In addition, since the cross-section of the semiconductor light emitting unit 30 is formed to have a symmetrical shape, there is no need to specifically consider the direction of the semiconductor light emitting unit 30 in the subsequent process, so the convenience of the process (eg, fab process) can be promoted have In summary, by adjusting the orientation of the growth opening 22 , it is possible to control the shape of the semiconductor light emitting unit 30 , thereby suppressing unexpected growth of the semiconductor light emitting unit 30 . there will be More preferably, by designing the growth opening 22 so that the side surface of the semiconductor light emitting unit 30 has an orientation or a surface in which the growth rate is not fast, it is possible to have the aforementioned advantages. The size and spacing of the plurality of semiconductor growth openings 22 may vary depending on the size of the semiconductor light emitting unit 30 to be grown. For example, if the semiconductor light emitting unit 30 has a width of 50 μm, 50 μm It is formed to have a width of μm. The interval is preferably a width in which the semiconductor light emitting parts 30 grown in the adjacent semiconductor growth openings 22 are not coalesced with each other. Finally, the semiconductor light emitting part 30 is formed (step ③'). Since the semiconductor growth prevention film 21 is formed, the semiconductor light emitting part 30 is mainly grown only in the plurality of semiconductor growth openings 22 . The shape of the semiconductor light emitting part 30 viewed from above is influenced by the shape of the plurality of semiconductor growth openings 22 , and may be formed in a hexagonal shape, a quadrangular shape (trapezoidal shape, a rhombic shape), or the like. By having such a shape, it becomes possible to increase the light extraction efficiency compared to the case where it has a simple rectangular or square shape. When the group III nitride semiconductor is grown on C-plane sapphire, the top surface is the same as the C-plane, but has m-axis and a-axis directions as shown in FIG. 4 (see FIG. 5 ).

5 is a view showing another example of a method of manufacturing a semiconductor light emitting part according to the present disclosure. First, a growth substrate 10 (eg, a sapphire substrate) is prepared (step 1; see FIG. 3 ). Next, a buffer layer 20 (eg, AlN) is formed on the growth substrate 10 (step ②; see FIG. 3 ). Next, an etch stop layer 23 (eg, SiO ₂ ) is formed on the buffer layer 20 (step: ⑤'). The etch stop layer 23 may be formed in the same manner as the semiconductor growth stop layer 22 . Next, the buffer layer 20 and the growth substrate 10 are removed through a method such as dry etching, and in this case, the region where the etch stop layer 23 is formed is maintained without being removed. The removed and exposed region 11 of the growth substrate 10 functions as a semiconductor growth prevention region. The etch stop layer 23 is removed by the same method as wet etching. The remaining buffer layer 20 may have the same shape as the growth-preventing opening 22 shown in FIG. 5 , but is not particularly limited. Finally, the semiconductor light emitting part 30 is formed on the buffer layer 20 (step ③"). Since the exposed region 11 of the growth substrate 10 functions like the semiconductor growth prevention film 21 , the semiconductor light emitting unit 30 is formed. The growth of the part 30 is mainly performed only on the remaining buffer layer 20. The shape of the semiconductor light emitting part 30 viewed from above is the same as that of the semiconductor light emitting part 30 shown in FIG.

6 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure. First, the semiconductor light emitting unit 30 manufactured according to the method shown in FIG. 3 is prepared (step ③). Next, the epi-level semiconductor light-emitting unit 30 is individualized into the chip-level semiconductor light-emitting unit 30 through etching (eg, ICP etching) (step ⑦). Herein, a method such as dry etching or wet etching may be used, and there is no particular limitation as long as the semiconductor light emitting unit 30 at the chip level can be obtained. In the process of individualization, a part of the buffer layer 20 may be left, but it is preferable to remove it in consideration of a subsequent process. Finally, a portion of the buffer layer 20 (eg, AlN) positioned between the semiconductor light emitting part 30 and the growth substrate 10 is removed through wet etching (step ⑧). The degree of etching is such that the semiconductor light emitting part 30 is still fixed to the growth substrate 10 , while the semiconductor light emitting part 30 can be easily separated from the growth substrate 10 in a subsequent process. In this sense, the buffer layer 20 may be referred to as a removal layer, and if a part of the removal layer can be removed between the growth substrate 10 and the semiconductor light emitting part 30 through wet etching, the growth substrate 10 must be It does not have to be formed in contact with . For example, when AlN is used as the buffer layer 20, KOH (Potassium hydroxide), AZ400K, KOH: ethylene glycol (mixed solution), H ₃ PO ₄ (Phosphoric acid), etc. may be used as a wet etching solution. , in the case of a KOH solution, the temperature is suitable about 20 ~ 80 ℃, and if necessary, the process can be performed at a temperature of 80 ~ 200 ℃ by adding an ethylene glycol solution. The etching time is highly dependent on the temperature of the etching solution. From minutes to tens of hours. The etching conditions may be adjusted so that the width of the buffer layer 20 remaining after etching is 20% or less of the width of the semiconductor light emitting part 30 . If necessary, a process of forming the electrode 50 in the semiconductor light emitting part 30 is performed (step ⑨). This process may vary depending on whether the semiconductor light emitting unit 30 is a lateral chip, a flip chip, or a vertical chip, and accordingly, the number of electrodes may also vary.

7 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure. First, the semiconductor light emitting unit 30 manufactured according to the method shown in FIG. 4 is prepared (step ③'). Next, the semiconductor etch stop layer 21 is removed (step ⑦ '). Of course, the buffer layer 20 may be removed during the removal process. Finally, a portion of the buffer layer 20 (eg, AlN) positioned between the semiconductor light emitting part 30 and the growth substrate 10 is removed through wet etching (step ⑧). Unlike the example shown in FIG. 6 , since the semiconductor light emitting unit 30 is already individualized in the process of epi-growth, step ⑦ is not necessary. If necessary, a process of forming the electrode 50 in the semiconductor light emitting part 30 is performed (step ⑨).

8 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure. First, the semiconductor light emitting unit 30 manufactured according to the method shown in FIG. 5 is prepared (step ③"). Next As a result, a part of the buffer layer 20 (eg, AlN) positioned between the semiconductor light emitting part 30 and the growth substrate 10 is removed by wet etching (step ⑧), which is different from the example shown in Fig. 6 , the epitaxial growth process Since the semiconductor light emitting part 30 is already individualized, step ⑦ is not necessary, and the exposed region 11 of the growth substrate 10 is provided, which further has the advantage of easy penetration of the etchant. , the process of forming the electrode 50 in the semiconductor light emitting part 30 is performed (step ⑨).

9 to 11 are views showing still other examples of a method of manufacturing a semiconductor light emitting device according to the present disclosure. Unlike the examples shown in FIGS. 6 to 10 , step ⑨ is performed prior to step ⑧. Through this, it is possible to prevent a process defect caused by separation of the growth substrate 10 and the semiconductor light emitting unit 30 due to the thin buffer layer 20 in the step of forming the electrode 50 (step ⑨). However, with respect to the example shown in FIG. 10 , the step of forming the electrode 50 (step ⑨ ) may be performed prior to the step of removing the semiconductor etch stop layer 21 (refer to FIG. 4 ) (step ⑦ ′).

12 to 15 are views illustrating examples of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure, and will be described using the semiconductor light emitting device shown in FIG. 9 as an example. Of course, it can be applied to the semiconductor light emitting device shown in FIGS. 10 and 11 .

First, as shown in FIG. 12 , at least the semiconductor light emitting part 30 is covered with a fixture 60 and fixed (step ⑩; it is also possible to surround the semiconductor light emitting part 30 so that the fixture 60 exposes the electrode 50 ) Do). As described above, the electrode 50 may be in an unformed state. The fixture 60 may be epoxy, polyimide, etc. widely used in the semiconductor process, and there is no particular limitation as long as it is a material capable of fixing the semiconductor light emitting unit 30 in a subsequent process. For example, the fixture 60 may be formed by applying an epoxy and then curing it. Next, the fixture 60 integrated with the semiconductor light emitting part 30 is separated from the growth substrate 10 (step ⑪). In general, since the bonding force between the fixture 60 and the growth substrate 10 is not high, a separation method focusing on separating the semiconductor light emitting unit 30 and the growth substrate 10 may be used. On the other hand, in the present disclosure, since the semiconductor light emitting part 30 and the growth substrate 10 are attached to each other by the buffer layer 20 from which a part has already been removed, it is not necessary to separate them without using a method such as laser lift-off. possible. For example, by attaching a vacuum chuck to both sides of the fixture 60 and the growth substrate 10 , and applying a force in the separation direction, it is possible to separate them. It goes without saying that shear stress can be applied. That is, they can be separated by mechanical force. If necessary, it is also possible to select a material that does not have high interfacial adhesion to the growth substrate 10 . As another example, in the state of step ⑨, it is also possible to prepare the carrier 71 of the form shown in Fig. 17 (a), and then remove the buffer layer 20 through wet etching. In addition, it is possible to separate the buffer layer 20 , the fixture 60 , and the growth substrate 10 using thermal stress caused by a difference in coefficient of thermal expansion between them. For example, the thermal expansion coefficient of sapphire used as the growth substrate 10 is about 7 × 10 ^-6 ℃, and the thermal expansion coefficient of the polymer generally used as the fixture 60 is about 70 × 10 ^-6 ℃, about 10 about twice as much difference. It is possible to separate by generating thermal stress between the interfaces by repeating the heating and cooling processes one to several times by using the difference in the expansion coefficient. Next, the remaining residue is removed through ashing (step ⑫). Residues can be easily removed by an ashing process using oxygen plasma. Since the actual thickness of the buffer layer 20 is about 30 nm, there is no problem even if it is not removed, and if necessary, it is possible to remove it using Ar plasma.

13 is a view showing an example of a method of transferring a flip-chip semiconductor light emitting device to a carrier according to the present disclosure. First, the carrier 70 is attached to the side (A) from which the residue is removed using an adhesive. (Step ⑬). The carrier 70 is preferably made of a material with less warpage, and may be made of, for example, glass, sapphire, or the like, and there is no particular limitation. Next, a part of the fixture 60 is removed to expose the electrode 50 (step ⑭). Next, the electrode 50 is attached to the substrate 80 on which the electrode pad 81 is provided by soldering, eutectic bonding, paste, or the like (step ⑮). Finally, the fixture 60 and the carrier 70 are removed to complete the semiconductor light emitting device panel.

14 is a view showing an example of a method of transporting a semiconductor light emitting device in the form of a vertical chip to a carrier according to the present disclosure. First, the fixing unit 60 using an adhesive on the side (B) where the electrode 50 is provided. ) is attached to the carrier 70 (step ⑬'), and an additional electrode 51 is formed on the semiconductor light emitting part 30 on the side A from which the residue is removed (step ⑭'). Next, an additional electrode 51 is attached to the substrate 80 on which the electrode pad 81 is provided (step ⑮'). Finally, the fixture 60 and the carrier 70 are removed to complete the semiconductor light emitting device panel.

15 is a view showing an example of a method of transferring a semiconductor light emitting device in the form of a lattice chip to a carrier according to the present disclosure. First, the side opposite to the side (A) from which the buffer layer 20 (see FIG. 12) is removed ( The carrier 70 is attached to C) using an adhesive (step ⑬"). Next, the side A from which the buffer layer 20 (refer to FIG. 12) is removed is attached to the substrate 80 using an adhesive. (Step ⑮"). Next, the fixture 60 and the carrier 70 are removed, the electrode 50 is exposed, and wiring (not shown) is performed by a method such as 3D printing to complete the semiconductor light emitting device panel. If desired, it is also possible that a portion of the fixture 60 is left.

16 and 17 are views showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure. After forming a vertical chip through step ⑨, immediately after forming the fixture 60 and the carrier 70 forming (step ⑩'''), removing the growth substrate 10 (step ⑪'''), forming an additional electrode 51 (step ⑬''), adding an additional fixture 61 and After attaching the carrier 76 of the (step ⑭'''), the fixture 60 and the carrier 70 are removed (step ⑭""), and the electrode 50 is placed on the substrate 80 with an electrode pad ( 81) to complete the semiconductor light emitting device panel.

18 is a view showing another example of a method for manufacturing a semiconductor light emitting device panel according to the present disclosure. After forming a vertical chip through step ⑨, growth without attachment of the fixture 60 and the carrier 70 Using the substrate 10 as a carrier, the electrode 50 and the electrode pad 81 provided on the substrate 80 are bonded (step ⑮""), and the growth substrate 10 is removed to complete the semiconductor light emitting device panel. do.

19 is a view showing examples of a method of selectively transporting a semiconductor light emitting unit according to the present disclosure, and the semiconductor light emitting unit 30 by irradiating UV using a carrier 71 to a plate to which a UV reactive tape or a UV reactive material is attached. ) selectively (one, one or more, or all), (a) using a carrier 73 (eg, a patterned silicon substrate) having a groove 72 that does not touch the semiconductor light emitting part 30 , or Methods such as (b, c) and (d) using a carrier 75 (eg, a patterned silicon substrate) provided with the projections 4 contacting the semiconductor light emitting part 30 are possible. On the other hand, as shown in (e), the carrier 76 is attached to the growth substrate 10 in a state in which the semiconductor light emitting part 30 is not separated, and then it is a chamber containing a fluid 91 (eg, water). By putting in (90) and heating and/or cooling once or several times, it is possible to cause the growth substrate 10 to separate due to the difference in coefficient of thermal expansion between the materials.

FIG. 20 is a photograph showing examples of a semiconductor light emitting part actually grown according to the method shown in FIG. 4 .

21 is a view showing an example of a cross-sectional structure in which a semiconductor light-emitting part is grown according to the present disclosure and an example of a cross-sectional structure in which a semiconductor light-emitting part is grown using conventional selective growth.

The cross-sectional structure (upper side; semiconductor light emitting device wafer) in which the semiconductor light emitting part is grown according to the present disclosure includes a growth substrate 10 , a buffer layer 20 , a growth prevention film 21 having an opening 22 formed therein, and a semiconductor light emitting part 30 . includes At point A, the growth substrate 10-buffer layer 20-semiconductor light-emitting part 30 is formed, and at point B, the growth substrate 10-buffer layer 20-growth prevention film 21-semiconductor light-emitting part 30 is formed. of the growth substrate 10 - the buffer layer 20 - the growth prevention film 21 at the point C.

The cross-sectional structure (lower side; semiconductor light emitting device wafer) in which the semiconductor light emitting part is grown using conventional selective growth has a growth substrate 10 , a buffer layer 20 , and an additional layer 24 (eg, un-doped GaN or un-doped AlGaN). ), a growth prevention film 21 having an opening 22 formed therein, and a semiconductor light emitting part 30 . It consists of growth substrate 10 - buffer layer 20 - additional layer 24 - semiconductor light emitting part 30 at point A, and growth substrate 10 - buffer layer 20 - additional layer 24 at point B. )-growth-blocking layer 21-semiconductor light emitting part 30, and at point C, growth substrate 10-buffer layer 20-additional layer 24-growth-blocking layer 21 is formed.

The additional layer 24 has a thickness of about 2 to 5 μm, and is introduced to improve the crystallinity of the semiconductor light emitting part 30 formed thereon. In a number of patent documents, the buffer layer 20 and the additional layer 24 are bundled and described as the buffer layer 20. In terms of the growth temperature, the additional layer 24 is grown at a temperature of about 1000 ° C. On the other hand, although depending on the constituent material of the buffer layer 20, it is grown at a temperature of around 500°C in the case of GaN and about 600°C in the case of AlN. In terms of thickness, the additional layer 24 has a thickness of approximately 2-5 μm, while the buffer layer 20 has a thickness of approximately 1-100 nm. By calling the buffer layer 20 a seed layer (nucleation layer), it can be distinguished from the additional layer 24 .

In addition, from the viewpoint of the growing method, it is common to grow all of the buffer layer 20 , the additional layer 24 and the semiconductor light emitting part 30 through the MOCVD method in a commercial LED, but in the present disclosure, the buffer layer 20 ; Example: AlN) may be grown by sputtering rather than MOCVD, and thus, it becomes possible to further improve the crystallinity of the semiconductor light emitting part 30 . Even in the prior art, it has been suggested to grow the buffer layer 20 by sputtering, but introducing it in the case of using selective growth causes problems in the process. That is, the buffer layer 20 is formed by the sputtering method, the additional layer 24 is formed again by the MOCVD method, and then the growth prevention film 21 is formed again by an appropriate method, followed by semiconductor light emission by the MOCVD method. It is to form the part (30). On the other hand, in the present disclosure, by omitting the additional layer 24 or growing it as a part of the semiconductor light emitting part 30 , between the formation of the buffer layer 20 (using the sputtering method) and the formation of the growth prevention film 21 . While solving the problem of additionally using the MOCVD method, it has the advantage of using the sputtering method.

On the other hand, when the additional layer 24 is disposed over the growth substrate 10 and between the growth substrate 10 and the growth prevention film 21 , the coefficient of thermal expansion of the growth substrate 10 and the additional layer 24 ) Due to the difference in the coefficient of thermal expansion, bowing occurs in the growth substrate 10 . In the case of a semiconductor light emitting device panel having a micro LED, three micro LEDs are provided in each pixel of the panel, and a precise error of about several μm is required between the micro LEDs provided in the pixel. If an error of more than a certain level already occurs from the stage of growing the semiconductor light emitting unit 30, which is an initial stage of manufacturing the semiconductor light emitting device panel, this may have a fatal effect on the manufacturing of the semiconductor light emitting device panel. According to the present disclosure, by removing the additional layer 24 between the growth substrate 10 and the growth prevention film 21 , it is possible to reduce the warpage of the growth substrate 10 resulting from the difference in the coefficient of thermal expansion.

In addition, according to the manufacturing method of the semiconductor light emitting part shown in FIG. 4 , since each semiconductor light emitting part 30 grown from each opening 22 has a shape spaced apart from each other, the semiconductor light emitting part 30 is grown after the growth is made. They do not cover the entire growth substrate 10 , and thus the warpage of the growth substrate 10 resulting from the difference between the thermal expansion coefficient of the growth substrate 10 and the thermal expansion coefficient of the semiconductor light emitting unit 30 can be reduced. Even with this form, when the width of the semiconductor light emitting unit 30 is greater than 100 μm (based on the longest width), the height of the semiconductor light emitting unit 30 increases with the increase of the width, and thus the semiconductor light emitting unit 30 ) is increased, so that warpage of the growth substrate 10 due to a difference in coefficient of thermal expansion between the growth substrate 10 and the growth substrate 10 may affect subsequent processes. The present disclosure provides an epitaxial growth method suitable for manufacturing a micro LED panel by removing the additional layer 24 between the growth substrate 10 and the growth prevention film 24 and growing each semiconductor light emitting unit 30 to be spaced apart from each other. and an epi wafer. 34 (a) shows the degree of warpage for each case. Based on the sapphire substrate (solid black line; Sapphire Sub.), it can be seen that there is almost no warpage in the case where only the AlN buffer layer 20 is grown (dotted red line; Only AlN Seed), and in the case of the method of the present disclosure (blue small Dotted line; Epi on Pattern) showed a warpage of about 3.5 μm, and in the case of the conventional method (blue long dotted line; Epi on Planar), a warpage of about 53.3 μm was observed.

On the other hand, in the case of manufacturing the semiconductor light emitting unit 30 by the method shown in FIG. 6 , the side surface of the semiconductor light emitting unit 30 may be damaged in the process of dry etching (eg, ICP), and the effect of such damage is It is known that as the size of the light emitting part 30 decreases, it increases (Electro-Optical Size-Dependence Investigation in GaN Micro-LED Devices Anis Daami, Francois Olivier, Ludovic Dupre, Franck Henry and Francois Templier, CEA-LETI Grenoble, France) ). By growing the semiconductor light emitting part 30 by the method shown in FIG. 4 , this concern can also be reduced.

In addition, in the case of using the buffer layer 20 (eg, AlN) formed by the sputtering method, the crystallinity of the semiconductor light emitting unit 30 grown thereon over the entire region based on the FWHM of the x-ray (002), ( 102) was confirmed to be less than 200 arcsec. Comparison data with the GaN seed layer is shown in FIGS. 34 ( b ) and 34 ( c ).

In addition, in the case of the conventional semiconductor light emitting unit 30, since the additional layer 24 is present at the point C, a process for separating the growth substrate 10 and the semiconductor light emitting unit 30 (eg, CLO (Chemical Lift)) -Off) and LLO (Laser Lift-Off)), there is a problem in that their separation is not easy, but the cross-sectional structure (semiconductor light emitting device wafer) according to the present disclosure solves this problem.

22 is a diagram illustrating an example of a detailed structure of a semiconductor light emitting unit according to the present disclosure, wherein the semiconductor light emitting unit 30 includes a first semiconductor layer 31 having a first conductivity; for example, an n-type semiconductor layer (Si-doped GaN). )), an active layer 32 for generating light by recombination of electrons and holes (eg, InGaN/(In)GaN multi-quantum well structure), and a second semiconductor layer 33 having a second conductivity different from the first conductivity ; Example: p-type semiconductor layer (Mg-doped GaN)).

When the active layer 32 and the second semiconductor layer 33 are also formed on the side surface of the first semiconductor layer 31, the problem that the active layer 32 is reduced due to a decrease in the chip size according to the manufacture of the micro LED is partially solved. may have the advantage of resolving it. As shown in FIG. 33( g ), the TEM photograph shows that the active layer 32 is formed on the side surface of the semiconductor light emitting part 30 . The following conditions may be used for its formation.

1) Buffer layer growth conditions: sputtering method, growth temperature 400~700℃, thickness: 1~100nm, Al target is used, Ar+N ₂ gas is used.

2) Growth prevention film production conditions: PECVD use, growth temperature: 200-300℃, thickness: 100-500nm, SiH ₄ + N ₂ O gas is used.

3) Growing conditions for semiconductor light emitting part: MOCVD, conventional semiconductor light emitting part growth method, but using the conventional quantum well growth method, the growth rate in the vertical direction is about 3 times faster, and the growth rate in the lateral direction is 20-40% slower than that. Taking this into consideration, the growth temperature and pressure are adjusted to form a quantum well.

23 is a view illustrating various forms of a semiconductor light emitting unit manufactured according to the present disclosure, and has the form of a semiconductor light emitting unit 30 in which a first electrode 50 and an additional electrode or a second electrode 51 are formed, This may be referred to as a semiconductor light emitting chip.

In FIG. 23A , the semiconductor light emitting chip includes a semiconductor light emitting unit 30 , a first electrode 50 and a second electrode 51 , and the semiconductor light emitting unit 30 includes a first semiconductor layer 31 , It includes an active layer 32 and a second semiconductor layer 33 . The first electrode 50 is electrically connected to the second semiconductor layer 33 , and the second electrode 51 is electrically connected to the first semiconductor layer 31 . By removing the second semiconductor layer 33 and the active layer 32 through etching to expose a portion of the first semiconductor layer 31 , the second electrode 51 is electrically connected to the first semiconductor layer 31 or can be contacted.

In FIG. 23( b ), when the first electrode 50 is spread widely on the second semiconductor layer 33 , and the first electrode 50 is configured to include Ag and/or Al to function as a reflective film, It can be pasted on the power supply board (eg PCB, TFT Back Plane) in an inverted form. This form is referred to as a flip chip. If necessary, a distributed Bragg reflector (DBR; for example, a SiO ₂ /TiO ₂ multilayer stacked film) may be provided between the first electrode 50 and the second semiconductor layer 33 .

In FIG. 23( c ) , the second electrode 51 is in electrical contact with the first semiconductor layer 31 on the opposite side of the second semiconductor layer 33 with respect to the active layer 32 . The sizes of the first electrode 50 and the second electrode 51 may vary depending on whether the first electrode 50 is in contact with the power supply substrate or the second electrode 51 is in contact with the power supply substrate. In view of current flow, this type of chip is called a vertical chip.

In FIG. 23( d ), the first electrode 50 is located on the side of the device. Although the first electrode 50 may function as a reflective film, it is also possible to pass light by being made of only a light-transmitting material such as indium tin oxide (ITO). Through a necessary chip process, the second electrode 51 may be in contact with the power supply substrate. Fig. 33 (a) shows an example of the shape of the epi (trapezoidal epi). The cross section may have various shapes such as a rectangle, a hexagon, and a trapezoid. The first electrode 50 may be formed on the entire second semiconductor layer 33 , or may be formed on a part of the second semiconductor layer 33 . That is, when the cross section of the semiconductor light emitting unit 30 is polygonal, it may be formed on at least one side surface thereof.

In FIG. 23(e), a structure in which the second electrode 51 is in electrical contact with the first semiconducting layer 31 on the opposite side to FIG. 23(d) is presented.

In FIG. 23(f) , the semiconductor light emitting part 30 includes an additional active layer 32b. This shape is made possible by exposing the first semiconductor layer 31 in two stages through two etching processes. A third electrode 52 and a fourth electrode 53 are further provided to emit light of the additional active layer 32b. Since the second electrode 51 is provided in the first semiconductor layer 31 , it is also possible to omit the fourth electrode 53 . Although the active layer 31 formed on the inclined surface is made of the same material as the additional active layer 32b formed on the upper flat surface, it is known that it can emit light of different wavelengths depending on its growth conditions, and thus Accordingly, it becomes possible to emit light of different wavelengths through one semiconductor light emitting unit 30 (ACS Photonics, 2015, 2 (4), pp 515-520, Red Emission of InGaN/GaN Double Heterostructures on GaN Nanopyramid Structures) )).

In Fig. 23(g), the semiconductor light emitting part 30 has a polygonal weight shape (refer to Fig. 33(b)).

24 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure, and will be described using the semiconductor light emitting device shown in FIG. 23A as an example.

First, as shown in FIG. 24A , the growth substrate 10 including the semiconductor light emitting unit 30 at the chip level is prepared.

Next, as in FIG. 24(b) , a carrier 71 (refer to FIG. 19(a)) is attached to the semiconductor light-emitting unit 30 , and then the growth substrate 10 is separated from the semiconductor light-emitting unit 30 . . In the case of using wet etching, preferably, the carrier 71 is provided with a plurality of holes 77 , so that the etchant can easily penetrate through the plurality of holes 77 . In the process of wet etching, a rough surface (refer to FIG. 33(c) ) is formed on the lower surface of the semiconductor light emitting part 30 (the surface facing the growth substrate 10 ), which absorbs the light generated by the active layer 32 . It contributes to increase the external quantum efficiency of the device by scattering.

Finally, as shown in FIG. 24 ( c ), the semiconductor light emitting part 30 is attached to the substrate 80 provided with an adhesive (not shown), and the carrier 71 is separated by irradiating UV. A method such as 3D printing may be used for electrical connection between the substrate 80 and the semiconductor light emitting unit 30 . Of course, an attachment method and an electrical connection method may vary according to various shapes of the semiconductor light emitting unit 30 shown in FIG. 23 .

25 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure, and will be described using the semiconductor light emitting device shown in FIG. 23(c) as an example. The semiconductor light emitting unit 30 includes only the first electrode 50 while being attached to the growth substrate 10 .

25(a) and 25(b) are the same as FIGS. 24(a) and 24(b).

Next, as shown in FIG. 25(c), the semiconductor light emitting part 30 separated from the growth substrate 10 is attached to the additional carrier 79, and then UV is irradiated to the carrier 71 to irradiate the carrier. 71 is separated from the semiconductor light emitting part 30 . The additional carrier 79 may have the same shape as the carrier 71 (except for the plurality of holes 77 ).

Next, as shown in FIG. 25( d ), the semiconductor light emitting unit 30 is attached to the substrate 80 using an additional carrier 79 , and then UV is irradiated to cause the additional carrier 79 to emit semiconductor light. separate from the part 30 .

Finally, as shown in FIG. 25E , the second electrode 51 is formed in the semiconductor light emitting part 30 . It goes without saying that an attachment method and an electrical connection method may vary according to various shapes of the semiconductor light emitting unit 30 shown in FIG. 23 .

26 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure. As in FIG. 26(a), the state of the semiconductor light emitting unit 30 shown in FIG. 22 is used.

Next, as shown in FIG. 26(b) , in a state in which the fixture 60 is disposed around the semiconductor light emitting part 30 and the first electrode 50 is positioned thereon, the electrode pad 81 is provided on the substrate (80) is attached.

Next, as shown in FIG. 26( c ), the growth substrate 10 is separated using a laser.

Next, as shown in FIG. 26( d ), the second electrode 51 is formed on the first semiconductor layer 31 .

Finally, as shown in Fig. 26 (e), the fixture 60 is removed.

27 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure. At least two types of LEDs are provided in one growth substrate 10, and the growth substrate 10 is a Used for growth or used for transport.

First, as shown in FIG. 27A , the semiconductor light emitting part 30B emitting blue light is grown. The semiconductor light emitting part 30B may have the shape shown in FIG. 22 , and except for the region in which the semiconductor light emitting part 30B is grown, the opening 22 is not formed in the growth prevention layer 21 . can be formed

Next, as shown in FIG. 27B , the semiconductor light emitting part 30G emitting green light is grown. The semiconductor light emitting part 30G may have the shape shown in FIG. 22, and in a state in which the semiconductor light emitting part 30B is covered with a growth preventing material such as SiO ₂ , an opening ( 22), the semiconductor light emitting part 30G can be grown. By adjusting the amount of indium (In) used in the active layer 32 (InGaN/(In)GaN quantum well structure), it is possible to emit blue or green light. In addition, after the first semiconductor layer 31 is grown in a state in which the opening 22 for growth of the semiconductor light emitting part 30B and the semiconductor light emitting part 30G is formed in the growth prevention layer 21 , the above-described process It is also possible to complete the semiconductor light emitting part 30B and the semiconductor light emitting part 30G respectively. In this case, there is an advantage in that thermal damage to the active layer constituting the semiconductor light emitting part 30G can be reduced.

Next, as shown in FIG. 27C , the semiconductor light emitting unit 30R emitting red light may be placed on the growth substrate 10 . This can be done with the growth prevention film 21 removed. It is possible, but not preferable, to grow the semiconductor light emitting part 30R and the semiconductor light emitting part 30G in a state in which the semiconductor light emitting part 30R is brought to the growth substrate 10 and covered with a growth material such as SiO ₂ . It is possible to bring the semiconductor light emitting part 30B or the semiconductor light emitting part 30G without growing, but it is not preferable in view of precision. Although it is possible to grow the semiconductor light emitting part 30R on the growth substrate 10 , it is not preferable in consideration of the material (eg, InP, GaAs) constituting the semiconductor light emitting part 30R and its growth conditions. On the other hand, as described above, in the structure of the semiconductor light emitting unit 22 shown in FIG. 22 , it is known that it is possible to emit red light from the active layer 32 formed on the side surface of the semiconductor light emitting unit 22 , but it is still in the stage of commercialization. It's not early. Although it is possible to grow the semiconductor light emitting part 30G prior to the semiconductor light emitting part 30B, it is not preferable.

Finally, as shown in FIG. 27( d ), after the necessary chip process is performed, the semiconductor light emitting device panel can be manufactured by attaching it to the substrate 80 and removing the growth substrate 10 . Through this process, it is possible to reduce an error occurring in a space between the semiconductor light emitting units 30B, 30G, and 30R despite the panel being manufactured at the micro LED level. It is also possible to cut and use the growth substrate 10 according to specifications.

On the other hand, as shown in FIG. 27E , the semiconductor light emitting part 30B and the semiconductor foot 30BR are grown on the growth substrate 10 . The semiconductor light emitting unit 30B and the semiconductor light emitting unit 30BR emit blue light in the same way, but as will be described later, the semiconductor light emitting unit 30BR is excited by the semiconductor light emitting unit 30BR to emit red light. A conversion material (30P; eg, phosphor, quantum dot) is additionally applied.

Next, as shown in FIG. 27(f) , the semiconductor light emitting part 30G emitting green light is grown.

Next, as shown in FIG. 27( g ), a light conversion material 30P is applied to the semiconductor light emitting part 30BR.

Finally, as shown in FIG. 27(h) , after the necessary chip process is performed, the semiconductor light emitting device panel can be manufactured by attaching it to the substrate 80 and removing the growth substrate 10 . Also in composing the semiconductor light emitting part 30G, after the semiconductor light emitting part 30B is grown, a light conversion member that is excited to blue emitted from the semiconductor light emitting part 30B and emits green is applied, whereby the semiconductor light emitting part 30G is formed. ), it is possible to make It is also possible to use the semiconductor light emitting part 30G for the light conversion material 30P. By using the method shown in Figs. 27(e) to 27(h), an error with respect to the positions of the semiconductor light emitting parts 30B, 30G, and 30BR forms the opening 22 in the growth prevention film 21 in the lithography process. is reduced to the error range of , and it is possible to satisfy the error range required for each pixel of the panel using the micro LED. Furthermore, according to the present disclosure, by using the epi-wafer structure as shown in FIG. 22 , it is possible to reduce the warpage of the growth substrate 10 caused by the difference in the coefficient of thermal expansion between the growth substrate 10 and the semiconductor light emitting unit 30 , and then While eliminating errors in the process of It is possible to satisfy the error range required for each pixel of the panel. That is, there are a number of examples in which LEDs emitting light of different colors are grown on one growth substrate 10 in the prior art. It was not easy to satisfy the tolerance required for each pixel of the used panel.

28 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure, as in FIG. 28 (a), in the state shown in FIG. (30B, 30G) is attached.

Next, as shown in FIG. 28B , the semiconductor light emitting unit 30R is attached to the substrate 80 using the substrate 11 , and a necessary chip process is subsequently performed.

Meanwhile, as shown in FIG. 28(c), the semiconductor light emitting units 30B, 30G, and 30BR are attached to the substrate 80 in the state shown in FIG. 27(f).

Next, as shown in FIG. 28(d) , the light conversion member 30P is applied to the semiconductor light emitting unit 30BR, and a necessary chip process may be subsequently performed.

29 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure. The method of forming the semiconductor light emitting units 30B, 30G, and 30R is the same as that of FIG. 27 , but the growth substrate 10 An electronic device such as a switch (eg, HEMT, BJT, MESFET) and/or an ESD prevention diode for driving the semiconductor light emitting units 30B, 30G, and 30R is added.

First, as shown in FIGS. 29A and 29B , the semiconductor light emitting parts 30B and 30G are grown.

Next, as shown in FIG. 29(c), an epitaxial structure 30D for an electronic device is grown by using an epitaxial growth method such as MOCVD. 35 shows an example of a transistor formed on the growth substrate 10 , the buffer layer 20 , and the growth prevention layer 21 . The lower portion of the epi structure 30D for an electronic device has the same structure as the lower portion of the semiconductor light emitting unit 30 shown in FIG. 22 , so that it can be easily separated from the growth substrate 10 , and Of course, whip can be reduced. 33(d) shows an example of an epitaxial structure 30D for an electronic device as a photograph.

Next, as shown in Fig. 29(d), the semiconductor light emitting part 30R is placed. It goes without saying that the order of forming the semiconductor light emitting units 30B, 30G, and 30R and the order of forming the epitaxial structure 30D for an electronic device may be changed.

Finally, as shown in FIG. 29(e), the epi structure 30D for an electronic device is etched into the switches 30BT, 30GT, and 30RT for each of the semiconductor light emitting units 30B, 30G, and 30R, and the wiring ( W) is performed.

As in FIGS. 29(f) and 29(g), without making the epitaxial structure 30D for an electronic device, the switches 30BT, 30GT, and 30RT are directly formed (growing or brought), and the wiring W ) is also possible.

By taking this form, the growth substrate 10 itself provided with the semiconductor light emitting units 30B, 30G, 30R and the switches 30BT, 30GT, 30RT is used as a display, or the growth substrate 10 is used as a substrate ( 80) can be used by attaching it.

30 is a diagram illustrating an example of a method of manufacturing a carrier according to the present disclosure.

First, as shown in FIG. 30( a ), a semiconductor layer 30S is grown on a growth substrate 10S for preparing a carrier. 33(e) shows an example of the semiconductor layer 30S grown on the growth substrate 10S as a photograph. In this case, a part of the semiconductor layer 30S may be formed in a different shape (eg, a cross shape) and used as the alignment key 30A. The shape of the alignment key 30A may be adjusted by changing the shape of the opening 22 in the growth prevention layer 21 or through etching after growth. For example, four alignment keys 30A may be formed near the edge of the growth substrate 10 at an angle of 90°.

Next, as shown in Figure 30 (b), intaglio (S; engraving material) is provided with a carrier (70S) is prepared.

Next, as shown in FIG. 30 ( c ), the intaglio material S is pressed into the growth substrate 10S on which the semiconductor layer 30S is grown.

When the intaglio (S) is a UV curing material, as in FIG. 30(d), the shape of the semiconductor layer (30S) imprinted on the intaglio (S) by irradiating UV, that is, the shape of the opening (70H) can be fixed. In this case, the carrier 70S may be made of a light-transmitting material (eg, plastic, glass). When the semiconductor layer 30S includes the alignment key 30A, the opening 70H also includes the alignment opening 70A. 33(f) shows an example of the opening 70H as a photograph

By manufacturing the carrier 70S in this way, the size of the plurality of openings 70H provided in the carrier 70S and the spacing therebetween can be formed with an error within the error range that occurs in the process of epi-growth. will have

Next, as in FIG. 30(e), an adhesive 70P is applied.

Next, as shown in FIG. 30(f) , the semiconductor light emitting part 30B is brought to the opening 70H of the carrier 70S using the growth substrate 10 . Preferably, the growth substrate 10 is also provided with an alignment key 30A, and the alignment key 30A is inserted into the alignment opening 70A of the carrier 70S, so that the growth substrate 10 and the carrier 70S ) can be sorted. On the other hand, the opening 70H is formed slightly larger than the semiconductor light emitting part 30B so that the semiconductor light emitting part 30B can be located, which is the size of the semiconductor layer 30S of the growth substrate 10S for producing a carrier. This becomes possible by forming it slightly larger than the size of the portion 30B.

Next, as shown in FIG. 30( g ), after the growth substrate 10 is removed, the semiconductor light emitting part 30B placed on the carrier 70S is brought to the substrate 80 . In the case where the adhesive 70P loses adhesion when irradiated with UV, the carrier 70S may be separated from the semiconductor light emitting unit 30B by irradiating UV. By moving the semiconductor light emitting unit 30B to the carrier 70S having an error of a degree generated in the epitaxial growth process, and then moving the semiconductor light emitting unit 30B to the substrate 80 using the carrier 70S, the transfer Errors occurring in the process can be significantly reduced.

Finally, as shown in FIG. 30(h) , the semiconductor light emitting units 30G and 30R may also be positioned on the substrate 80 in the same manner.

31 is a view showing another example of a method of manufacturing a semiconductor light emitting device panel according to the present disclosure, wherein the semiconductor light emitting device panel is manufactured using a permanent magnet and an electromagnet.

First, as shown in FIG. 31A , the first electrode 50M is formed on the semiconductor light emitting part 30B, and preferably, it is formed to include a ferro-magnetic material (eg, Fe, Ni, Co).

Next, as shown in FIG. 31B , the semiconductor light emitting part 30B is attached to the carrier 70S. An adhesive 70P may be used to fix the semiconductor light emitting part 30B. The carrier 70S is not particularly limited, but, for example, the carrier 70S of the type shown in FIG. 30 may be used.

Next, as shown in FIG. 31( c ), the growth substrate 10 is removed.

Next, as shown in Fig. 31 (d), the electromagnet 70E is positioned on the side of the carrier 70S.

Next, as in FIG. 31(e), as in FIG. 30(h), the adhesive force by the adhesive 70P between the carrier 70S and the semiconductor light emitting part 30B is released by irradiating UV. However, by the electromagnet 70E, the semiconductor light emitting part 30B maintains a state fixed to the carrier 70S.

Next, as in FIGS. 31 (f) and 31 (g), the carrier 10M having the permanent magnet 30M is positioned in the semiconductor light emitting part 30B, and then the magnetic force of the electromagnet 70E is released. After that, the semiconductor light emitting unit 30B is separated from the carrier 70S by using the carrier 10M. The shape of the permanent magnet 30M is not particularly limited, but by using the method shown in FIG. 32 , the scale of the permanent magnet 30M can be easily matched with the scale of the semiconductor light emitting unit 30B.

Next, as in FIGS. 31 (h) and 31 (i), after positioning the semiconductor light emitting unit 30B on the substrate 80 provided with the electromagnet 70E, the carrier 10M is transferred to the semiconductor light emitting unit ( 30B). In this case, the magnetic force generated by the electromagnet 70E is greater than that of the permanent magnet 30M, so that the carrier 10M may be separated from the substrate 80 while the semiconductor light emitting unit 30B is fixed to the substrate 80 . Of course, the methods described above may be used for the physical and electrical coupling of the semiconductor light emitting unit 30B and the substrate 80 .

Finally, as in FIG. 31(j) , it is possible to position the semiconductor light emitting units 30G and 30R on the substrate 80 in the same manner.

On the other hand, in FIG. 31 , the carrier 70S is used in the process of transferring the semiconductor light emitting unit 30B to the substrate 80 , but depending on the shape of the chip, the carrier 10M is directly transferred without using the carrier 70S. After attaching to the semiconductor light emitting part 30B on the growth substrate 10 and removing the growth substrate 10 , it is also possible to transfer the semiconductor light emitting part 30B to the substrate 80 .

32 is a view showing an example of a method of making a permanent magnet 30M according to the present disclosure, wherein the first electrode 50M is formed on the semiconductor light emitting part 30M in the same manner as in FIG. 31 (a), Preferably, it is formed to include a ferro-magnetic material (eg, Fe, Ni, Co). Next, as shown in FIG. 32 , by applying heat below the Curie temperature in a state in which a magnetic field is applied, and then rapidly cooling, it is possible to make a carrier 10M having a permanent magnet 30M. In the process of Figs. 30 to 32, preferably, the growth substrate 10, the carrier 70S, and the carrier 10M are all provided with the alignment key 30A and the alignment opening 70A shown in Fig. 30, so that these It becomes possible to reduce the alignment error between the Here, the distance between each of the semiconductor light emitting units 30M may vary depending on the number of semiconductor light emitting units 30B (refer to FIG. 31 ) to be transferred, the shape of the substrate 80 , and the like.

By using the epi wafers 10 and 30 shown in FIG. 4, the epi stamps 10S and 30S shown in FIG. 30, and the epi carriers 10M, 30M, and 50M shown in FIG. panel can be manufactured. That is, all errors occurring in the process are reduced to the range of errors occurring in epi-growth. More precisely, the pattern is given by the growth prevention film 21 in the epi wafers 10 and 30, and in the case of the epi carriers 10M, 30M and 50M, the growth prevention film 21 of the epi wafer 10, 30 Although the same pattern as, a slightly larger pattern is used, and the epi-carriers 10M, 30M, and 50M selectively transport the semiconductor light-emitting unit 30 of the epi-wafers 10 and 30, so the epi-wafers 10, 30 ) is the same pattern as the growth prevention film 21, but a pattern in which a part is blocked is used.

Furthermore, by using the structure shown in FIG. 22 , the warpage of the growth substrate 10 is reduced, and as the size of the chip decreases, the influence caused by damage to the side of the chip due to dry etching (eg, ICP) is fundamentally prevented from increasing. In addition, although the buffer layer 20 is formed by the sputtering method, the addition of the process is reduced, and by removing the buffer layer 20 using wet etching, it is possible to reduce the addition of a huge cost associated with the LLO.

36 is a view showing another example of a method of manufacturing a carrier according to the present disclosure, wherein the growth substrate 10S for manufacturing the carrier serves as the carrier 70S.

First, as shown in FIG. 36A , a growth prevention film 21S is formed on the growth substrate 10S. In this case, the shape of the growth prevention layer 21S may have the shape shown in FIG. 33( a ). That is, the growth prevention film 21S has the shape of the semiconductor light emitting part shown in FIG. 20 .

Next, as shown in FIG. 36(b), the semiconductor layer 30S is grown. This may have the same structure as that of the semiconductor light emitting unit 30 or may simply be formed of a nitride semiconductor such as GaN.

Finally, as shown in FIG. 36(c), the growth prevention film 21S is removed. The semiconductor layer 30S from which the growth prevention film 21S has been removed has the shape shown in FIG. 33(f) and functions as a carrier having the same shape as the opening 70S shown in FIG. By using such a carrier (10S, 30S), it is possible to use a carrier made of the same material as the epi-wafer (10, 30), and thus it is possible to perform the same behavior to thermal and mechanical deformation occurring in various processes, has the advantage of reducing

37 is a view showing an example of using the carrier shown in FIG. 36. By forming the opening 30S slightly smaller than the size of the semiconductor light emitting unit 30 to be transferred, the semiconductor light emitting unit 30 is connected to the opening 30S. An example of being transported in a state of being inserted is shown. Of course, the size of the opening 30S may be larger than that of the semiconductor light emitting part 30 .

On the other hand, in the case of the semiconductor light emitting unit 30 shown in FIG. 22 , the active layer 32 is also formed on the top and side surfaces of the semiconductor light emitting unit 30 , and in view of the wavelength of light generated in the active layer 32 , the demand Depending on the specifications to be used, there may be an issue in which the wavelengths of the light generated from the active layer 32 on the upper surface and the light generated from the active layer 32 on the side should be matched within a certain range. From this point of view, the semiconductor light emitting unit 30 having a polygonal pyramid shape shown in FIGS. 23 ( g ) and 33 ( b ) may be considered (a form in which the active layer 32 on the upper surface is removed or minimized or the active layer 32 ) inclined from this side). However, in the case of the semiconductor light emitting unit 30 having a polygonal weight shape, attention is required to erect the semiconductor light emitting unit 30 so as not to fall over the substrate, PCB, carrier, etc., such as the carrier shown in FIG. 37(b) is required. do. Hereinafter, a method for solving this problem will be reviewed in the process (epi-level) of growing the semiconductor light emitting unit 30 .

38 is a view showing other examples of a semiconductor light emitting unit according to the present disclosure, in which two sub light emitting units 30-1 and 30-2 form one semiconductor light emitting unit 30 in FIG. In FIG. 38B , three sub light emitting units 30 - 1 , 30 - 2 , 30 - 3 and 30 - 4 constitute one semiconductor light emitting unit 30 . Each of the sub-light emitting units 30-1, 30-2, 30-3, and 30-4 may have a polygonal pyramid shape or a triangular cross-section, and the corners 30-1a, 30-2a, 30-3a and 30-4a) are used to erect the semiconductor light emitting part 30 . Unexplained reference numeral 10 denotes a growth substrate, 20 denotes a buffer layer, and 21 denotes a growth prevention film.

FIG. 39 is a view showing examples of the shape of a growth prevention film pattern used for manufacturing the semiconductor light emitting part shown in FIG. 38 , each corresponding to one growth opening 22 shown in FIG. 4 . One or more sub-growth prevention films 22a, 22b, and 22c are provided in the growth opening 22 . A semiconductor light emitting portion is grown in the region of the growth opening 22 except for the sub growth prevention films 22a, 22b, and 22c, and by using the two sub growth prevention films 22b and 22c, the semiconductor light emitting shown in Fig. 38(b) is used. It is possible to manufacture the part 30 . In the corners 30-1a, 30-2a, 30-3a, and 30-4a formed at this time, the corners 30-1a and 30-4a form a closed curve, and the corners 30-2a, 30-3a forms a closed curve. In the case of using the growth prevention film pattern P shown in FIG. 39( a ), three closed curves may be formed. When the growth prevention film pattern P shown in FIG. 39(a) is used, a circular closed curve or a circular closed curve edge is formed (a hexagonal closed curve or a hexagonal closed curve edge may be formed depending on the growth conditions) ), using the growth prevention film pattern P shown in FIG. 39(b), a hexagonal closed curve or a hexagonal closed curved edge is formed. In the case of FIG. 39(b) , the semiconductor light emitting part has a shape of a vertex rather than a closed curve at the center. For example, in the case of the growth prevention film pattern P of Fig. 39(a), the diameter of the 78 µm, the width of the sub growth prevention film of 8 µm, the exposure opening for growth of 7 µm, and the sub growth prevention film 22c of 4 µm can have a diameter. In the case of the growth prevention film pattern (P) of Fig. 39(b), the side length of 48 µm, the sub-growth prevention film width (B) of 8 µm, 7 µm or 6 µm, and for growth of 5.5 µm, 6.5 µm or 7.5 µm It may have an opening exposure (A), an exposure of a central growth prevention film with a diameter of 3 μm.

40 is a view showing other examples of the shape of the growth prevention film pattern used in manufacturing the semiconductor light emitting part shown in FIG. 38. By using the growth prevention film pattern P shown in FIG. 40(a), it has one circular closed curved edge. A semiconductor light emitting part can be manufactured. For example, a 9 μm diameter growth opening 22 and a 3 μm diameter sub growth prevention film 22c are used, or a 6 μm diameter growth opening 22 and a 2 μm diameter sub growth prevention film 22c are used. is available. By using the growth prevention film pattern P shown in FIG. 40( b ), a semiconductor light emitting part having one hexagonal closed curved corner may be manufactured. For example, a growth opening 22 having a height of 6 μm and a side length of 3.46 μm and a sub-growth prevention film 22c having a diameter of 2 μm are used, or a growth opening having a height of 8 μm and a side length of 4.62 μm is used. (22) and a sub-growth prevention film 22c having a diameter of 4 mu m can be used. The distance between each pattern P may be adjusted, for example, 9 μm or 14 μm, and there is no particular limitation as long as the semiconductor light emitting parts grown in each pattern P do not interfere with each other.

41 is another example of a shape of a growth prevention film pattern used for manufacturing the semiconductor light emitting part shown in FIG. 38 , and a plurality of sub-growth openings 22-1, 22-2, 22-3 in the growth prevention film 21 are shown. , 22-4, 22-5, 22-6, 22-7) correspond to one growth opening shown in FIG. 4 and constitute one growth prevention film pattern P. In Fig. 41, seven sub-growth openings 22-1, 22-2, 22-3, 22-4, 22-5, 22-6, 22-7 constitute a hexagonal growth prevention film pattern P. .

FIG. 42 is a view illustrating a semiconductor light emitting part grown using the growth prevention layer pattern shown in FIG. 41 . Corners to vertices 30-1a, 30-2a, 30-3a, 30 of the sub light emitting units 30-1, 30-2, 30-3, 30-4, 30-5, 30-6, 30-7 -4a, 30-5a, 30-6a, 30-7a) are used to erect the semiconductor light emitting part 30 . Of course, the number of sub-light emitting units may be arbitrarily adjusted.

43 to 45 are views showing various examples of growth prevention film patterns. 30-7), a growth prevention film pattern P having a hexagonal shape as a whole is presented. In this case, the sub-growth opening 22-2 may have a diameter of 3 μm, and the interval between each pattern P may be 12 μm. 44 shows a growth prevention film pattern P in which the four sub light-emitting units 30-1, 30-2, 30-3, and 30-4 have a rhombic shape as a whole. It may be formed to have a temperature of 60° C. Fig. 45 shows a growth prevention film pattern P in which the three sub light emitting units 30-1, 30-2, and 30-3 have a hexagonal shape as a whole.

46 and 47 are views illustrating an example of a method of transporting a semiconductor light emitting unit or a semiconductor light emitting device disclosed in US Patent Publication No. 2019/0181122. In FIG. 46, a semiconductor light emitting unit or a semiconductor light emitting device 200R is In a state of being fixed to the growth substrate 102, a fixture 304 (eg, polydimethylsiloxane (PDMS) is attached to the carrier 302. In Figure 47, the growth substrate 102 is removed by laser lift-off (LLO)). The semiconductor light emitting part or the semiconductor light emitting device 200R is attached to the carrier 302, but in the presented example, the fixture 304 does not completely surround the semiconductor light emitting part or the semiconductor light emitting device 200R, that is, the semiconductor Since only one surface of the light emitting part or the semiconductor light emitting device 200R is attached to the fixture 304, there is a problem in that the semiconductor light emitting part or the semiconductor light emitting device 200R is distorted or damaged in the LLO process. As shown in 16 , a form in which the fixture 60 surrounds the semiconductor light emitting part 30 or the semiconductor light emitting device (the form in which the electrode 50 is formed in the semiconductor light emitting part 30) may be considered, but the fixture 60; yes : There is a problem in that it is not easy to remove the semiconductor light emitting unit 30 or the semiconductor light emitting device from the fixture 60 after step ⑪'' or step ⑬'' due to the adhesiveness of the PR, PDMS).

48 and 49 are views illustrating an example of a method of transferring a semiconductor light emitting unit or a semiconductor light emitting device to a carrier according to the present disclosure. First, as shown in FIG. 48 ( a ), a semiconductor on a growth substrate 10 . The light emitting unit 30 or the semiconductor light emitting device (the electrode is formed on the semiconductor light emitting unit 30 and may have the form of a lateral chip, a flip chip, or a vertical chip; see FIGS. 6 and 15 ), that is, at least a semiconductor The light emitting part 30 is formed. Of course, the semiconductor light emitting unit 30 may be formed by the method described above, and it is sufficient that the semiconductor light emitting unit 30 is isolated through etching (eg, ICP etching) by a conventional method.

Next, as shown in FIG. 48(b) , a first fixture 60a is formed on the growth substrate 10 to cover the entire semiconductor light emitting unit 30 to the semiconductor light emitting device. The first fixture 60a may be formed of, for example, photoresist PR.

Next, as shown in FIG. 48(c) , a portion of the first fixture 60 is removed to expose the semiconductor light emitting unit 30 or the upper surface of the semiconductor light emitting device. When the first fixture 60 is a photoresist (PR), PR ashing (O ₂ plasma ashing) may be used.

Next, as shown in FIGS. 49 ( a ) and 49 ( b ), the carrier 70 provided with the second fixture 60 b is transferred from the opposite side of the growth substrate 10 to the semiconductor light emitting unit 30 or the semiconductor After being attached to the light emitting device, the growth substrate 10 is removed through laser lift-off (LLO), and the semiconductor light emitting unit 30 or the lower surface of the semiconductor light emitting device is exposed. In the process of laser lift-off (LLO), since the first fixture 60a and the second fixture 60b surround and cover the entire semiconductor light emitting part 30 or the semiconductor light emitting device, despite the laser's impact, the semiconductor light emitting part ( 30) or it is possible to prevent distortion or cracking of the semiconductor light emitting device. If necessary, a process of forming an electrode may be added. For example, the second fixture 60b may be formed of PDMS, and there is no limitation as long as the adhesive can well withstand the removal process (PR ashing) of the first fixture 60a.

Finally, as shown in Figure 49 (c), the first fixture (60a) is removed. This removal process is preferably a process in which the second fixture 60b is not removed, and when the first fixture 60a is a photoresist PR, PR ashing (O ₂ plasma ashing) may be used. Through this method, there is no distortion of the semiconductor light emitting unit 30 or the semiconductor light emitting device, and only the upper surface side of the semiconductor light emitting unit 30 or the semiconductor light emitting device is fixed to the second fixture 60b, so that the transport process thereafter has the advantage of being able to do it easily.

50 is a view showing another example of the detailed structure of the semiconductor light emitting unit according to the present disclosure, and unlike the detailed structure of the semiconductor light emitting unit shown in FIG. 22 , the semiconductor light emitting unit 30 includes a first semiconductor layer or a first semiconductor region ( 31 ), in addition to the active layer or active region 32 and the second semiconductor layer or second semiconductor region 33 , a lateral active region suppression layer 34 .

51 is a photograph showing examples of the shape of the semiconductor light emitting part according to the presence or absence of the side active region suppression layer. 51( b ) shows an example of a semiconductor light emitting unit having a side active region suppression layer 34 . In the case of the semiconductor light emitting part in which the side active region suppression layer 34 is not provided, it can be seen that the edge is not properly grown (the area indicated by the dotted line), and in the case of the semiconductor light emitting part provided with the side active region suppression layer 34 . It can be seen that the growth of the edge has been properly performed.

52 is a photograph showing another example of the shape of the semiconductor light emitting part according to the presence or absence of the side active region suppression layer, and a micro LED (eg, about 90 μm) having a much smaller size than the semiconductor light emitting part shown in FIG. : 10 μm or less) is exemplified. 52( a ) shows an example of a semiconductor light emitting part not provided with a side active region suppression layer 34 , and FIG. 52 ( b ) shows an example of a semiconductor light emitting unit provided with a side active region suppression layer 34 . It can be seen that the overall growth uniformity of the semiconductor light emitting unit is lowered in the case of the semiconductor light emitting unit not provided with the side active region suppression layer 34, and in the case of the semiconductor light emitting unit provided with the side active area suppression layer 34, the overall growth uniformity ( It can be seen that the overall growth of each of the semiconductor light emitting units within one wafer is improved.

53 is a photograph showing examples of actual measurement of a semiconductor light emitting part provided with a side active region suppression layer. FIG. 53 (a) shows a semiconductor light emitting part having a maximum width of 9.75 µm, and FIG. 53 (b) shows the maximum width of the bottom. This 93.3 mu m semiconductor light emitting part is presented. 53(a), the maximum width of the bottom surface is 9.755 µm, and the maximum width of the upper surface is 8.07 µm. Therefore, the reduction rate of the width is within 20% of the maximum width of the base. 53(b), the maximum width of the base is 93.3 µm and the maximum width of the upper surface is 91.3 µm, so that the reduction rate of the width is within 5% of the maximum width of the base. In the case of selective growth, the smaller the semiconductor light emitting portion is, the easier it is to have a pyramid shape.

The use of the expression “semiconductor region” instead of the expression “semiconductor layer” makes it clear that the first semiconductor layer 31, the active layer 32, and the second semiconductor layer 33 may each be configured as a multi-layer.

Like the semiconductor light emitting part 30 shown in FIG. 22 , the buffer layer 20 and the growth prevention film 21 are formed, and then the lower layer 35 (eg, un-doped GaN or Si-) to the height of the growth prevention film 21 . After forming the doped GaN), the side active region suppression layer 34 is formed, and the first semiconductor region 31 , the active region 32 , and the second semiconductor region 35 are formed.

The side active region suppression layer 34 basically suppresses the vertical growth of the semiconductor light emitting part 30 to promote horizontal growth, that is, the semiconductor light emitting part 30 is formed close to a trapezoidal shape rather than a pyramid shape as a whole. (preferably, the length of the upper surface of the trapezoidal semiconductor light emitting part 30 is longer than the length of the side of the trapezoidal semiconductor light emitting part 30) to form the active region 32 on the side of the semiconductor light emitting part 30 ), while serving to make the growth of the semiconductor light emitting portion uniformly and following the pattern of the growth openings 22 (refer to FIG. 4 ), as mentioned in relation to FIGS. 51 and 52 . In addition, when the active region 32 is formed on the side surface, it may cause a problem such as a short circuit in the chip process, which serves to reduce the problem. This will be an important technological advance in growing the semiconductor light emitting part 30 of 100 μm or less using the selective growth method.

For example, the side active region suppression layer 34 may have an Al _x Ga _{1 - x} N/GaN superlattice structure. x may have a value of 0.01 to 0.5, and if it has a value less than 0.01 days, a problem of uniformity may be deteriorated, and if it is 0.5 or more, a lot of Polys may occur around the pattern. When forming Al _x Ga _{1 - x} N, it is grown at a high temperature (1000°C to 1200°C) in order to efficiently insert Al, and it is preferable to perform the process at a low pressure (50 to 200mbar) as for the growth pressure, unlike other layers.

1) Buffer layer growth conditions: sputtering method, growth temperature 400~700℃, thickness: 1~100nm, Al target is used, Ar+N ₂ gas is used.

2) Growth prevention film production conditions: PECVD use, growth temperature: 200-300℃, thickness: 100-500nm, SiH ₄ + N ₂ O gas is used. S

3) Growing conditions for semiconductor light emitting part: Grow the semiconductor light emitting part by a normal MOCVD method, and adjust the growth temperature and pressure considering not only the growth in the C-axis direction but also the growth rate of the side (slope) of the semiconductor light emitting part. Preferably, by adjusting the growth rate and doping amount of the upper surface and the side surface, the resistance at the side surface is increased, so that the leakage current is minimized.

54 is an actual photograph of the semiconductor light emitting unit or semiconductor light emitting device manufactured according to the method shown in FIGS. 46 and 47 , and as shown in FIGS. 46 and 47 , a plurality of semiconductor light emitting units or semiconductor light emitting devices ( The growth substrate 102 on which 200R) is formed is attached to the carrier 302 provided with a fixture 304 (eg, polydimethylsiloxane (PDMS)), and the growth substrate 102 is removed through the LLO process. It's a photo. As can be seen from FIG. 54 , it can be seen that a plurality of semiconductor light emitting units or semiconductor light emitting devices 200R are damaged.

The present initiator analyzed the cause of this breakage, and as shown in FIG. 55 , a plurality of semiconductor light emitting units or semiconductor light emitting devices 200R provided in the growth substrate 102 are fixed to the carrier 302 . (304; Example: PDMS (polydimethylsiloxane)) was not properly attached, and it was found that the semiconductor light emitting part or semiconductor light emitting device (200R) that was not properly attached was damaged in the LLO process (the photo on the left is attached properly) The semiconductor light emitting part or the semiconductor light emitting device 200R that is present, the photo on the right shows the semiconductor light emitting part or the semiconductor light emitting device 200R that is not properly attached.)

FIG. 56 is a diagram schematically showing the state shown in FIG. 55 , and similarly to FIG. 48 , a semiconductor light emitting unit or semiconductor light emitting device 30 formed on the growth substrate 10 is formed on a carrier 70 ; The form bound to PDMS) is shown. In general, the fixture 60b (eg, PDMS) is spin-coated on the carrier 70 , and the edge side has a thicker thickness than the center of the carrier 70 due to the action of centrifugal force. As shown by the influence of this, an area K that is not properly attached to the center or the like exists. In order to solve this problem, the present disclosure provides a more water-soluble form, that is, a sponge-type fixture 60b (eg, PDMS).

57 is a view showing another example of a method of transporting a semiconductor light emitting unit or a semiconductor light emitting device to a carrier according to the present disclosure. ), a form coupled to a fixture 60c made of sponge-like porous PDMS (PDMS) formed in the form of sponge is presented. The porous PDMS has deformability or water solubility like a sponge, and thus the semiconductor light emitting part or the semiconductor light emitting device 30 formed on the growth substrate 10 can be properly attached to the fixture 60c formed on the carrier 70 as a whole.

58 is an actual photograph of the semiconductor light emitting part or the semiconductor light emitting device manufactured according to the method shown in FIG. 57, showing a fixture 60c made of sponge-like porous PDMS (Sponge-like Porous PDMS) on the left side, A plurality of semiconductor light emitting units or semiconductor light emitting devices 30 that are not damaged even after the LLO process are shown on the right. The method of making the fixture (60c) made of sponge-like porous PDMS is (1) mixing PDMS prepolymer and curing agent, preparing PDMS precursor (Sylgard 184, Dow Corning), and is spin-coated on a suitable substrate (e.g., Al substrate, silicon substrate, sapphire substrate, glass substrate), and (2) this PDMS precusor spin-coated the spin-coated substrate. Water is placed in a prepared autoclave, and heated D.I. It is pressurized by steam generated from water. In this process, the vapor penetrates into the PDMS. (3) Subsequently, when the vapor-impregnated PDMS is heated and dried, the vapor evaporates and the PDMS becomes a porous sponge (thesis: Double layered dielectric elastomer by vapor encapsulation casting for highly deformable and strongly adhesive triboelectric materials; Nano Energy, Volume 62, August 2019, Pages 144-153)).

59 is a photograph showing an example of a fixture made of sponge-like porous PDMS (PDMS), and shows the fixture manufactured according to the method of the paper. Specifically, (1) Prepare the PDMS precursor (Sylgard 184, Dow Corning) by mixing the PDMS prepolymer and the curing agent. (2) Spin coating this PDMS precusor on a suitable substrate (eg, silicon substrate, sapphire substrate, glass substrate). In addition to spin coating, you may use a method of pouring an appropriate amount of PDMS directly on the substrate and waiting until PDMS with high viscosity is planarized. (3) The substrate coated with this PDMS precusor was treated with D.I. Put the PDMS-coated substrate in a sealed container prepared with water, and heat it to obtain D.I. Generates water vapor from water. At this time, the heating temperature is suitable between 60 and 100 degrees. At this time, the substrate coated with PDMS in the container is directly D.I. It must not come into contact with the water solution. The vapor generated in the sealed container penetrates from the surface of the PDMS to the inside. (4) Then, the vapor-impregnated PDMS substrate is taken out from the sealed container, put on a hot plate or oven, and dried by heating. As the vapor evaporates, the PDMS becomes a porous sponge.

Hereinafter, various embodiments of the present disclosure will be described.

(1) A method of manufacturing a semiconductor light emitting device panel, the method comprising: forming a removal layer on a growth substrate; growing a semiconductor light emitting part on the removal layer; Separating the semiconductor light emitting unit into a growth substrate; wherein, in a state in which the semiconductor light emitting unit is individualized into a plurality of semiconductor light emitting units, a removal layer between the growth substrate and each semiconductor light emitting unit is partially removed so that only a part of the removal layer is left. A method of manufacturing a semiconductor light emitting device panel, comprising: separating the semiconductor light emitting unit from the growth substrate; and attaching a part or all of the plurality of semiconductor light emitting units to the substrate to conduct the semiconductor light emitting unit.

(2) prior to separation, on the growth substrate, wrapping the plurality of semiconductor light emitting units using a fixture; further comprising, wherein the plurality of semiconductor light emitting units are separated from the growth substrate while being fixed to the fixture, and fixed to the fixture Method of manufacturing a semiconductor light emitting device panel, characterized in that attached to the substrate in the state.

(3) removing the fixture; method for manufacturing a semiconductor light emitting device panel, characterized in that it further comprises.

(4) In the step of growing, a method of manufacturing a semiconductor light emitting device panel, characterized in that the plurality of semiconductor light emitting parts are partially grown on the growth substrate.

(5) Prior to the attaching step, attaching the carrier to the fixture; Method of manufacturing a semiconductor light emitting device panel comprising the.

(6) In the attaching step, a method of manufacturing a semiconductor light emitting device panel, characterized in that using a carrier for selectively transporting the plurality of semiconductor light emitting units.

(7) A method of manufacturing a semiconductor light emitting device panel, characterized in that in the separating step, the plurality of semiconductor light emitting units is separated from the growth substrate by using a difference in thermal expansion coefficients of the removal layer and the growth substrate.

(8) A method for manufacturing a semiconductor light emitting device panel characterized in that the removal layer is formed in contact with the growth substrate.

(9) Prior to the attaching step, forming an additional electrode in each semiconductor light emitting part; Method of manufacturing a semiconductor light emitting device panel, characterized in that it further comprises.

(10) forming an additional fixture on the side of the additional electrode; Method of manufacturing a semiconductor light emitting device panel, characterized in that it further comprises.

(11) A wafer for a semiconductor light emitting device, comprising: a growth substrate; a buffer layer formed on the growth substrate; A growth prevention film formed on the buffer layer and having a plurality of openings, the growth prevention film having a longest width of 100 µm or less of each opening; A plurality of semiconductor light emitting units grown from the buffer layer in each opening and grown apart from each other, wherein the longest width of each semiconductor light emitting unit is 100 μm or less. wafer.

(12) A wafer for a semiconductor light emitting device, characterized in that the buffer layer is a nitride that can be removed through wet etching.

(13) A wafer for a semiconductor light emitting device, characterized in that the buffer layer is made of AlN.

(14) Each semiconductor light emitting unit is interposed between a first semiconductor layer having a first conductivity, a second semiconductor layer having a second conductivity different from the first conductivity, and interposed between the first semiconductor layer and the second semiconductor layer, A wafer for a semiconductor light emitting device, comprising an active layer that generates light by recombination, wherein a second semiconductor layer surrounds the first semiconductor layer.

(15) A wafer for a semiconductor light emitting device, characterized in that the active layer is divided into two through etching.

(16) A wafer for a semiconductor light emitting device, characterized in that the plurality of semiconductor light emitting units include a semiconductor light emitting unit emitting blue light and a semiconductor light emitting unit emitting green light.

(17) A wafer for a semiconductor light emitting device, characterized in that the plurality of semiconductor light emitting units include a semiconductor light emitting unit including a light conversion material emitting red light.

(18) A wafer for a semiconductor light emitting device, which is formed on a growth substrate and includes an epi structure for an electronic device that is interlocked with each semiconductor light emitting unit.

(19) A wafer for a semiconductor light emitting device, characterized in that the plurality of semiconductor light emitting units includes at least one semiconductor light emitting unit functioning as an alignment key.

(20) Each semiconductor light emitting unit has an electrode, and the electrode includes a ferromagnetic material.

(21) A wafer for a semiconductor light emitting device, characterized in that each semiconductor light emitting unit is a permanent magnet.

(22) the semiconductor light emitting device wafer; And a carrier for transporting the plurality of semiconductor light emitting units of the wafer; a method for manufacturing a semiconductor light emitting device panel using the method, comprising: manufacturing a carrier; and transferring the plurality of semiconductor light emitting units using a carrier, wherein the carrier includes a growth substrate and a plurality of semiconductor layers grown on the growth substrate, and the size of each of the plurality of semiconductor layers is equal to that of the plurality of semiconductor light emitting units. Method of manufacturing a semiconductor light emitting device panel, characterized in that larger than each size.

(23) A wafer for a semiconductor light emitting device, comprising: a growth substrate; a buffer layer formed on the growth substrate; A growth prevention film formed on the buffer layer and having a plurality of numbers, the growth prevention film having a longest width of each opening of 100 µm or less; A plurality of semiconductor light emitting units grown from the buffer layer in each opening and grown apart from each other, wherein the longest width of each semiconductor light emitting unit is 100 μm or less; A wafer for a semiconductor light emitting device comprising a light emitting part,

(24) A wafer for a semiconductor light emitting device, wherein each sub light emitting unit includes an active layer that generates light by using recombination of electrons and holes, and the active layer of each sub light emitting unit is inclined.

(25) A semiconductor light emitting device, characterized in that each sub light emitting unit has an edge.

(26) A semiconductor light emitting device comprising: a plurality of sub light emitting units, each sub light emitting unit comprising: a first semiconductor layer having a first conductivity; a second semiconductor layer having a second conductivity different from the first conductivity; an active layer provided between the first semiconductor layer and the second semiconductor layer, generating light by recombination of electrons and holes, and inclined; A semiconductor light emitting device, characterized in that upright by. Each corner is formed on the opposite side of the first semiconductor layer with respect to the active layer, for example, may be formed on the second semiconductor layer.

(27) forming a plurality of semiconductor light emitting units on the growth substrate; forming a first fixture on the growth substrate to cover the plurality of semiconductor light emitting units; removing a portion of the first fixture to expose top surfaces of the plurality of semiconductor light emitting units; attaching the carrier provided with the second fixture to the plurality of semiconductor light emitting units from the opposite side of the growth substrate; removing the growth substrate; and removing the first fixture so that the upper surface of the plurality of semiconductor light emitting parts is attached to the second fixture.

(28) A method of transporting a semiconductor light emitting part in which the second fixture is an adhesive.

(29) A method of transporting a semiconductor light emitting part in which the second fixture is PDMS.

(30) A method of transferring a semiconductor light emitting part in which the first fixture is a photoresist.

(31) A method of transferring the semiconductor light emitting unit in which the first fixture is removed while the second fixture is maintained.

(32) A wafer for a semiconductor light emitting device, comprising: a growth substrate; a buffer layer formed on the growth substrate; A growth prevention film formed on the buffer layer and having a plurality of numbers, the growth prevention film having a longest width of each opening of 100 µm or less; A plurality of semiconductor light emitting units grown from the buffer layer in each opening and grown to be spaced apart from each other, wherein the longest width of each semiconductor light emitting unit is 100 μm or less, the longitudinal cross-section has a trapezoidal shape, and a first semiconductor having first conductivity a region, an active region generating light by recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity region, wherein a side active region suppression layer is formed under the first semiconductor region A wafer for a semiconductor light emitting device comprising a; a plurality of semiconductor light emitting units provided with.

(33) A wafer for a semiconductor light emitting device in which the side active region suppression layer has an Al _x Ga _{1 - x} N/GaN Superlattice structure (<x<).

(34) A wafer for semiconductor light emitting devices in which the maximum width of the upper surface of the trapezoidal semiconductor light emitting part has a reduced value within 5% of the maximum width of the bottom surface.

(35) A wafer for semiconductor light emitting devices in which the maximum width of the upper surface of the trapezoidal semiconductor light emitting part has a reduced value within 20% of the maximum width of the bottom surface.

(36) A wafer for semiconductor light emitting devices having a bottom surface of 10 µm or less in maximum width.

(37) A method of transporting a semiconductor light emitting unit, comprising: preparing a carrier provided with a growth substrate formed of a plurality of semiconductor light emitting units and a fixture made of porous PDMS; attaching a plurality of semiconductor light emitting units to a fixture; and removing the growth substrate from the plurality of semiconductor light emitting units.

(38) In the preparing step, the fixture is spin-coded on the carrier.

(39) A method of transporting a semiconductor light emitting part formed by heat-drying a fixture made of porous PDMS by permeating moisture into a PDMS precursor.

According to the method of transporting the semiconductor light emitting part according to the present disclosure, it is possible to reduce damage to the semiconductor light emitting part in the process of separating the semiconductor light emitting part from the growth substrate.

10: growth substrate, 30: semiconductor light emitting unit, 50: electrode, 60: fixture, 70: carrier, 80: substrate

Claims (3)

In the method of transporting the semiconductor light emitting unit,
preparing a carrier provided with a growth substrate on which a plurality of semiconductor light emitting units are formed and a fixture made of porous PDMS;
attaching a plurality of semiconductor light emitting units to a fixture; And,
A method of transferring a semiconductor light emitting unit comprising a; removing the growth substrate from the plurality of semiconductor light emitting units. The method according to claim 1,
In the preparing step, the fixture is spin-coded on a carrier. The method according to claim 1,
A method of transporting a semiconductor light emitting part formed by heat-drying a fixture made of porous PDMS by permeating moisture into a PDMS precursor.

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