KR20210118349A - Protective sheet for semiconductor wafer - Google Patents

Abstract

The present invention relates to a protective sheet for a semiconductor wafer. The protective sheet comprises a soft layer with good covering ability, and an adhesive layer for adhering to the surface of a wafer, wherein the soft layer comprises a thermoplastic polyurethane, and both the storage modulus range at 25℃ and 70℃, and the ratio of the storage modulus to the loss modulus at a vicat softening temperature are defined. Furthermore, the present invention enables a substrate layer to be disposed in advance.

Description

PROTECTIVE SHEET FOR SEMICONDUCTOR WAFER

The present application relates to a protective sheet for a semiconductor wafer, and in particular a protective sheet for a semiconductor wafer that avoids gaps due to a height difference when polishing, as well as has excellent absorbency for a height difference on a circuit side.

In order to meet the requirements of miniaturization and thinning, electronic devices and chips are manufactured as small and thin as possible. Thereby, the volume of the circuit boards can be reduced. On the other hand, the reduction in the thickness of the chips also facilitates the heat dissipation of the chips. To thin the chips, improvements are made in the manufacturing and packaging processes of the chips.

In order to thin the dies, semiconductor wafers are first polished to a predetermined thickness. Although this method reduces the chip thickness, semiconductor wafers are prone to breakage during transfer to different machines due to the reduced material strength. Also, in subsequent processes, wafers may be damaged due to partial stress, resulting in serious losses.

To improve this problem, in the manufacturing process of semiconductor wafers, after circuits are formed on one side of the wafers, the non-circuit layer of the wafers may be polished to reduce the thickness of the chips. This technique is well known to those skilled in the art.

During wafer polishing, it is necessary to cover the circuit side first to avoid damage to the circuits during the polishing process. Accordingly, protective sheets for semiconductor wafers are developed that are attached to the circuit side of the wafers as protection.

Nevertheless, in addition to circuits such as those described above, the circuit side of semiconductor wafers also includes semiconductor bumps with a greater height difference. Thereby, if the above situation is taken into account while designing protective sheets, the coverage of the attached protective sheets may be poor, leading to uneven distribution of stress at the non-circuit wafer surfaces during polishing and damage or breakage. . In addition, when the coverage is poor, gaps will form between the polishing sheet and the attachment surface. The liquid will then penetrate into the gaps and contaminate the circuit side. Therefore, ideal protective sheets should have excellent adhesion properties to non-flat surfaces of semiconductor wafers.

The structure of a typical protective sheet for a semiconductor wafer includes three layers. the lower layer is the substrate layer; the middle layer is the soft layer; The top layer is an adhesive layer. The layer that determines the coverage capability between the protective sheet and the circuit side is the soft layer. As such, the soft layer of material plays an important role in the performance of the protective sheet for semiconductor wafers. In order to achieve excellent coverage and adhesion to semiconductor wafers, resins with better flowability are usually employed. According to the study of the present application, when a PU type material is adopted in a soft layer of a protective sheet for a semiconductor wafer, the coverage for the circuit is not satisfactory. As such, the material for a soft layer of a protective sheet for a semiconductor wafer still needs to be improved for non-flat surfaces.

Accordingly, the present application provides a protective sheet for a semiconductor wafer to solve problems such as those described above.

It is an object of the present invention to provide a protective sheet for a semiconductor wafer. By adopting the material for the soft layer according to the invention, the circuit coverage will be excellent.

In order to achieve the above object, the present application provides a protective sheet for a semiconductor wafer, comprising a soft layer and an adhesive layer disposed on the soft layer. Light layer is ^{5 × 10 6 ~ 1 × 10} 8 Storage Modulus at 25 ℃ in _{dyne / ㎠ (G 25),} 5 × 10 4 ~ 1 × 10 7 storage elastic modulus at 70 ℃ in dyne / ㎠ (G ₇₀ ), and a thermoplastic polyurethane type having a Vicat softening temperature of 60-90°C. In addition, the ratio tanδ of the storage elastic modulus to the loss elastic modulus at a softening temperature ±10°C is 0.7 to 10.

When the soft layer is within the range of the storage modulus at these temperatures, it will have good fluidity and excellent coverage of the circuit. Besides, it will not spill due to excess liquidity; It won't be difficult to bend and scroll with insufficient fluidity.

According to the examples herein, the thermoplastic polyurethane type is prepared by the reaction of an isocyanate with a polyalcohol.

According to an embodiment of the present application, the material of the adhesive layer is selected from the group consisting of polyethylene-type elastic members, polystyrene-type elastic members, and mixtures thereof.

According to an embodiment of the present application, the adhesive layer does not require an exposing process with an energy beam.

According to embodiments herein, the adhesive layer is exposed to an energy beam to cure and reduce viscosity.

According to embodiments herein, the substrate layer is a thin layer disposed under the soft layer and selected from the group consisting of a polyolefin layer, a polyester layer, and mixtures thereof.

1 shows a schematic diagram of a protective sheet for a semiconductor wafer according to a first embodiment of the present application.
2 shows a schematic diagram of a protective sheet for a semiconductor wafer according to a second embodiment of the present application.

In order that the structure and characteristics as well as the effect of the present application may be better understood and appreciated, the detailed description of the present application, together with the embodiments and the accompanying drawings, is provided as follows.

In a situation where current protective sheets for semiconductor wafers cannot provide sufficient coverage on circuits and structures can be made simpler, the present application provides a protective sheet for semiconductor wafers to solve the problems according to the prior art. .

In the following, the properties, structure, and method of a protective sheet for a semiconductor wafer according to the present disclosure are described.

DETAILED DESCRIPTION In the following description, various embodiments of the present disclosure are described using drawings to explain in detail. Nevertheless, the concepts herein may be embodied in various forms, and their examples are not used to limit the scope of the disclosure.

First, reference is made to FIG. 1 which shows a schematic diagram of a protective sheet for a semiconductor wafer according to a first embodiment of the present application. A protective sheet for a semiconductor wafer 10 includes a soft layer 110 and an adhesive layer 120 disposed thereon.

The soft layer 110 of the protective sheet for the semiconductor wafer 10 comprises a thermoplastic polyurethane type component, and (1) a storage modulus of elasticity at 25°C (G of ^{5×10 6} to 1×10 ^{8 dyne/cm 2 )} ₂₅ ); (2) storage elastic modulus at 70° C. of ^{5×10 4} to 1×10 ⁷ _{dyne/cm 2 (G 70} ); and (3) a Vicat softening temperature of 60 to 90° C., and a ratio tan δ of the storage elastic modulus to the loss elastic modulus at the softening temperature ±10° C. is 0.7 to 10. In the following, these three characteristics will be described in detail.

For condition (1), if the storage elastic modulus (G ₂₅ ) at 25° C. is less than 5×10 ⁶ dyne/cm 2 , while scrolling the protective sheet for the semiconductor wafer 10 , the strain marks are formed on the soft layer 110 . ) will easily appear on the If the storage elastic modulus G ₂₅ is greater than 1×10 ⁸ dyne/cm 2 , the hardness of the soft layer 110 will increase, and there will be a difficulty in bending the protective sheet for the semiconductor wafer 10 to scroll.

For condition (2), if the storage elastic modulus (G ₇₀ ) at 70° C. is less than 5×10 ⁶ dyne/cm 2 , while attaching the protective sheet for the semiconductor wafer 10 to the circuit side, the soft layer 110 Since the hardness of ) is too low, the soft layer 110 will deform excessively and flow out from the edges. When the storage elastic modulus G ₇₀ is greater than 1×10 ⁷ dyne/cm 2 , the hardness of the soft layer 110 is too high, so that the protective sheet for the semiconductor wafer 10 is insufficient for the height difference on the circuit side of the semiconductor wafers. reach coverage.

For condition (3), when the protective sheet for the semiconductor wafer is attached to the circuit side of the semiconductor wafer, it will be heated to raise the temperature of the soft layer 110 to the Vicat softening temperature, so that the flow coverage characteristic is obtained. . According to the present application, if the adhesion temperature exceeds the Vicat softening temperature, the fluidity of the soft layer will be exceeded and will flow out on the circuit side of the semiconductor wafers. Likewise, if the adhesion temperature is lower than the Vicat softening temperature, the fluidity of the soft layer is too low to provide sufficient coverage for the height difference on the circuit side of the semiconductor wafers after being heated and softened. Thereby, in the range of the Vicat softening temperature ±10°C, the ratio tanδ of the storage elastic modulus to the loss elastic modulus should be 0.7-10.

In condition (3), if tanδ is lower than 0.7 at the Vicat softening temperature ±10°C, even if other conditions of the soft layer 110 are satisfied, in the critical state of operation, the soft layer 110 will not easily flow and leads to insufficient coverage for the height difference on the circuit side of the semiconductor wafers.

In condition (3), if tanδ is greater than 10 at the Vicat softening temperature ±10°C, even if other conditions of the soft layer 110 are satisfied, in the critical state of operation, the soft layer 110 will flow easily, It flows out on the circuit side of the semiconductor wafers.

The thermoplastic polyurethane type included in the soft layer 110 according to the first embodiment has excellent properties of resistance to solvent and elongation. The material of the soft layer 110 is preferably selected from the group consisting of polyether polyurethane, polyester polyurethane, and polycarbonate polyurethane. Most preferably, the material of the soft layer 110 is polyester polyurethane.

The thermoplastic polyurethane type contained in the soft layer 110 according to the first embodiment of the present application is prepared by reaction of an isocyanate with a polyalcohol using a chain extender. The isocyanate is preferably toluene-2,4-diisocyanate, toluene-2,6-diisocyanate, 1,4-phenylene diisocyanate, 1,5-naphthalene diisocyanate, 3,3'-dimethylbiphenyl-4 ,4'-diyl diisocyanate, and methylenediphenyl diisocyanate (MDI). Preferably, the isocyanate is MDI. The polyalcohol is preferably selected from the group consisting of polyether polyalcohol, polyester polyalcohol, and polycarbonate polyalcohol. Most preferably, the polyalcohol is a polyester polyalcohol.

The chain extender used in the soft layer 110 according to the first embodiment enables a better separation effect for the polyurethane. In addition, it will minimize the decrease in elastic modulus for better support to the overall materials as well as reduce stickiness to avoid adhesion to the backing. The chain extender is preferably ethylene glycol, 1,4-butanediol (1,4-BDO or BDO), 1,6-hexanediol cyclohexanedimethanol, and hydroquinone bis(2-hydroxyethyl)ether (HQEE) is selected from the group consisting of Most preferably, the chain extender is a mixture of ethylene glycol and 1,6-hexanediol.

For the components making the thermoplastic polyurethane, the proportion of MDI is about 30-50%; polyester polyalcohol is about 30%-40%; Ethylene glycol is about 20%-30%. Preferably, the proportion of MDI is about 35-45%; polyester polyalcohol is about 32-38%; Ethylene glycol is about 22-28%. Most preferably, the proportion of MDI is about 40%; polyester polyalcohol is about 35%; 1,6-hexanediol is about 5%; Ethylene glycol is about 20%.

The thickness of the soft layer 110 according to the first embodiment should be adjusted according to the height difference on the surface of the object to be protected. When the thickness of the soft layer 110 is greater than 50 μm, the vertical height difference on the semiconductor wafer can be prevented. When the thickness of the soft layer 110 is lower than 900 μm, the operability of the protective sheet may be improved. Specifically, the thickness of the soft layer 110 is preferably 50 to 900 μm. More preferably, the thickness is 70 to 800 μm. Most preferably, the thickness is between 100 and 700 μm.

The material of the adhesive layer according to the first embodiment is selected from the group consisting of polyethylene-type elastic members and polystyrene-type elastic members, and mixtures thereof. Preferably, the material is polystyrene type elastic members.

After the manufacturing process is completed, the protective sheet for the semiconductor wafer 10 can be directly peeled off without exposure to an energy beam. Alternatively, the protective sheet for the semiconductor wafer 10 is exposed to an energy beam for curing and reducing viscosity, thereby reducing adhesion.

Reference is also made to Fig. 2 which shows a schematic diagram of a protective sheet for a semiconductor wafer according to a second embodiment of the present application. The protective sheet for the semiconductor wafer 10 includes a soft layer 110 , an adhesive layer 120 , and a substrate layer 210 . The adhesive layer 120 is disposed on the soft layer 110 ; A substrate layer 210 is disposed below the soft layer 110 . The materials and properties of the soft layer 110 and the adhesive layer 120 are the same as those adopted in the first embodiment. Nevertheless, the difference between the first embodiment and the second embodiment is that the second embodiment further comprises a substrate 210 disposed under the soft layer 110 .

The thickness of the substrate layer 210 in the protective sheet 10 according to the second embodiment affects the overall bending strength and operability when the protective sheet for the semiconductor wafer 10 is scrolled. When the thickness exceeds 250 μm, it is difficult to bend and scroll in the manufacturing process. Thereby, preferably the thickness is from 5 to 250 μm. More preferably, it is 10-200 micrometers. Most preferably, the thickness is between 25 and 150 μm.

The substrate layer 210 in the protective sheet 10 according to the second embodiment is a thin film layer selected from the group consisting of a polyolefin-type layer, a polyester-type layer, and mixtures thereof. Preferably, it is a polyester-type layer.

The material employed in the polyester-type thin film of the substrate layer 210 is preferably polyethylene tetephthalate (PET), polyethylene isophthalate, polybutylene terephthalate, and poly(ethylene 2,6-naphthalenedicarboxylate). a polyester copolymer selected from the group consisting of Preferably, it is a PET resin thin film to prevent layer peeling.

The chain extender used in the soft layer 110 according to the second embodiment enables a better separation effect for the polyurethane. In addition, it can reduce stickiness to prevent adhesion to the backing. The chain extender is preferably ethylene glycol, 1,4-butanediol (1,4-BDO or BDO), 1,6-hexanediol cyclohexanedimethanol, and hydroquinone bis(2-hydroxyethyl)ether (HQEE) is selected from the group consisting of Most preferably, the chain extender is ethylene glycol.

For the components making the thermoplastic polyurethane, the proportion of MDI is about 30-50%; polyester polyalcohol is about 30%-40%; Ethylene glycol is about 20%-30%. Preferably, the proportion of MDI is about 35-45%; polyester polyalcohol is about 32-38%; Ethylene glycol is about 22-28%. Most preferably, the proportion of MDI is about 40%; polyester polyalcohol is about 35%; Ethylene glycol is about 25%.

The synthetic method for the manufactured thermoplastic polyurethane and the substrate layer 210 adopts a co-extrusion method for forming the thermoplastic polyurethane on the surface of the substrate layer 210 . Alternatively, the thermoplastic polyurethane may be formed by a blow-film method before it is attached to the substrate layer 210 . Alternatively, the thermoplastic polyurethane is dissolved and coated on the surface of the substrate layer 210 .

The material of the adhesive layer according to the second embodiment is selected from the group consisting of polyethylene-type elastic members and polystyrene-type elastic members, and mixtures thereof. Preferably, the material is polystyrene type elastic members.

After the manufacturing process is completed, the protective sheet for the semiconductor wafer 110 may be directly peeled off. Alternatively, the protective sheet for the semiconductor wafer 110 is illuminated by an energy beam for curing and reducing viscosity, thereby reducing adhesion.

A first example according to the present disclosure comprises experimental groups 4 to 9 in Table 2. The soft layer is formed by polymerization of about 40% MDI, about 35% polyester polyalcohol, about 5% 1,6-hexanediol, and about 20% ethylene glycol; the thickness is 500 μm; The storage modulus at 70° C. (G ₇₀ ) is 7.5×10 ⁵ dyne/cm 2 ; It is a polyester polyurethane having a Vicat softening temperature of 75° C. and a ratio tan δ of the storage modulus to the loss modulus at 65° C. of 0.85. The adhesive layer is disposed on the soft layer. The adhesive layer adopts an acrylic acid type as an adhesive, such as acrylonitrile styrene acrylate copolymer (ASA); The thickness in experimental groups 4 to 6 was 10 μm; The thickness in experimental groups 7 to 9 was 20 μm.

A second example according to the present disclosure comprises experimental groups 13 and 14 in Table 3. The soft layer is formed by polymerization of about 40% MDI, about 35% polyester polyalcohol, and about 25% ethylene glycol; the thickness is 500 μm; The storage modulus at 70° C. (G ₇₀ ) is 7.5×10 ⁵ dyne/cm 2 ; It is a polyester polyurethane having a Vicat softening temperature of 75° C. and a ratio tan δ of the storage modulus to the loss modulus at 65° C. of 0.85. The adhesive layer is disposed on the soft layer. The adhesive layer adopts acrylic acid type as an adhesive such as ASA; The thickness in experimental groups 4 was 10 μm; The thickness in experimental groups 5 to 9 was 20 μm. A substrate layer is disposed below the soft layer. The substrate layer is a PET resin thin film having a thickness of 75 μm.

Finally, experiments are performed according to the second embodiment of the present application. Materials according to the prior art are used as control groups (control groups 1 to 6) shown in Table 4. Experimental results (experimental groups 4 to 9) according to the second embodiment of the present application are shown in Table 2.

In the following, the part numbers and components of the materials adopted in Tables 1 to 4 will be described. PU-CH-829 is ethylene vinyl acetate (EVA). PU-EH-94045 is a thermoplastic polyurethane (TPU) in the embodiments. PU-EH-98245 is another type of thermoplastic polyurethane (TPU) in the embodiments. PU-FI082 is the soft layer in the first embodiment. PU-CI0720 is the soft layer in the second embodiment.

According to the above experimental results, it is clear that compared with materials according to the prior art, the embodiments according to the present invention improve the coverage for the circuits as well as the residual adhesive problem.

Accordingly, the present application is subject to legal requirements due to its novelty, non-obviousness, and practicality. However, the foregoing descriptions are merely embodiments of the present application and are not used to limit the scope of the present application. Those equivalent changes or modifications made to the shape, structure, feature, or spirit set forth in the claims herein are intended to be included within the scope of the appended claims herein.

Claims (7)

A protective sheet for a semiconductor wafer, comprising:
soft layer; and
an adhesive layer disposed on the soft layer;
The soft layer has a storage modulus at 25° C. (G ₂₅ ) of 5×10 ⁶ to 1×10 ⁸ dyne/cm 2 ; The storage modulus at 70° C. (G ₇₀ ) is 5×10 ⁴ ˜1×10 ⁷ dyne/cm 2 ; Vicat softening temperature is 60-90°C; A composition comprising a thermoplastic polyurethane having a ratio tanδ of a storage modulus to a loss modulus at a softening temperature of ±10°C of 0.7 to 10
Protective sheet for semiconductor wafers. The protective sheet for a semiconductor wafer according to claim 1, wherein the thermoplastic polyurethane is a polyester polyurethane formed by reaction of methylenediphenyl diisocyanate, polyester polyalcohol, 1,6-hexanediol, and ethylene glycol. The protective sheet for a semiconductor wafer according to claim 1, wherein the material of the adhesive layer is selected from the group consisting of polyethylene-type elastic members, polystyrene-type elastic members, and mixtures thereof. The protective sheet for a semiconductor wafer according to claim 1, wherein the adhesive layer does not require an exposing process by an energy beam. The protective sheet of claim 1 , wherein the adhesive layer is exposed to an energy beam to cure and reduce viscosity. The protective sheet of claim 1 , wherein a substrate layer is disposed below the soft layer. 7. The protective sheet of claim 6, wherein the substrate layer is a thin film layer selected from the group consisting of a polyolefin layer, a polyester layer, and mixtures thereof.

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