KR20210070833A - Method of manufacturing a light emitting device - Google Patents

Abstract

The present disclosure relates to a method for manufacturing a semiconductor light emitting device capable of improving light quality in applications such as displays and lighting. The method includes the steps of: providing a growth substrate on which an N type first semiconductor region, an active region generating light through recombination of electrons and holes, and a P type second semiconductor region are sequentially formed; bonding a first light-transmitting substrate to the second semiconductor region; removing the growth substrate from the first semiconductor region; attaching a second light-transmitting substrate to the first semiconductor region, from which the growth substrate has been removed, by using an adhesive layer; ablating the first light-transmitting substrate from the second semiconductor region by means of laser; exposing a portion of the first semiconductor region by removing portions of the second semiconductor region and the active region; and forming a first electrode of a flip chip and a second electrode of the flip chip in the exposed first semiconductor region and the second semiconductor region, respectively.

Description

Method of manufacturing a semiconductor light emitting device {METHOD OF MANUFACTURING A LIGHT EMITTING DEVICE}

The present disclosure relates to a method of manufacturing a semiconductor light emitting device as a whole, and more particularly, to a method of manufacturing a flip chip type semiconductor light emitting device. More specifically, the manufacturing of flip-chip type semiconductor light emitting devices used in micro LED displays (e.g., mini LEDs (about 100 μm in width (300 μm or less)), micro LEDs (devices less than 100 μm in width)) it's about how Unlike the existing LED backlighting LCD, the micro LED display does not use a semiconductor light emitting device as a backlight, but uses it for direct light emission like an OLED display. Here, the semiconductor light emitting device means a semiconductor optical device that generates light through recombination of electrons and holes, and includes an AlGaInN based semiconductor light emitting device that emits ultraviolet light, blue and green light and an AlGaInP(As) based semiconductor light emitting device that emits red light. for example.

Herein, background information related to the present disclosure is provided, and they do not necessarily mean prior art (This section provides background information related to the present disclosure which is not necessarily prior art).

1 is a view showing an example of a semiconductor light emitting structure disclosed in US Patent Publication No. US2019/0067255, wherein the semiconductor light emitting structure includes a first semiconductor light emitting device 101 (eg, a red light emitting LED flip chip) and a second semiconductor light emitting structure. and a wiring board 107 on which the device 103 (eg, a blue light emitting LED flip chip), a third semiconductor light emitting device 105 (eg, a green light emitting LED flip chip), and three semiconductor light emitting devices 101, 103, and 105 are placed.

FIG. 2 is a view showing an example of a semiconductor light emitting device (an example of a semiconductor light emitting device that can be used in the semiconductor light emitting structure shown in FIG. 1) disclosed in US Patent Publication No. US2019/0067525, wherein the semiconductor light emitting device is a P-type a GaP window layer 104 , a P-type confinement layer 106 , an MQW active region 108 , an N-type confinement layer 110 , and an N-type current spreading layer 112 . In addition, the semiconductor light emitting device includes a metal reflective layer 164 , an N-side electrode 182 , and a P-side electrode 180 on a side from which the growth substrate is removed. In addition, the semiconductor light emitting device includes a P-type current diffusion layer 118 (eg, ITO), a transparent adhesive layer 130 , and a transparent support substrate 102 on the opposite side. Through this configuration, the semiconductor light emitting device may emit light of a red wavelength. However, when the N-type AlGaInP(As)-based semiconductor layer is disposed on the side where the electrodes 180 and 182 are positioned, that is, on the side where the flip-chip bonding is performed with the lead electrode, wiring or wiring board (so-called N-side up flip chip) In particular, as the size of the chip is miniaturized, the thick N-type semiconductor regions 110 and 112 and the MQW active region 108 are removed to inject current from the P-side electrode 180 to the P-type semiconductor regions 104 and 106 . It is known that excessive heat is generated by non-uniform current flow in the N-type semiconductor regions 110 and 112 along with difficulties in the MESA etching process and the electrical connection process. As a method to solve this problem, it may be considered to use a P-side up flip chip, and two methods have been proposed in the prior art.

3 is a view showing an example of a semiconductor light emitting device disclosed in US Patent No. 5,376,580, wherein the semiconductor light emitting device includes a P-type GaAs growth substrate 14, a P-type semiconductor region 11 (eg, AlGaAs); It may include an active region 12 and an N-type semiconductor region 13 (eg, AlGaAs). If the semiconductor light emitting device of this type (the P-type semiconductor region 11 is first grown during the epi growth process) undergoes the electrode formation process as shown in FIG. 2, a so-called P-side up flip chip can be manufactured. there will be However, whether the AlGaInN-based semiconductor light-emitting device or the AlGaInP(As)-based semiconductor light-emitting device is formed prior to growing the active region 12 , if the P-type semiconductor region 11 is grown before the N-type semiconductor region 13 , the surface When the active region 12 is grown due to its roughness, electrical/optical properties are deteriorated due to deterioration of the thin film quality of the active region 12, so a commercial method for growing the P-type semiconductor region 11 first in the epitaxial growth process of semiconductor light emitting devices are difficult to find.

4 to 7 are views illustrating an example of a method for manufacturing a semiconductor light emitting device disclosed in US Patent No. US7,067,340. First, as shown in FIG. 4, a growth substrate 300 (eg: GaAs) An N-type semiconductor region 302, an active region 304, and a P-type semiconductor region 306 are sequentially grown on the substrate), and then a soft transparent adhesive layer 308 (Soft transparent adhesive layer; for example, BCB (Bisbenzocyclobutene)) , polyimide, glass, epoxy), a temporary substrate 310 (eg, glass, silicon, ceramic, Al ₂ O ₃ ) is attached to the P-type semiconductor region 306 . Next, as shown in FIG. 5 , the growth substrate 300 is removed using the temporary substrate 310 as a support substrate. Next, as shown in FIG. 6 , in the N-type semiconductor region 302 from which the growth substrate 300 is removed, a soft transparent adhesive layer 312 (eg, bisbenzocyclobutene (BCB), polyimide) is flexible and transparent. , glass, epoxy), attaching a light-transmitting substrate 314 (eg, a light-transmitting substrate (sapphire, glass, GaP, SiC)), and then attaching a flexible transparent adhesive layer 308 and a temporary substrate 310 Remove. Finally, as shown in FIG. 7 , a portion of the P-type semiconductor region 306 and the active region 304 is removed through etching, and then, the N-type semiconductor region 302 and the P-type semiconductor region 306 are respectively formed. , N-side electrodes 316 , 318 , and 320 and P-side electrodes 316 , 318 and 322 are formed to manufacture a semiconductor light emitting device. Electrode 316 is a metal reflective layer (eg, Au, Al, Ag, Ag alloy), electrode 318 is a barrier layer (eg, Ni, W, TiN, WN, Pt, ZnO, ITO), and electrodes 320 and 322 ) is a bonding pad layer (eg, Au, Al). The semiconductor light emitting device shown in FIGS. 4 to 7 is different from the semiconductor light emitting device shown in FIG. 3 in that the P-side up flip chip is manufactured through a chip process rather than an epitaxial growth process. However, in the attachment of the temporary substrate 310 and the attachment of the light-transmitting substrate 314 , since the transparent adhesive layers 308 and 312 having the same ductility as the attachment material are used, the ductility in the process of attaching the light-transmitting substrate 314 is reduced. The transparent adhesive layer 308 may be deformed and a void may be generated in the local bonding interface. Also, the flexible and transparent adhesive layer 312 having ductility with the temporary substrate 310 and in the process of removing the transparent adhesive layer 308 . ) may be damaged, so it needs improvement. In addition, the growth substrate 300 (eg, a GaAs substrate) on which the N-type semiconductor region 302 , the active region 304 , and the P-type semiconductor region 306 are sequentially grown is formed with the growth substrate 300 and the grown materials 302 . , 304, 306) between the lattice constant (Lattice Constant) and the coefficient of thermal expansion (CTE) due to the stress (Stress) generated by the difference between the wafer bowing (Bowing) is a severe state, such a strong growth When the substrate 300 is attached to the temporary substrate 310 using the flexible and transparent adhesive layer 308, the weak bonding strength of the flexible transparent adhesive layer 308 and the void in the local bonding interface (Void) Due to the occurrence, damage during the process, in particular, substrate breakage and micro-cracks, are not uncommon.

12 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 7,262,436, in which the semiconductor light emitting device includes a growth substrate 100 and a first semiconductor region 300 grown on the growth substrate 100; for example: n-type semiconductor region), an active region 400 grown on the first semiconductor region 300 , a second semiconductor region 500 grown on the active region 400 (eg, a p-type semiconductor region), a second semiconductor region ( It includes electrodes 901 , 902 , and 903 serving as a reflective film formed on the 500 ) and an electrode 800 formed on the exposed first semiconductor region 300 by etching. It is possible for the first semiconductor region 300 and the second semiconductor region 500 to have opposite conductivity. Preferably, a buffer region (not shown) is provided between the growth substrate 100 and the first semiconductor region 300 . A chip having such a structure, that is, a chip in which all of the electrodes 901 , 902 , 903 and the electrode 800 are formed on the opposite side of the growth substrate 100 , and the electrodes 901 , 902 , and 903 function as a reflective film is called a flip chip. The electrodes 901, 902, and 903 include an electrode 901 having a high reflectance (eg, Ag), an electrode 903 for bonding (eg, Au), and an electrode 902 preventing diffusion between the material of the electrode 901 and the material of the electrode 903; Example: Ni). Such a metal reflective film structure has a high reflectance and an advantage in current diffusion. However, since the electrode 901, 902, 903 and the electrode 800 side are used for bonding, not the growth substrate 100 side, the structural inclination (height) to the flip chip during bonding due to the height difference between the electrodes 901, 902, 903 and the electrode 800. car) occurs.

13 is a view showing an example of a semiconductor light emitting device disclosed in U.S. Patent No. 9,466,768. The semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer region ( 200), the first semiconductor region 300 is grown on the first semiconductor region 300, and the active region 400 is grown on the first semiconductor region 300 and generates light through recombination of electrons and holes, and the second is grown on the active region 400 A semiconductor region 500 is provided. Sapphire, SiC, Si, GaN, etc. are mainly used as the growth substrate 100 , the growth substrate 100 may be finally removed, and the buffer region 200 may be omitted. The positions of the first semiconductor region 300 and the second semiconductor region 500 may be changed, and in the group III nitride semiconductor light emitting device, they are mainly made of GaN. Each of the semiconductor layers 200 , 300 , 400 , and 500 may be composed of multiple layers, and additional layers may be provided. Meanwhile, unlike FIG. 12 , a non-conductive reflective film 910 is provided instead of the electrodes 901 , 902 , and 903 serving as a reflective film. The non-conductive reflective film 910 is made of a single-layer dielectric film (eg _{, SiO x} , TiO _x , Ta ₂ O ₅ , MgF ₂ ), a multi-layered dielectric film, or a DBR reflective film (eg, SiO ₂ /TiO ₂ ), or a combination thereof. can be made in combination. For the supply of current, electrodes 920 and 930 and electrodes 800 and 810 are provided, and an electrical connection 940 passing through the non-conductive reflective film 910 is formed to connect the electrode 920 and the electrode 930. have. A branch electrode 810 and a branch electrode 930 may be provided for current diffusion between the first semiconductor region 300 and the second semiconductor region 500 , and the current diffusion of the second semiconductor region 500 may be more smoothly A light-transmitting conductive film 600 (eg, ITO, TCO) is formed. However, also in this configuration, there is a structural inclination (height difference) between the electrode 920 and the electrode 800 . Unexplained reference numeral 950 denotes a current blocking layer (CBL).

14 is a view showing an example of a semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 2006-120913. The semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer. A first semiconductor region 300 grown on the region 200 , an active region 400 grown on the first semiconductor region 300 , a second semiconductor region 500 grown on the active region 400 , and a second semiconductor A light-transmitting conductive film 600 (eg, ITO, TCO) formed on the region 500 and having a current diffusion function, an electrode 700 formed on the light-transmitting conductive film 600 , and a first semiconductor region 300 exposed by etching ) and an electrode 800 formed thereon. In addition, a distributed Bragg reflector (DBR) and a metal reflection film 904 are provided on the transmissive conductive film 600 . By forming the height of the electrode 800 to match the height of the electrode 700 , the structural inclination (height difference) of the flip chip during bonding can be eliminated. However, it has a disadvantage that the electrode 700 and the electrode 800 must be separately formed.

FIG. 15 is a view showing an example of a semiconductor light emitting device disclosed in US Patent No. 9,748,446. As shown in FIG. 2 , the semiconductor light emitting device includes a growth substrate 100, a buffer region 200, and a first semiconductor. The region 300, the active region 400, the second semiconductor region 500, the transmissive conductive film 600, the non-conductive reflective film 910, the electrodes 920, 930, 940, the electrodes 800, 810, and the current blocking layer 950 are formed. include However, in order to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920 , the electrode 800 is formed on the non-conductive reflective film 920 , and the branch electrode 810 and the electrode 800 are electrically connected to each other. An electrical connection 820 penetrating through the non-conductive reflective film 910 is used for connection.

In addition, examples in which a via hole is formed by etching a semiconductor layer and an N-side electrode is formed therein to eliminate a height difference with the P-side electrode can be found in Japanese Patent Laid-Open No. S55-009442 or the like.

FIG. 16 is a view showing an example of the semiconductor light emitting device disclosed in US Patent No. 9,236,524. A semiconductor light emitting device having the same configuration as that shown in FIG. 15 is presented except for the configuration of the non-conductive reflective film 910. . The non-conductive reflective film 910 is provided with a thick dielectric film 910c in addition to the dielectric films 910d and 910e forming the DBR to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920 . Remove. On the other hand, unlike the dielectric films 910d and 910e that form the DBR deposited by physical vapor deposition (PVD), the thick dielectric film 910c is formed by chemical vapor deposition (CVD). A technique for forming the overall stable non-conductive reflective film 910 by improving the step coverage is presented.

This will be described later in 'Specific Contents for Implementation of the Invention'.

Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure (This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to one aspect according to the present disclosure (According to one aspect of the present disclosure), in a method of manufacturing a flip-chip semiconductor light emitting device, light is emitted through a first semiconductor region having an N-type and recombination of electrons and holes. providing a growth substrate in which an active region and a second semiconductor region having a P-type are sequentially formed; bonding the first light-transmitting substrate to the side of the second semiconductor region; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the side of the first semiconductor region from which the growth substrate is removed using an adhesive layer; laser ablation of the first light-transmitting substrate from the side of the second semiconductor region; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically connected to the second semiconductor region A semiconductor light emitting device including a second electrode communicating and functioning as a flip chip bonding pad is provided.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; The semiconductor light emitting device includes a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad, wherein the first electrode extends over the second semiconductor region, which is a non-emission region.

According to another aspect of the present disclosure (According to another aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functioning as a flip-chip bonding pad; a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed to fill the exposed first semiconductor region, and an insulating layer disposed under the first electrode and the second electrode; A device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; comprising: a first semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; an adhesive layer bonding the light transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

This will be described later in 'Specific Contents for Implementation of the Invention'.

1 is a view showing an example of a semiconductor light emitting structure presented in US Patent Publication No. US2019/0067255,
2 is a view showing an example of a semiconductor light emitting device presented in US Patent Publication No. US2019/0067525,
3 is a view showing an example of a semiconductor light emitting device presented in US Patent Publication No. US5,376,580;
4 to 7 are views showing an example of a method for manufacturing a semiconductor light emitting device presented in US Patent Publication No. US7,067,340;
8 to 11 are views showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
12 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 7,262,436;
13 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,466,768;
14 is a view showing an example of a semiconductor light emitting device disclosed in Japanese Patent Application Laid-Open No. 2006-120913;
15 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,748,446;
16 is a view showing an example of a semiconductor light emitting device presented in US Patent No. 9,236,524;
17 is a view showing an example of a semiconductor light emitting device according to the present disclosure;
18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17;
19 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
20 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
21 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
22 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21;
23 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
24 and 25 are views showing another example of a semiconductor light emitting device according to the present disclosure;
26 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
27 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
28 is a view showing another example of a semiconductor light emitting device according to the present disclosure;

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings (The present disclosure will now be described in detail with reference to the accompanying drawing(s)).

8 to 11 are views illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

First, as shown in FIG. 8A , a first semiconductor region 30 (eg, an N-type semiconductor region), an active region 40 (eg, MQWs) and a second semiconductor region are sequentially formed on the growth substrate 10 . (50: P-type semiconductor region) is grown. Each of the first semiconductor region 30 , the active region 40 , and the second semiconductor region 50 may be formed of a single layer or multiple layers, and of course, necessary layers such as the buffer region 20 may be added. In the case of a semiconductor light emitting device that emits red light, a GaAs substrate and an AlGaInP(As) based semiconductor may be used, and in the case of a semiconductor light emitting device that emits green, blue, and ultraviolet light, a sapphire substrate and an AlGaInN based semiconductor may be used. have. For example, the buffer region 20 includes a seed layer 22 and an un-doped semiconductor region 23 in order to relieve stress and improve the quality of the thin film, and generally have a thickness of about 4 μm. can be composed of The first semiconductor region 30 may have a thickness of 2.5 μm, the active region 40 may have a thickness of several tens of nm, and the second semiconductor region 50 may have a thickness of several tens of nm to several μm, In general, it may have a thickness of about 6 μm to 10 μm overall. When laser ablation is used, a sacrificial layer (not shown) may be provided between the seed layer 22 and the undoped semiconductor region 23 , and the seed layer 22 may function as a sacrificial layer .

Next, as shown in FIG. 8B , a protective layer 60 is formed on the second semiconductor region 50 . The protective layer 60 is preferably formed of a dielectric material such as _{SiO 2} , SiN _x to protect the semiconductor regions 30 , 40 , and 50 in a subsequent process including an etching process.

Next, as shown in FIGS. 8( c ) and 8 ( d ), a first light-transmitting substrate 70 is prepared, and the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , and 50 are combined. do. Unlike the prior art using organic adhesives such as BCB and silicone for bonding the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , 50 , it has strong bonding strength and is etched by dry and wet etching (dry & wet). In subsequent processes including etching), a metal bonding (eg, eutechnic) process is used to prevent changes in the properties of the semiconductor area and mechanical damage (cracks, cracks) during the process. The metal bonding layer 71 is provided on at least one side, preferably on both sides, of the side of the first light-transmitting substrate 70 and the side of the semiconductor regions 30 , 40 , and 50 . In addition, the sacrificial layer 72 is always provided on the first light-transmitting substrate 70 in order to remove the first light-transmitting substrate 70 using laser ablation. It is important to prevent cracks and cracks in the semiconductor regions 30 , 40 , and 50 during the bonding process, the difference between the growth substrate 10 and the coefficient of thermal expansion is not large, and sapphire having light transmitting properties is used as the first light transmitting substrate 70 . it is preferable In general, eutectic materials with metal bonding can be classified according to temperature, and the present disclosure is limited to materials having a process temperature of 250 ° C or more and 350 ° C or less, AuSn (300 ° C), AuIn (275 ° C) , NiSn (300° C.), CuSn (270° C.), and the like are preferable. On the other hand, in the case of BCB organic adhesive, bonding at 250° C. or lower is preferable. For reference, there are many well-known organic adhesives for wafer bonding other than the BCB organic adhesive material. Polyimide (160℃), SU-8 (90℃), Parylene (230℃), and Epoxy (150℃) are representative. The sacrificial layer 72 strongly absorbs laser light incident through the rear surface of the first light-transmitting substrate 70 to easily cause an instantaneous photo-thermochemical decomposition interaction. Compounds (Epitaxial or Polycrystalline Compounds) that have an energy band gap of less than 6.2 eV and a single crystal or polycrystalline structure, especially oxide and nitride semiconductors, are representative compounds. Oxide semiconductors include In ₂ O ₃ , SnO ₂ , ITO, ZnO, CdO, PbO, PZT, and alloy compounds thereof are preferable, and as a nitride semiconductor, InN, GaN, AlN, and alloy compounds thereof are optimal.

The material of the first light-transmitting substrate 70 is not limited as long as it has a difference in thermal expansion coefficient of 2 ppm or less from the growth substrate (GaAs, Sapphire) and has optical transparency. For example, in the case of a GaAs (5.7ppm) growth substrate for a semiconductor light emitting device that emits red light, a thermal expansion coefficient of 3.7-7.7 ppm and an optically transparent material are used, and for a semiconductor light emitting device that emits blue, green, and ultraviolet rays In the case of a sapphire (single crystal Al ₂ O ₃ , 6.5 ppm) substrate, it is 4.5-8.5 ppm and an optically transparent material may be used. Representative materials that satisfy all of these include E glass (5.5ppm), AlN (4.5ppm), SiC (4.8ppm), and borosilicate glass (4.6ppm), in addition to _{sapphire (single crystal Al 2} O _{3 ) identical to the growth substrate.}

Next, as shown in FIG. 8( e ), the growth substrate 10 is removed. In the case of a GaAs substrate, wet etching may be used, and in the case of a sapphire substrate, laser ablation may be used. A metal bond is used for bonding the first light-transmitting substrate 70 and the semiconductor regions 30 , 40 , and 50 , and a protective layer 60 is provided on the semiconductor regions 30 , 40 and 50 , so that dry and wet etching or In the process of laser ablation, the metal bonding layer 71 and the semiconductor regions 30 , 40 , and 50 can withstand it. Preferably, prior to attaching the second light-transmitting substrate 80 (refer to FIG. 9) and the semiconductor regions 30, 40, 50, stress relief and performance (optical output, operating voltage) improvement of the light emitting device, and the formation of a passivation layer A process of removing (eg, etching) a part or all of the undoped semiconductor region 23 is performed for an easy subsequent process.

Next, as shown in FIG. 9A , a second light-transmitting substrate 80 is prepared, and at least one side of the second light-transmitting substrate 80 side and the semiconductor region 30, 40, 50 side, preferably Preferably, an adhesive layer 81 is provided on both sides. The adhesive layer 81 may be formed of a light-transmitting material, such as BCB resin, as in the prior art. Materials that can be used as the adhesive layer 81 include many well-known organic adhesives for wafer bonding other than the BCB organic adhesive material, Polyimide (160°C), SU-8 (90°C), Parylene (230°C), and Epoxy (150). ℃), silicone (100-300℃), etc.

Next, as shown in FIG. 9B , the second light-transmitting substrate 80 and the semiconductor regions 30 , 40 , and 50 are attached. Although heat (the organic adhesive material process temperature used above) is generated during the bonding process, the first light-transmitting substrate 70 and the semiconductor regions 30, 40, 50 have strong bonding force through metal bonding, so their bonding There is no problem with maintaining this. On the other hand, by forming the first light-transmitting substrate 70 and the second light-transmitting substrate 80 with a material having the same coefficient of thermal expansion (eg, sapphire), the adhesive layer 81 is strongly compressed to form the second light-transmitting substrate 80 and the semiconductor There is no problem of damage including cracking in bonding the regions 30 , 40 , and 50 .

Next, as shown in FIG. 9C , the first light-transmitting substrate 70 is removed to be separated from the semiconductor regions 30 , 40 , and 50 using laser ablation. By using laser ablation, it is possible to prevent damage to the adhesive layer 81 in the separation process of the first light-transmitting substrate 70 .

Next, as shown in FIGS. 10(a) and 10(b), the metal bonding layer 71 and the protective layer 60 are sequentially removed to prepare a P-side up flip chip. . Until this process, the adhesive layer 81 is prevented from being damaged, and the photolithography process is not used, and without the formation of electrodes or the etching process of the semiconductor regions 30 , 40 , 50 which are the core of the light emitting device, the first Since the operation is performed at the wafer level, it is possible to minimize cracks and cracks in the semiconductor regions 30 , 40 , and 50 despite performing the wafer bonding process twice. In addition, there is an advantage in that the performance and quality of the finally fabricated light emitting device can be further improved by continuously etching some or all of the undoped semiconductor region 23 after the growth substrate 10 is removed. In this process, the formation of the protective layer 60, the use of the metal bonding layer 71, the removal of the first light-transmitting substrate 70 using laser ablation, and the first light-transmitting substrate 70 and the second light-transmitting substrate ( 80), it is important to minimize the difference in the thermal expansion coefficient (normally, the difference in the maximum thermal expansion coefficient ≤ 2ppm to prevent cracking during wafer bonding between dissimilar materials).

Next, as shown in FIGS. 11A and 11B , the second semiconductor region 50 and a portion of the active region 40 are removed to expose the first semiconductor region 30 .

Next, as shown in FIG. 11C , a light-transmitting electrode 91 , a first electrode 92 , and a second electrode 93 are formed. The light-transmitting electrode 91 functions to smoothly spread the current in the second semiconductor region 50 having poor current diffusion, and is mainly made of a transmissive conductive oxide film (TCO), typically made of ITO. The first electrode 92 and the second electrode 93 are electrically connected to the first semiconductor region 30 and the second semiconductor region 50, respectively, and have the same configuration as the electrodes 316, 318, 320, and 322 shown in FIG. can function as

Next, as shown in Fig. 11(d), the semiconductor light emitting device in a wafer state is isolated as an individual chip. At this time, by removing the adhesive layer 81 to expose the second light-transmitting substrate 80 , it is possible to facilitate the scribing & breaking process of the second light-transmitting substrate 80 .

Finally, as shown in FIG. 11E , a passivation layer 94 (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) is formed to protect the device. Meanwhile, as shown, by reducing the size of the electrode 93 and providing a dielectric reflector (DBR reflector) in the passivation layer 94 , it can function as a reflector instead of the electrode 93 . An example of such a dielectric reflector is well presented in US Pat. No. 9,236,524. The passivation layer 94 is basically a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) after covering the top and sides of the semiconductor regions 30 , 40 , 50 with a high reflectivity metal material (eg, A multilayer structure in which Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is continuously deposited and formed is also possible.

It goes without saying that the order of the processes shown in FIGS. 11(b) to 11(e) may be changed. In the case of a mini or micro LED chip, the area of the sidewall of the isolation process and the MESA process is smaller than the light emitting area compared to the size of the conventional chip (the length of one side is generally 300um or more). Since it occupies a large area compared to that, it is very important from the viewpoint of light brightness and reliability to isolate and prevent electrical flow through the mesa sidewall (electrical passivation). Therefore, it is desirable to perform an electrical passivation process immediately after the isolation and mesa processes so as not to be exposed to the atmosphere for a long time between processes after the isolation and mesa processes.

17 is a view illustrating an example of a semiconductor light emitting device according to the present disclosure, wherein the semiconductor light emitting device includes a light-transmitting substrate 1 , a first semiconductor region 2 , an active region 3 , a second semiconductor region 4 , an insulating layer (5), a current spreading electrode (6), a first electrode (7) and a second electrode (8).

The light-transmitting substrate 1 may be a growth substrate (eg, sapphire, SiC) or a light-transmitting substrate attached to the semiconductor regions 2 , 3 and 4 in a state in which the growth substrate is removed. The light-transmitting substrate may also be made of a material such as sapphire or SiC, and examples of such a substrate are shown in FIGS. 4 to 11 . The light-transmitting substrate 1 may be a growth substrate or may be formed of a second light-transmitting substrate 80 as shown in FIG. 11 .

The first semiconductor region 2 , the active region 3 , and the second semiconductor region 4 may be formed of n-type GaN, InGaN/(In)GaN MQWs, or p-type GaN, and emit ultraviolet, blue, and green light. In this case, it may be made of an AlGaInN-based semiconductor, and in the case of emitting red light, it may be made of an AlGaInP(As)-based semiconductor. Each region may consist of a single layer or multiple layers, and the conductivity may be interchanged. When the light-transmitting substrate 1 is a growth substrate, it is preferable that a buffer region 20 (refer to FIG. 8 ) is provided between the first semiconductor region 2 and the light-transmitting substrate 1 . Furthermore, when the semiconductor light emitting device is transferred to the upper part of a panel (a glass substrate in which a plurality of thin film transistors are aligned, PCB) that controls the brightness of light through electric injection to be used in a micro LED display by direct light emission and electrically connected, The light-transmitting substrate 1 is removed and the first semiconductor region 2 , the active region 3 , the second semiconductor region 4 , the insulating layer 5 , the current spreading electrode 6 , the first electrode 7 and A semiconductor light emitting device composed of the second electrode 8 is also possible.

The insulating layer 5 serves as a passivation and is made of a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) to block the flow of current and minimize light absorption.

The current spreading electrode 6 supplies a current from the second electrode 8 to the second semiconductor region 5 and serves to provide an ohmic contact, a light-transmitting conductive film (eg, ITO), a metal having excellent reflectivity ( Examples: Ag, Au, Al, Ag/Ni/Au), a non-conductive reflective film (eg DBR), and a combination thereof (eg, ITO, ITO/Ag, ITO/DBR). In the case of including the non-conductive reflective film, as shown in FIG. 2 , an electrical connection 94 is provided for electrical communication between the second electrode 8 and the current spreading electrode 6 . It goes without saying that a non-conductive reflective layer may also be provided on the insulating layer 5 on the first semiconductor region 2 exposed by etching.

The first electrode 7 and the second electrode 8 may be formed in the same process, serve as a bonding pad, and may have, for example, a configuration such as Ti/Ni/Au.

Preferably, by providing an ohmic contact electrode 9 (eg, Cr/Al/Ni/Au, Ti/Al/Ni/Au) under the first electrode 7 , the driving voltage is lowered and the first electrode 7 is ) and the second electrode 8 may serve to reduce the structural inclination (height difference).

As shown, the second semiconductor region 4 , the active region 3 and a part of the first semiconductor region 2 not only in the region in which the first electrode 7 is placed but also in the region in which the second electrode 8 is placed By removing and forming them, it is possible to reduce the height difference between the first electrode 7 and the second electrode 8, and it is possible to solve the problem caused by the inclination of the semiconductor light emitting device during bonding. In the case of mini LED and micro LED, since the size is small and the same amount of bonding material is used when bonding the flip chip, there is a high possibility of causing quality risks including electrical short, and especially the flip without the light-transmitting substrate 1 In the case of a chip (when the light-transmitting substrate 1 is removed, the overall thickness of the semiconductor light emitting device becomes very thin from 150 to 200 μm to 10 μm or less), in addition to the above issues, the crack occurrence rate may be further increased. Above all, when used as a display light source, there is a high possibility of causing color deviation and color mixing due to the distortion of the light emitting pattern, and electrical and optical Quality issues may arise.

18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17. First, as shown in FIG. 18(a), the first semiconductor region 2 on the light-transmitting substrate 1, the active A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 18( b ), the second semiconductor region 4 and the active region 3 at positions A and B where the first electrode 7 and the second electrode 8 are to be formed. and a portion of the first semiconductor region 2 is removed through etching (eg, ICP). Next, as shown in FIG. 18C , an insulating layer 5 is formed, and a part of the insulating layer 5 is removed through a photolithography process. At this time, the insulating layer 5 at the position (C) where the first electrode 7 is to be placed is opened, and the insulating layer 5 at the position (D) where the second electrode 2 is to be placed is left as it is, and the current spreading electrode 6 ) removes the insulating layer 5 to secure a region E capable of electrically communicating with the second semiconductor region 4 , so that a portion of the second semiconductor region 4 is exposed. Next, as shown in FIG. 18(d), the current spreading electrode 6 and the ohmic contact electrode 9 are formed. Next, as shown in FIG. 18E , the first electrode 7 and the second electrode 8 are formed. Preferably, as shown in Fig. 11(e), a passivation layer 94 is added.

19 is a view showing another example of the semiconductor light emitting device according to the present disclosure. Compared with the semiconductor light emitting device shown in FIG. 17 , ① the second electrode 8 is etched into the semiconductor layers 2 , 3 and 4 . A point formed on the second semiconductor region 4 without the presence of a second semiconductor region 4, ② a point connected from the first semiconductor region 2 (F) exposed by etching the first electrode 1 to the second semiconductor region 4; G, ③ insulation The difference is that the formation order of the layer 5 and the current spreading electrode 6 is reversed. Through this configuration, the height difference between the first electrode 7 and the second electrode 8 can be reduced. By forming the width of the first electrode 7 and the ohmic contact electrode 9 to span the entire width W of the semiconductor light emitting device or to almost reach most of it, current is supplied from the second electrode 8 to the region G This blocked area (G) becomes a non-light-emitting area despite the presence of the active area (4). That is, in the semiconductor light emitting device shown in FIG. 19 , the non-emission region G; the first electrode 7 and the ohmic contact electrode 9 from the first semiconductor region 2 (F) exposed by etching the first electrode 1 . is formed to be at least 50% longer along the width (W) of the semiconductor light emitting device to block the current supply from the second electrode (8), while the insulating layer (5) under the first electrode (7) in the region (G) ) is positioned so that the supply of current is cut off), thereby resolving the height difference between the first electrode 7 and the second electrode 8 by configuring it to extend over the second semiconductor region 4 . For reference, the insulating layer 5 is not shown in the plan view.

20 is a view showing another example of the semiconductor light emitting device according to the present disclosure. Compared with the semiconductor light emitting device shown in FIG. 19 , ① the entire first electrode 7 is formed on the second semiconductor region 5 . Point, ② It has a difference in that the electrical connection 11 is formed through the via hole H in the insulating layer 5 for electrical communication between the first electrode 7 and the ohmic contact electrode 9 . Even in this case, the region I opposite the second electrode 8 with respect to the via hole H is a non-light-emitting region, and therefore, by forming the first electrode 7 in the non-light-emitting region G, the first The height difference between the electrode 7 and the second electrode 8 is reduced. For reference, the insulating layer 5 is not shown in the plan view.

21 is a view showing another example of a semiconductor light emitting device according to the present disclosure, wherein the insulating layer 5 is not formed along the entire exterior of the semiconductor layers 2, 3, and 4, but the semiconductor layers 2, 3, 4), the current spreading electrode 6 and the ohmic contact electrode 9 are covered with a difference in that they are formed flat as a whole. Through this configuration, it is possible to match the height of the first electrode 7 to the second electrode 8 regardless of the shape of the mesa-etched region J on the side of the first electrode 7 . This configuration is made possible by using a liquid insulating layer (5; thermosetting plastics such as BCB, SU-8, Acrylate, SOG). From a different point of view, the insulating layer 5 is made possible by using a method (eg, spin coating) other than the conventional deposition method (eg, CVD, PVD).

22 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21. First, as shown in FIG. 22(a), the first semiconductor region 2 on the light-transmitting substrate 1, the active A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 22(b) , a region J in which the first electrode 7 is located is formed. Next, as shown in FIG. 22(c), the current spreading electrode 6 and the ohmic contact electrode 9 are formed. It is preferable that the current spreading electrode 6 and/or the ohmic contact electrode 9 have a reflective film structure (metal or DBR having excellent reflectivity), and photodiscoloration (photodegradation by light) of the insulating layer 5 formed subsequently It is particularly preferable to use a metal reflective film to prevent development). Next, as shown in FIG. 22( d ), the semiconductor regions 2 , 3 and 4 are isolated to expose the light-transmitting substrate 1 . Of course, this process may be performed before the process shown in FIGS. 22(b) and 22(c). Next, as shown in FIG. 11(e), in order to improve the reliability of the light emitting device, the insulating layer 5-1 (eg, SiO ₂ ) is formed using PVD or CVD (eg, sputtering, PECVD). desirable. Next, as shown in FIG. 22(f), an insulating layer 5 is formed. The insulating layer 5 may be formed through spin coating. In order to increase the flatness, spin coating 2 to 3 times may be used as needed. Next, as shown in FIG. 22( g ), after holes are formed in the insulating layer 5 , the first electrode 7 and the second electrode 8 are formed. If necessary, as shown in FIG. 22(h), the insulating layer 5 is removed in the region except where the first electrode 7 and the second electrode 8 are located (eg, oxygen (O ₂ ) Plasma etching containing components), except that the insulating layer 5 is formed only under the electrodes 7 and 9, to provide a semiconductor light emitting device that is not significantly different from the semiconductor light emitting device shown in FIG. be able to

23 is a view showing another example of the semiconductor light emitting device according to the present disclosure, and is substantially the same as the semiconductor light emitting device shown in FIG. 11(e). In the case of the semiconductor light emitting device shown in FIG. 7 , since the light-transmitting substrate 314 and the semiconductor regions 302 , 304 , and 306 are bonded by the flexible and transparent adhesive layer 312 , the bonding strength is not excellent. By introducing a rough surface of the n-type semiconductor region 302, the bonding area of the transparent adhesive layer 312 and the n-type semiconductor region 302 can be spread, but this is insufficient. Even in the case of the semiconductor light emitting device shown in FIG. 2 , the transparent support substrate 102 and the semiconductor regions 104 to 112 are coupled through the P-type current diffusion layer 118 (eg, ITO) and the transparent adhesive layer 130 as a medium. There is a problem in maintaining the bond between the two. That is, when the semiconductor regions 302, 304, and 306 are supported on the light-transmitting substrate 314 with the flexible and transparent adhesive 312 (organic adhesive such as BCB) through one or two wafer bonding, the semiconductor regions 302, 304, and 306 and the light-transmitting adhesive Due to the difference in the coefficient of thermal expansion of the substrate 314, peeling may occur at the upper and lower interfaces of the transparent adhesive 312 with weak adhesion due to thermo-mechanical stress during or after the SMT process. It is a structure that bonds to a non-transparent dissimilar substrate, and the possibility of peeling is very high in the organic adhesive bonding area, which is the weakest part. Like the semiconductor light emitting device shown in FIG. 11 , the semiconductor light emitting device includes a light-transmitting substrate 80 , an adhesive layer 81 , a first semiconductor region 30 , an active region 40 , a second semiconductor region 50 , and a first electrode. 92 , a second electrode 93 , and a passivation layer 94 . Unlike the semiconductor light emitting device shown in FIG. 11 , the passivation layer 94 is formed before the first electrode 92 and the second electrode 93 are formed, but may be formed in the reverse order. Preferably, the light-transmitting electrode 91 is included, and various types of electrode configurations shown in FIGS. 12 to 22 are possible. 7, by forming rough surfaces S and S in the first semiconductor region 30 and/or the light-transmitting substrate 80 region, the contact area of the adhesive layer 81 is widened, and the light extraction efficiency is increased. It is possible to raise In the example shown in FIG. 23 , the passivation layer 94 is removed from the second semiconductor region 50 , the active region 40 , the first semiconductor region 30 , and the adhesive layer 80 to the transparent substrate 80 exposed. is connected Accordingly, the passivation layer 94 is bonded to the light-transmitting substrate 80 , and through this bonding force, the adhesive layer 80 can be reliably prevented from being separated from the first semiconductor region 30 and/or the light-transmitting substrate 80 . there will be The passivation layer 94 may be formed of a single layer or a composite layer (eg, ODR, DBR), and may be formed of a material such as _{SiO 2} , SiN _x , TiO ₂ , Al ₂ O _{3 .} For example, by forming the passivation layer 94 to a thickness of 1 μm or more, it is possible to prevent peeling. The passivation layer 94 is basically a dielectric material (eg _{, SiO 2} , Al ₂ O ₃ , SiN _x ) to cover the top and sides of the semiconductor regions 30 , 40 , and 50 , and then a metal material having high reflectivity (eg, : Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is also preferred to form a multilayer structure by deposition continuously. The adhesive layer 81 may be BCB, Silicone, SU-8, SOG, Acrylate, Urethane, or the like, including the aforementioned materials.

24 and 25 are views showing another example of the semiconductor light emitting device according to the present disclosure, in which, unlike FIG. 23 , the first electrode 92 and the second electrode 93 pass through the passivation layer 94 to the light-transmitting substrate ( 80) continues upwards. This configuration (at least the passivation layer 94 covering the semiconductor regions 30, 40, 40 and the adhesive layer 81, and the first electrode 92 and the second electrode 93 connected thereon to the light-transmitting substrate 80) Through this, it is possible to prevent peeling from both sides of the adhesive layer 81 . In this case, the passivation layer 94 may extend over the light-transmitting substrate 80 , or may be formed only up to the interface between the adhesive layer 81 and the light-transmitting substrate 80 . Additionally, a first electrode post 92P and a second electrode post 93P may be provided on each of the first electrode 92 and the second electrode 93 formed on the light-transmitting substrate 80 . By having the first electrode post 92P and the second electrode post 93P, the semiconductor light emitting device has a shape as shown in FIG. 25 , and an external power supply 98 (submount, interposer, wiring board, display pixel). etc.) can be electrically and mechanically connected. The first electrode post 92P and the second electrode post 93P may be formed to have a height higher than the height of the semiconductor regions 30 , 40 , and 50 (about 4 to 5 μm) and less than 10 μm. Preferably, the space in which the first electrode post 92P and the second electrode post 93P are not formed is filled with an encapsulant 99 (eg, white silicone) (eg, screen printing), and the first electrode post 92P ) and the second electrode post 93P, while supporting the semiconductor light emitting device as a whole, it is possible to form a single package. The first electrode post 92P and the second electrode post 93P may be formed through copper plating. If necessary, a rough surface for light scattering may be formed on the surface U of the light-transmitting substrate 80 on the opposite side of the adhesive layer 81 , or a carbon-containing epoxy coating may be applied.

26 is a view showing still other examples of the semiconductor light emitting device according to the present disclosure. In FIG. 26(a), the first electrode post 92P and the second electrode post 93P are formed in semiconductor regions 30, 40, and 50. An example formed to overlap the first electrode 92 and the second electrode 93 formed on the above is presented, and in FIG. 26(b), the first electrode formed through PVD (eg, sputtering, e-beam evaporator) rather than plating is reinforced. The portion 92T and the second electrode reinforcement portion 93T are formed to overlap the first electrode 92 and the second electrode 93 formed on the semiconductor regions 30, 40, and 50 (the first electrode reinforcement portion 92T) ) and the second electrode reinforcement 93T are formed to conform to the overall shape of the semiconductor regions 30 , 40 , and 50 ). Through this configuration, it is possible to further prevent peeling of both sides of the adhesive layer 81 .

27 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which two semiconductor light emitting device chips AA and BB are provided on one light-transmitting substrate 80 through adhesive layers 81 and 81 . . The first electrode post 92P, the second electrode post 93PA, and the second electrode post 93PB are formed by the same method as the method shown in FIG. 24 . The first electrode post 92P is connected to the first electrode 92A of the semiconductor light emitting device chip AA and the first electrode 92B of the semiconductor light emitting device chip BB to function as a common electrode. The first electrode 92A and the first electrode 92B may be formed integrally or separately. The second electrode post 93PA is connected to the second electrode 93A of the semiconductor light emitting device chip AA, and the second electrode post 93PB is connected to the second electrode 93B of the semiconductor light emitting device chip BB. connected. Through this configuration, a plurality of semiconductor light emitting device chips may be combined into one package, and may be coupled to the external power supply unit 98 (submount, interposer, wiring board, display pixel, etc.) shown in FIG. 25 . Through this configuration, when the semiconductor light emitting device chips AA and BB are micro LED chips, each of the semiconductor light emitting device chips provided in each panel (pixel) is inspected and not replaced in case of failure, but is inspected at the package level. After that, it is fixed to the panel (pixel), and thereafter, even in case of failure, it has the advantage of replacing it in a package unit. When the two semiconductor light emitting device chips AA and BB emit the same color, they can be grown on one growth substrate and formed through the above-described processes, and the two semiconductor light emitting device chips AA and BB are In the case of emitting different colors, each semiconductor light emitting device chip (AA, BB), unlike the previous examples, uses various transfer process technologies (eg, pick & place that mechanically moves and arranges the chip, adhesive material (eg, : A stamp that moves and arranges chips by making a stamp structure patterned with silicon-based PDMS), a method of moving and arranging chips using an electrostatic force or electromagnetic force structure, and a predetermined uniform viscosity The adhesive layer 81 over the light-transmitting substrate 80 using self-assembly, which moves the chip by combining a fluid with an electromagnetic force structure, and laser-induced forward transfer, which moves the chip by combining a laser light source and an explosive adhesive material. , 81) as a medium. Each of the semiconductor light emitting device chips AA and BB is in a state in which the growth substrates 1 and 10, the support substrate or the light-transmitting substrate 80 are removed in the state shown in FIGS. 11 (e) and 12 to 22 ( Preferably, as shown in FIGS. 11(e) and 23, a passivation layer 94 is formed on the upper surface and side surfaces of the semiconductor regions 30, 40, 50 in a state in which the growth substrate 10 is removed, Also, in the state in which the electrodes 91, 92 and 93 are formed), they are transferred onto the light-transmitting substrate 80 . In order to prevent the semiconductor light emitting device chips AA and BB and/or the light-transmitting substrate 80 from being separated from the adhesive layer 81 while being transferred to the light-transmitting substrate 80 via the adhesive layer 81 in this way, a passivation layer 94A is introduced, on which first electrodes 92A, 92B and second electrodes 93A, 93B run over a light-transmitting substrate 80, on which a first electrode post 92P and a second electrode post (93PA, 93PB) is formed. Materials of the adhesive layers 81 and 81 are widely known as organic adhesives for wafer bonding other than BCB (250℃) organic adhesive materials. Polyimide (160℃), SU-8 (90℃), Parylene (230℃), Epoxy (150℃), Silicone (100-300℃), SOG (spin on glass), etc. are representative.

28 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which three semiconductor light emitting device chips (AA, BB, CC; eg, RGB LED) are provided on one light-transmitting substrate 80 . The manner in which they are transferred to the light-transmitting substrate 80 has already been described in FIG. 27 . The semiconductor light emitting device includes a first electrode post 92PA, a second electrode post 93PA, a second electrode post 93PB, and a second electrode post 93PC. A first electrode 92A, 92B, 92C, a second electrode 93A, a second electrode 93B, and a second electrode 93C are formed on each of the three semiconductor light emitting device chips AA, BB, and CC. , the first electrodes 92A, 92B, and 92C may be integrally connected to each other. Of course, the first electrodes 92A, 92B, and 92C may be formed separately, and the second electrodes 93A, 93B, and 93C may be integrally connected to each other. The first electrode post 92PA is connected to the first electrodes 92A, 92B, and 92C to function as a common electrode, and the second electrodes 93A and 93B formed on the three semiconductor light emitting device chips AA, BB, and CC, respectively. , 93C), second electrode posts 93PA, 93PB, and 93PC are formed. As described above, each of the three semiconductor light emitting device chips AA, BB, and CC is attached to the light-transmitting substrate 80 using an adhesive layer 81 (refer to FIG. 27), and then the passivation layer 94A (refer to FIG. 27). Next, the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are formed so as to be connected to the light-transmitting substrate 80, and then, the first electrode post 92PA and the second electrode post 92PA 2 Electrode posts 93PA, 93PB, and 93PC are formed (eg, plated). Preferably, as shown in FIG. 27 , a space between the first electrode post 92PA and the second electrode post 93PA, 93PB, and 93PC is filled with an encapsulant 99 .

① Through this configuration, it is possible to manufacture a mini or micro LED having a window (transmissive substrate 80) having a sufficient thickness.

② Through this configuration, the mini or micro LED is not put into the panel (pixel) as a chip, but is put into the panel (pixel) in the form of a package, thereby simplifying the operation and facilitating verification and replacement. .

③ Through this configuration (all RGB LED chips are composed of p-side up flip chips), the problem of using n-side up flip chips (as the size of the chip is miniaturized, N-type non-uniform current flow, etc.) excess heat) can be eliminated.

④ This configuration (passivation layer 94 and/or first electrodes 92A, 92B, 92C and second electrodes 93A, 93B, 93C) leads to light-transmitting substrate 80 with or without adhesive layer 81 ), it is possible to manufacture mini or micro LEDs with high reliability (reducing the possibility of peeling of both sides of the adhesive layer 81).

⑤ Through the above configuration, it is possible to manufacture a package for mini or micro LED in which all of the RGB chips are p-side up flip chips while ensuring device reliability. At this time, the red LED chip may become a p-side up flip chip by going through wafer bonding 2 times, and the green and blue LED chips may become a p-side up flip chip by going through wafer bonding 0 or 2 times. . It is also possible to use 4 wafer bonding steps if necessary.

Hereinafter, various embodiments of the present disclosure will be described.

(1) In the method of manufacturing a semiconductor light emitting device that is a flip chip, a first semiconductor region having an N-type, an active region generating light through recombination of electrons and holes, and a second semiconductor region having a P-type are sequentially formed providing a formed growth substrate; bonding the first light-transmitting substrate to the side of the second semiconductor region; removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the side of the first semiconductor region from which the growth substrate is removed using an adhesive layer; laser ablating the first light-transmitting substrate from the second semiconductor region side; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; and forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

(2) prior to bonding the first light-transmitting substrate, forming a protective layer in the second semiconductor region; a method of manufacturing a semiconductor light emitting device comprising a.

(3) A method of manufacturing a semiconductor light emitting device in which the first light-transmitting substrate includes a sacrificial layer, and the sacrificial layer and the protective layer are bonded by a metal bonding layer.

(4) A method of manufacturing a semiconductor light emitting device in which the metal bonding layer and the protective layer are sequentially removed after the step of removing the first light-transmitting substrate and before the step of exposing a portion of the first semiconductor region.

(5) A method of manufacturing a semiconductor light emitting device in which a portion of the adhesive layer is removed to expose the second light-transmitting substrate after the step of sequentially removing the metal bonding layer and the protective layer.

(6) A method of manufacturing a semiconductor light emitting device comprising the step of sequentially removing the metal bonding layer and the protective layer, and then forming a light-transmitting electrode in the second semiconductor region.

(7) In the providing step, an undoped semiconductor region is formed under the first semiconductor region, and prior to the attaching step, at least a part of the undoped semiconductor region is removed. A method of manufacturing a semiconductor light emitting device.

(8) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically connected to the second semiconductor region A semiconductor light emitting device comprising a; a second electrode communicating and functioning as a flip-chip bonding pad.

(9) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, in electrical communication with the first semiconductor region, and functioning as a flip-chip bonding pad; and a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad, wherein the first electrode extends over the second semiconductor region, which is a non-emission region.

(10) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functioning as a flip-chip bonding pad; a second electrode in electrical communication with the second semiconductor region and functioning as a flip-chip bonding pad; In addition, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed to fill the exposed first semiconductor region, and an insulating layer disposed under the first electrode and the second electrode; device.

(11) an additional insulating layer; wherein the additional insulating layer is exposed by removing the insulating layer in a region excluding the region below the first electrode and the second electrode.

(12) A semiconductor light emitting device comprising: a light-transmitting substrate; A semiconductor light emitting comprising a first semiconductor region having a first conductivity, an active region generating light by using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity, which are sequentially grown A device chip; comprising: a first semiconductor light emitting device chip having a first electrode electrically connected to a first semiconductor region and a second electrode electrically connected to a second semiconductor region; an adhesive layer bonding the light transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

(13) A semiconductor light emitting device in which the passivation layer is continued on an exposed light-transmitting substrate without an adhesive layer.

(14) A semiconductor light emitting device in which the first electrode and the second electrode are formed on the passivation layer and are continued on the exposed light-transmitting substrate without the adhesive layer.

(15) A semiconductor light emitting device comprising: a first electrode post formed higher than a height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate; and a second electrode post.

(16) A semiconductor light emitting device comprising a; encapsulant covering the first semiconductor light emitting device chip and supporting the first electrode post and the second electrode post.

(17) provided on a light-transmitting substrate, a second semiconductor light emitting device chip; including, wherein the second semiconductor light emitting device chip is sequentially grown using a first semiconductor region having a first conductivity and recombination of electrons and holes An active region generating light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region electrically connected to the light-transmitting region A second electrode connected to the substrate, and a first electrode post and a second electrode post formed higher than a height of a second semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate, the first semiconductor light emitting device comprising: One of the first electrode post of the device chip, the first electrode post of the second semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip is a common electrode. A semiconductor light emitting device that is integrally formed.

(18) covering the first semiconductor light emitting device chip and the second semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip, the second electrode post of the first semiconductor light emitting device chip, and the second semiconductor light emitting device A semiconductor light emitting device comprising a; encapsulant for supporting the first electrode post of the chip and the second electrode post of the second semiconductor light emitting device chip.

(19) A semiconductor light emitting device in which a passivation layer covers the first semiconductor light emitting device chip and the second semiconductor light emitting device chip.

(20) provided on the light-transmitting substrate, a third semiconductor light emitting device chip; including, wherein the third semiconductor light emitting device chip is sequentially grown using a first semiconductor region having a first conductivity and recombination of electrons and holes An active region generating light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over the light-transmitting substrate, and a second semiconductor region electrically connected to the light-transmitting region A second electrode connected to the substrate, and a first electrode post and a second electrode post formed higher than a height of a third semiconductor light emitting device chip on each of the first electrode and the second electrode connected on the light-transmitting substrate, the first semiconductor light emitting device comprising: The first electrode post of the device chip, the first electrode post of the second semiconductor light emitting device chip and the first electrode post of the third semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip, the second semiconductor light emitting device A semiconductor light emitting device in which one of the second electrode post of the chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode.

(21) covering the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip , the first electrode post of the second semiconductor light emitting device chip, the second electrode post of the second semiconductor light emitting device chip, and the first electrode post of the third semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip A semiconductor light emitting device comprising a; encapsulant for supporting.

(22) The second semiconductor region of the first semiconductor light emitting device chip, the second semiconductor region of the second semiconductor light emitting device chip, and the second semiconductor region of the third semiconductor light emitting device chip are opposite to the light-transmitting substrate with respect to each active region A semiconductor light emitting device provided on the side.

(23) A semiconductor light emitting device in which the passivation layer covers the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device.

According to the method of manufacturing a semiconductor light emitting device according to the present disclosure, it is possible to provide a flip chip semiconductor light emitting device with improved mass productivity by further improving yield and reliability. In particular, when applied to a mini LED or a micro LED, the mass productivity thereof can be significantly increased.

According to the semiconductor light emitting device according to the present disclosure, it is possible to reduce the structural inclination (height difference) between the first electrode and the second electrode functioning as a bonding pad of a flip chip. As a result, the direction of light emitted from the semiconductor light emitting device can be uniformly controlled, and finally, light quality in applications such as displays and lighting can be improved.

According to the semiconductor light emitting device according to the present disclosure, it is possible to manufacture a package for a mini or micro LED in which all of the RGB chips are p-side up flip chips while securing the reliability of the device.

According to the semiconductor light emitting device according to the present disclosure, a mini or micro LED package (so-called, inter ) used as a window (light emitting part) with a plate-shaped light-transmitting substrate (eg, sapphire, quartz, glass) rather than a transparent encapsulant in the prior art. poser) can be provided.

1: light-transmitting substrate, 2: first semiconductor region, 3: active region, 4: second semiconductor region, 5: insulating layer, 6: current diffusion electrode, 7: first electrode, 8: second electrode, 20: growth Substrate 30: first semiconductor region, 40: active region, 50: second semiconductor region, 60: protective layer, 70: first light-transmitting substrate, 80: second light-transmitting substrate, 92: first electrode, 93: second electrode

Claims (6)

A method for manufacturing a flip chip semiconductor light emitting device, comprising:
providing a growth substrate in which a first semiconductor region having an N-type, an active region generating light through recombination of electrons and holes, and a second semiconductor region having a P-type are sequentially formed; bonding the first light-transmitting substrate to the side of the second semiconductor region;
removing the growth substrate from the first semiconductor region side; attaching a second light-transmitting substrate to the side of the first semiconductor region from which the growth substrate is removed using an adhesive layer;
laser ablation of the first light-transmitting substrate from the side of the second semiconductor region; removing a portion of the second semiconductor region and the active region to expose a portion of the first semiconductor region; And,
A method of manufacturing a semiconductor light emitting device comprising: forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively. The method according to claim 1,
Prior to bonding the first light-transmitting substrate, forming a protective layer on the second semiconductor layer; Method of manufacturing a semiconductor light emitting device comprising a. 3. The method according to claim 2,
The first light-transmitting substrate has a sacrificial layer,
A method of manufacturing a semiconductor light emitting device in which a sacrificial layer and a protective layer are bonded by a metal bonding layer. 4. The method according to claim 3,
After removing the first light-transmitting substrate, before exposing a portion of the first semiconductor layer, a method of manufacturing a semiconductor light emitting device in which the metal bonding layer and the protective layer are sequentially removed. 5. The method according to claim 4,
After the step of sequentially removing the metal bonding layer and the protective layer, a method of manufacturing a semiconductor light emitting device that removes a portion of the adhesive layer to expose the second light-transmitting substrate. 5. The method according to claim 4,
A method of manufacturing a semiconductor light emitting device comprising the step of sequentially removing the metal bonding layer and the protective layer, and then forming a light-transmitting electrode on the second semiconductor layer.

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