KR20210015920A - Light emitting element driving device - Google Patents

Abstract

A first external terminal connected to a control terminal of the switching element, and a driving control unit generating a driving signal for driving on/off of the switching element and outputting the driving signal from the first external terminal, and the driving control unit comprises: A light emitting element driving device having a coil current correction unit that corrects the coil current by adjusting the drive signal based on a delay in a transition timing in which the coil current changes from increase to decrease.

Description

Light emitting element driving device

The present invention relates to a light-emitting element driving device.

Conventionally, a light-emitting element driving apparatus for driving a light-emitting element represented by an LED (light-emitting diode) has been proposed in various ways. In the exterior of a conventional light-emitting element driving device that drives an LED, which is an example of a light-emitting element, a coil and a switching element are sequentially connected in series with respect to the low-potential side end (cathode) of an LED array configured by connecting a plurality of LEDs in series. , A capacitor is connected in parallel between both ends of the LED array, and a diode for reflux is connected between both ends of the connection configuration of the capacitor and the coil.

By controlling the switching element on/off, the LED current flowing through the LED array is controlled. When the switching element is turned on, the current flowing through the coil increases, and when the switching element is turned off, the current flowing through the coil and the diode decreases. The capacitor averages the current flowing through the coil to make the LED current.

In addition, an example of such a conventional light-emitting element driving device is disclosed in Patent Document 1.

Japanese Patent Publication No. 2016-91781

In the above conventional light emitting element driving apparatus, the current flowing through the coil (coil current) changes from an increase to a decrease when the switching element is turned off from an ON state. However, due to, for example, a delay in switching to the off level of the control voltage applied to the control terminal by an external resistor component connected between the output terminal of the light emitting element driving device and the control terminal of the switching element, the coil current There was a concern that the timing of the transition (switching) that changes from an increase to a decrease was delayed. In this case, the increase of the coil current continues by the amount of the delay, and the value of the LED current obtained by averaging the coil current becomes higher than the desired value, resulting in a problem of accuracy.

In view of the above problems, an object of the present invention is to provide a light emitting element driving apparatus capable of improving the accuracy of the current flowing through the light emitting element.

In order to achieve the above object, the present invention includes at least one light-emitting element, and a light-emitting unit to which an input voltage is applied at one end,

A coil having one end connected to the other end of the light emitting unit,

A diode connected between the other end of the coil and one end of the light emitting unit,

A light-emitting element driving device for driving the light-emitting unit in an external configuration including a switching element having a first terminal connected to the other end of the coil,

A first external terminal connected to the control terminal of the switching element,

And a driving control unit for generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal,

The drive control section has a coil current correction section that corrects the coil current by adjusting the drive signal based on a delay in a transition timing at which the coil current flowing through the coil changes from increase to decrease.

In addition, another aspect of the present invention includes at least one light-emitting element, and a light-emitting portion to which an input voltage is applied to one end,

A coil having one end connected to the other end of the light emitting unit,

A diode connected between the other end of the coil and one end of the light emitting unit,

A light-emitting element driving device for driving the light-emitting unit in an external configuration including a switching element having a first terminal connected to the other end of the coil,

A first external terminal connected to the control terminal of the switching element,

A driving control unit for generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal;

It has a second external terminal to which the selection input signal is input,

The driving control unit is configured to operate by switching between a QR mode (quasi-resonant) and a CCM mode (continuous current mode) according to the selection input signal.

According to the light emitting element driving apparatus of the present invention, the accuracy of the current flowing through the light emitting element can be improved.

1 is a circuit diagram showing the overall configuration of a light emitting element driving apparatus according to an embodiment of the present invention.
2 is a diagram showing an example of waveforms of a coil current and an LED current in a QR mode.
3 is a diagram showing an example of waveforms of coil current and LED current in the CCM mode.
4 is a timing chart for explaining the LED current correction function in the QR mode.
FIG. 5 is a view in which only the configuration related to current feedback control in the CCM mode in the light emitting element driving device shown in FIG. 1 is extracted.
6 is a diagram showing a light-emitting element driving device equipped with an LED current correction function in the CCM mode.
7 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 5 (FIG. 1 ).
FIG. 8 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 6.
9 is a view of a light emitting device driving device according to an embodiment as viewed from the top as an IC package product.
10 is a plan view showing an arrangement configuration in a chip provided in a light emitting element driving device according to an embodiment.
11 is a diagram showing a configuration example of a liquid crystal display device.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

<1. Overall configuration of light-emitting element driving device>

1 is a circuit diagram showing the overall configuration of a light emitting element driving apparatus according to an embodiment of the present invention. The light emitting element driving device 1 shown in Fig. 1 is a device that drives an LED array 50 configured by connecting a plurality of LEDs in series. That is, the light-emitting element driving device 1 is a device that drives an LED as an example of a light-emitting element to be driven. However, the light emitting element to be driven does not have to be limited to the LED.

In addition, the light-emitting element driving device 1 according to the present embodiment can operate by switching between a QR mode (quasi-resonant: pseudo resonance method) and a CCM mode (continuous current mode: current continuous method). . That is, both modes are mounted on one IC. Details of both modes will be described later.

As shown in FIG. 1, the light-emitting element driving device 1 includes an internal voltage generator 11, an IC power supply UVLO part 12, a UVLO part 13, an internal voltage UVLO part 14, and , A low-pass filter 15, an amplifier 16, an ODP (over duty protection) unit 17, a comparison voltage generation unit 18, a comparator 19, an error amplifier 20, and It is a semiconductor IC formed by integrating each of the components including the comparator 21, the oscillator 22, the abnormality detection unit 23, and the control logic unit 24.

Further, the comparator 19, the error amplifier 20, the comparator 21, the oscillator 22, the control logic unit 24, the driver Dr1, and the comparator CP2 constitute an example of the driving control unit. The drive control unit generates a gate output signal Gout (drive signal) output from the OUT terminal.

In addition, the light-emitting element driving device 1 is an external terminal for establishing electrical connection with the outside, and is a VCC terminal, ULVO terminal, SEL terminal, REG90 terminal, QRCOMP terminal, PWM terminal, DUTYON terminal, ADIM terminal, RT terminal. , FAILB terminal, ZT terminal, OUT terminal, CS terminal, FB terminal, DGND terminal and GND terminal.

Externally of the light emitting element driving device 1, as external components, respectively, divided resistors R1 and R2, diode D1, capacitor C1, coil L1, LED array 50, capacitor C2, divided resistor R11, R12, switching element M1, gate resistance Rg, current detection resistance Rs, feedback capacitor Cfb, capacitor C11, and resistor R21 are arranged.

The LED array 50 is a light emitting unit configured by connecting a plurality of LEDs in series. However, in addition, for example, LEDs may be connected in series and parallel to form an LED array, or a single LED may be used instead of the LED array.

The input voltage Vin is applied to the high potential side end (anode) of the LED array 50. One end of the coil L1 is connected to the low potential side end (cathode) of the LED array 50. The anode of the diode D1 for reflux is connected to the other end of the coil L1. The high potential side end of the LED array 50 is connected to the cathode of the diode D1. A capacitor C1 is connected in parallel between both ends of the LED array 50. The capacitor C1 averages the coil current Icoil, which is the current flowing through the coil L1, and makes the LED current ILED, which is the current flowing through the LED array 50.

To the other end of the coil L1, as an example, the drain of the switching element M1 composed of an n-channel MOSFET is connected. The source of the switching element M1 is connected to a ground potential application end through a current detection resistor Rs.

To the UVLO (Under Voltage Lock Out) terminal, the voltage after dividing the input voltage Vin with the dividing resistors R1 and R2 is applied. When the voltage applied to the UVLO terminal is less than a predetermined voltage, the UVLO unit 13 keeps the switching element M1 off in the control logic unit 24 to stop switching. That is, the UVLO terminal is a terminal for UVLO of the application power supply.

The power supply voltage Vcc is applied to the VCC terminal. That is, the VCC terminal is an IC power supply terminal. The IC power supply UVLO unit 12 causes the control logic unit 24 to shut down the IC when the power supply voltage Vcc is less than a predetermined voltage.

The internal voltage generator 11 generates an internal voltage Vreg based on the power supply voltage Vcc. The generated internal voltage Vreg can be output externally from the REG90 terminal. The REG90 terminal is a 9.0V output terminal. However, the output voltage value here is an example. An external capacitor C11 is connected to the REG90 terminal. It is preferable that the capacitor C11 is a ceramic capacitor.

The internal voltage UVLO unit 14 causes the control logic unit 24 to shut down the IC when the internal voltage Vreg is less than a predetermined voltage.

The control logic unit 24 outputs the gate output signal Gout from the OUT terminal to the outside using the driver Dr1. The gate output signal Gout is a pulse signal including High and Low. The OUT terminal is connected to the gate (control terminal) of the switching element M1 through a gate resistor Rg as an external component. The gate output signal Gout is applied to the gate of the switching element M1 as a gate signal Gt through the gate resistor Rg. Switching element M1 is turned on/off by the gate output signal Gout.

A pulsed PWM dimming signal is input from the outside to the PWM terminal. The ODP unit 17 switches whether or not to function the PWM ON time limit function in accordance with an on/off setting signal input from the outside through the DUTYON terminal. For example, when the on/off setting signal is Low, the on time of the PWM dimming signal is limited, and when the on/off setting signal is High, the PWM on time limiting function is turned off.

The control logic unit 24 outputs the on/off gate output signal Gout from the OUT terminal during the period when the PWM dimming signal output from the ODP unit 17 is high, and turns the gate output signal Gout low during the low period. Keep it as Thereby, the LED array 50 can be dimmed by adjusting the on-duty of the PWM dimming signal.

The SEL terminal is a terminal into which a selection input signal for selecting whether to operate the light emitting element driving device 1 in the QR mode or the CCM mode is input. The SEL terminal is pulled down by the pull-down resistor Rp inside the IC. The connection node between the SEL terminal and the pull-down resistor Rp is connected to the non-inverting input terminal of the comparator CP1. A predetermined reference voltage is applied to the inverting input terminal of the comparator CP1. Depending on the selection input signal high or low, the high or low selection signal SEL_sig is output from the comparator CP1.

The control logic unit 24 selects the QR mode or the CCM mode according to the level of the input selection signal SEL_sig. For example, when the selection input signal is high, the QR mode is selected, and when the selection input signal is low, the CCM mode is selected.

The CS terminal and comparator 19 are used for current detection in the QR mode. The CS terminal is connected to the connection node of the switching element M1 and the current detection resistor Rs. To the non-inverting input terminal of the comparator 19, the current detection signal Vcs after the coil current Icoil has been converted into current and voltage by the current detection resistor Rs is input through the terminal CS.

The current detection threshold voltage Vcsqr output from the comparison voltage generator 18 is input to the inverting input terminal of the comparator 19. The comparator 19 outputs a comparison result of the current detection signal Vcs and the current detection threshold voltage Vcsqr to the control logic unit 24.

Here, the ADIM terminal is an external terminal for inputting an analog dimming signal (analog voltage signal) from the outside. When the QR mode is selected by the selection signal SEL_sig, the comparison voltage generator 18 outputs the current detection threshold voltage Vcsqr multiplied by the first gain multiplied by the analog dimming signal. By adjusting the analog dimming signal, the LED array 50 can be dimmed in the QR mode.

The CS terminal and error amplifier 20 are used for current feedback control in the CCM mode. The current detection signal Vcs is input to the inverting input terminal of the error amplifier 20 through the CS terminal. A current feedback voltage Vcsccm as a reference voltage output from the comparison voltage generator 18 is input to a non-inverting input terminal of the error amplifier 20. The FB terminal is connected to the output terminal of the error amplifier 20. An external capacitor Cfb is connected to the FB terminal.

When the CCM mode is selected by the selection signal SEL_sig, the comparison voltage generation unit 18 outputs the current feedback voltage Vcsccm multiplied by the second gain multiplied by the analog dimming signal. By adjusting the analog dimming signal, the LED array 50 can be dimmed in the CCM mode.

In addition, more details of the operation by the comparison voltage generator 18 will be described later.

The output terminal of the error amplifier 20 is connected to the non-inverting input terminal of the comparator 21. An oscillation signal output from the oscillator 22 is input to the inverting input terminal of the comparator 21. The oscillation signal is, for example, a saw-shaped waveform. The comparator 21 outputs the PWM signal Spwm to the control logic unit 24 as a result of comparing the output of the error amplifier 20 and the oscillation signal.

Further, in the CCM mode, the frequency of the PWM control is fixed, but this frequency is set by an external resistor R21 connected to the RT terminal.

Further, the ZT terminal is a terminal for detecting a zero cross of the coil current Icoil in the QR mode, and is connected to the connection nodes of the voltage divider resistors R11 and R12. The inverting input terminal of the comparator CP2 is connected to the ZT terminal. A predetermined reference voltage is applied to the non-inverting input terminal of the comparator CP2. The comparator CP2 outputs the zero cross detection signal to the control logic unit 24. Further, the comparator CP3 is also connected to the ZT terminal, but the comparator CP3 is used for correction control of the LED current ILED in the QR mode, and details thereof will be described later.

When the QR mode is selected by the selection signal SEL_sig, the amplifier 16 amplifies the output from the low-pass filter 15 and outputs it. The control logic unit 24 outputs the gate output signal Gout of the OUT terminal to the low-pass filter 15 when the PWM dimming signal is High. Thereby, the low-pass filter 15 smoothes and outputs the gate output signal Gout. That is, the QRCOMP terminal outputs a DC voltage proportional to the ON duty of the gate output signal Gout to the outside when the QR mode is selected by the selection signal SEL_sig, and when the PWM dimming signal is High. The DC voltage output from the QRCOMP terminal is used to generate an analog dimming signal input to the ADIM terminal, and corrects the linearity of the LED current in QR mode.

Further, when an abnormality is detected, the control logic unit 24 outputs an abnormal signal indicating an abnormal state from the FAILB terminal to the outside by using the abnormality detection unit 23. Further, the abnormal signal has a different level depending on the abnormal state or the steady state.

In addition, the GND terminal is a terminal for taking the ground of the IC. The DGND terminal is a terminal for taking the digital ground of the IC.

<2. QR mode and CCM mode>

Next, each operation in the QR mode and CCM mode will be described. When the QR mode is selected by the selection input signal input to the SEL terminal, the control logic unit 24 controls the operation in the QR mode by the selection signal SEL_sig indicating that effect.

The control logic unit 24 first outputs a high gate output signal Gout from the OUT terminal, and turns on the switching element M1. Then, the coil current Icoil starts to flow through the turned-on switching element M1 and the current detection resistor Rs and increases. At this time, the current detection signal Vcs detected by the current detection resistor Rs is increased. Then, when the current detection signal Vcs is equal to or greater than the current detection threshold voltage Vcsqr, the output of the comparator 19 rises to high, and the control logic unit 24 lowers the gate output signal Gout to low.

Thereby, the switching element M1 is turned off, the drain voltage Vrd of the switching element M1 rises, and the coil current Icoil begins to flow through the diode D1 and decreases. At this time, the ZT voltage Vzt applied to the ZT terminal rises with the rise of the drain voltage Vdr, and then gradually decreases. Then, when the coil current Icoil becomes zero, the drain voltage Vdr rapidly decreases, and the ZT voltage Vzt also rapidly decreases. And, when the ZT voltage Vzt becomes less than or equal to the predetermined reference voltage, the output of the comparator CP2 rises to high. Thereby, a zero cross of the coil current Icoil is detected. Then, the control logic unit 24 raises the gate output signal Gout to High, and turns on the switching element M1 again.

2 shows an example of the waveforms of the coil current Icoil and the LED current ILED in the QR mode. The coil current Icoil increases from zero, then changes from a predetermined current value to a decrease, and increases again when it reaches zero. As shown in the region A1 in Fig. 2, in the QR mode, when the switching element M1 is turned on, soft switching in which no current flows through the switching element M1 is performed, so that generation of heat (loss) and noise is suppressed. However, since the amplitude of the coil current Icoil increases, the ripple of the LED current ILED obtained by averaging the coil current Icoil increases.

On the other hand, when the CCM mode is selected by the selection input signal, the control logic unit 24 controls the operation of the CCM mode. Here, the error amplifier 20 and the comparator 21 are enabled, and the control logic unit 24 outputs the gate output signal Gout including High and Low in accordance with the PWM signal Spwm output from the comparator 21. , To control the switching element M1 on/off. That is, current feedback control is performed in which the on-duty of the PWM signal Spwm is adjusted so that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm. Thereby, the average value of the coil current Icoil is controlled to match the desired value.

Fig. 3 shows an example of the waveforms of the coil current Icoil and the LED current ILED in such a CCM mode. The switching element M1 is turned on/off according to the PWM signal Spwm, and the coil current Icoil repeats increasing and decreasing. The coil current Icoil is controlled while always flowing. The switching period of the switching element M1 is fixed. At this time, since the amplitude of the coil current Icoil is small, the ripple of the LED current ILED decreases. However, as shown as region A2 in Fig. 3, hard switching is performed in which a current flows through the switching element M1 when the switching element M1 is turned on, which is disadvantageous in terms of heat generation (loss) and noise.

In this way, in the light-emitting element driving device 1 of the present embodiment, the QR mode and the CCM mode can be selected from one IC by the selection input signal, so that the degree of freedom in design is improved. It is also possible to switch to the operation of the other mode while one of the modes is in operation. Thereby, for example, when switching the luminance of the LED from low luminance to high luminance, it is possible to switch from the QR mode to the CCM mode in which the ripple of the LED current is small.

<3. Setting of current detection threshold voltage Vcsqr and current feedback voltage Vcsccm>

Here, the setting of the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm by the comparison voltage generator 18 will be described in detail.

When the QR mode is selected, the current detection threshold voltage Vcsqr is basically set by the following equation (1).

However, Vadim is an analog dimming signal, G1 is the first gain multiplier

When the CCM mode is selected, the current feedback voltage Vcsccm is basically set by the following equation (2).

However, Vadim is an analog dimming signal, G2 is the second gain multiplier

Then, the first gain magnification G1 is set to be twice the second gain magnification G2 (for example, G1 = 0.7, G2 = 0.35). Thereby, with the same set value of the analog dimming signal Vadim, the current value of the LED current ILED can be made the same in both modes.

More specifically, in this embodiment, in accordance with the on/off of the function of the ODP unit 17 by setting the on/off setting signal input to the DUTYON terminal, the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm are as follows: Are set together.

※When the QR mode is selected, and when the function of the ODP unit 17 is turned on

Vcsqr =Vadim×G1(Vadim≤Vclp1) ... (11)

Vcsqr =Vclp1×G1(Vadim>Vclp1)… (12)

※When the QR mode is selected, and when the ODP unit 17 is turned off

Vcsqr =Vadim×G1(Vadim≤Vclp2)... (13)

Vcsqr =Vclp2×G1(Vadim>Vclp2)… (14)

※When selecting the CCM mode, and when the function of the ODP unit 17 is turned on

Vcsccm =Vadim×G2 (Vadim≦Vclp1) ... (15)

Vcsccm =Vclp1×G2 (Vadim>Vclp1)… (16)

※When selecting the CCM mode or when the ODP unit 17 is turned off

Vcsccm =Vadim×G2 (Vadim≦Vclp2) ... (17)

Vcsccm =Vclp2×G2(Vadim>Vclp2)… (18)

However, Vclp1 and Vclp2 are clamp voltages of the analog dimming signal Vadim, and Vclp1> Vclp2.

That is, the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm can be limited by the clamp voltages Vclp1 and Vclp2. In addition, Vclp1 used in the case of function ON of the ODP unit 17 is higher than Vclp2 used in the case of function OFF, since the ON time of the PWM dimming signal is limited in case of function ON, the current detection threshold voltage Vcsqr and This is because there is no problem even if the limit of the current feedback voltage Vcsccm is relaxed.

<4. LED current correction in QR mode>

The light emitting element driving device 1 of this embodiment has a function of correcting the LED current ILED (coil current Icoil) in the QR mode to make it highly accurate, and here, the timing chart shown in Fig. 4 for this function Explain using.

When the switching element M1 is turned on, the coil current Icoil starts to increase from zero at the timing t0 shown in Fig. 4, and the current detection signal Vcs also starts to rise. Thereafter, when the current detection signal Vcs reaches the current detection threshold voltage Vcsqr at timing t1, the output signal CS_DET of the comparator 19 rises to High.

At the subsequent delayed timing t2, the gate output signal Gout output by the control logic unit 24 falls to Low. Here, the gate signal Gt decreases to timing t3 with a certain slope due to the presence of the gate resistance Rg of the external component and the gate capacitance (not shown).

At timing t3, when switching element M1 is turned off, the drain voltage Vdr starts to rise, and at timing t4, the drain voltage Vdr reaches the LED voltage VLED. At this timing t4, the coil current Icoil changes from increasing to decreasing. In other words, the coil current Icoil increases as the accumulation of the delay from timing t1 to t2 due to the internal circuit, the delay from timing t2 to t3 due to external parts, and the delay from timing t3 to t4 due to the increase of the drain voltage Vdr. A delay in the transition timing that changes from to decrease occurs by the delay time DTqr. Thereby, the increase of the coil current Icoil is maintained for the period of the delay time DTqr. Therefore, the LED current ILED obtained by averaging the coil current Icoil is slightly shifted high, causing a problem in current accuracy.

Therefore, in the present embodiment, control is performed using the ZT voltage Vzt generated at the ZT terminal. As shown in Fig. 4, with the increase of the drain voltage Vdr from the timing t3, the ZT voltage Vzt also increases, and at the timing t4, the ZT voltage Vzt reaches a predetermined threshold voltage ZTH1. The threshold voltage ZTH1 is set as the reference voltage of the comparator CP3, and the output of the comparator CP3 rises to high at the timing t4. Therefore, in this embodiment, the control logic unit 24 starts counting from the timing t1 at which the output signal CS_DET of the comparator 19 rises, and counts up to the timing t4 at which the output of the comparator CP3 becomes High. Detect DTqr.

Then, the control logic unit 24 adjusts the analog dimming signal Adim according to the delay time DTqr. Thereby, the current detection threshold voltage Vcsqr is adjusted, and the coil current Icoil and further the LED current ILED can be corrected. In addition to the method of feeding back the analog dimming signal Adim as described above, the control logic unit 24 may adjust the on duty of the gate output signal Gout. That is, the control logic unit 24 corresponds to an example of a coil current correction unit.

In this way, in the present embodiment, a delay in the transition timing of the coil current Icoil in the QR mode is detected, and the accuracy of the LED current ILED can be improved. In particular, the ZT voltage Vzt of the ZT terminal used for zero-cross detection in the QR mode can be used to detect the delay time DTqr.

Further, as shown in Fig. 4, at the timing t5 when the coil current Icoil is decreased and reaches zero, the drain voltage Vdr rapidly decreases, and accordingly, the ZT voltage Vzt decreases. At timing t6 when the ZT voltage Vzt reaches the threshold voltage ZTH2, the output of the comparator CP2 rises high, and a zero cross of the coil current Icoil is detected. That is, the threshold voltage ZTH2 is set as the reference voltage of the comparator CP2.

ZTH2 is set to a value close to zero, and since ZTH1 is higher than ZTH2 and has a voltage level different from that of ZTH2, the present embodiment has a configuration including both the comparator CP2 and the comparator CP3. In this way, by providing the comparator CP3 for comparison with ZTH1, the delay time DTqr can be detected with high precision. However, it is also possible to use the comparator CP2 for zero-cross detection for detecting the delay time DTqr. In that case, it becomes possible to reduce the number of parts.

<5. LED current correction in CCM mode>

In addition, in the light emitting element driving apparatus of this embodiment, it is also possible to mount a function of correcting the LED current ILED (coil current Icoil) in the CCM mode and making it highly accurate, and this function will be described here.

FIG. 5 is a view in which only the configuration relating to current feedback control in the CCM mode in the light emitting element driving device 1 shown in FIG. 1 is extracted. In addition, the switching control unit 1A shown in FIG. 5 is a functional unit including a comparator 21, an oscillator 22, a control logic unit 24, and a driver Dr1, based on the output from the error amplifier 20. The gate output signal Gout is output from the OUT terminal. In the configuration shown in Fig. 5, the function for correcting the LED current in the CCM mode is not installed.

In the configuration of Fig. 5, the switching control unit 1A adjusts the on-duty of the gate output signal Gout so that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm.

7 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 5 (FIG. 1 ). At timing t10 shown in Fig. 7, the gate output signal Gout is high, the coil current Icoil starts to increase by turning on the switching element M1, and the current detection signal Vcs rises sharply from 0V, and then rises.

By adjusting the on duty, the gate output signal Gout is switched to Low at the timing t11. Due to the presence of an external gate resistance Rg and a gate capacitor (not shown), the gate signal Gt is switched to Low at a delayed timing t12.

By turning off the switching element M1, the drain voltage Vdr rises from the timing t12, and the drain voltage Vdr reaches the LED voltage VLED at the timing t13. At this timing t13, the coil current Icoil changes from increase to decrease.

In the configuration shown in Fig. 5, the error amplifier 20 monitors the current detection signal Vcs only during the period when the gate output signal Gout becomes high. Thereby, as shown in Fig. 7, the on duty of the gate output signal Gout is adjusted so that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm. However, due to the occurrence of the delay time DTccm from timing t11 to t13, the coil current Icoil continues to increase for the period of the delay time DTccm, and the average value of the coil current Icoil deviates slightly higher than the desired value Iccm. Therefore, a problem arises in the accuracy of the LED current ILED. That is, even if it is considered that the control is accurately performed as an IC (light emitting element driving device), in reality, a deviation occurs in the LED current ILED.

Therefore, by setting the structure shown in Fig. 5 to the structure shown in Fig. 6, the correction control of the LED current ILED becomes possible. The light-emitting element driving device 100 shown in Fig. 6 is a configuration of the light-emitting element driving device 1 shown in Fig. 5 (Fig. 1) partially modified.

In the light-emitting element driving apparatus 100 shown in FIG. 6, as a difference from the configuration in FIG. 5, the sample holding portion 100A is inserted between the CS terminal and the inverting input terminal of the error amplifier 20. Further, in the configuration of Fig. 6, the ZT voltage Vzt of the ZT terminal is also used. The error amplifier 20 monitors the sampling output Vsmp output from the sample holding unit 100A. In addition, an example of a drive control unit or a coil current correction unit is constituted by the sample holding unit 100A, the error amplifier 20, and the switching control unit 1A.

FIG. 8 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 6. In the period in which the gate output signal Gout at timings t10 to t11 shown in Fig. 8 is high, the sample holding unit 100A outputs the current detection signal Vcs as it is as the sampling output Vsmp.

Then, when the gate output signal Gout is switched to Low at the timing t11, the sample holding unit 100A performs a hold operation for holding the sampling output Vsmp at that timing. At the timing t12 after the timing t11, the drain voltage Vdr starts to rise, but the ZT voltage Vzt at the ZT terminal also rises with it. Then, at timing t13 when the drain voltage Vdr reaches the LED voltage VLED, the ZT voltage Vzt reaches the threshold voltage Zth. The error amplifier 20 monitors the sampling output Vsmp only for a period from when the gate output signal Gout is switched to high until the ZT voltage Vzt reaches the threshold voltage Zth.

In the configuration shown in Fig. 6, the on-duty of the gate output signal Gout is adjusted so that the average value of the sampling output Vsmp coincides with the current feedback voltage Vcsccm. However, as shown in Fig. 8, only the period corresponding to the delay time DTccm is sampled and held. Since the sampling output Vsmp held by the unit 100A is added and monitored, the average value of the sampling output Vsmp is corrected slightly higher. Thereby, as indicated by the arrow in Fig. 8, the sampling output Vsmp and the coil current Icoil are corrected to be slightly lower. Accordingly, the LED current ILED is corrected to be close to a desired value, thereby improving current accuracy.

In addition, as another method, a method similar to the method in the QR mode described above may be applied to the CCM mode. That is, the control logic unit 24 starts counting from timing t11 when the gate output signal Gout shown in FIG. 8 is switched from High to Low, and counts until timing t13 when the ZT voltage Vzt reaches the threshold voltage Zth, The delay time DTccm is detected. In this case, in the configuration of Fig. 1, a comparator for comparing the ZT voltage Vzt with the threshold voltage Zth may be provided. Then, the control logic unit 24 adjusts the analog dimming signal Adim according to the detected delay time DTccm. Thereby, the current feedback voltage Vcsccm is adjusted, and the coil current Icoil and further the LED current ILED can be corrected. In addition to the method of feeding back the analog dimming signal Adim as described above, the control logic unit 24 may adjust the on duty of the gate output signal Gout.

In addition, a modified embodiment in which control is performed using a comparator in the case of the CCM mode as in the case of the QR mode is also possible. In that case, the error amplifier 20 and the FB terminal are unnecessary. As a first example of such a modified embodiment, the control logic unit 24 starts time measurement from the timing at which the gate output signal Gout is switched from Low to High to turn on the switching element M1. Then, the control logic unit 24 monitors the output of the comparator to which the reference voltage and the current detection signal Vs are input, ends time measurement at a timing when the current detection signal Vs becomes equal to or higher than the reference voltage, and ends the time measurement from the timing. The gate output signal Gout is switched from High to Low at a timing equal to the measurement time from start to finish of measurement. Accordingly, the average value of the coil current Icoil can be controlled to a desired current value defined as the reference voltage.

In addition, as a second example of the modified embodiment, the control logic unit 24 detects the difference between the current detection signal Vs and the reference voltage when the switching element M1 is turned on, and is determined by adding the detected difference to the reference voltage. With the voltage as the current detection threshold voltage similar to that in the QR mode, the output of the comparator is monitored to determine the timing of switching the gate output signal Gout from High to Low. Accordingly, the average value of the coil current Icoil can be controlled to a desired current value defined as the reference voltage.

And, in the case of the modified embodiment according to the first and second examples, as described above, the control logic unit 24 detects the delay time DTccm, and adjusts the reference voltage or the on time according to the detected delay time Dtccm. If so, the coil current Icoil can be corrected.

<6. Pin Layout of IC Package>

9 is a view of the light emitting element driving device 1 (or 100) according to the present embodiment as viewed from the top as an IC package product. In Fig. 9, the arrangement (pin arrangement) of each external terminal is shown. The IC package shown in Fig. 9 is configured as a SOP (Small Outline Package). Each external terminal lead frame is connected to the electrode of the LSI chip by bonding wires (Au wire or the like), and the LSI chip and lead frame are sealed with a sealing material (epoxy resin, etc.).

As shown in Fig. 9, the IC package has a rectangular sealing material as viewed from the top surface. The sealing material has a first side that is one long side, and a second side that is a long side parallel to the first side. Along the first side, a VCC terminal, a UVLO terminal, a SEL terminal, a PWM terminal, a QRCOMP terminal, an ADIM terminal, a FAILB terminal, and a DUTYON terminal are arranged in order. Further, along the second side, a REG90 terminal, a CS terminal, an OUT terminal, a GND terminal, a DGND terminal, an FB terminal, a ZT terminal, and an RT terminal are arranged in order.

The VCC terminal and UVLO terminal of the input power supply system, and the SEL terminal, PWM terminal, QRCOMP terminal, ADIM terminal, FAILB terminal, and DUTYON terminal, which are input/output related to a microcomputer (not shown), are mounted on a PCB (substrate). In consideration of the wiring when doing this, they are integrated and arranged on the same long side.

Further, the FB terminal is disposed between the DGND terminal and the ZT terminal. If a high voltage is applied to the FB terminal, the on-duty of PWM control becomes very large in the CCR mode, and the LED current may become overcurrent. However, even if the FB terminal is shorted with the adjacent DGND terminal or ZT terminal, there is no problem since the DGND terminal and the ZT terminal are terminals to which a low voltage is applied, and a low voltage is applied to the FB terminal.

<7. Layout configuration in the chip>

FIG. 10 is a plan view showing the arrangement of electrode pads in the chip 101 provided in the light emitting element driving device 1 according to the present embodiment and the arrangement of regions in which each component shown in FIG. 1 is arranged.

In addition, in FIG. 10, the X-axis direction and the Y-axis direction orthogonal to the X-axis direction are shown, and the X-axis direction is more specifically shown in the X1 direction and the X2 direction, and the Y-axis direction is more specifically Y1 It is shown in the direction and the Y2 direction. The X2 direction and the Y2 direction are directions that are close to each other.

The chip 101 shown in FIG. 10 has a rectangle as an external shape. The rectangle has a first side S1 extending in the Y-axis direction from the X2 direction side, a second side S2 extending in the X-axis direction from the Y2 direction side, and a third side S3 extending in the Y-axis direction from the X1 direction side. And a fourth side S4 extending in the X-axis direction from the Y1 direction side.

Chip 101 is an electrode pad, two VCC pads, UVLO pad, SEL pad, PWM pad, QRCOMP pad, ADIM pad, FAILB pad, DUTYON pad, RT pad, ZT pad, FB pad, DGND pad, two It has a GND pad, two OUT pads, a CS pad, and two REG90 pads. Each of these pads is provided corresponding to each terminal of the IC package shown in FIG. 9.

Along the first side S1, a CS pad, a first REG90 pad, a second REG90 pad, a first VCC pad, a second VCC pad, and a UVLO pad are arranged in this order in the Y2 direction. Along the second side S2, a SEL pad, a PWM pad, a QRCOMP pad, an ADIM pad, and a FAILB pad are arranged in this order in the X1 direction. Along the third side S3, a DUTYON pad, an RT pad, and a ZT pad are arranged in this order in the Y1 direction. Along the fourth side S4, the FB pad, the DGND pad, the first GND pad, the second GND pad, the first OUT pad, and the second OUT pad are arranged in this order in the X2 direction.

The chip 101 is an area in which each component shown in FIG. 1 is disposed, and has areas A to M.

Area A, area B, and area C are arranged in the Y2 direction in this order as viewed in the X1 direction. Area A overlaps with the CS pad in the Y-axis direction as viewed in the Y2 direction and with the first OUT pad and the second OUT pad in the X-axis direction. Region B overlaps the first REG90 pad and the second REG90 pad in the Y-axis direction as viewed in the Y2 direction and with the A region and the X-axis direction as viewed in the X1 direction. Area B does not overlap with the first VCC pad in the Y-axis direction as viewed in the X1 direction.

The first VCC pad and the second VCC pad are connected to the input terminal of the internal voltage generator 11 disposed in the region B through a top metal wiring. The internal voltage generator 11 includes a power transistor. The output terminal of the internal voltage generator 11 is connected to the power input terminal of the driver Dr1 arranged in the A region through a top metal wiring. Driver Dr1 includes a power transistor. Thereby, the internal voltage Vreg generated by the internal voltage generator 11 based on the power voltage Vcc applied to the first VCC pad and the second VCC pad is supplied as the power supply voltage of the driver Dr1. The output terminal of the driver Dr1 is connected to the first OUT pad and the second OUT pad.

Area A does not overlap the first GND pad and the second GND pad in the X-axis direction as viewed in the Y2 direction. The ground terminal of the driver Dr1 is connected to the first GND pad and the second GND pad.

In this way, the first and second REG90 pads and the first and second VCC pads are disposed near the B region, and the A region is near the first and second OUT pads and the first and second GND pads. Is placed.

The region C does not overlap the first VCC pad and the Y-axis direction when viewed in the X1 direction, but overlaps the second VCC pad and the UVLO pad in the Y-axis direction when viewed in the X1 direction. The region C overlaps the region B and the X-axis direction as viewed in the Y2 direction. Thereby, the C region is disposed near the UVLO pad. The UVLO unit 13 is disposed in the C area.

Regions C to H are arranged in the X1 direction in this order as viewed from the Y1 direction. The region D is shifted toward the X1 direction side from the SEL pad in the Y1 direction, and does not overlap the SEL pad in the X axis direction. In addition, the region D overlaps the region C and the Y axis as viewed in the X2 direction. Thereby, the D area is disposed near the SEL pad. The comparator CP1 is disposed in the D area.

Area E overlaps the PWM pad and the QRCOMP pad in the X-axis direction as viewed in the Y1 direction. The E region overlaps the C region and the Y-axis direction as viewed in the X2 direction, but does not overlap the D region and the Y-axis direction. The ODP unit 17 is disposed in the E area. The distance in the Y-axis direction between the PWM pad and the E region viewed in the X2 direction is shorter than the distance in the X-axis direction between the DUTYON pad and the E region as viewed in the Y1 direction. This is because, compared to the PWM dimming signal applied to the PWM pad, the on/off setting signal applied to the DUTYON pad is constant at the high level or the low level, and the tolerance of noise for the signal applied to the DUTYON pad is large.

The F region is shifted from the QRCOMP pad toward the X1 direction as viewed in the Y1 direction, and does not overlap the QRCOMP pad in the X-axis direction, but overlaps with the ADIM pad in the X-axis direction. The F region overlaps the D region and the E region in the Y-axis direction as viewed in the X2 direction. The amplifier 16 is placed in the F region. The F area is disposed near the QRCOMP pad.

The G region overlaps the ADIM pad in the X-axis direction as viewed in the Y1 direction, and overlaps the F region and the Y-axis direction as viewed in the X2 direction. The comparison voltage generator 18 is disposed in the G region. The G area is disposed near the ADIM pad. Since an analog dimming signal, which is an analog voltage, is applied to the ADIM pad, noise is suppressed and the influence on dimming is suppressed.

The H region overlaps the FAILB pad in the X-axis direction as viewed in the Y1 direction, and overlaps the G region and the Y-axis direction as viewed in the X2 direction. The abnormality detection unit 23 is disposed in the H region. The H region is disposed near the FAILB pad.

The group, I region, and J region including regions G and H are arranged in the Y1 direction in this order as viewed from the X2 direction. The I region is shifted from the DUTYON pad in the Y1 direction as viewed in the X2 direction, and does not overlap the DUTYON pad in the Y-axis direction, but overlaps with the RT pad in the Y-axis direction. The oscillator 22 is disposed in the I region. The I region is disposed near the RT pad.

The region J is shifted from the RT pad to the Y1 direction as viewed in the X2 direction, and does not overlap the RT pad in the Y-axis direction, but overlaps with the ZT pad in the Y-axis direction. The comparators CP2 and CP3 are arranged in the J area. The J region is disposed near the ZT pad.

The J region, K region, L region, and A region are arranged in the X2 direction in this order as viewed from the Y2 direction. The K region is shifted from the FB pad toward the X2 direction as viewed in the Y2 direction, and does not overlap the FB pad in the X-axis direction, but overlaps the DGND pad in the X-axis direction. When viewed in the X2 direction, the K region overlaps with the J region in the Y-axis direction. The error amplifier 20 is disposed in the K region. The K region is disposed near the FB pad.

The L region overlaps the first and second GND pads in the X-axis direction as viewed in the Y2 direction. The L region overlaps the K region and the Y axis as viewed in the X2 direction. The comparator 19 is disposed in the L region.

A region M is disposed at the center of the chip 101 surrounded by the A region to L region. The control logic unit 24 is disposed in the M area.

<8. Application to liquid crystal display (LCD)>

As an example of an object to which the light emitting element driving device according to the embodiment described above is applied, a liquid crystal display device (an example of an electronic device) will be described. 11 shows an example of a configuration of a liquid crystal display device. In addition, the configuration shown in Fig. 11 is of a so-called edge writing system, and the configuration is not limited to this and may be a configuration of a direct system.

The liquid crystal display device X shown in FIG. 11 includes a backlight 81 and a liquid crystal panel 82. The backlight 81 is an illumination device (an example of a light emitting device) that illuminates the liquid crystal panel 82 from the rear surface. The backlight 81 includes an LED light source unit 811, a light guide plate 812, a reflective plate 813, and optical sheets 814.

The LED light source unit 811 includes an LED and a substrate on which the LED is mounted, and the one of the above-described embodiment can be applied as a light emitting element driving device for driving the LED. The light emitted from the LED light source unit 811 is incident on the inside from the side surface of the light guide plate 812. For example, the light guide plate 812 made of an acrylic plate is guided to the entire interior while totally reflecting the light incident therein, and is emitted as planar light from the side on which the optical sheets 814 are disposed. The reflecting plate 813 reflects the light leaking from the light guide plate 812 and returns it to the inside of the light guide plate 812. The optical sheets 814 include a diffusing sheet, a lens sheet, and the like, and aim for the purpose of uniforming the luminance of light illuminated to the liquid crystal panel 82 or improving the luminance.

<9. Other>

As described above, the embodiments of the present invention have been described, but various modifications can be made to the embodiments as long as they are within the scope of the spirit of the present invention.

For example, in the present invention, the light emitting element driving device may be provided with only one of a QR mode and a CCM mode. Particularly, in the case of a light emitting element driving device having only the CCM mode in which the amplitude of the coil current Icoil is relatively small, it is not necessary to provide a capacitor C1 for averaging the coil current Icoil. Further, even when both modes of the QR mode and the CCM mode are provided, a configuration in which the capacitor C1 is not provided may be employed.

The present invention can be used, for example, for a light-emitting element driving device that drives an LED.

1: light-emitting element driving device
11: Internal voltage generator
12: IC power UVLO unit
13: UVLO part
14: internal voltage UVLO unit
15: low pass filter
16: amplifier
17: ODP (Over Duty Protection)
18: voltage generator for comparison
19: comparator
20: error amplifier
21: comparator
22: oscillator
23: abnormality detection unit
24: control logic unit
50: LED array
CP1 to CP3: comparator
Dr1: driver
R1, R2: partial pressure resistance
D1: diode
C1: capacitor
L1: coil
C2: capacitor
R11, R12: partial pressure resistance
M1: switching element
Rs: current detection resistance
Rg: gate resistance
Cfb: condenser
100: light-emitting element driving device
100A: sample holding part
1A: switching control section
101: chip

Claims (25)

A light-emitting unit including at least one light-emitting element and to which an input voltage is applied to one end thereof,
A coil having one end connected to the other end of the light emitting unit,
A diode connected between the other end of the coil and one end of the light emitting unit,
A light-emitting element driving device for driving the light-emitting unit in an external configuration including a switching element having a first terminal connected to the other end of the coil,
A first external terminal connected to the control terminal of the switching element,
And a driving control unit for generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal,
The driving control unit includes a coil current correction unit for correcting the coil current by adjusting the driving signal based on a delay in a transition timing at which the coil current flowing through the coil changes from increase to decrease. The method of claim 1,
The external configuration,
A current detection resistor having one end connected to the second terminal of the switching element,
A first capacitor having one end connected to the other end of the coil,
Further comprising a divided resistance connected to the other end of the first capacitor,
The light emitting element driving device,
A second external terminal connected to a connection node between the second terminal and the current detection resistor,
Further comprising a third external terminal to which the connection node of the divided resistance is connected,
The driving control unit,
A first comparator for comparing a current detection signal generated at the second external terminal with a current detection threshold voltage,
A second comparator used for detecting a zero cross of the coil current, and inputting the ZT voltage generated to the third external terminal,
When the first comparator detects that the current detection signal rises and reaches the current detection threshold voltage, the coil current correction unit is detected that the ZT voltage rises to reach a predetermined ZT threshold voltage. A light-emitting element driving device that detects the time until as a delay time of the transition timing. The method of claim 2,
A light emitting device driving apparatus further comprising a third comparator to which the ZT voltage and a reference voltage corresponding to the ZT threshold voltage are input. The method of claim 2,
The light emitting element driving device is detected by the second comparator when the ZT voltage increases and reaches a predetermined ZT threshold voltage. The method according to any one of claims 2 to 4,
The current detection threshold voltage is generated based on an analog dimming signal,
The coil current correction unit adjusts the analog dimming signal based on the delay time. The method according to any one of claims 2 to 4,
The coil current correction unit is a light emitting element driving device that adjusts the on time of the driving signal based on the delay time. The method according to any one of claims 2 to 6,
A fourth external terminal to which a PWM dimming signal is input,
A fifth external terminal to which an on/off setting signal is input,
An ODP (Over Duty Protection) unit for switching on/off of a function for limiting the duty of the PWM dimming signal according to the on/off setting signal,
A sixth external terminal to which an analog dimming signal is input, and
Further comprising a comparison voltage generator for generating the current detection threshold voltage based on the analog dimming signal,
The comparison voltage generator generates the current detection threshold voltage based on the following equation.
When the function of the ODP unit is turned on
Vcsqr =Vadim×G1(Vadim≤Vclp1)
Vcsqr =Vclp1×G1(Vadim>Vclp1)
In case of turning off the function of the ODP unit
Vcsqr =Vadim×G1(Vadim≤Vclp2)
Vcsqr =Vclp2×G1(Vadim>Vclp2)
Vclp1>Vclp2
However, Vcsqr: the current detection threshold voltage, Vadim: the analog dimming signal, G1: the first gain multiplier, Vclp1: the first clamp voltage, Vclp2: the second clamp voltage The method of claim 1,
The external configuration,
A current detection resistor having one end connected to the second terminal of the switching element,
A second capacitor having one end connected to the other end of the coil,
Further comprising a divided resistance connected to the other end of the second capacitor,
The light emitting element driving device,
A seventh external terminal connected to the second terminal and a connection node of the current detection resistor,
An eighth external terminal to which the connection node of the divided resistance is connected,
Further comprising a ninth external terminal to which the third capacitor is connected,
The driving control unit,
A sample holding unit into which a current detection signal generated to the seventh external terminal is input;
An error amplifier having an input terminal to which an output of the sample hold portion and a current feedback voltage are input, and an output terminal to which the ninth external terminal is connected,
A fourth comparator to which an output of the error amplifier and an oscillation signal are input,
The coil current correction unit,
The sample holding unit for holding and outputting the driving signal when the driving signal is switched from the on level to the off level;
The light-emitting element driving apparatus having the error amplifier for monitoring the output of the sample holding unit until a timing when the ZT voltage generated at the eighth external terminal rises and reaches a predetermined ZT threshold voltage. The method of claim 1,
The external configuration,
A current detection resistor having one end connected to the second terminal of the switching element,
A second capacitor having one end connected to the other end of the coil,
Further comprising a divided resistance connected to the other end of the second capacitor,
The light emitting element driving device,
A seventh external terminal connected to the second terminal and a connection node of the current detection resistor,
Further comprising an eighth external terminal to which the connection node of the divided resistance is connected,
The driving control unit,
Generating the driving signal to make the average value of the coil current a desired value based on the voltage of the seventh external terminal and a reference voltage,
The coil current correction unit,
A detection unit that detects, as a delay time of the transition timing, a time until the ZT voltage generated at the eighth external terminal rises and reaches a predetermined ZT threshold voltage after the driving signal is switched from the on level to the off level; ,
A light-emitting element driving apparatus having an adjustment unit that adjusts the reference voltage or the on time of the driving signal based on the delay time. The method of claim 9,
The external configuration further includes a ninth external terminal to which a third capacitor is connected,
The driving control unit,
An error amplifier having an input terminal to which a voltage of the seventh external terminal, a current feedback voltage, which is the reference voltage, is input, and an output terminal to which the ninth external terminal is connected,
A light emitting device driving apparatus having a fourth comparator to which an output of the error amplifier and an oscillation signal are input. The method of claim 9,
The driving control unit starts time measurement from a timing at which the driving signal is switched from an off level to an on level, monitors an output of a fifth comparator to which the reference voltage and the voltage of the seventh external terminal are input, and the second 7 The time measurement is terminated at the timing when the voltage of the external terminal becomes equal to or higher than the reference voltage, and the drive signal is switched from the on level to the off level at a timing equal to the time measured by the time measurement. Light-emitting element driving device. The method of claim 9,
The driving control unit detects a difference between the voltage of the seventh external terminal and the reference voltage when the switching element is turned on, and adds the detected difference to the reference voltage to determine a voltage between the seventh external terminal. A light-emitting element driving apparatus configured to monitor an output of a sixth comparator to which a voltage is input to determine a timing of switching the driving signal from an on level to an off level. The method according to claim 8 or 10,
A tenth external terminal to which a PWM dimming signal is input,
An 11th external terminal to which an on/off setting signal is input,
An ODP (Over Duty Protection) unit for switching on/off of a function for limiting the duty of the PWM dimming signal according to the on/off setting signal,
A twelfth external terminal to which an analog dimming signal is input,
Further comprising a comparison voltage generator for generating the current feedback voltage based on the analog dimming signal,
The comparison voltage generation unit is a light emitting element driving device that generates the current feedback voltage based on the following equation.
When the function of the ODP unit is turned on
Vcsccm =Vadim×G2(Vadim≤Vclp1)
Vcsccm =Vclp1×G2(Vadim>Vclp1)
In case of turning off the function of the ODP unit
Vcsccm =Vadim×G2(Vadim≤Vclp2)
Vcsccm =Vclp2×G2(Vadim>Vclp2)
Vclp1>Vclp2
However, Vcsccm: the current feedback voltage, Vadim: the analog dimming signal, G2: the second gain multiplier, Vclp1: the first clamp voltage, Vclp2: the second clamp voltage The method of claim 1,
Further comprising a thirteenth external terminal to which the selection input signal is input,
The driving control unit operates by switching between a QR mode (quasi-resonant) and a CCM mode (continuous current mode) according to the selection input signal. The method of claim 14,
The external configuration further includes a current detection resistor having one end connected to the second terminal of the switching element,
The driving control unit,
A current detection signal generated by the current detection resistor is input, and a seventh comparator used in the QR mode,
And an error amplifier used in the CCM mode in which the current detection signal is input and a fourth capacitor is connected to an output terminal,
The light emitting element driving device,
A 14th external terminal to which an analog dimming signal is input,
A current feedback voltage input to the error amplifier by multiplying the analog dimming signal by a first gain factor to generate a current detection threshold voltage input to the seventh comparator, and multiplying the analog dimming signal by a second gain factor Further comprising a voltage generator for comparison to generate a,
The first gain magnification is twice the second gain magnification. The method of claim 14 or 15,
A pull-down resistor connected to the thirteenth external terminal,
An eighth comparator further comprising an eighth comparator having an input terminal connected to the thirteenth external terminal and a connection node of the pull-down resistor. It is the light emitting element driving device according to claim 14 which is an IC package,
The external configuration,
A current detection resistor having one end connected to the second terminal of the switching element,
A fifth capacitor having one end connected to the other end of the coil,
Further comprising a divided resistance connected to the other end of the fifth capacitor,
The IC package,
A sealing material having a first side and a second side opposite to the first side,
An SEL terminal as the thirteenth external terminal,
DGND terminal to take the digital ground of IC,
An FB terminal connected to the output terminal of the error amplifier used in the CCM mode and capable of connecting an external sixth capacitor,
It is used in the QR mode and has a ZT terminal connectable to a connection node of the voltage divider,
Along the first side, the SEL terminal is disposed,
The DGND terminal, the FB terminal, and the ZT terminal are disposed along the second side. The method of claim 17,
The FB terminal is disposed between the DGND terminal and the ZT terminal. The method of claim 17 or 18,
The IC package,
A VCC terminal, which is a power terminal for the IC,
It has a UVLO terminal for UVLO of the input voltage,
The VCC terminal and the UVLO terminal are disposed along the first side. A first external terminal connected to the control terminal of the switching element,
And a driving control unit for generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal,
The driving control unit includes a coil current correction unit for correcting the coil current by adjusting the driving signal based on a delay in a transition timing at which the coil current flowing through the coil changes from increase to decrease. A light-emitting unit including at least one light-emitting element and to which an input voltage is applied to one end thereof,
A coil having one end connected to the other end of the light emitting unit,
A diode connected between the other end of the coil and one end of the light emitting unit,
A light-emitting element driving device for driving the light-emitting unit in an external configuration including a switching element having a first terminal connected to the other end of the coil,
A first external terminal connected to the control terminal of the switching element,
A driving control unit for generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal;
It has a second external terminal to which the selection input signal is input,
The driving control unit operates by switching between a QR mode (quasi-resonant) and a CCM mode (continuous current mode) according to the selection input signal. The method of claim 21,
The external configuration further includes a current detection resistor having one end connected to the second terminal of the switching element,
The driving control unit,
A current detection signal generated by the current detection resistor is input, and a first comparator used in the QR mode,
And an error amplifier used in the CCM mode in which the current detection signal is input and a first capacitor is connected to an output terminal,
The light emitting element driving device,
A third external terminal to which an analog dimming signal is input,
A current feedback voltage input to the error amplifier by multiplying the analog dimming signal by a first gain factor to generate a current detection threshold voltage input to the first comparator, and multiplying the analog dimming signal by a second gain factor Further comprising a voltage generator for comparison to generate a,
The first gain magnification is twice the second gain magnification. The method of claim 21 or 22,
A pull-down resistor connected to the second external terminal,
A light emitting device driving apparatus further comprising a second comparator having an input terminal connected to the second external terminal and a connection node of the pull-down resistor. The light emitting element driving device according to any one of claims 1 to 23, and
A light emitting device having a light emitting portion driven by the light emitting element driving device. An electronic device comprising the light emitting device according to claim 24.

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