KR102561074B1 - Light-emitting element driving device - Google Patents

Abstract

A light emitting element driving device comprising: a first external terminal connected to a control terminal of a switching element; and a driving control unit generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal, wherein the driving control unit has a coil current correcting unit correcting the coil current by adjusting the driving signal based on a delay in transition timing at which a coil current flowing through a coil changes from increasing to decreasing.

Description

Light-emitting element driving device

The present invention relates to a light emitting element driving device.

Conventionally, various light emitting element driving devices for driving light emitting elements typified by LEDs (light emitting diodes) have been proposed. Outside of a conventional light emitting element drive device for driving LEDs, which are examples of light emitting elements, a coil and a switching element are sequentially connected in series with respect to a low potential side end (cathode) of an LED array configured by connecting a plurality of LEDs in series, a capacitor is connected in parallel between both ends of the LED array, and a diode for reflux is connected between both ends of the connection structure of the capacitor and the coil.

By controlling the on/off of the switching element, the LED current flowing through the LED array is controlled. When the switching element is turned on, the current flowing through the coil increases, and when the switching element is turned off, the current flowing through the coil and the diode decreases. The capacitor averages the current flowing through the coil to obtain the LED current.

In addition, an example of such a conventional light emitting element drive device is disclosed in Patent Document 1.

Japanese Unexamined Patent Publication No. 2016-91781

In the above conventional light emitting element driving device, when the switching element is turned off from an ON state, the current flowing through the coil (coil current) changes from increasing to decreasing. However, there is a fear that the transition (switching) timing at which the coil current changes from increasing to decreasing is delayed due to, for example, a delay in switching the control voltage applied to the control terminal to an off level by an external resistance component or the like connected between the output terminal of the light emitting element driving device and the control terminal of the switching element. In this case, the coil current continues to increase by the amount of the delay, and the value of the LED current obtained by averaging the coil current becomes higher than a desired value, resulting in a problem of accuracy.

In view of the above problems, an object of the present invention is to provide a light emitting element drive device capable of improving the accuracy of current flowing through the light emitting element.

In order to achieve the above object, the present invention includes at least one light emitting element, and a light emitting unit to which an input voltage is applied at one end;

A coil having one end connected to the other end of the light emitting unit;

A diode connected between the other end of the coil and one end of the light emitting unit;

A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,

a first external terminal connected to the control terminal of the switching element;

A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;

The drive control unit has a coil current correction unit that corrects the coil current by adjusting the drive signal based on a delay in transition timing at which the coil current flowing through the coil changes from an increase to a decrease.

In addition, another aspect of the present invention includes a light emitting unit including at least one light emitting element and having an input voltage applied to one end;

A coil having one end connected to the other end of the light emitting unit;

A diode connected between the other end of the coil and one end of the light emitting unit;

A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,

a first external terminal connected to the control terminal of the switching element;

a driving controller generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal;

A second external terminal to which a selection input signal is input,

The drive control unit is configured to operate by switching between a QR mode (quasi-resonant) and a CCM mode (continuous current mode) according to the selection input signal.

According to the light emitting element driving device of the present invention, the accuracy of the current flowing through the light emitting element can be improved.

1 is a circuit diagram showing the overall configuration of a light emitting element drive device according to an embodiment of the present invention.
2 is a diagram showing an example of waveforms of coil current and LED current in QR mode.
3 is a diagram showing an example of waveforms of coil current and LED current in CCM mode.
4 is a timing chart for explaining the LED current correction function in QR mode.
FIG. 5 is a diagram extracting only the configuration related to current feedback control in the CCM mode in the light emitting element driving device shown in FIG. 1 .
Fig. 6 is a diagram showing a light emitting element driving device equipped with an LED current correction function in CCM mode.
Fig. 7 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in Fig. 5 (Fig. 1).
FIG. 8 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 6;
Fig. 9 is a top view of the light emitting element driving device according to one embodiment as an IC package product.
Fig. 10 is a plan view showing an arrangement of chips included in a light emitting element driving device according to an embodiment.
11 is a diagram showing a configuration example of a liquid crystal display device.

EMBODIMENT OF THE INVENTION Below, one Embodiment of this invention is described with reference to drawings.

<1. Overall configuration of the light emitting element driving device>

1 is a circuit diagram showing the overall configuration of a light emitting element drive device according to an embodiment of the present invention. The light emitting element drive device 1 shown in FIG. 1 is a device that drives an LED array 50 configured by connecting a plurality of LEDs in series. That is, the light emitting element drive device 1 is a device that drives an LED as an example of a light emitting element to be driven. However, the light emitting element to be driven does not have to be limited to the LED.

In addition, the light emitting element driving device 1 according to the present embodiment can operate by switching between a QR mode (quasi-resonant: quasi-resonant system) and a CCM mode (continuous current mode: current continuous system). That is, both of the above modes are incorporated into one IC. Details of both modes will be described later.

As shown in FIG. 1 , the light emitting element driving device 1 includes an internal voltage generator 11, an IC power supply UVLO unit 12, a UVLO unit 13, an internal voltage UVLO unit 14, a low-pass filter 15, an amplifier 16, an ODP (Over Duty Protection) unit 17, a comparison voltage generator 18, a comparator 19, an error amplifier 20, and a comparator 21 ), an oscillator 22, an abnormality detection unit 23, and a control logic unit 24, and a semiconductor IC configured by integrating each component.

An example of the driving control unit is constituted by the comparator 19, the error amplifier 20, the comparator 21, the oscillator 22, the control logic unit 24, the driver Dr1, and the comparator CP2. The drive control unit generates a gate output signal Gout (drive signal) output from the OUT terminal.

In addition, the light emitting element driving device 1 has a VCC terminal, a ULVO terminal, a SEL terminal, a REG90 terminal, a QRCOMP terminal, a PWM terminal, a DUTYON terminal, an ADIM terminal, an RT terminal, a FAILB terminal, a ZT terminal, an OUT terminal, a CS terminal, a FB terminal, a DGND terminal, and a GND terminal as external terminals for establishing electrical connection with the outside.

Outside the light emitting element driving device 1, as external components, voltage dividing resistors R1 and R2, diode D1, capacitor C1, coil L1, LED array 50, capacitor C2, voltage dividing resistors R11 and R12, switching element M1, gate resistor Rg, current detection resistor Rs, feedback capacitor Cfb, capacitor C11 and resistor R21 are disposed.

The LED array 50 is a light emitting unit configured by connecting a plurality of LEDs in series. However, other than that, for example, an LED array may be constituted by connecting LEDs in series and parallel, or a single LED may be used instead of the LED array.

An input voltage Vin is applied to the high potential side end (anode) of the LED array 50 . One end of the coil L1 is connected to the low potential side end (cathode) of the LED array 50 . The other end of the coil L1 is connected to the anode of the diode D1 for reflux. The high potential side end of the LED array 50 is connected to the cathode of the diode D1. Between both ends of the LED array 50, a condenser C1 is connected in parallel. The capacitor C1 averages the coil current Icoil, which is the current flowing through the coil L1, to obtain the LED current ILED, which is the current flowing through the LED array 50.

To the other end of the coil L1, the drain of a switching element M1 composed of an n-channel MOSFET is connected as an example. The source of the switching element M1 is connected to a ground potential application end through a current detection resistor Rs.

A voltage after dividing the input voltage Vin by the voltage dividing resistors R1 and R2 is applied to the UVLO (Under Voltage Lock Out) terminal. When the voltage applied to the UVLO terminal is lower than a predetermined voltage, the UVLO unit 13 keeps the switching element M1 off in the control logic unit 24 to stop switching. That is, the UVLO terminal is a terminal for UVLO of the application power supply.

A power supply voltage Vcc is applied to the VCC terminal. That is, the VCC terminal is a power supply terminal for IC. The IC power supply UVLO unit 12 causes the control logic unit 24 to shut down the IC when the power supply voltage Vcc falls below a predetermined voltage.

The internal voltage generator 11 generates an internal voltage Vreg based on the power supply voltage Vcc. The generated internal voltage Vreg can be output to the outside from the REG90 terminal. The REG90 terminal is a 9.0V output terminal. However, the output voltage value here is an example. An external capacitor C11 is connected to the REG90 terminal. The capacitor C11 is preferably a ceramic capacitor.

The internal voltage UVLO unit 14 causes the control logic unit 24 to shut down the IC when the internal voltage Vreg falls below a predetermined voltage.

The control logic section 24 outputs the gate output signal Gout from the OUT terminal to the outside using the driver Dr1. The gate output signal Gout is a pulse signal including High and Low. The OUT terminal is connected to the gate (control terminal) of the switching element M1 via a gate resistor Rg, which is an external component. The gate output signal Gout is applied to the gate of the switching element M1 as the gate signal Gt through the gate resistor Rg. The switching element M1 is turned on/off by the gate output signal Gout.

A pulse-shaped PWM dimming signal is input to the PWM terminal from the outside. The ODP unit 17 switches whether or not to activate the PWM on time limit function according to an on/off setting signal input from the outside through the DUTYON terminal. For example, when the on/off setting signal is Low, the on time of the PWM dimming signal is limited, and when the on/off setting signal is High, the PWM on time limiting function is turned off.

The control logic unit 24 outputs the on/off gate output signal Gout from the OUT terminal while the PWM dimming signal output from the ODP unit 17 is High, and maintains the gate output signal Gout at Low during the Low period. Thereby, dimming of the LED array 50 can be performed by adjusting the on-duty of the PWM dimming signal.

The SEL terminal is a terminal to which a selection input signal for selecting whether to operate the light emitting element driving device 1 in the QR mode or the CCM mode is input. The SEL terminal is pulled down by a pull-down resistor Rp inside the IC. The connection node of the SEL terminal and the pull-down resistor Rp is connected to the non-inverting input terminal of the comparator CP1. A predetermined reference voltage is applied to the inverting input terminal of the comparator CP1. Depending on whether the selection input signal is High or Low, a High or Low selection signal SEL_sig is output from the comparator CP1.

The control logic section 24 selects the QR mode or the CCM mode according to the level of the input selection signal SEL_sig. For example, when the selection input signal is High, the QR mode is selected, and when the selection input signal is Low, the CCM mode is selected.

The CS terminal and comparator 19 are used for current detection in QR mode. The CS terminal is connected to the connection node of the switching element M1 and the current detection resistor Rs. To the non-inverting input terminal of the comparator 19, the current detection signal Vcs after the coil current Icoil is converted to current/voltage by the current detection resistor Rs is input through the terminal CS.

The current detection threshold voltage Vcsqr output from the voltage generator 18 for comparison is input to an inverting input terminal of the comparator 19 . The comparator 19 outputs the comparison result of the current detection signal Vcs and the current detection threshold voltage Vcsqr to the control logic section 24 .

Here, the ADIM terminal is an external terminal for inputting an analog dimming signal (analog voltage signal) from the outside. The comparison voltage generator 18 outputs a current detection threshold voltage Vcsqr obtained by multiplying the analog dimming signal by the first gain magnification when the QR mode is selected by the selection signal SEL_sig. By adjusting the analog dimming signal, the LED array 50 can be dimmed in the QR mode.

The CS terminal and error amplifier 20 are used for current feedback control in CCM mode. A current detection signal Vcs is input to an inverting input terminal of the error amplifier 20 through a CS terminal. The current feedback voltage Vcsccm as a reference voltage output from the voltage generator 18 for comparison is input to a non-inverting input terminal of the error amplifier 20 . An FB terminal is connected to the output terminal of the error amplifier 20. An external capacitor Cfb is connected to the FB terminal.

When the CCM mode is selected by the selection signal SEL_sig, the comparison voltage generator 18 outputs a current feedback voltage Vcsccm obtained by multiplying the analog dimming signal by the second gain magnification. By adjusting the analog dimming signal, the LED array 50 can be dimmed in the CCM mode.

Further details of the operation of the comparison voltage generator 18 will be described later.

The output of the error amplifier 20 is connected to the non-inverting input of the comparator 21. An oscillation signal output from the oscillator 22 is input to an inverting input terminal of the comparator 21 . The oscillation signal concerned is, for example, a saw-like waveform. The comparator 21 outputs the PWM signal Spwm to the control logic unit 24 as a result of comparing the output of the error amplifier 20 and the oscillation signal.

In CCM mode, the frequency of PWM control is fixed, but this frequency is set by the external resistor R21 connected to the RT terminal.

In addition, the ZT terminal is a terminal for detecting the zero crossing of the coil current Icoil in QR mode, and is connected to the connection node of the voltage dividing resistors R11 and R12. The inverting input terminal of the comparator CP2 is connected to the ZT terminal. A predetermined reference voltage is applied to the non-inverting input terminal of the comparator CP2. The comparator CP2 outputs the detection signal of the zero cross to the control logic section 24. In addition, the comparator CP3 is also connected to the ZT terminal, and the comparator CP3 is used for correction control of the LED current ILED in the QR mode, and its details will be described later.

The amplifier 16 amplifies the output from the low-pass filter 15 and outputs it when the QR mode is selected by the selection signal SEL_sig. The control logic unit 24 outputs the gate output signal Gout of the OUT terminal to the low-pass filter 15 when the PWM dimming signal is High. By this, the low-pass filter 15 smooths and outputs the gate output signal Gout. That is, the QRCOMP terminal externally outputs a DC voltage proportional to the on-duty of the gate output signal Gout when the QR mode is selected by the selection signal SEL_sig and when the PWM dimming signal is High. The DC voltage output from the QRCOMP terminal is used to generate an analog dimming signal input to the ADIM terminal, and corrects the linearity of the LED current in QR mode.

Also, when an abnormality is detected, the control logic section 24 outputs an abnormality signal indicating an abnormal state from the FAILB terminal to the outside using the abnormality detection section 23. Also, the abnormal signal becomes a different level depending on the abnormal state or the steady state.

Also, the GND terminal is a terminal for grounding the IC. The DGND terminal is a terminal for taking the digital ground of the IC.

<2. QR mode and CCM mode>

Next, each operation in QR mode and CCM mode will be described. When the QR mode is selected by the selection input signal input to the SEL terminal, the control logic section 24 performs operation control in the QR mode according to the selection signal SEL_sig indicating that effect.

The control logic section 24 first outputs a high gate output signal Gout from the OUT terminal to turn on the switching element M1. Then, the coil current Icoil starts to flow through the turned-on switching element M1 and the current detection resistor Rs and increases. At this time, the current detection signal Vcs detected by the current detection resistor Rs is increased. Then, when the current detection signal Vcs becomes equal to or higher than the current detection threshold voltage Vcsqr, the output of the comparator 19 rises to High, and the control logic section 24 drops the gate output signal Gout to Low.

As a result, the switching element M1 is turned off, the drain voltage Vrd of the switching element M1 rises, and the coil current Icoil starts to flow through the diode D1 and decreases. At this time, the ZT voltage Vzt applied to the ZT terminal rises as the drain voltage Vdr rises, and thereafter gradually falls. Then, at the timing when the coil current Icoil becomes zero, the drain voltage Vdr rapidly decreases, and the ZT voltage Vzt also rapidly decreases. Then, when the ZT voltage Vzt becomes equal to or less than the predetermined reference voltage, the output of the comparator CP2 rises to High. Thereby, the zero cross of the coil current Icoil is detected. Then, the control logic section 24 raises the gate output signal Gout to High, and turns on the switching element M1 again.

An example of the waveform of the coil current Icoil and the LED current ILED in such a QR mode is shown in FIG. 2 . The coil current Icoil increases from zero, then changes to decrease at a predetermined current value, and increases again when reaching zero. As shown in area A1 in Fig. 2, in the QR mode, when switching element M1 is turned on, soft switching is performed in which current does not flow through switching element M1, so heat generation (loss) and generation of noise are suppressed. However, since the amplitude of the coil current Icoil increases, the ripple of the LED current ILED averaging the coil current Icoil increases.

On the other hand, when the CCM mode is selected by the selection input signal, the control logic section 24 performs operation control of the CCM mode. Here, the error amplifier 20 and the comparator 21 are enabled, and in accordance with the PWM signal Spwm output from the comparator 21, the control logic section 24 outputs a gate output signal Gout including High and Low to control the switching element M1 on/off. That is, current feedback control in which the on-duty of the PWM signal Spwm is adjusted so that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm is performed. By this, the average value of the coil current Icoil is controlled to match a desired value.

An example of the waveforms of the coil current Icoil and the LED current ILED in such a CCM mode is shown in FIG. 3 . The switching element M1 is turned on/off according to the PWM signal Spwm, and the coil current Icoil repeats increasing and decreasing. The coil current Icoil is controlled in a state where it always flows. The switching cycle of the switching element M1 is fixed. At this time, since the amplitude of the coil current Icoil is small, the ripple of the LED current ILED becomes small. However, as shown as region A2 in FIG. 3, since hard switching is performed when switching element M1 is turned on, current flows through switching element M1, which is disadvantageous in terms of heat generation (loss) and generation of noise.

In this way, in the light emitting element drive device 1 of the present embodiment, since the QR mode and the CCM mode can be selected by a selection input signal in one IC, the degree of freedom in design is improved. It is also possible to switch to the operation of the other mode while one of the two modes is operating. This makes it possible to switch from the QR mode to the CCM mode in which the ripple of the LED current is small, for example, when the luminance of the LED is switched from low luminance to high luminance.

<3. Setting of the current detection threshold voltage Vcsqr and the current return voltage Vcsccm>

Here, the setting of the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm by the comparison voltage generator 18 will be described in detail.

When the QR mode is selected, the current detection threshold voltage Vcsqr is basically set by the following formula (1).

However, Vadim is an analog dimming signal, and G1 is the first gain magnification.

When the CCM mode is selected, the current return voltage Vcsccm is basically set by the following equation (2).

However, Vadim is the analog dimming signal, and G2 is the second gain magnification.

Then, the first gain magnification G1 is set to twice the second gain magnification G2 (eg, G1 = 0.7, G2 = 0.35). This makes it possible to make the current value of the LED current ILED the same in both modes with the same set value of the analog dimming signal Vadim.

More specifically, in the present embodiment, the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm are set as follows according to the on/off of the function of the ODP unit 17 by setting the on/off setting signal input to the DUTYON terminal.

※When the QR mode is selected, and when the function of the ODP unit 17 is turned on

Vcsqr = Vadim × G1 (Vadim ≤ Vclp1) … (11)

Vcsqr =Vclp1×G1 (Vadim>Vclp1) … (12)

※When QR mode is selected, and in the case of ODP unit 17 function off

Vcsqr = Vadim × G1 (Vadim ≤ Vclp2) … (13)

Vcsqr =Vclp2×G1 (Vadim>Vclp2) … (14)

※When CCM mode is selected, and when the function of ODP part 17 is turned on

Vcsccm = Vadim × G2 (Vadim ≤ Vclp1) . (15)

Vcsccm = Vclp1×G2 (Vadim>Vclp1) … (16)

※When CCM mode is selected, and in the case of ODP unit 17 function off

Vcsccm = Vadim×G2 (Vadim ≤ Vclp2) … (17)

Vcsccm =Vclp2×G2 (Vadim>Vclp2) … (18)

However, Vclp1 and Vclp2 are clamp voltages of the analog dimming signal Vadim, and Vclp1 > Vclp2.

That is, the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm can be limited by the clamp voltages Vclp1 and Vclp2. The reason why Vclp1 used when the function of the ODP unit 17 is turned on is higher than Vclp2 used when the function is turned off is that, since the turn-on time of the PWM dimming signal is limited when the function is turned on, there is no problem even if the restrictions on the current detection threshold voltage Vcsqr and the current feedback voltage Vcsccm are relaxed.

<4. LED current correction in QR mode>

The light emitting element driving device 1 of the present embodiment has a function of correcting the LED current ILED (coil current Icoil) in the QR mode and making it highly accurate. Here, this function will be described using the timing chart shown in FIG. 4.

When the switching element M1 is turned on, the coil current Icoil starts to increase from zero at timing t0 shown in Fig. 4, and the current detection signal Vcs also starts to rise. Then, when the current detection signal Vcs reaches the current detection threshold voltage Vcsqr at timing t1, the output signal CS_DET of the comparator 19 rises to High.

At the subsequent delayed timing t2, the gate output signal Gout output by the control logic section 24 drops to Low. Here, the gate signal Gt is lowered with a certain slope until timing t3 due to the existence of the gate resistance Rg of the external component and the gate capacitance (not shown).

At timing t3, the drain voltage Vdr starts to rise due to the turning off of the switching element M1, and at timing t4, the drain voltage Vdr reaches the LED voltage VLED. At this timing t4, the coil current Icoil changes from increasing to decreasing. That is, as the accumulation of the delay from timing t1 to t2 by the internal circuit, the delay from timing t2 to t3 by external components, and the delay from timing t3 to t4 by the rise of the drain voltage Vdr, a delay in the transition timing at which the coil current Icoil changes from increasing to decreasing occurs by the delay time DTqr. Thereby, the increase in the coil current Icoil is maintained for the period of the delay time DTqr. Therefore, the LED current ILED obtained by averaging the coil current Icoil deviate slightly high, causing a problem in current accuracy.

Therefore, in this embodiment, control is performed using the ZT voltage Vzt generated at the ZT terminal. As shown in Fig. 4, as the drain voltage Vdr rises from the timing t3, the ZT voltage Vzt also rises, and the ZT voltage Vzt reaches the predetermined threshold voltage ZTH1 at the timing t4. The threshold voltage ZTH1 is set as the reference voltage of the comparator CP3, and the output of the comparator CP3 rises to High at timing t4. Therefore, in this embodiment, the control logic section 24 starts counting from timing t1 when the output signal CS_DET of the comparator 19 rises and counts until timing t4 when the output of the comparator CP3 becomes High, thereby detecting the delay time DTqr.

Then, the control logic section 24 adjusts the analog dimming signal Adim according to the delay time DTqr. Thereby, the current detection threshold voltage Vcsqr is adjusted, and the coil current Icoil and thus the LED current ILED can be corrected. In addition to the method of feeding back with the analog dimming signal Adim as described above, the control logic section 24 may adjust the on-duty of the gate output signal Gout. That is, the control logic section 24 corresponds to an example of the coil current correcting section.

In this way, in this embodiment, the delay of the transition timing of the coil current Icoil at the time of QR mode can be detected, and the precision improvement of LED current ILED can be aimed at. In particular, the delay time DTqr can be detected by diverting the ZT voltage Vzt of the ZT terminal used for zero-crossing detection in the QR mode.

Further, as shown in Fig. 4, at timing t5 when the coil current Icoil decreases and reaches zero, the drain voltage Vdr drops rapidly, and the ZT voltage Vzt also drops accordingly. At timing t6 when the ZT voltage Vzt reaches the threshold voltage ZTH2, the output of the comparator CP2 rises to High, and the zero cross of the coil current Icoil is detected. That is, the threshold voltage ZTH2 is set as the reference voltage of the comparator CP2.

ZTH2 is set to a value close to zero, and ZTH1 is higher than ZTH2 and has a different voltage level from ZTH2. Therefore, in this embodiment, both the comparator CP2 and the comparator CP3 are provided. In this way, by providing the comparator CP3 for comparison with ZTH1, the delay time DTqr can be detected with high precision. However, it is also possible to use comparator CP2 for zero cross detection also for detection of delay time DTqr. In that case, it becomes possible to reduce the number of parts.

<5. LED Current Compensation in CCM Mode>

In the light emitting element driving device of the present embodiment, it is also possible to incorporate a function for correcting the LED current ILED (coil current Icoil) in the CCM mode and increasing the accuracy. Here, this function will be described.

FIG. 5 is a diagram extracting only the configuration related to current feedback control in the CCM mode in the light emitting element driving device 1 shown in FIG. 1 . The switching control unit 1A shown in FIG. 5 is a functional unit including a comparator 21, an oscillator 22, a control logic unit 24, and a driver Dr1, and outputs a gate output signal Gout from the OUT terminal based on an output from the error amplifier 20. In the configuration shown in Fig. 5, the function for correcting the LED current in the CCM mode is not mounted.

In the configuration of FIG. 5 , the switching control unit 1A adjusts the on-duty of the gate output signal Gout so that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm.

Fig. 7 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in Fig. 5 (Fig. 1). At timing t10 shown in Fig. 7, the gate output signal Gout is High, the coil current Icoil starts to increase by turning on the switching element M1, and the current detection signal Vcs rises rapidly from 0V and then rises.

By adjusting the on-duty, the gate output signal Gout switches to low at timing t11. Due to the presence of an external gate resistor Rg and a gate capacitance (not shown), the gate signal Gt is turned low at the delayed timing t12.

By turning off the switching element M1, the drain voltage Vdr rises from the timing t12, and the drain voltage Vdr reaches the LED voltage VLED at the timing t13. At this timing t13, the coil current Icoil changes from increasing to decreasing.

In the configuration shown in Fig. 5, the error amplifier 20 monitors the current detection signal Vcs only during the period when the gate output signal Gout becomes High. As a result, as shown in Fig. 7, the on-duty of the gate output signal Gout is adjusted such that the average value of the current detection signal Vcs coincides with the current feedback voltage Vcsccm. However, due to the occurrence of the delay time DTccm from timing t11 to t13, the coil current Icoil continues to increase for the period of the delay time DTccm, and the average value of the coil current Icoil deviates slightly higher than the desired value Iccm. Therefore, a problem arises in the accuracy of the LED current ILED. That is, even if it is considered that the IC (light emitting element driving device) is controlled accurately, in reality, a deviation occurs in the LED current ILED.

Then, by making the structure shown in FIG. 5 into the structure shown in FIG. 6, correction control of the LED current ILED becomes possible. The light emitting element driving device 100 shown in FIG. 6 is obtained by partially modifying the structure of the light emitting element driving device 1 shown in FIG. 5 ( FIG. 1 ).

In the light emitting element drive device 100 shown in FIG. 6, as a difference from the configuration of FIG. 5, a sample holding unit 100A is inserted between the CS terminal and the inverting input terminal of the error amplifier 20. In the configuration of Fig. 6, the ZT voltage Vzt of the ZT terminal is also used. The error amplifier 20 monitors the sampling output Vsmp output from the sample holding section 100A. In addition, an example of a driving control unit or a coil current correcting unit is constituted by the sample holding unit 100A, the error amplifier 20, and the switching control unit 1A.

FIG. 8 is a timing chart showing an example of various signal waveforms in the CCM mode in the configuration shown in FIG. 6; During the period when the gate output signal Gout becomes High at timings t10 to t11 shown in Fig. 8, the sample holding unit 100A outputs the current detection signal Vcs as the sampling output Vsmp as it is.

Then, when the gate output signal Gout switches to Low at timing t11, the sample holding section 100A performs a hold operation to hold the sampling output Vsmp at that timing. At timing t12 after timing t11, the drain voltage Vdr starts to rise, and the ZT voltage Vzt of the ZT terminal also rises accordingly. Then, at timing t13 when the drain voltage Vdr reaches the LED voltage VLED, the ZT voltage Vzt reaches the threshold voltage Zth. The error amplifier 20 monitors the sampling output Vsmp only during the period from when the gate output signal Gout switches to High until the ZT voltage Vzt reaches the threshold voltage Zth.

In the configuration shown in Fig. 6, the on-duty of the gate output signal Gout is adjusted so that the average value of the sampling output Vsmp matches the current feedback voltage Vcsccm, but as shown in Fig. 8, since the held sampling output Vsmp is added and monitored by the sample holding section 100A only for a period corresponding to the delay time DTccm, the average value of the sampling output Vsmp is corrected slightly higher. Thereby, as shown by the arrow in FIG. 8, the sampling output Vsmp and the coil current Icoil are corrected slightly lower. Therefore, the LED current ILED is corrected so as to approach a desired value, and current accuracy can be improved.

In addition, as another method, a method similar to the method in the QR mode described above may be applied to the CCM mode. That is, the control logic section 24 starts counting from timing t11 when the gate output signal Gout shown in FIG. 8 switches from High to Low, and counts until timing t13 when the ZT voltage Vzt reaches the threshold voltage Zth, thereby detecting the delay time DTccm. In this case, in the configuration of FIG. 1 , a comparator for comparing the ZT voltage Vzt with the threshold voltage Zth may be provided. Then, the control logic section 24 adjusts the analog dimming signal Adim according to the detected delay time DTccm. Thereby, the current feedback voltage Vcsccm is adjusted, and the coil current Icoil and thus the LED current ILED can be corrected. In addition to the method of feeding back with the analog dimming signal Adim as described above, the control logic section 24 may adjust the on-duty of the gate output signal Gout.

In addition, a modified embodiment in which control is performed using a comparator in the CCM mode as in the case of the QR mode is also possible, and in that case, the error amplifier 20 and the FB terminal are unnecessary. As a first example of such a modified embodiment, the control logic section 24 starts time measurement from the timing at which the gate output signal Gout is switched from Low to High and the switching element M1 is turned on. Then, the control logic section 24 monitors the output of the comparator to which the reference voltage and the current detection signal Vs are input, ends time measurement at the timing when the current detection signal Vs becomes equal to or greater than the reference voltage, and switches the gate output signal Gout from High to Low at a timing equal to the measurement time from the start to the end of the time measurement from that timing. This makes it possible to control the average value of the coil current Icoil to a desired current value defined as the reference voltage.

Further, as a second example of the modified embodiment, the control logic section 24 detects the difference between the current detection signal Vs and the reference voltage when the switching element M1 is turned on, and determines the timing at which the gate output signal Gout is switched from High to Low by setting the voltage determined by adding the detected difference to the reference voltage as the current detection threshold voltage, as in the case of the QR mode, and monitoring the output of the comparator. This makes it possible to control the average value of the coil current Icoil to a desired current value defined as the reference voltage.

In the case of the modified embodiment according to the first and second examples, as described above, the control logic unit 24 detects the delay time DTccm, and adjusts the reference voltage or on-time according to the detected delay time Dtccm. The coil current Icoil can be corrected.

<6. Pinout of IC Package>

Fig. 9 is a top view of the light emitting element driving device [1 (or 100)] according to the present embodiment as an IC package product. In Fig. 9, the arrangement (pin arrangement) of each external terminal is shown. The IC package shown in FIG. 9 is configured as a small outline package (SOP). The lead frame as each external terminal is connected to the electrode of the LSI chip by a bonding wire (Au wire or the like), and the LSI chip and the lead frame are sealed with a sealing material (epoxy resin or the like).

As shown in Fig. 9, the IC package has a rectangular sealing material when viewed from the top. The sealing material has a first side, which is one long side, and a second side, which is a long side parallel to the first side and opposed to the first side. Along the first side, a VCC terminal, a UVLO terminal, a SEL terminal, a PWM terminal, a QRCOMP terminal, an ADIM terminal, a FAILB terminal, and a DUTYON terminal are arranged in this order. Further, along the second side, the REG90 terminal, CS terminal, OUT terminal, GND terminal, DGND terminal, FB terminal, ZT terminal, and RT terminal are arranged in this order.

The VCC terminal and UVLO terminal of the input power supply system, and the SEL terminal, PWM terminal, QRCOMP terminal, ADIM terminal, FAILB terminal, and DUTYON terminal, which are input/output relationships with a microcomputer (not shown), are integrated and arranged on the same long side in consideration of wiring when mounting the IC package on a PCB (substrate).

Also, the FB terminal is disposed between the DGND terminal and the ZT terminal. If a high voltage is applied to the FB terminal, the on-duty of the PWM control becomes very large in the CCR mode, and there is a possibility that the LED current may become an overcurrent. However, even if the FB terminal is short-circuited with the adjacent DGND terminal or ZT terminal, there is no problem since the DGND terminal and the ZT terminal are terminals to which a low voltage is applied, and a low voltage is applied to the FB terminal.

<7. Arrangement configuration in chip>

FIG. 10 is a plan view showing the arrangement of electrode pads in the chip 101 included in the light emitting element driving device 1 according to the present embodiment and the arrangement of each region where each component shown in FIG. 1 is arranged.

10, the X-axis direction and the Y-axis direction orthogonal to the X-axis direction are shown, the X-axis direction is more specifically indicated by the X1 direction and the X2 direction, and the Y-axis direction is more specifically indicated by the Y1 direction and the Y2 direction. The X2 direction and the Y2 direction become directions approaching each other.

The chip 101 shown in Fig. 10 has a rectangular shape as an external shape. The rectangle has a first side S1 extending in the Y-axis direction from the X2-direction side, a second side S2 extending in the X-axis direction from the Y2-direction side, a third side S3 extending in the Y-axis direction from the X1-direction side, and a fourth side S4 extending in the X-axis direction from the Y1-direction side.

Chip 101 has two VCC pads, UVLO pads, SEL pads, PWM pads, QRCOMP pads, ADIM pads, FAILB pads, DUTYON pads, RT pads, ZT pads, FB pads, DGND pads, two GND pads, two OUT pads, CS pads, and two REG90 pads as electrode pads. Each of these pads is provided corresponding to each terminal of the IC package shown in FIG. 9 .

Along the first side S1, a CS pad, a first REG90 pad, a second REG90 pad, a first VCC pad, a second VCC pad, and a UVLO pad are arranged in this order in the Y2 direction. Along the second side S2, the SEL pad, PWM pad, QRCOMP pad, ADIM pad, and FAILB pad are arranged in this order in the X1 direction. Along the third side S3, the DUTYON pad, the RT pad, and the ZT pad are arranged in the Y1 direction in this order. Along the fourth side S4, an FB pad, a DGND pad, a first GND pad, a second GND pad, a first OUT pad, and a second OUT pad are arranged in this order in the X2 direction.

The chip 101 has regions A to M as regions in which each component shown in FIG. 1 is disposed.

Area A, area B, and area C are arranged in the Y2 direction in this order when viewed from the X1 direction. Area A overlaps the first OUT pad and the second OUT pad in the X-axis direction as viewed in the Y2 direction, and overlaps with the CS pad in the Y-axis direction as viewed in the X1 direction. Area B intersects area A in the X-axis direction as viewed in the Y2 direction, and overlaps with the first REG90 pad and the second REG90 pad in the Y-axis direction as viewed in the X1 direction. Region B does not overlap with the first VCC pad in the Y-axis direction when viewed in the X1 direction.

The first VCC pad and the second VCC pad are connected to input terminals of the internal voltage generator 11 disposed in region B through top metal wiring. The internal voltage generator 11 includes a power transistor. An output terminal of the internal voltage generator 11 is connected to a power input terminal of the driver Dr1 disposed in region A through a top metal wire. Driver Dr1 includes a power transistor. Accordingly, the internal voltage Vreg generated by the internal voltage generator 11 based on the power supply voltage Vcc applied to the first VCC pad and the second VCC pad is supplied as the power supply voltage to the driver Dr1. An output terminal of the driver Dr1 is connected to the first OUT pad and the second OUT pad.

Area A does not overlap the first GND pad and the second GND pad in the X-axis direction when viewed in the Y2 direction. A ground terminal of the driver Dr1 is connected to the first GND pad and the second GND pad.

In this way, the first and second REG90 pads and the first and second VCC pads are disposed near the B region, and the A region is disposed near the first and second OUT pads and the first and second GND pads.

Region C does not overlap the first VCC pad in the Y-axis direction when viewed in the X1 direction, but overlaps the second VCC pad and the UVLO pad in the Y-axis direction when viewed in the X1 direction. Area C overlaps area B in the X-axis direction as viewed in the Y2 direction. As a result, region C is arranged near the UVLO pad. The UVLO unit 13 is disposed in region C.

Areas C to H are arranged in the X1 direction in this order when viewed from the Y1 direction. The D region is shifted from the SEL pad in the X1 direction when viewed in the Y1 direction, and does not overlap with the SEL pad in the X-axis direction. Further, region D overlaps region C in the Y-axis direction when viewed in the X2 direction. As a result, the D region is disposed near the SEL pad. The comparator CP1 is disposed in the D region.

The area E overlaps the PWM pad and the QRCOMP pad in the X-axis direction when viewed in the Y1 direction. The E area overlaps the C area in the Y-axis direction when viewed in the X2 direction, but does not overlap the D area in the Y-axis direction. ODP unit 17 is disposed in area E. The distance in the Y-axis direction between the PWM pad and area E viewed in the X2 direction is shorter than the distance in the X-axis direction between the DUTYON pad and area E viewed in the Y1 direction. This is because, compared to the PWM dimming signal applied to the PWM pad, the on/off setting signal applied to the DUTYON pad is constant at a high level or low level, and the tolerance for noise with respect to the signal applied to the DUTYON pad is large.

Area F is displaced from the QRCOMP pad in the X1 direction when viewed in the Y1 direction, and does not overlap with the QRCOMP pad in the X-axis direction, but overlaps with the ADIM pad in the X-axis direction. Area F overlaps areas D and E in the Y-axis direction when viewed in the X2 direction. Amplifier 16 is placed in region F. Area F is arranged near the QRCOMP pad.

The G region overlaps the ADIM pad in the X-axis direction when viewed in the Y1 direction, and overlaps the F region in the Y-axis direction when viewed in the X2 direction. The comparison voltage generator 18 is disposed in the G region. The G region is disposed near the ADIM pad. Since an analog dimming signal, which is an analog voltage, is applied to the ADIM pad, noise is suppressed and the influence on dimming is suppressed.

The H region overlaps the FAILB pad in the X-axis direction when viewed in the Y1 direction, and the G region in the Y-axis direction when viewed in the X2 direction. The abnormality detection unit 23 is disposed in the H region. The H region is arranged near the FAILB pad.

The group including the G and H regions, the I region, and the J region are arranged in the Y1 direction in this order when viewed in the X2 direction. The I region is displaced from the DUTYON pad in the Y1 direction when viewed in the X2 direction, and does not overlap with the DUTYON pad in the Y-axis direction, but overlaps with the RT pad in the Y-axis direction. The oscillator 22 is disposed in the I region. The I region is disposed near the RT pad.

The J area is shifted from the RT pad toward the Y1 direction when viewed in the X2 direction, and does not overlap the RT pad in the Y-axis direction, but overlaps the ZT pad in the Y-axis direction. Comparators CP2 and CP3 are arranged in the J region. The J region is disposed near the ZT pad.

Area J, area K, area L, and area A are arranged in the X2 direction in this order when viewed in the Y2 direction. The K region is shifted from the FB pad toward the X2 direction when viewed in the Y2 direction, and does not overlap with the FB pad in the X-axis direction, but overlaps with the DGND pad in the X-axis direction. The K region overlaps the J region in the Y-axis direction when viewed in the X2 direction. The error amplifier 20 is disposed in the K region. The K region is disposed near the FB pad.

The L region overlaps the first and second GND pads in the X-axis direction when viewed in the Y2 direction. The L region overlaps the K region in the Y-axis direction when viewed in the X2 direction. The comparator 19 is disposed in the L region.

Area M is disposed at the center of the chip 101 surrounded on the outside by areas A to L. The control logic unit 24 is disposed in the M region.

<8. Application to Liquid Crystal Display (LCD)>

As an example of a subject to which the light emitting element drive device according to the above-described embodiment is applied, a liquid crystal display device (an example of electronic equipment) will be described. A configuration example of the liquid crystal display device is shown in FIG. 11 . Note that the configuration shown in Fig. 11 is of a so-called edge light system, but is not limited to this configuration, and may be of a direct system.

The liquid crystal display device X shown in FIG. 11 includes a backlight 81 and a liquid crystal panel 82 . The backlight 81 is a lighting device (an example of a light emitting device) that illuminates the liquid crystal panel 82 from the back side. The backlight 81 has an LED light source part 811 , a light guide plate 812 , a reflector plate 813 , and optical sheets 814 .

The LED light source unit 811 includes LEDs and a substrate on which the LEDs are mounted, and as a light emitting element driving device for driving the LEDs, the one of the above-described embodiment can be applied. Light emitted from the LED light source unit 811 enters the inside from the side surface of the light guide plate 812 . The light guide plate 812 made of, for example, an acrylic plate guides the light incident therein to the entire interior while totally reflecting it, and emits it as planar light from the surface on the side where the optical sheets 814 are disposed. The reflector 813 reflects the light leaked from the light guide plate 812 and returns it to the inside of the light guide plate 812 . The optical sheets 814 include a diffusion sheet, a lens sheet, and the like, and are aimed at equalizing the luminance of light illuminating the liquid crystal panel 82 or improving the luminance.

<9. Other>

As mentioned above, although embodiment of this invention was described, various changes are possible for embodiment as long as it is within the scope of the meaning of this invention.

For example, in the present invention, the light emitting element driving device may include only one of the QR mode and the CCM mode. In particular, in the case of a light emitting element drive device having only the CCM mode in which the amplitude of the coil current Icoil becomes relatively small, it is not necessarily necessary to provide a capacitor C1 for averaging the coil current Icoil. Further, even in the case of having both the QR mode and the CCM mode, a configuration in which the capacitor C1 is not provided can be employed.

INDUSTRIAL APPLICABILITY The present invention can be used, for example, for a light emitting element driving device that drives an LED.

1: light emitting element driving device
11: internal voltage generator
12: IC power UVLO part
13: UVLO unit
14: internal voltage UVLO unit
15: low pass filter
16: Amplifier
17: ODP (Over Duty Protection) part
18: voltage generator for comparison
19: comparator
20: error amplifier
21: comparator
22: oscillator
23: abnormality detection unit
24: control logic unit
50: LED array
CP1 to CP3: Comparators
Dr1: driver
R1, R2: Partial pressure resistance
D1: diode
C1: capacitor
L1: Coil
C2: capacitor
R11, R12: voltage divider resistance
M1: switching element
Rs: current sense resistor
Rg: gate resistance
Cfb: capacitor
100: light emitting element driving device
100A: sample holding unit
1A: switching control unit
101: chip

Claims (25)

A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;
The drive controller detects a delay time of transition timing at which the coil current flowing through the coil changes from an increase to a decrease, and corrects the coil current by adjusting the drive signal based on the detected delay time. A light emitting element driving device having a coil current correction unit. A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;
the drive control unit has a coil current correction unit correcting the coil current by adjusting the drive signal based on a delay in transition timing at which the coil current flowing through the coil changes from an increase to a decrease;
The external configuration is
A current detection resistor having one end connected to the second terminal of the switching element;
A first capacitor having one end connected to the other end of the coil;
Further comprising a voltage dividing resistor connected to the other end of the first capacitor,
The light emitting element driving device,
a second external terminal connected to a connection node of the second terminal and the current sensing resistor;
a third external terminal to which a connection node of the voltage dividing resistor is connected;
The drive control unit,
A first comparator for comparing a current detection signal generated at the second external terminal with a current detection threshold voltage;
A ZT voltage generated at the third external terminal is input and has a second comparator used for zero-cross detection of the coil current;
The coil current compensator detects, as a delay time of the transition timing, a time from when it is detected by the first comparator that the current detection signal rises and reaches the current detection threshold voltage, and when it is detected that the ZT voltage rises and reaches a predetermined ZT threshold voltage. According to claim 2,
and a third comparator to which the ZT voltage and a reference voltage corresponding to the ZT threshold voltage are input. According to claim 2,
The second comparator detects that the ZT voltage rises and reaches a predetermined ZT threshold voltage. According to any one of claims 2 to 4,
The current detection threshold voltage is generated based on an analog dimming signal,
The coil current compensator adjusts the analog dimming signal based on the delay time. According to any one of claims 2 to 4,
The coil current compensating unit adjusts an on-time of the driving signal based on the delay time. According to any one of claims 2 to 4,
A fourth external terminal to which a PWM dimming signal is input;
A fifth external terminal to which an on/off setting signal is input;
An ODP (Over Duty Protection) unit for switching on/off of a function for limiting the duty of the PWM dimming signal according to the on/off setting signal;
A sixth external terminal to which an analog dimming signal is input;
a comparison voltage generator configured to generate the current detection threshold voltage based on the analog dimming signal;
The comparison voltage generating unit generates the current detection threshold voltage based on the following formula.
In the case of turning on the function of the above ODP unit
Vcsqr = Vadim × G1 (Vadim ≤ Vclp1)
Vcsqr = Vclp1×G1 (Vadim>Vclp1)
In the case of function off of the ODP unit
Vcsqr = Vadim × G1 (Vadim ≤ Vclp2)
Vcsqr = Vclp2×G1 (Vadim>Vclp2)
Vclp1 > Vclp2
However, Vcsqr: the current detection threshold voltage, Vadim: the analog dimming signal, G1: first gain magnification, Vclp1: first clamp voltage, Vclp2: second clamp voltage A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;
the drive control unit has a coil current correction unit correcting the coil current by adjusting the drive signal based on a delay in transition timing at which the coil current flowing through the coil changes from an increase to a decrease;
The external configuration is
A current detection resistor having one end connected to the second terminal of the switching element;
A second capacitor having one end connected to the other end of the coil;
Further comprising a voltage dividing resistor connected to the other end of the second capacitor,
The light emitting element driving device,
a seventh external terminal connected to a connection node of the second terminal and the current sensing resistor;
an eighth external terminal to which a connection node of the voltage divider resistor is connected;
a ninth external terminal to which the third condenser is connected;
The drive control unit,
a sample holding unit to which a current detection signal generated at the seventh external terminal is input;
an error amplifier having an input terminal to which the output of the sample hold unit and a current feedback voltage are input, and an output terminal to which the ninth external terminal is connected;
a fourth comparator to which the output of the error amplifier and an oscillation signal are input;
The coil current correction unit,
the sample hold unit holding and outputting the sample when the driving signal is switched from an on level to an off level;
The light emitting element driving device having the error amplifier for monitoring the output of the sample hold unit until the timing when the ZT voltage generated at the eighth external terminal rises and reaches a predetermined ZT threshold voltage. A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;
the drive control unit has a coil current correction unit correcting the coil current by adjusting the drive signal based on a delay in transition timing at which the coil current flowing through the coil changes from an increase to a decrease;
The external configuration is
A current detection resistor having one end connected to the second terminal of the switching element;
A second capacitor having one end connected to the other end of the coil;
Further comprising a voltage dividing resistor connected to the other end of the second capacitor,
The light emitting element drive device,
a seventh external terminal connected to a connection node of the second terminal and the current sensing resistor;
an eighth external terminal to which a connection node of the voltage divider resistor is connected;
The driving control unit,
generating the drive signal to set an average value of the coil current to a desired value based on a voltage of the seventh external terminal and a reference voltage;
The coil current correction unit,
a detection unit which detects, as a delay time of the transition timing, a time from when the driving signal is switched from an on level to an off level until a ZT voltage generated at the eighth external terminal rises and reaches a predetermined ZT threshold voltage;
A light emitting element driving device having an adjusting unit that adjusts the reference voltage or the on-time of the driving signal based on the delay time. According to claim 9,
The external configuration further includes a ninth external terminal to which a third capacitor is connected,
The drive control unit,
an error amplifier having an input terminal to which the voltage of the seventh external terminal and a current feedback voltage, which is the reference voltage, are input, and an output terminal to which the ninth external terminal is connected;
A light emitting element driving device having a fourth comparator to which an output of the error amplifier and an oscillation signal are input. According to claim 9,
The driving control unit starts time measurement from the timing when the driving signal is switched from the OFF level to the ON level, monitors the output of a fifth comparator to which the reference voltage and the voltage of the seventh external terminal are input, ends the time measurement at the timing when the voltage at the seventh external terminal becomes equal to or higher than the reference voltage, and switches the driving signal from the ON level to the OFF level at a timing that has elapsed from that timing by a time equal to the measurement time by the time measurement. According to claim 9,
The driving control unit detects a difference between the voltage of the seventh external terminal and the reference voltage when the switching element is turned on, and determines timing for switching the driving signal from an on level to an off level by monitoring a voltage determined by adding the detected difference to the reference voltage and an output of a sixth comparator to which the voltage of the seventh external terminal is input. According to claim 8 or 10,
A tenth external terminal to which a PWM dimming signal is input;
An eleventh external terminal to which an on/off setting signal is input;
An ODP (Over Duty Protection) unit for switching on/off of a function for limiting the duty of the PWM dimming signal according to the on/off setting signal;
A twelfth external terminal to which an analog dimming signal is input;
a comparison voltage generator configured to generate the current feedback voltage based on the analog dimming signal;
The comparison voltage generating unit generates the current feedback voltage based on the following formula.
In the case of turning on the function of the above ODP unit
Vcsccm = Vadim×G2 (Vadim ≤ Vclp1)
Vcsccm =Vclp1×G2 (Vadim>Vclp1)
In the case of function off of the ODP unit
Vcsccm = Vadim×G2 (Vadim ≤ Vclp2)
Vcsccm =Vclp2×G2 (Vadim>Vclp2)
Vclp1 > Vclp2
However, Vcsccm: the current return voltage, Vadim: the analog dimming signal, G2: second gain magnification, Vclp1: first clamp voltage, Vclp2: second clamp voltage A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
A driving control unit generating a driving signal for driving the switching element on/off and outputting it from the first external terminal;
the drive control unit has a coil current correction unit correcting the coil current by adjusting the drive signal based on a delay in transition timing at which the coil current flowing through the coil changes from an increase to a decrease;
Further comprising a thirteenth external terminal to which a selection input signal is input,
The driving control unit operates by switching between a quasi-resonant (quasi-resonant) mode and a continuous current mode (CCM) according to the selection input signal. According to claim 14,
The external configuration further includes a current detection resistor having one end connected to the second terminal of the switching element,
The drive control unit,
A seventh comparator to which a current detection signal generated by the current detection resistor is input and used in the QR mode;
An error amplifier used in the CCM mode in which the current detection signal is input and a fourth capacitor is connected to an output terminal;
The light emitting element driving device,
A fourteenth external terminal to which an analog dimming signal is input;
A comparison voltage generator for generating a current detection threshold voltage input to the seventh comparator by multiplying the analog dimming signal by a first gain magnification and multiplying the analog dimming signal by a second gain magnification to generate a current feedback voltage input to the error amplifier;
The first gain magnification is twice the second gain magnification. The method of claim 14 or 15,
A pull-down resistor connected to the thirteenth external terminal;
and an eighth comparator having an input terminal connected to the connection node of the pull-down resistor and the thirteenth external terminal. The light emitting element driving device according to claim 14, which is an IC package,
The external configuration is
A current detection resistor having one end connected to the second terminal of the switching element;
A fifth capacitor having one end connected to the other end of the coil;
a voltage divider resistor connected to the other end of the fifth condenser;
The IC package,
A sealing material having a first side and a second side opposite to the first side;
an SEL terminal as the thirteenth external terminal;
A DGND terminal for taking the digital ground of the IC;
An FB terminal connected to an output terminal of the error amplifier used in the CCM mode and capable of connecting an external sixth capacitor;
a ZT terminal used in the QR mode and connectable to a connection node of the voltage divider resistor;
Along the first side, the SEL terminal is disposed;
A light emitting element driving device in which the DGND terminal, the FB terminal, and the ZT terminal are disposed along the second side. According to claim 17,
The FB terminal is disposed between the DGND terminal and the ZT terminal. The method of claim 17 or 18,
The IC package,
A VCC terminal as a power supply terminal for the IC;
a UVLO terminal for UVLO of the input voltage;
The VCC terminal and the UVLO terminal are disposed along the first side. delete delete A light emitting unit including at least one light emitting element and to which an input voltage is applied at one end;
A coil having one end connected to the other end of the light emitting unit;
A diode connected between the other end of the coil and one end of the light emitting unit;
A light emitting element driving device for driving the light emitting part in an external configuration including a switching element having a first terminal connected to the other end of the coil,
a first external terminal connected to the control terminal of the switching element;
a driving controller generating a driving signal for driving the switching element on/off and outputting the driving signal from the first external terminal;
A second external terminal to which a selection input signal is input,
The drive controller operates by switching between a quasi-resonant (quasi-resonant) mode and a continuous current mode (CCM) according to the selection input signal,
The external configuration further includes a current detection resistor having one end connected to the second terminal of the switching element,
The drive control unit,
A first comparator to which a current detection signal generated by the current detection resistor is input and used in the QR mode;
An error amplifier used in the CCM mode in which the current detection signal is input and a first capacitor is connected to an output terminal;
The light emitting element driving device,
a third external terminal to which an analog dimming signal is input;
A comparison voltage generator for generating a current detection threshold voltage input to the first comparator by multiplying the analog dimming signal by a first gain magnification and multiplying the analog dimming signal by a second gain magnification to generate a current feedback voltage input to the error amplifier;
The first gain magnification is twice the second gain magnification. The method of claim 22,
A pull-down resistor connected to the second external terminal;
and a second comparator having an input terminal connected to the connection node of the second external terminal and the pull-down resistor. The light emitting element driving device according to any one of claims 1 to 4, 8 to 12, 14 to 15, 17 to 18, or 22 to 23;
A light emitting device having a light emitting unit driven by the light emitting element driving device. An electronic device comprising the light emitting device according to claim 24.

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