KR20200033564A - Display Device and Driving Method Thereof - Google Patents

Abstract

A display device capable of preventing the deterioration of an image quality of the present invention comprises: a first sub-pixel group including one pair of sub-pixels disposed adjacent to each other in a horizontal direction and sharing a data line; and a second sub-pixel group including a sub-pixel not sharing the data line. First sub-pixel groups included in an n^th horizontal line and first sub-pixel groups included in an (n+1)^th horizontal line respectively share different data lines, wherein n is greater than one.

Description

Display device and driving method thereof

The present invention relates to a display device and a driving method thereof.

The active matrix type organic light emitting display device includes self-emission organic light emitting diodes (hereinafter, referred to as "light emitting devices"), and has a fast response speed, high light emission efficiency, high brightness, and a wide viewing angle.

The organic light emitting display device arranges the subpixels including the light emitting elements in a matrix form and adjusts the luminance of the subpixels according to the gradation of image data. Each of the sub-pixels includes a driving thin film transistor (TFT) that controls a driving current input to the light emitting device according to its gate-source voltage (Vgs). The light emission amount of the light emitting element is proportional to the driving current, and the display gray level (luminance) is adjusted by the light emission amount.

A panel of a double rate driving (DRD) driving method is known as a method of reducing the number of output channels of a data driving circuit in such a display device. The DRD panel has an advantage in that the number of data lines and the number of source drive ICs can be reduced by 1/2 compared to the previous one by time-dividing and supplying the data voltage to neighboring subpixels from one side to the other through one data line.

However, the DRD panel may have different charging characteristics or emission characteristics between R (Red), G (Green), and B (Blue) subpixels depending on a method of sharing a data line, a driving method, and the like. The difference in characteristics between the sub-pixels causes a noise such as a horizontal line, a vertical line, or a grid pattern in the display image, thereby deteriorating image quality.

An object of the present invention is to provide a display device and a driving method capable of preventing deterioration of image quality while reducing the number of output channels of a data driving circuit.

In order to solve the above problems, a display device according to an exemplary embodiment of the present invention includes: a first sub-pixel group including a pair of sub-pixels arranged adjacent to each other in the horizontal direction to share data lines; And a second sub-pixel group including sub-pixels that do not share a data line, and first sub-pixel groups included in an n-th (n> 1) horizontal line and n + 1-th horizontal line. One sub-pixel group includes a display panel that shares different data lines.

In the second sub-pixel group, second sub-pixel groups included in the n-th horizontal line and second sub-pixel groups included in the n + 1-th horizontal line may share different data lines.

In the horizontal line, subpixels are arranged in units of three subpixels including a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel, and one neighboring one of the three subpixels It is possible that a pair of subpixels is the first subpixel group and the other subpixel is the second subpixel group.

In the n-th horizontal line, the red (R) sub-pixel and the green (G) sub-pixel share a first data line, and the blue (B) sub-pixel is connected to a second data line, and the n + 1 th In the horizontal line, the red (R) subpixel is connected to the first data line, and the green (G) subpixel and the blue (B) subpixel can share the second data line.

A scan driver supplying a scan signal; And a data driver supplying a data voltage to the data line, among the three sub-pixels included in the n-th horizontal line and three sub-pixels included in the n + 1-th horizontal line when the scan signal is input. Two sub-pixels are selected, and the data driver may supply corresponding data voltages to the first data line and the second data line respectively connected to the two sub-pixels to which the scan signal is input.

Subpixels of the same color among subpixels included in the first subpixel group of the nth horizontal line and subpixels included in the first subpixel group of the n + 1th horizontal line are selected in the same scan signal section Data voltages may be supplied from respective data lines.

Subpixels included in the first subpixel group of the nth horizontal line and subpixels included in the first subpixel group of the n + 1th horizontal line may receive the same scan signal. have.

When a first scan signal is input, a subpixel connected to the first data line and a subpixel connected to the second data line among subpixels included in the n-th horizontal line are respectively selected to receive a corresponding data voltage, and a second scan is performed. When a signal is input, a subpixel connected to the first data line and a subpixel connected to the second data line among subpixels included in the n + 1th horizontal line are respectively selected to receive a corresponding data voltage, and a third scan signal Among the sub-pixels included in the n-th horizontal line upon input, sub-pixels not supplied with data voltage, and among the sub-pixels included in the n + 1-th horizontal line, sub-pixels not supplied with data voltage, respectively. The data voltage may be supplied through the first data line and the second data line connected to the corresponding subpixel.

The scan line to which the third scan signal is input may be shared between subpixels included in the n-th horizontal line and subpixels included in the n + 1-th horizontal line.

A driving method of a display device according to an exemplary embodiment of the present invention includes a data driver supplying data voltages to data lines, a scan driver supplying scan signals to scan lines, and a matrix type, and the data lines and scan lines A driving method of a display device including a display panel including connected subpixels, a red (R) subpixel included in an n (n> 1) th horizontal line of the display panel when a first scan signal is input, green (G) selecting a subpixel connected to a first data line and a subpixel connected to a second data line among subpixels and blue (B) subpixels to supply data voltages respectively; When the second scan signal is input, a subpixel connected to the first data line among the red (R) subpixel, green (G) subpixel, and blue (B) subpixel included in the n + 1 th horizontal line and the second data Selecting subpixels connected to a line to supply data voltages respectively; And a subpixel not supplied with a data voltage among subpixels included in the n-th horizontal line and a subpixel not supplied with data voltage among subpixels included in the n + 1th horizontal line when the third scan signal is input. And selecting and supplying corresponding data voltages through the first data line and the second data line, respectively.

In the horizontal line, subpixels are arranged in units of three subpixels including red (R) subpixels, green (G) subpixels, and blue (B) subpixels, and data lines among the three subpixels are arranged. A first sub-pixel group including a pair of sub-pixels shared with each other; And a second sub-pixel group including sub-pixels that do not share a data line.

The first sub-pixel groups included in the n-th horizontal line and the first sub-pixel groups included in the n + 1-th horizontal line may include a display panel sharing different data lines.

A display device and a driving method according to the present invention include a DRD driving pixel sharing a data line and a normal driving pixel not sharing a data line in one display panel, and the DRD driving pixels are nth line and n + 1 In the second line, different data lines are shared. By such a configuration, it is possible to prevent occurrence of luminance deviation between sub-pixels of the same color. In addition, according to an embodiment of the present invention, any one of the DRD driving pixels shares one scan line in the nth line and the n + 1th line. With this configuration, while four scan signals per two horizontal lines were previously required, data can be supplied to two horizontal lines within the three scan signal output periods and the scan signal line can also be reduced when applying the present invention. As a result, the driving frequency can be increased, the PPI increases, and the bezel size decreases.

1 is a schematic block diagram of a display device according to an exemplary embodiment of the present invention.
2 is a schematic circuit diagram of a subpixel.
FIG. 3 is a view showing a comparison between a sub-pixel arrangement of a normal panel and a sub-pixel arrangement of a DRD (Double Rate Driving) panel.
4 is a diagram illustrating a subpixel arrangement of a display device according to an exemplary embodiment of the present invention.
5 is a view showing a pixel array of a display device according to a first embodiment of the present invention.
6 is a driving waveform diagram of the pixel array of FIG. 5.
7 is a view showing a pixel array of a display device according to a second embodiment of the present invention.
8 is a driving waveform diagram of the pixel array of FIG. 7.
9 to 12 are simulation results of a method of driving a display device according to an exemplary embodiment of the present invention.

Advantages and features of the present specification, and a method of achieving them will be apparent with reference to embodiments described below in detail together with the accompanying drawings. However, the present specification is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the embodiments allow the disclosure of the present specification to be complete, and common knowledge in the art to which this specification belongs It is provided to fully inform the person having the scope of the invention, and this specification is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for describing the embodiments of the present specification are exemplary, and the present specification is not limited to the illustrated matters. The same reference numerals refer to the same components throughout the specification. When 'include', 'have', 'consist of', etc. mentioned in this specification are used, other parts may be added unless '~ only' is used. When a component is expressed as a singular number, the plural number is included unless otherwise specified.

In analyzing the components, it is interpreted as including the error range even if there is no explicit description.

In the case of the description of the positional relationship, for example, when the positional relationship of two parts is described as '~ on', '~ on top', '~ on the bottom', '~ next to', etc., 'right' Alternatively, one or more other parts may be located between the two parts unless 'direct' is used.

The first, second, etc. may be used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another component. Accordingly, the first component mentioned below may be the second component within the technical spirit of the present specification.

Throughout the specification, the same reference numerals refer to substantially the same components.

Hereinafter, embodiments of the present specification will be described in detail with reference to the accompanying drawings. In the following description, when it is determined that a detailed description of known functions or configurations related to the present specification may unnecessarily obscure the subject matter of the present specification, the detailed description is omitted.

1 is a schematic block diagram of a display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the display device includes an image processing unit 110, a timing control unit 120, a scan driving unit 130, a data driving unit 140, a power supply unit 180, and a display panel 150.

The image processing unit 110 outputs a data enable signal DE and the like as well as a data signal DATA supplied from the outside. The image processing unit 110 may output one or more of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal in addition to the data enable signal DE, but these signals are omitted for convenience of description.

The timing controller 120 receives the data signal DATA as well as a driving signal including a data enable signal DE or a vertical synchronization signal, a horizontal synchronization signal, and a clock signal from the image processing unit 110. The timing controller 120 is a gate timing control signal GDC for controlling the operation timing of the scan driver 130 based on the driving signal and a data timing control signal DDC for controlling the operation timing of the data driver 140. Output

The data driver 140 samples and latches the data signal DATA supplied from the timing controller 120 in response to the data timing control signal DDC supplied from the timing controller 120, and then data based on the gamma reference voltage. Convert to voltage and output. The data driver 140 outputs the data voltage through the data lines DL1 to DLn. The data driver 140 may be formed in the form of an integrated circuit (IC).

The scan driver 130 outputs a scan signal in response to the gate timing control signal GDC supplied from the timing controller 120. The scan driver 130 outputs a scan signal consisting of a scan high voltage and a scan low voltage through scan lines GL1 to GLm. The scan driver 130 is formed in the form of an integrated circuit (IC) or a gate in panel method on the display panel 150.

The power supply unit 180 is connected to the first power line EVDD and the second power line EVSS disposed on the display panel 150. The power supply unit 180 outputs a first potential power (high potential voltage) and a second potential power (low potential voltage) through the first power line EVDD and the second power line EVSS. The first potential power (high potential voltage) and the second potential power (low potential voltage) transmitted through the first power line EVDD and the second power line EVSS are subpixels SP of the display panel 150. ).

The display panel 150 displays an image corresponding to the data voltage and the scan signal supplied from the data driver 140 and the scan driver 130 and the power supplied from the power supply unit 180. The display panel 150 includes subpixels SP that operate to display an image.

The subpixels SP include a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel. The subpixels SP may have one or more different emission areas according to emission characteristics.

As illustrated in FIG. 2, one subpixel includes a switching transistor SW, a driving transistor DR, a capacitor Cst, a compensation circuit CC, and an organic light emitting diode OLED.

The switching transistor SW operates to switch the data voltage supplied through the first data line DL1 as the data voltage to the capacitor Cst in response to the scan signal supplied through the first scan line GL1. The driving transistor DR operates to flow driving current between the first power line EVDD and the second power line EVSS according to the data voltage stored in the capacitor Cst. The organic light emitting diode OLED operates to emit light according to the driving current formed by the driving transistor DR.

The compensation circuit CC is a circuit added in the subpixel to compensate for the threshold voltage of the driving transistor DR. The compensation circuit CC may be configured in various forms including one or more transistors.

FIG. 3 is a diagram showing a comparison between a pixel array of a normal panel and a pixel array of a double rate driving (DRD) panel for reducing the number of output channels.

In the normal panel as shown in Fig. 3A, the output channel of the data driving circuit is connected one-to-one to the data line DL. In the red (R) subpixel, the green (G) subpixel, and the blue (B) subpixel, subpixels of the same color are disposed along the vertical direction, and are respectively connected to the data line DL.

In the DRD panel as shown in FIG. 3B, a pair of subpixels R and G neighboring left and right in the horizontal direction with the data line DL therebetween share the data line DL. Therefore, the number of data lines DL can be reduced. The sub-pixels R and G sharing the data line DL are charged by receiving the data voltage supplied in a time-division manner. When the unit pixel is DRD driven in a display panel composed of three subpixels, such as a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel, as shown in FIG. 3B. A luminance deviation may occur between sub-pixels of the same color. Accordingly, the pair of sub-pixels R and G are driven by the DRD method, and the other sub-pixel B is driven by the normal method, thereby reducing luminance deviation between sub-pixels of the same color.

4 is a diagram illustrating a subpixel arrangement of a display device according to an exemplary embodiment of the present invention.

In the display device according to an exemplary embodiment of the present invention, red (R) subpixels, green (G) subpixels, and blue (B) subpixels are arranged in a matrix form. In the following description, a red (R) subpixel is an R subpixel, a green (G) subpixel is a G subpixel, and a blue (B) subpixel is referred to as a B subpixel. Each sub-pixel is arranged horizontally adjacently and is divided into a first group sharing mutual data lines and a second group not sharing data lines. The first group includes DRD driving pixels, and the second group includes normal driving pixels. Here, in the DRD driving pixel, subpixels of the previous line and subpixels of the next horizontal line share different data lines.

Referring to FIG. 4A, in the first horizontal line, the R0 subpixel and the G0 subpixel share the first data line DL1 and are DRD-driven. Then, the remaining B0 subpixels are connected to the second data line DL2 and are normally driven. In the second horizontal line, the R1 subpixel is normally driven, and the G1 subpixel and the B1 subpixel share the second data line DL2 and are DRD driven. That is, the first data line DL1 is shared in the first horizontal line (nth line), and the second data line DL2 is shared in the second horizontal line (n + 1th line).

Referring to (b) of FIG. 4, which shows another embodiment, in the first horizontal line, the R0 subpixel is a normal driving pixel, and the G0 subpixel and the B0 subpixel share the second data line DL2. In the second line, the R1 subpixel and the G1 subpixel share the first data line DL, and the remaining B0 subpixels are normally driven. That is, the second data line DL2 is shared in the first horizontal line (nth line), and the first data line DL1 is shared in the second horizontal line (n + 1st line).

As described above, the display device according to an embodiment of the present invention includes a DRD driving pixel and a normal driving pixel together in one panel, and the DRD driving pixels share different data lines in the n-th line and the n + 1-th line. do. By such a configuration, it is possible to prevent occurrence of luminance deviation between sub-pixels of the same color.

5 is a diagram illustrating a pixel array of a display device according to a first embodiment of the present invention, and FIG. 6 is a driving waveform diagram of the pixel array of FIG. 5.

5 is a circuit diagram showing a part of the pixel array as the first embodiment of the pixel array.

The pixel array includes data lines DL1 to DL2 and scan lines GL1 to GL4 crossing the data lines DL1 to DL2. The sub-pixels R1 to R2, G1 to G2, and B1 to B2 control the connection between the data lines DL1 to DL2 according to the scan signals Scan1 to Scan4 input to the scan lines GL1 to GL4. It includes a first TFT (T1), a second TFT (T2) controlling the connection with the reference (Ref) line, and a third TFT (T3) controlling the connection with the first power line (EVDD).

R1 subpixels, G1 subpixels, and B1 subpixels are arranged on the n-th horizontal line (n Line) of the pixel array.

In the R1 subpixel, the first TFT (T1) has a gate electrode connected to the first scan line (GL1), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the second scan line (GL2), a first electrode is connected to the reference line (Ref), and a second electrode is connected to the R1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the R1 subpixel. When the first scan signal SCAN1 is input to the first scan line GL1 from the R1 subpixel, the first data voltage Data1 input to the first data line DL is charged to the R1 subpixel.

In the G1 subpixel, the first TFT (T1) has a gate electrode connected to the second scan line (GL2), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the second scan line (GL2), a first electrode is connected to the reference line (Ref), and a second electrode is connected to the G1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G1 subpixel. When the second scan signal SCAN2 is input from the G1 subpixel, the first data voltage Data1 input to the first data line DL1 is charged to the G1 subpixel.

In the B1 subpixel, the first TFT (T1) has a gate electrode connected to the first scan line (GL1), a first electrode connected to the second data line (DL2), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the first scan line GL1, a first electrode is connected to the reference line Ref, and a second electrode is connected to the B1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G1 subpixel. When the first scan signal SCAN1 is input to the first scan line GL1 from the B1 subpixel, the second data voltage Data2 input to the second data line DL2 is charged to the B1 subpixel.

R2 subpixels, G2 subpixels, and B2 subpixels are arranged on the n + 1th horizontal line (n + 1 Line) of the pixel array.

In the R2 subpixel, the first TFT (T1) has a gate electrode connected to the third scan line (GL3), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the third scan line GL3, a first electrode is connected to the reference line Ref, and a second electrode is connected to the R2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the R2 subpixel. When the third scan signal SCAN3 is input to the third scan line GL3 from the R2 subpixel, the first data voltage Data1 input to the first data line DL1 is charged to the R2 subpixel.

In the G2 sub-pixel, the first electrode is connected to the fourth scan line GL4, the first electrode is connected to the second data line DL2, and the second electrode is connected to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the fourth scan line GL4, a first electrode is connected to the reference line Ref, and a second electrode is connected to the G2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G2 subpixel. When the fourth scan signal SCAN4 is input from the G2 subpixel to the fourth scan line GL4, the second data voltage Data2 input to the second data line DL2 is charged to the G2 subpixel.

In the B2 sub-pixel, the first electrode is connected to the third scan line GL3, the first electrode is connected to the second data line DL2, and the second electrode is connected to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the third scan line GL3, a first electrode is connected to the reference line Ref, and a second electrode is connected to the B2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the B2 subpixel. When the third scan signal SCAN3 is input from the B2 subpixel to the third scan line GL3, the second data voltage Data2 input to the second data line DL2 is charged to the B2 subpixel.

As described above, in the n-th horizontal line (n Line), the R1 subpixel and the G1 subpixel are DRD-driven by sharing the first data line DL1. The B1 subpixel is connected to the second data line DL2 and is normally driven. The first scan signal Scan1 and the second scan signals Scan1 and Scan2 are input to the n-th horizontal line (n Line).

In the n + 1th horizontal line (n + 1 Line), the R1 subpixel is connected to the data line DL1 and is normally driven. The G1 subpixel and the B1 subpixel share the second data line DL2 and are DRD driven. The third and fourth scan signals Scan1 and Scan2 are input to the n + 1th horizontal line (n + 1 Line).

Referring to FIG. 6, the pixel array of the present embodiment uses the n th and n + 1 th scans using the first to fourth scan signals Scan1 to Scan4 during a two line period (2 HT) in which data is input to two lines. Data can be entered on a horizontal line.

When the first scan signal Scan1 is input at a high level, the TFT connected to the R1 subpixel and the TFT connected to the B1 subpixel are turned on. Accordingly, the R1 subpixel is connected to the first data line DL1 to receive a data voltage, and the B1 subpixel is connected to the second data line DL2 to receive a data voltage.

When the second scan signal Scan2 is input at a high level, the TFT connected to the G1 subpixel is turned on. The G1 subpixel is connected to the first data line DL1 to receive a data voltage. Here, when the second scan signal Scan2 is input, the fourth scan signal Scna4 is simultaneously output. When the fourth scan signal Scan4 is input, the TFT connected to the G2 subpixel is turned on. The G2 subpixel is connected to the second data line DL2 to receive a data voltage.

When the third scan signal Scan3 is input at a high level, the TFT connected to the R2 subpixel and the TFT connected to the B2 subpixel are turned on. Accordingly, the R2 subpixel is connected to the first data line DL1 to receive a data voltage, and the B2 subpixel is connected to the second data line DL2 to receive a data voltage.

As described above, the present invention is applied to two lines when the first scan signal (Scan1) output period, the second and fourth scan signals (Scan2, Scan 4) output period, and the third scan signal (Scan3) output period are completed. Data voltage can be supplied. In contrast, in order to supply data voltage to two lines, four scan signals were sequentially output four times, whereas the present invention only takes three scan signal output times, so the driving propulsion number is improved by about 1.3 times. You can. In addition, since all of the first data line DL1 and the second data line DL2 are used during all scan signal output periods, the scan signal Scan can be efficiently driven.

7 is a diagram illustrating a pixel array of a display device according to a second embodiment of the present invention, and FIG. 8 is a driving waveform diagram of the pixel array of FIG. 7.

In the second embodiment of the present invention, in the configuration of the pixel array of the first embodiment, one of the scan signals outputted simultaneously among the scan signals of the n line and the scan signals of the n + 1 line (n + 1 Line) is one. Supply through the scan line. That is, in the second embodiment, a structure in which n lines and n + 1 lines share a scan line.

7 is a circuit diagram showing a part of a pixel array as a second embodiment of the pixel array.

The pixel array includes data lines DL1 to DL2 and scan lines GL1 to GL3 intersecting the data lines DL1 to DL2. The sub-pixels R1 to R2, G1 to G2, and B1 to B2 control connection with the data lines DL1 to DL2 according to the scan signals Scan1 to Scan3 input to the scan lines GL1 to GL3. It includes a first TFT (T1), a second TFT (T2) controlling the connection with the reference (Ref) line, and a third TFT (T3) controlling the connection with the first power line (EVDD).

R1 subpixels, G1 subpixels, and B1 subpixels are arranged on the n-th horizontal line (n Line) of the pixel array.

In the R1 subpixel, the first TFT (T1) has a gate electrode connected to the first scan line (GL1), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the second scan line (GL2), a first electrode is connected to the reference line (Ref), and a second electrode is connected to the R1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the R1 subpixel. When the first scan signal SCAN1 is input to the first scan line GL1 from the R1 subpixel, the first data voltage Data1 input to the first data line DL is charged to the R1 subpixel.

In the G1 subpixel, the first TFT (T1) has a gate electrode connected to the second scan line (GL2), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the second scan line (GL2), a first electrode is connected to the reference line (Ref), and a second electrode is connected to the G1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G1 subpixel. When the second scan signal SCAN2 is input from the G1 subpixel to the second scan line GL2, the first data voltage Data1 is charged to the G1 subpixel.

In the B1 subpixel, the first TFT (T1) has a gate electrode connected to the first scan line (GL1), a first electrode connected to the second data line (DL2), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the first scan line GL1, a first electrode is connected to the reference line Ref, and a second electrode is connected to the B1 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G1 subpixel. When the first scan signal SCAN1 is input to the first scan line GL1 from the B1 subpixel, the second data voltage Data2 input to the second data line DL2 is charged to the B1 subpixel.

R2 subpixels, G2 subpixels, and B2 subpixels are arranged on the n + 1th horizontal line (n + 1 Line) of the pixel array.

In the R2 subpixel, the first TFT (T1) has a gate electrode connected to the third scan line (GL3), a first electrode connected to the first data line (DL1), and a second electrode to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the third scan line GL3, a first electrode is connected to the reference line Ref, and a second electrode is connected to the R2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the R2 subpixel. When the third scan signal SCAN3 is input to the third scan line GL3 from the R2 subpixel, the first data voltage Data1 input to the first data line DL1 is charged to the R2 subpixel.

The G2 subpixel shares the second scan line GL2 with the G1 subpixel. In the G2 sub-pixel, the first electrode is connected to the second scan line GL2, the first electrode is connected to the second data line DL2, and the second electrode is connected to the gate electrode of the third TFT (T3). Connected. In the second TFT (T2), a gate electrode is connected to the second scan line (GL2), a first electrode is connected to the reference line (Ref), and a second electrode is connected to the G2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the G2 subpixel. The second data voltage Data2 from which the second scan signal SCAN2 is input to the second data line DL2 to the second scan line GL2 from the G2 subpixel is charged to the G2 subpixel.

In the B2 sub-pixel, the first electrode is connected to the third scan line GL3, the first electrode is connected to the second data line DL2, and the second electrode is connected to the gate electrode of the third TFT (T3). It is connected. In the second TFT (T2), a gate electrode is connected to the third scan line GL3, a first electrode is connected to the reference line Ref, and a second electrode is connected to the B2 subpixel. In the third TFT (T3), the gate electrode is connected to the second electrode of the first TFT (T1), the first electrode is connected to the first power line (EVDD), and the second electrode is connected to the B2 subpixel. When the third scan signal SCAN3 is input from the B2 subpixel to the third scan line GL3, the second data voltage Data2 input to the second data line DL2 is charged to the B2 subpixel.

As described above, in the n-th horizontal line (n Line), the R1 subpixel and the G1 subpixel are DRD-driven by sharing the first data line DL1. The B1 subpixel is connected to the second data line DL2 and is normally driven.

In the n + 1th horizontal line (n + 1 Line), the R1 subpixel is connected to the data line DL1 and is normally driven. The G1 subpixel and the B1 subpixel share the second data line DL2 and are DRD driven.

The first scan signal Scan1 is input to the nth horizontal line (n Line), and the third scan signal Scan3 is input to the n + 1th horizontal line (n + 1 Line). Also, the second scan signal Scan2 shared by the n-th horizontal line (n Line) and the n + 1-th horizontal line (n + 1 Line) is input.

Referring to FIG. 8, in the pixel array of the present embodiment, data may be input to n-th and n + 1-th horizontal lines using the first to third scan signals Scan1 to Scan3.

When the first scan signal Scan1 is input at a high level, the TFT connected to the R1 subpixel and the TFT connected to the B1 subpixel are turned on. Accordingly, the R1 subpixel is connected to the first data line DL1 to receive a data voltage, and the B1 subpixel is connected to the second data line DL2 to receive a data voltage.

When the third scan signal Scan3 is input at a high level, the TFT connected to the R2 subpixel and the TFT connected to the B2 subpixel are turned on. Accordingly, the R2 subpixel is connected to the first data line DL1 to receive a data voltage, and the B2 subpixel is connected to the second data line DL2 to receive a data voltage.

The second scan signal Scan2 is shared by the n-th and n + 1-th horizontal lines. When the second scan signal Scan2 is input at a high level, the TFT connected to the G1 subpixel and the TFT connected to the G2 subpixel are turned on. The G1 subpixel is connected to the first data line DL1 to receive a data voltage, and the G2 subpixel is connected to the second data line DL2 to receive a data voltage.

As described above, according to the second embodiment of the present invention, data voltages can be supplied to two lines using three scan signals Scan1 to Scan3. Therefore, the number of scan signal lines can be reduced. In addition, compared to the time required to output 4 scan signals sequentially 4 times in order to supply the data voltage to the existing 2 lines, the present invention only takes 3 scan signal output times, so the driving frequency is improved by about 1.3 times. Can be. In addition, since all of the first data line DL1 and the second data line DL2 are used during all scan signal output periods, the scan signal Scan can be efficiently driven.

9 to 11 are simulation results of a method of driving a display device according to an exemplary embodiment of the present invention.

9 and 10 are graphs of simulation results of driving frequencies of a display device according to an exemplary embodiment of the present invention, and are simulation results of applying the driving method of the present invention to a 31.5 "UHD display panel to which 3T1C pixels are applied.

The graph of FIG. 9 is a graph of a simulation result of a driving frequency that satisfies a 90% luminance attainment rate in the first frame when a scan signal is input. The horizontal axis represents the driving frequency, and the vertical axis is the ΔIoled value. Here, ΔIoled = 1st frame current / 4th frame current x 100% can be calculated by the formula.

According to an embodiment of the present invention, only 3 scan signal output times are required during a period of 2HT for supplying data voltages to 2 lines. Therefore, one color can be driven for 2 / 3HT, and as a result, the data charging time can be increased by 1.3 times. Thus, as shown in the graph of FIG. 9, it was confirmed that the driving frequency is also increased by 1.3 times at 151 Hz, compared to the conventional 115 HZ.

10 is a graph showing a simulation result of a driving frequency of a pixel array according to an embodiment of the present invention in a state optimized for high-speed driving by applying an IC option or the like for high-speed driving.

In a state optimized for high-speed driving, the driving speed of the conventional display device can also be increased to 161 Hz. On the other hand, according to the embodiment of the present invention, it was confirmed that the driving speed is increased to 208 Hz.

11 and 12 are graphs of a result of simulating the size of a PPI and a bezel that can be implemented when a pixel array is configured according to the second embodiment of the present invention, and the present invention is applied to a 31.5 "UHD display panel to which 3T1C pixels are applied. These are the results of applying the pixel structure of.

The graph of FIG. 11 is a graph showing the maximum PPI that can be obtained when the pixel array is configured to reduce the number of scan lines according to the second embodiment of the present invention.

The second embodiment of the present invention has a structure in which n lines and n + 1 lines share a scan line. Thus, while four scan signal lines were previously required to input data on two horizontal lines, applying the present invention allows data to be input on two horizontal lines as three scan signal lines. As such, as one scan signal per two horizontal lines decreases, the maximum PPI increases when designing a pixel in a design rule. As illustrated in FIG. 11, a decrease of the scan line signal may increase about 10 PPI, which is an increase of about 5% over the entire PPI.

When the number of scan lines is reduced, the GIP structure for outputting the scan signal is also changed. That is, the existing GIP outputs the scan signals as four scan signal lines per two horizontal lines, but when applying the present invention, the scan signals can be output as three scan signal lines. As described above, as one scan signal per two horizontal lines decreases, the size of the left / right bezel on which the GIP is formed may also be reduced. As shown in FIG. 12, the size of the left / right bezel can be reduced by about 0.4 mm by changing the GIP structure, which is reduced by about 10% based on the size of the entire bezel.

As described above, the present invention includes a DRD driving pixel and a normal driving pixel together in one panel, and the DRD driving pixels share different data lines on the nth line and the n + 1th line. By such a configuration, it is possible to prevent occurrence of luminance deviation between sub-pixels of the same color. In addition, according to an embodiment of the present invention, any one of the DRD driving pixels shares one scan line in the nth line and the n + 1th line. With this configuration, while four scan signals per two horizontal lines were previously required, data can be supplied to two horizontal lines within the three scan signal output periods and the scan signal line can also be reduced when applying the present invention. As a result, the driving frequency can be increased, the PPI increases, and the bezel size decreases.

The embodiments of the present invention have been described above with reference to the accompanying drawings, but the technical configuration of the present invention described above is in other specific forms without changing the technical spirit or essential features of the present invention by those skilled in the art to which the present invention pertains. It will be understood that it can be practiced. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the claims below, rather than the detailed description. In addition, all modifications or variations derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention.

110: image processing unit 120: timing control unit
130: scan driver 140: data driver
150: display panel 1 180: power supply

Claims (12)

A first sub-pixel group including a pair of sub-pixels arranged horizontally adjacent to share a data line with each other; And
A second subpixel group including subpixels that do not share a data line,
A display device including a first subpixel group included in an nth (n> 1) horizontal line and a first subpixel group included in an n + 1th horizontal line, each having a display panel sharing a different data line. According to claim 1,
The second sub-pixel group,
A display device in which second sub-pixel groups included in the n-th horizontal line and second sub-pixel groups included in the n + 1-th horizontal line share different data lines. According to claim 1,
In the horizontal line, subpixels are arranged in units of three subpixels including a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel, and one neighboring one of the three subpixels A display device in which a pair of subpixels is the first subpixel group and the other subpixel is the second subpixel group. According to claim 3,
In the n-th horizontal line, the red (R) subpixel and the green (G) subpixel share a first data line, and the blue (B) subpixel is connected to a second data line,
In the n + 1th horizontal line, the red (R) subpixel is connected to the first data line, and the green (G) subpixel and the blue (B) subpixel share the second data line. Device. According to claim 4,
A scan driver supplying a scan signal; And
And a data driver supplying a data voltage to the data line,
When the scan signal is input, two sub-pixels among the three sub-pixels included in the n-th horizontal line and three sub-pixels included in the n + 1-th horizontal line are selected,
The data driving unit is a display device that supplies a corresponding data voltage to a first data line and a second data line respectively connected to two subpixels to which the scan signal is input. The method of claim 5,
Subpixels of the same color among subpixels included in the first subpixel group of the nth horizontal line and subpixels included in the first subpixel group of the n + 1th horizontal line are selected in the same scan signal section A display device that receives data voltages from respective data lines. The method of claim 5,
Subpixels of the same color among subpixels included in the first subpixel group of the n-th horizontal line and subpixels included in the first subpixel group of the n + 1th horizontal line indicate the same scan signal is input. Device. The method of claim 5,
When a first scan signal is input, a subpixel connected to the first data line and a subpixel connected to the second data line among subpixels included in the n-th horizontal line are respectively selected to receive a corresponding data voltage,
When a second scan signal is input, a subpixel connected to the first data line and a subpixel connected to the second data line among subpixels included in the n + 1th horizontal line are respectively selected to receive a corresponding data voltage,
When a third scan signal is input, a subpixel not supplied with a data voltage among subpixels included in the nth horizontal line and a subpixel included in the n + 1th horizontal line are not supplied with data voltage. A display device in which a subpixel is selected and supplied with a data voltage through the first data line and the second data line connected to the subpixel. The method of claim 8,
The scan line to which the third scan signal is input is a display device that is shared between subpixels included in the n-th horizontal line and subpixels included in the n + 1th horizontal line. A display device including a data driver supplying data voltage to data lines, a scan driver supplying scan signals to scan lines, and a display panel arranged in a matrix type and connected to the data line and scan lines. In the driving method of,
When a first scan signal is input, a sub connected to a first data line among red (R) subpixels, green (G) subpixels, and blue (B) subpixels included in the n (n> 1) th horizontal line of the display panel Selecting a pixel and a subpixel connected to the second data line to supply data voltages respectively;
When the second scan signal is input, a subpixel connected to the first data line among the red (R) subpixel, green (G) subpixel, and blue (B) subpixel included in the n + 1 th horizontal line and the second data Selecting subpixels connected to a line to supply data voltages respectively; And
When a third scan signal is input, a subpixel not supplied with a data voltage among subpixels included in the nth horizontal line and a subpixel not supplied with a data voltage among subpixels included in the n + 1th horizontal line are selected. And supplying corresponding data voltages through the first data line and the second data line, respectively. The method of claim 10,
In the horizontal line, subpixels are arranged in units of three subpixels including a red (R) subpixel, a green (G) subpixel, and a blue (B) subpixel,
A first subpixel group including a pair of subpixels that share a data line among the three subpixels; And a second sub-pixel group including sub-pixels that do not share a data line. The method of claim 11,
A method of driving a display device including a first sub-pixel group included in the n-th horizontal line and a first sub-pixel group included in the n + 1-th horizontal line including a display panel sharing different data lines.

Images