KR20200025724A - Light Emitting Display Device and Manufacturing Method thereof - Google Patents

Abstract

The present invention provides an electroluminescent display device including a bottom substrate, sub-pixels, and an encapsulation layer, wherein the encapsulation layer has a first color filter layer, a second color filter layer, and an inorganic film therebetween. The bottom substrate has a transistor portion. The sub-pixels have light-emitting diodes positioned on a transistor portion. The inorganic film is disposed between the first color filter layer and the second color filter layer to prevent moisture penetration of the encapsulation layer and also prevents color mixing by blocking the light projected to the surrounding sub-pixels.

Description

Light Emitting Display Device and Manufacturing Method

The present invention relates to an electroluminescent display and a method of manufacturing the same.

With the development of information technology, the market for a display device, which is a connection medium between a user and information, is growing. Accordingly, the use of various types of display devices such as electroluminescent display devices, liquid crystal display devices, and plasma display devices is increasing.

The display device includes a display panel including a plurality of subpixels, a driver for driving the display panel, a power supply unit for supplying power to the display panel, and the like. The driver includes a scan driver that supplies a scan signal (or a gate signal) to the display panel, and a data driver that supplies a data signal to the display panel.

When the scan signal, the data signal, and the like are supplied to the subpixels, the electroluminescent display device can display an image by emitting light from the light emitting diodes of the selected subpixel. The light emitting diode is implemented based on organic material or based on inorganic material.

The EL display device displays an image based on light generated from a light emitting diode included in a subpixel, and thus has a variety of advantages, such as being highlighted as a next generation display device. However, the conventionally proposed electroluminescent display device has a problem in that the aperture ratio must be improved while lowering the current leakage of the light emitting diode in order to realize super high resolution.

The present invention for solving the above problems of the background art is to provide a structure that can exhibit excellent electrical characteristics while having a high opening ratio to be suitable for the implementation of ultra-high resolution.

In addition, by minimizing the gap between the lower electrode layer and the color filter to prevent color mixing, by starting the inorganic film between the plurality of stacked color filter layers, it is possible to improve the sealing function to prevent the penetration of moisture and the like. In addition, the application of a plurality of color filter layers may improve color purity and prevent light leakage to adjacent subpixels.

The present invention provides an electroluminescent display device including a transistor unit, a lower insulating layer, a planarization layer, a connection electrode layer, a sacrificial layer, a lower electrode layer, and an upper electrode layer. The transistor unit is located on the lower substrate. The lower insulating layer is located on the transistor portion. The planarization layer has a contact hole disposed on the lower insulating layer and partially exposing the electrodes of the transistor unit. The connection electrode layer is positioned on the top surface of the planarization layer and the contact hole. The sacrificial layer exposes a portion of the connection electrode layer on the top surface of the planarization layer and defines a light emitting area. The lower electrode layer is positioned on the connection electrode layer exposed through the sacrificial layer and spaced apart from the sacrificial layer. The organic light emitting layer is positioned on the sacrificial layer and the lower electrode layer. The upper electrode layer is located on the organic light emitting layer.

An end of the lower electrode layer may have a positive tapered shape.

An end of the lower electrode layer may have a positive tapered shape, and the taper angle may not exceed 45 °.

An end of the lower electrode layer and an end of the sacrificial layer may have shapes facing each other.

The sacrificial layer may have a flat surface adjacent to the stepped portion of the sacrificial layer covering the end of the lower electrode layer. The flat surface of the sacrificial layer may be lower than the flat surface of the lower electrode layer.

The contact hole may provide a passage that helps electrical connection between the electrode of the transistor unit and the lower electrode layer.

The contact hole may be positioned at upper and lower boundary regions between the subpixels disposed on the lower substrate, and the upper and lower boundary regions between the subpixels may be defined as regions in which scan lines are arranged as non-display regions.

The subpixels may further include pattern holes formed in a closed curve shape so as to surround all the outer regions where the lower electrode layer is not formed.

In the pattern hole, the lower electrode layer, the organic light emitting layer, and the upper electrode layer are disposed therein, and the thicknesses of the lower electrode layer, the organic light emitting layer, and the upper electrode layer are located in the pattern hole. It may be thinner than the thickness of.

An encapsulation layer may be positioned on the upper electrode layer. The encapsulation layer can prevent damage to the organic light emitting layer due to external impact and moisture. The encapsulation layer includes a metal oxide layer in contact with the upper electrode layer, a first inorganic layer, a first color filter layer in contact with the first inorganic layer, a second inorganic layer disposed on the first color filter layer, and a second color disposed on the second inorganic layer. The filter layer may include a third inorganic layer disposed on the second color filter layer.

The refractive indices of the first to third inorganic layers and the first to second color filter layers may be different. The refractive index of each of the first to second color filter layers adjacent to each of the first to third inorganic layers may have a difference of 0.1 or less.

The thickness of the first color filter layer may be equal to the thickness of the second color filter layer or greater than the thickness of the second color filter layer.

The metal oxide layer and the first inorganic layer may be formed along a profile of the upper electrode layer. The lower surface of the first color filter layer may be formed along a profile generated in the lower structure. An upper surface of the first color filter layer may have a flat shape. That is, the first color filter layer may have different thicknesses according to positions by lower structures such as an upper electrode layer, a sacrificial layer, and a pattern hole.

The first color filter layer may have a first protrusion protruding from the contact hole toward the connection electrode layer. The first color filter layer may further have a second protrusion protruding toward the substrate from the upper portion of the pattern hole.

The height of the second protrusion may be greater than the height of the first protrusion.

In another aspect, the present invention provides an electroluminescent display device including a lower substrate having a transistor portion, subpixels having a light emitting diode positioned on the transistor portion, and a contact hole for assisting electrical connection between an electrode of the transistor portion and an electrode of the light emitting diode. It provides a method of manufacturing. A method of manufacturing an electroluminescent display device includes forming a lower insulating layer on a transistor portion, forming a planarization layer having a contact hole exposing a part of an electrode of the transistor portion on the lower insulating layer, and contacting an upper surface of the planarization layer. Forming a connection electrode layer disposed in the hole and electrically connecting the electrode of the transistor unit to the electrode of the light emitting diode; forming a sacrificial layer covering the connection electrode layer on the planarization layer; forming a separation layer on the sacrificial layer, and separating Removing a portion of the layer and the sacrificial layer to expose the connection electrode layer, forming a lower electrode layer on the separation layer and the exposed connection electrode layer, removing the separation layer to expose the sacrificial layer and the lower electrode layer, the sacrificial layer and Forming an organic light emitting layer on the lower electrode layer, and forming an upper electrode layer on the organic light emitting layer, encapsulating on the upper electrode layer Forming an encapsulation layer, forming a metal oxide layer in contact with the upper electrode layer and a first inorganic layer along a profile of the upper electrode layer, and forming a first color filter layer on the first inorganic layer. And forming a second inorganic film on the first color filter layer, forming a second color filter layer on the second inorganic film, and forming a third inorganic film on the second color filter layer.

 The lower electrode layer is spaced apart from the sacrificial layer by the undercut structure of the separation layer.

An end of the lower electrode layer and an end of the sacrificial layer may have a positive tapered shape.

According to the present invention, an aperture ratio can be improved while lowering current leakage of a light emitting diode based on a self-aligned bankless structure of a lower electrode layer and a contact hole structure disposed at an outer side of a subpixel region. In addition, the present invention has the effect of providing a structure that can exhibit excellent electrical properties while having a high opening ratio to be suitable for the ultra-high resolution. In addition, by minimizing the gap between the lower electrode layer and the color filter to prevent color mixing, by starting the inorganic film between the plurality of stacked color filter layers, it is possible to improve the sealing function to prevent the penetration of moisture and the like. In addition, color purity may be improved by applying a plurality of color filter layers.

1 is a schematic block diagram of an organic light emitting display device.
2 is a schematic circuit diagram of a subpixel;
3 is an exemplary circuit configuration in which a part of FIG. 2 is embodied.
4 illustrates a cross-sectional view of a display panel.
5 is a schematic plan view of a subpixel for implementing an organic light emitting display device according to an embodiment of the present invention;
FIG. 6 is a cross-sectional view of region A1-A2 of FIG. 5; FIG.
FIG. 7 is a cross-sectional view of the region B1-B2 of FIG. 5. FIG.
8 is a cross-sectional view illustrating a method of forming an organic light emitting layer and an upper electrode layer according to an exemplary embodiment of the present invention.
9 is a view for explaining an experimental result with respect to a design value and a process value for a bank layer.
10 is a view for comparing the aperture ratio of the embodiment compared to the prior art.
FIG. 11 is a view showing experimental samples of a change in current amount according to the size of the anode electrode and the taper angle of the anode electrode end;
12 to 14 are graphs showing simulation results showing changes in current amount for each experimental sample of FIG. 11.
15 is a plan view and a cross-sectional photograph of a contact hole according to an embodiment of the present invention.
16 is an exemplary view illustrating an overlapping view between a connection electrode layer and a lower electrode layer according to another embodiment.
17 to 23 are schematic process cross-sectional views of sub-pixels for implementing an organic light emitting display device according to an embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings, the specific content for the practice of the present invention will be described.

The EL display device described below may be implemented as a television, a video player, a personal computer (PC), a home theater, a smartphone, a virtual reality device (VR), and the like. The electroluminescent display described below will be described as an example of an organic light emitting display device implemented based on an organic light emitting diode (light emitting device). However, the electroluminescent display described below may be implemented based on an inorganic light emitting diode.

1 is a schematic block diagram of an organic light emitting display device, FIG. 2 is a schematic circuit diagram of a subpixel, FIG. 3 is an exemplary circuit diagram illustrating a part of FIG. 2, and FIG. 4 is a diagram of a display panel. Illustrated cross section.

As illustrated in FIG. 1, the organic light emitting display device includes a timing controller 180, a data driver 130, a scan driver 140, a display panel 110, and a power supply 160.

The timing controller 180 receives a data signal DATA and a driving signal including a data enable signal, a vertical sync signal, a horizontal sync signal, a clock signal, and the like from the image processor (not shown). The timing controller 180 controls the gate timing control signal GDC for controlling the operation timing of the scan driver 140 and the data timing control signal DDC for controlling the operation timing of the data driver 130 based on the driving signal. Outputs

The data driver 130 samples and latches the data signal DATA supplied from the timing controller 180 in response to the data timing control signal DDC supplied from the timing controller 180 to convert the digital data signal to the gamma reference voltage. Converts to an analog data signal (or data voltage) and outputs it. The data driver 130 outputs the data signal DATA through the data lines DL1 to DLn. The data driver 130 may be formed in the form of an integrated circuit (IC).

The scan driver 140 outputs a scan signal in response to the gate timing control signal GDC supplied from the timing controller 180. The scan driver 140 outputs a scan signal through the scan lines GL1 to GLm. The scan driver 140 is formed in the form of an integrated circuit (IC) or a gate in panel method (a method of forming a transistor in a thin film process) on the display panel 110.

The power supply unit 160 outputs a high potential voltage and a low potential voltage. The high potential voltage, the low potential voltage, and the like output from the power supply unit 160 are supplied to the display panel 110. The high potential voltage is supplied to the display panel 110 through the first power line EVDD and the low potential voltage is supplied to the display panel 110 through the second power line EVSS.

The display panel 110 displays an image based on the data signal DATA supplied from the data driver 130, the scan signal supplied from the scan driver 140, and the power supplied from the power supply 160. The display panel 110 includes subpixels SP that operate to display an image and emit light.

The subpixels SP include a red subpixel, a green subpixel and a blue subpixel or include a white subpixel, a red subpixel, a green subpixel, and a blue subpixel. The subpixels SP may have one or more different light emitting areas according to light emission characteristics.

As shown in FIG. 2, one subpixel is positioned at an intersection of the data line DL1 and the scan line GL1, and the programming unit SC sets the gate-source voltage of the driving transistor DR. ) And an organic light emitting diode (OLED).

Transistors constituting the subpixel may be implemented in p type or n type. In addition, the semiconductor layer of the transistors constituting the subpixel may include amorphous silicon, polysilicon, or an oxide. The organic light emitting diode OLED includes an anode ANO, a cathode CAT, and an organic light emitting layer interposed between the anode ANO and the cathode CAT. The anode ANO is connected to the driving transistor DR.

The programming unit SC may include at least one switching transistor and at least one capacitor. The switching transistor is turned on in response to the scan signal from the scan line GL1 to apply the data voltage from the data line DL1 to one electrode of the capacitor. The driving transistor DR adjusts the amount of light emitted from the organic light emitting diode OLED by controlling the amount of current according to the magnitude of the voltage charged in the capacitor. The amount of light emitted from the organic light emitting diode OLED is proportional to the amount of current supplied from the driving transistor DR. In addition, the subpixel is connected to the first power supply line EVDD and the second power supply line EVSS, and receives a high potential voltage and a low potential voltage from them.

As shown in FIG. 3A, the subpixel includes the internal compensation circuit CC as well as the switching transistor SW, the driving transistor DR, the capacitor Cst, and the organic light emitting diode OLED described above. can do. The internal compensation circuit CC may include one or more transistors connected to the compensation signal line INIT. The internal compensation circuit CC sets the gate-source voltage of the driving transistor DR to a voltage at which the threshold voltage is reflected, thereby changing luminance due to the threshold voltage of the driving transistor DR when the organic light emitting diode OLED emits light. Exclude. In this case, the scan line GL1 includes at least two scan lines GL1a and GL1b to control the transistors of the switching transistor SW and the internal compensation circuit CC.

As shown in FIG. 3B, the subpixel may include a switching transistor SW1, a driving transistor DR, a sensing transistor SW2, a capacitor Cst, and an organic light emitting diode OLED. The sensing transistor SW2 is a transistor that may be included in the internal compensation circuit CC and performs a sensing operation to compensate for the subpixel.

The switching transistor SW1 serves to supply the data voltage supplied through the data line DL1 to the first node N1 in response to the scan signal supplied through the first scan line GL1a. The sensing transistor SW2 initializes or senses the second node N2 positioned between the driving transistor DR and the organic light emitting diode OLED in response to the sensing signal supplied through the second scan line GL1b. It plays a role.

On the other hand, the circuit configuration of the sub-pixel introduced in FIG. 3 is only for understanding. That is, the circuit configuration of the subpixel of the present invention is not limited thereto, and may be variously configured as 2T (Capacitor) 1C (Capacitor), 3T1C, 4T2C, 5T2C, 6T2C, 7T2C, and the like.

As shown in FIG. 4, the display panel 110 includes a lower substrate 110a, an upper substrate 110b, a display area AA, a pad portion PAD, a sealing member 170, and the like. The lower substrate 110a may be selected from a transparent resin, glass, silicon, or the like, and the upper substrate 110b may be selected from a transparent resin, a glass inorganic film, or an organic film that may transmit light. The display area AA is composed of subpixels emitting light. The pad portion PAD is formed of pads for electrical connection with an external substrate.

The display area AA is disposed to occupy almost all surfaces of the lower substrate 110a, and the pad part PAD is disposed at one outer side of the lower substrate 110a. The display area AA is sealed by the sealing member 170 existing between the lower substrate 110a and the upper substrate 110b to be protected from moisture, oxygen, or the like. On the other hand, the pad part PAD is exposed to the outside. As another example of various sealing structures to which the present invention may be applied, the display area AA may be sealed by a sealing member 170 existing between the first substrate 110a and the second substrate 110b. Only the substrate 110a and the second substrate 110b may be sealed. However, since the sealing structure of the display panel 110 may be implemented in various ways, the present invention is not limited thereto.

The organic light emitting display device is classified into a bottom emission emitting light toward the lower substrate 110a and a top emission type emitting light toward the upper substrate 110b. However, the conventionally proposed organic light emitting display device has a problem that the aperture ratio should be improved while lowering the current leakage of the organic light emitting diode in order to realize the ultra high resolution.

FIG. 5 is a schematic plan view of a subpixel for implementing an organic light emitting display device according to an embodiment of the present invention, FIG. 6 is a cross-sectional view of an area A1-A2 of FIG. 5, and FIG. 7 is B1-B2 of FIG. 5. 8 is a cross-sectional view illustrating a method of forming an organic light emitting layer and an upper electrode layer according to an exemplary embodiment of the present invention.

As shown in FIGS. 5 and 6, the N-th subpixel SPn is formed in a bankless manner in which the bank layer is removed to improve the aperture ratio. The aperture ratio corresponds to the size (or area) of the light emitting area EMA that can emit light substantially in the area of the Nth subpixel SPn. The emission region EMA of the Nth subpixel SPn is defined by the sacrificial layer 120, not the bank layer. The remaining area except the light emitting area EMA is the non-light emitting area NEMA.

In addition, a contact hole CH is formed in the upper and lower boundary regions inside the N-th subpixel SPn. The upper and lower boundary regions between the subpixels are defined, for example, between the region of the N + 1th subpixel SPn + 1 and the region of the Nth subpixel SPn. The area between the N + 1th subpixel SPn + 1 and the Nth subpixel SPn corresponding to the upper and lower boundary areas between the subpixels is defined as a non-light emitting area, in which a scan line is normally disposed.

The contact hole CH is a path for electrical contact (electrical connection) between the transistor unit TFTA and the organic light emitting diode OLED. The contact hole CH may be disposed inside the N-th subpixel SPn, and as another example of the application of the present invention, the contact hole CH may be formed in the outer region of the light emitting region EMA to improve the aperture ratio. In order to improve the aperture ratio, it is more preferable to be formed to cover the upper and lower boundary regions between the subpixels in half. The contact hole CH has an example of a rectangular shape having a long vertical direction, but is not limited thereto. The outer region of the N-th subpixel SPn is defined as a non-light emitting region in which the lower electrode layer 122 of the organic light emitting diode OLED is not formed.

The electrode layer 116 of the driving transistor included in the transistor unit TFTA and the lower electrode layer 122 of the organic light emitting diode OLED are electrically connected to each other by a connection electrode layer 119 disposed therebetween. The structure of the driving transistor included in the transistor unit TFTA is very diverse. Therefore, the present invention briefly illustrates only the electrode layer 116 of the driving transistor, and the embodiment of the present invention will be described in more detail with reference to the cross-sectional structure of the N-th subpixel SPn.

On the lower substrate 110a, a transistor unit TFTA including a driving transistor and the like is positioned. The lower insulating layer 117 exposing the electrode layer 116 of the driving transistor is disposed on the transistor unit TFTA. The electrode layer 116 of the driving transistor is a source electrode or a drain electrode. The lower insulating layer 117 serves as a protective layer to protect the transistor unit TFTA.

The planarization layer 118 partially exposes the electrode layer 116 of the driving transistor on the lower insulating layer 117. The contact hole CH may be formed by an etching process after forming the lower insulating layer 117 and the planarization layer 118 to expose the electrode layer 116 of the driving transistor, but is not limited thereto.

The connection electrode layer 119 is positioned on the planarization layer 118. The connection electrode layer 119 is formed to be connected to the electrode layer 116 of the driving transistor positioned on the upper surface of the planarization layer 118 and positioned inside the contact hole CH. The connection electrode layer 119 is positioned to correspond to the contact hole CH and the light emitting region EMA. When the contact hole is formed to extend between the upper and lower boundary regions between the subpixels, the connection electrode layer 119 includes a portion located in the region of the Nth subpixel SPn and an region of the N + 1th subpixel SPn + 1. It may include a portion located in. The portion of the connection electrode layer 119 positioned in the region of the N + 1th subpixel SPn + 1 is more protruded to reduce process variation and contact resistance, but this is the light emitting region EMA of the Nth subpixel SPn. It may be formed so as to cover only a portion of the contact hole and a portion of the contact hole (CH).

The sacrificial layer 120 exposing a part of the connection electrode layer 119 is disposed on the planarization layer 118. The sacrificial layer 120 is formed to expose only a portion of the connection electrode layer 119 positioned on the top surface of the planarization layer 118 and cover all remaining regions including the contact hole CH. The lower electrode layer 122 is positioned on the connection electrode layer 119 exposed through the sacrificial layer 120. The lower electrode layer 122 is formed only on the connection electrode layer 119. The emission area EMA of the Nth subpixel SPn is defined as a portion of the connection electrode layer 119 exposed through the sacrificial layer 120 or a portion of the lower electrode layer 122 positioned on the connection electrode layer 119.

An end of the lower electrode layer 122 may have a positive tapered shape.

An end of the lower electrode layer 122 may have a positive tapered shape, and the taper angle may not exceed 45 °.

An end of the lower electrode layer 122 and an end of the sacrificial layer 120 may have shapes facing each other. An end of the lower electrode layer 122 and an end of the sacrificial layer 120 may be formed to be spaced apart from each other. In a general pixel structure, the pixel defining layer Bank positioned between adjacent lower electrode layers 122 is formed higher than the flat surface of the lower electrode layer 122, and in subsequent processes, a step due to the height of the pixel defining layer Bank is removed. An encapsulation layer is formed to fill.

However, when the color filter layer is formed in the encapsulation layer or on the encapsulation layer as in the present invention, when the distance between the color filter layer and the lower electrode layer is far, light may leak to the color filters of adjacent subpixels, causing mixed color. In order to prevent color mixing, it is necessary to minimize the distance between the color filter layer and the lower electrode layer.

In the structure of the present invention, the separation layer 121 is removed and the sacrificial layer 120 may have a flat surface adjacent to the stepped portion of the sacrificial layer covering the end of the lower electrode layer 122. The flat surface of the sacrificial layer 120 may be lower than the flat surface of the lower electrode layer 122. The flat surface portion of the sacrificial layer 120 existing between the subpixels is formed to be lower than the flat surface of the lower electrode layer 122, whereby steps of structures stacked on the sacrificial layer 120 and the lower electrode layer 122 are formed. Can be made smaller.

In other words, a metal oxide layer (not shown), a first inorganic layer 131, and a first color filter layer 132 formed along a step may be formed on the sacrificial layer 120 and the lower electrode layer 122. The distance that the first color filter layer 132 disposed on the flat surface of the 120 has from the substrate may be less than or equal to the distance that the first color filter layer 132 formed on the lower electrode layer 122 has from the substrate.

The organic emission layer 123 is positioned on the sacrificial layer 120 and the lower electrode layer 122. The organic emission layer 123 is formed to cover all of the display area of the lower substrate 110a. The organic light emitting layer 123 is formed in a structure including a light emitting layer and a functional layer (hole injection layer, hole transport layer, electron transport layer, electron injection layer, etc.) or a light emitting layer, a functional layer and a charge generating layer. The upper electrode layer 124 is positioned on the organic emission layer 123. The upper electrode layer 124 is formed to cover all of the organic emission layer 123.

The encapsulation layer 130 may be positioned on the upper electrode layer 124. The encapsulation layer can prevent damage to the organic light emitting layer due to external impact and moisture. The encapsulation layer is disposed on the metal oxide layer (not shown) in contact with the upper electrode layer, the first inorganic layer 131, and the first color filter layer 132 and the first color filter layer 132 in contact with the first inorganic layer 131. It may include a second inorganic layer 133, a second color filter layer 134 disposed on the second inorganic layer 133, and a third inorganic layer 135 disposed on the second color filter layer 134. have.

An upper layer of the upper electrode layer 124 is formed of a first diamond, a first color filter layer 132, and a second inorganic layer 133 including a metal oxide layer (not shown) and a first inorganic layer 131. The encapsulation layer may be configured to have a total of three layers of diamonds including a third diamond composed of two diamonds, a second color filter layer 134, and a third inorganic layer 135. Thus, damage to the organic light emitting layer due to moisture can be prevented.

When stacked with two or less diamonds, the probability of damage to the organic light emitting layer due to external moisture increases rapidly. Therefore, the structure of the electroluminescent display device requires stacking three or more diamonds. .

Light generated in the organic light emitting layer passes through each of the first to third inorganic layers 131, 133, 135 and the first and second color filter layers 132, 134 of the encapsulation layer, and may be trapped by the difference in refractive index between the layers and then lost to the side. For this purpose, the refractive indices of the first to third inorganic layers 131, 133, and 135 and the first and second color filter layers 132 and 134 may be different. Each of the first and second color filter layers 132 and 134 adjacent to each of the first to third inorganic layers may have a difference of 0.1 or less. By arranging adjacent layers to have a refractive index of 0.1 or less, the amount of light attenuated to the front and side can be reduced, and the light efficiency at the front can be improved.

Light generated by the organic light emitting layer 123 passes through the first color filter layer 132 and exhibits a color suitable for each subpixel. The light emitted from the organic light emitting layer 123 in the lateral direction may be transmitted to the color filters of adjacent subpixels, and may display colors different from those of the subpixels originally intended to be driven. The electroluminescent display device according to the present invention may include a first color filter layer ( Passed through the second color filter layer 134 of a different color from the 132.

The thickness of the first color filter layer 132 may be equal to the thickness of the second color filter layer 134 or greater than the thickness of the second color filter layer 134. Since the directing angle of light passing through the layer closer to the organic light emitting layer 123 has a smaller directing angle than light passing through the next layer, it may be more effective in preventing the mixing. In particular, since the first color filter layer 132 implements color and the second color filter layer 134 serves to prevent color mixing, the thickness of the second color filter layer 134 is the first color filter layer 132. It may be less than the thickness of.

The first color filter layer 132 and the second color filter layer 134 corresponding to the same subpixel may have the same color.

Through the configuration of the first color filter layer 132 and the second color filter layer 134 disposed with the second inorganic layer 133 interposed therebetween, side light leakage does not occur in a region between adjacent subpixels without a separate black matrix BM. It is possible to prevent color mixing due to. On the other hand, the lower electrode layer 122 is formed to be divided for each area of the sub-pixels. However, when the organic light emitting layer 123 is formed to cover all of the display areas without being divided by subpixels, the organic light emitting layer 123 serves as a path that causes current leakage of the organic light emitting diode OLED.

The Nth subpixel SPn forms a pattern hole LH recessed downward in the Nth subpixel SPn in order to improve aperture ratio and reduce current leakage of the organic light emitting diode OLED. The pattern hole LH is formed in a closed curve shape (or rectangular shape) so as to surround all the outer regions of the Nth subpixel SPn. The pattern hole LH is formed together with the contact hole CH. Therefore, the pattern hole LH is formed to eventually surround the boundary region of the subpixels.

As shown in FIG. 7, the pattern hole LH penetrates both the lower insulating layer 117 on the lower substrate 110a and the planarization layer 118 on the lower insulating layer 117. Is formed. That is, the pattern hole LH is formed to expose a portion of the transistor unit TFTA. However, this is just an example, and the pattern hole LH may be formed to expose a portion of the lower insulating layer 117 without penetrating the lower insulating layer 117.

The sacrificial layer 120, the organic emission layer 123, and the upper electrode layer 124 are all formed in the pattern hole LH. The pattern hole LH is small in size and has a deep and inclined internal structure. For this reason, the layers formed inside the pattern hole LH have a thin thickness compared to the layers formed outside the pattern hole LH. In addition, even when the sacrificial layer 120, the organic light emitting layer 123, and the upper electrode layer 124 are formed to have the same thickness, they have different thicknesses inside and outside the pattern hole LH due to the structural characteristics of the pattern hole LH. Is formed.

Since the organic light emitting layer 123 or the organic light emitting layer 123 and the upper electrode layer 124 have a region having a thin thickness by the pattern hole LH, a passage causing a current leakage between the subpixels can be narrowed. . Therefore, when the pattern hole LH is formed in the structure as shown in FIG. 6, the current leakage of the organic light emitting diode can be further lowered.

The metal oxide layer (not shown) and the first inorganic layer 131 may be formed along a profile of the upper electrode layer 124. The lower surface of the first color filter layer 132 may be formed along a profile generated from the lower structure. An upper surface of the first color filter layer 132 may have a flat shape. That is, the first color filter layer 132 may have different thicknesses according to positions due to lower structures such as an upper electrode layer, a sacrificial layer, and a pattern hole. Since the second color filter layer 134 is formed after planarization by the first color filter layer 132, the second color filter layer 134 may have the same thickness over the entire area.

The first color filter layer 132 may protrude from the upper portion of the contact hole toward the lower substrate to partially fill the contact hole. The first color filter layer may further have a second protrusion protruding from the upper portion of the pattern hole toward the lower substrate to partially fill the inside of the pattern hole.

Among the light emitted from the organic light emitting layer, light leaking to an area of an adjacent subpixel is filtered to pass only a portion of wavelengths as it passes through the first protrusion or the second protrusion and passes through a color filter. Passing through the first color filter layer or the second color filter layer may be completely cancelled.

Each of the first protrusions disposed on the contact hole or the first protrusions disposed on the pattern hole may prevent color mixing between the subpixels.

As shown in FIG. 8 (a), the embodiment of the present invention forms a separation layer 121 on the sacrificial layer 120, and patterns the separation layer 121 when it is patterned to expose the connection electrode layer 119. Under-cut is formed at the bottom. Due to the undercut structure, the separation layer 121 protrudes toward the inside of the light emitting region EMA compared to the sacrificial layer 120. The sacrificial layer 120 has a taper angle with a gentle end removed during the creation of the undercut.

As shown in FIG. 8B, after the lower electrode layer 122 is formed, all of the separation layers 121 are removed through a lift off process, and then the organic light emitting diode (OLED) deposition process is completed. The light emitting layer 123 and the upper electrode layer 124 are formed.

When the lower electrode layer 122 is formed based on the separation layer 121 having under-cut as shown in FIG. 8, the lower electrode layer 122 is self-aligned for each subpixel, and the connection electrode layer is formed. It is formed only on 119. The lower electrode layer 122 has a taper angle of an end (edge) adjacent to the sacrificial layer 120 by the separation layer 121. The lower electrode layer 122 is spaced apart from the sacrificial layer 120 defining the emission area EMA due to the structure of the isolation layer 121. That is, the end of the sacrificial layer 120 and the end of the lower electrode layer 122 has a gentle positive tapered shape.

In addition, due to the inclined structure of the contact hole CH, the thickness of the organic light emitting layer (organic material) positioned inside the contact hole CH is reduced, thereby reducing the current leakage problem. The taper angle at the end of the lower electrode layer 122 is related to the electrical characteristics of the organic light emitting diode, which will be described below.

Detailed description of the reason for forming the embodiment of the present invention as described above is as follows.

9 is a view for explaining the experimental results of the design value and the process value for the bank layer, Figure 10 is a view for comparing the aperture ratio of the embodiment compared to the prior art, Figure 11 is the size of the anode electrode and the taper angle of the anode electrode end 12 and 14 are graphs showing simulation results showing changes in current amount for each test sample of FIG. 11.

9 (a) is a design value, and FIG. 9 (b) shows a process value. As shown in FIG. 9, the anode electrode AN is formed on the organic substrate GLS and the bank layer BNK is formed therebetween. Ideally, there should be a deviation of L1 ≒ L3 and L2 나타나 L4 between the design and process values, but not L1 = L3 and L2 = L4.

However, there is a process deviation between the design value and the process value, as the actual process proceeds with deviations of L1 <L3 and L2 <L4. Due to such a problem, the bank layer-based process method is often difficult to improve the aperture ratio of the sub-pixel.

In contrast, the sacrificial layer and separation layer-based process method is capable of separating (pixelating) the lower electrode layer for each subpixel in a self-aligned manner. There are many advantages. That is, the sacrificial layer and the separation layer-based process method is easier to improve the aperture ratio than the bank layer-based process method when high resolution is implemented.

FIG. 10A illustrates a conventional subpixel structure, and FIG. 10B illustrates a subpixel structure according to an embodiment of the present invention. As shown in FIG. 10, the embodiment adopts the structure b based on the sacrificial layer 120 and the isolation layer 121, and changes the position of the contact hole CH to the boundary region of the subpixels. As a result, the embodiment has an advantage of further improving the size of the light emitting region EMA compared to the structure of the conventionally proposed bank layer BNK based a.

As described above, since the embodiment has a structure in which the area occupied by the contact hole can be used as the light emitting area with ease of pixelation, the size of the light emitting area EMA can be further improved.

In addition, the embodiment is capable of adjusting the size of the lower electrode layer and the taper angle of the lower electrode layer end based on the undercut structure provided by the sacrificial layer and the separation layer. Introducing the experimental sample related to this is as follows. However, the experiment introduced below is based on a passive organic light emitting diode (structure without a driving transistor) including only an anode electrode, an organic light emitting layer, and a cathode electrode.

Experimental samples (a to c) shown in FIG. 11 are passive organic light emitting diodes and include an anode (AN), an organic light emitting layer (EML), and a cathode electrode (CA) positioned on a glass substrate or a silicon substrate (GLS). Should be included. Experimental samples (a to c) of Figure 11 is a simplified view showing the structure used to determine the change in the amount of current according to the size of the anode electrode (AN) and the taper angle of the end of the anode (AN).

The widths of the anode electrodes AN of the test samples a to c have a relationship of L1> L2> L3. In the figure, only three test samples a to c are shown. However, the test sample further includes four samples having different taper angles at the end of the anode electrode (AN). At this time, the end taper angle of the anode (AN) was produced by 10 °, 30 °, 45 °, 90 °, respectively. And the results of simulation of the amount of current change for each experimental sample are as shown in FIGS. 12 to 14.

According to the test samples, the end taper angle of the anode electrode (AN) has a good result to improve the electrical properties of the organic light emitting diode having a 10 ° ~ 45 °. Therefore, the end of the anode (AN) has a positive tapered shape, it is preferable to form the tapered angle does not exceed 45 °.

The embodiment can adjust the size of the lower electrode layer and the taper angle of the lower electrode layer end. Therefore, referring to the structure of the embodiment and the above experimental example, the electrical characteristics of the organic light emitting diode may also be improved by optimizing the size of the lower electrode layer and the taper angle of the lower electrode layer end.

15 is a plan view and a cross-sectional view of a contact hole according to an embodiment of the present invention, Figure 16 is an illustration showing an overlapping view between the connection electrode layer and the lower electrode layer according to another embodiment.

The embodiment can reduce the thickness of the organic light emitting layer positioned in the contact hole due to its structural characteristics, thereby reducing the possibility of current leakage. The structure diagram showing this can be further described with reference to the contact hole CH shown in FIG. Will be clear. In addition, the embodiment can also adjust the overlapping area required for contact between the connection electrode layer and the lower electrode layer, which will be more apparent with reference to FIG.

FIG. 16A illustrates a contact structure in which the connection electrode layer 119 and the lower electrode layer 122 partially overlap (OVR). FIG. 16B illustrates a contact structure in which the connection electrode layer 119 and the lower electrode layer 122 overlap only half (OVR). In addition, FIG. 16C illustrates a contact structure in which the connection electrode layer 119 and the lower electrode layer 122 both overlap (OVR).

The overlap (OVR) relationship between the connection electrode layer 119 and the lower electrode layer 122 may vary depending on the electrical and optical properties of the electrode layer material used in the design. 16 (c) is advantageous in terms of improving the flatness as well as to further reduce the contact resistance compared to other structures.

Hereinafter, the manufacturing method according to the embodiment is as follows. However, the pattern hole portion may be formed by the same process as the contact hole, and this portion is omitted and referring to the description of FIG. 7.

17 to 22 are schematic cross-sectional views of sub-pixels for implementing an organic light emitting display device according to an exemplary embodiment of the present invention.

As illustrated in FIG. 17, a transistor unit TFTA including a driving transistor and the like is formed on the lower substrate 110a. The lower insulating layer 117 is formed on the transistor portion TFTA. The planarization layer 118 is formed on the lower insulating layer 117, and the contact hole CH is formed by etching a portion of the electrode layer 116 of the driving transistor to be exposed.

The connection electrode layer 119 is formed on the planarization layer 118. In this case, the connection electrode layer 119 is patterned to be connected to the electrode layer 116 of the driving transistor positioned on the upper surface of the planarization layer 118 and positioned inside the contact hole CH. As a result, the connection electrode layer 119 is positioned corresponding to the contact hole CH and the light emitting region EMA. The sacrificial layer 120 is formed on the planarization layer 118. The sacrificial layer 120 covers the connection electrode layer 119 and is formed on the planarization layer 118.

As shown in FIG. 18, an isolation layer 121 is formed on the sacrificial layer 120, and an etching process for exposing a region to be defined as a light emitting region EMA is performed. As shown in FIG. 19, an undercut UC is formed under the separation layer 121 by an etching process. The portion removed to provide the undercut UC under the separation layer 121 is the sacrificial layer 120. The sacrificial layer 120 is introduced into the separation layer 121 to expose the connection electrode layer 119 more broadly than the light emitting region EMA.

As shown in FIG. 20, the lower electrode layer 122 is formed on the separation layer 121. The lower electrode layer 122 is separated (pixelated) for each subpixel by the separation layer 121. The lower electrode layer 122 occupies only a region corresponding to the emission area EMA and is formed on the connection electrode layer 119.

As shown in FIG. 21, the separation layer 121 is removed. The separation layer 121 may be removed through a lift off process, but is not limited thereto. As the separation layer 121 is removed, the sacrificial layer 120 and the lower electrode layer 122 are exposed on the top layer of the lower substrate 110a.

As shown in FIG. 22, an organic emission layer 123 is formed on the sacrificial layer 120 and the lower electrode layer 122. The organic emission layer 123 is formed to cover all of the display area of the lower substrate 110a. The organic light emitting layer 123 is formed in a structure including a light emitting layer and a functional layer (hole injection layer, hole transport layer, electron transport layer, electron injection layer, etc.) or a light emitting layer, a functional layer and a charge generating layer. The upper electrode layer 124 is formed on the organic light emitting layer 123. The upper electrode layer 124 is formed to cover all of the organic emission layer 123.

The present invention can improve aperture ratio while lowering current leakage of a light emitting diode based on a self-aligned bankless structure of a lower electrode layer 122 and a contact hole structure disposed outside the subpixel region. It works. In addition, the present invention has the effect of providing a structure that can exhibit excellent electrical properties while having a high opening ratio to be suitable for the ultra-high resolution.

As shown in FIG. 23, an encapsulation layer 130 is formed on the upper electrode layer 124. The forming of the encapsulation layer 130 may include forming a metal oxide layer contacting the upper electrode layer 124 and a first inorganic layer 131 along a profile of the upper electrode layer 124, and the first inorganic layer 131. Forming a first color filter layer 132 on the upper side, forming a second inorganic layer 133 on the first color filter layer 132, and forming a second color filter layer 134 on the second inorganic layer 133. ), And forming a third inorganic layer 135 on the second color filter layer 134.

The lower surface of the first color filter layer 132 may be formed along a profile generated from the lower structure. An upper surface of the first color filter layer 132 may have a flat shape. That is, the first color filter layer 132 may have different thicknesses according to positions by lower structures such as the upper electrode layer 124, the sacrificial layer 120, and the pattern hole LH.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention described above may be modified in other specific forms by those skilled in the art to which the present invention pertains without changing its technical spirit or essential features. It will be appreciated that it may be practiced. Therefore, the exemplary embodiments described above are to be understood as illustrative and not restrictive in every respect. In addition, the scope of the present invention is represented by the following claims rather than the detailed description. Also, it is to be understood that all changes or modifications derived from the meaning and scope of the claims and the equivalent concepts shall be included in the scope of the present invention.

TFTA: transistor portion OLED: organic light emitting diode
CH: contact hole 117: lower insulating layer
118: planarization layer 119: connection electrode layer
120: sacrificial layer 121: separation layer
122: lower electrode layer 123: organic light emitting layer
124: upper electrode layer

Claims (12)

A transistor unit on the lower substrate;
A lower insulating layer on the transistor portion;
A planarization layer disposed on the lower insulating layer and having a contact hole partially exposing an electrode of the transistor unit;
A connection electrode layer positioned on an upper surface of the planarization layer and the contact hole;
A sacrificial layer exposing a portion of the connection electrode layer on an upper surface of the planarization layer and defining a light emitting area;
A lower electrode layer disposed on the connection electrode layer exposed through the sacrificial layer and spaced apart from the sacrificial layer;
An organic light emitting layer on the sacrificial layer and the lower electrode layer;
An upper electrode layer on the organic light emitting layer;
An encapsulation layer on the upper electrode layer;
The encapsulation layer includes a first inorganic layer, a first color filter layer, a second inorganic layer, a second color filter layer, and a third inorganic layer. The method of claim 1,
An electroluminescent display device having an end portion of the lower electrode layer having a positive tapered shape. The method of claim 1,
An end of the lower electrode layer is
An electroluminescent display device having a shape facing the ends of the sacrificial layer. The method of claim 1,
An end of the lower electrode layer is
And an electroluminescent display device spaced apart from the end of the sacrificial layer. The method of claim 1,
The contact hole is
An electroluminescent display device providing a passage to assist the electrical connection between the electrode of the transistor portion and the lower electrode layer. The method of claim 1,
The planarization layer is
And a pattern hole formed in the shape of a closed curve so as to surround all the outer regions where the lower electrode layer is not formed. The method of claim 6,
The pattern hole is
The sacrificial layer, the organic light emitting layer and the upper electrode layer is located therein,
The thickness of the sacrificial layer, the organic light emitting layer and the upper electrode layer positioned inside the pattern hole is less than the thickness of the sacrificial layer, the organic light emitting layer and the upper electrode layer located on the upper surface of the planarization layer. The method of claim 1,
The first color filter layer has a thickness greater than that of the second color filter layer. The method of claim 6,
The first color filter layer is
A first protrusion protruding from an upper portion of the contact hole toward the lower substrate; And
And a second protrusion protruding from the upper portion of the pattern hole toward the lower substrate. The method of claim 9
The height of the second protrusion is higher than the height of the first protrusion. The method of claim 1
And a refractive index difference between the refractive index of the first color filter layer and the second inorganic layer is 0.1 or less. Forming a lower insulating layer on the transistor unit;
Forming a planarization layer on the lower insulating layer, the planarization layer having a contact hole partially exposing an electrode of the transistor unit;
Forming a connection electrode layer on an upper surface of the planarization layer and the contact hole and electrically connecting an electrode of the transistor unit to an electrode of a light emitting diode;
Forming a sacrificial layer covering the connection electrode layer on the planarization layer;
Forming a separation layer on the sacrificial layer and exposing the connection electrode layer by removing the separation layer and a part of the sacrificial layer;
Forming a lower electrode layer on the separation layer and the exposed connection electrode layer;
Removing the separation layer to expose the sacrificial layer and the lower electrode layer;
Forming an organic emission layer on the sacrificial layer and the lower electrode layer;
Forming an upper electrode layer on the organic light emitting layer; And
Forming an encapsulation layer on the upper electrode layer;
Forming the encapsulation layer is
Forming a metal oxide layer and a first inorganic layer in contact with the upper electrode layer along a profile of the upper electrode layer;
Forming a first color filter layer on the first inorganic layer;
Forming a second inorganic layer on the first color filter layer;
Forming a second color filter layer on the second inorganic layer; And
And forming a third inorganic layer on the second color filter layer.

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