KR20200014599A - Light emitting display device with integrated touch screen - Google Patents

Abstract

The present application provides a light emitting display device integrated with a touch screen which can reduce resistance of a common power line. The light emitting display device integrated with a touch screen according one example of the present application comprises: a substrate comprising a display region and a non-display region surrounding the display region; a pixel array layer comprising a pixel driving electrode disposed on the display region of the substrate, a light emitting layer on the pixel driving electrode, and a common electrode on the light emitting layer; a common power line disposed on the non-display region of the substrate and in electric connection with the common electrode; an encapsulation layer surrounding the pixel array layer and exposing a part of the common power line; and a common power dummy pattern disposed on the encapsulation layer to overlap the common power line and in electric connection with a part of the common power line.

Description

LIGHT EMITTING DISPLAY DEVICE WITH INTEGRATED TOUCH SCREEN}

The present application relates to a touch screen integrated light emitting display device.

A touch screen is a type of input device that is installed in a display device and inputs information by touching a screen with a finger or a pen while a user watches a display screen.

Recently, multimedia display devices such as televisions, mobile phones, tablet computers, navigation devices, game machines, and the like include touch screens capable of recognizing a user's touch.

In a touch screen integrated display device including a touch screen, a liquid crystal display, a light emitting display, a quantum dot display, or the like may be used as the display device. The light emitting display device is attracting attention as a next generation display device because it has a high response speed, low power consumption, and self-emission, which does not require a separate light source, unlike a liquid crystal display device.

Each of the pixels constituting the light emitting display device may include a light emitting device including a light emitting layer interposed between a pixel driving electrode (or an anode electrode) and a common electrode (or a cathode electrode), and a pixel circuit for driving the light emitting device. have. The pixel circuit may mainly include a switching thin film transistor, a driving transistor, and a storage capacitor.

The current flowing from the pixel to the light emitting device may flow through the common electrode and the common power line. In this case, if the resistance of the common power line is large, poor current quality may occur due to voltage change (or rising) of the common power line because the current flow of the light emitting device is disturbed.

In order to secure the resistance of the common power line, the width of the common power line may be increased, but in this case, the width of the bezel of the light emitting display device increases as the width of the common power line increases.

SUMMARY The present application provides a touch screen integrated light emitting display device in which resistance of a common power line may be reduced.

In addition, the present application is to provide a touch screen integrated light emitting display device having a reduced resistance of the common power line and a thin bezel width.

A touch screen integrated display device according to an example of the present application includes a substrate including a display area and a non-display area surrounding the display area, a pixel driving electrode disposed on the display area of the substrate, a light emitting layer on the pixel driving electrode, and a common layer on the light emitting layer. A pixel array layer including an electrode, a common power line disposed on a non-display area of the substrate and electrically connected to the common electrode, an encapsulation layer surrounding the pixel array layer and exposing a portion of the common power line, and overlapping with the common power line It may include a common power dummy pattern disposed on the encapsulation layer and electrically connected to a portion of the common power line.

In one exemplary embodiment, a touch screen integrated display device includes a substrate having a display area and a non-display area surrounding the display area, a pixel array layer including a common electrode disposed on the display area of the substrate, and a non-display area of the substrate. A common power line disposed on and electrically connected to the common electrode, an encapsulation layer covering the remaining second portion except the first portion of the common power line and the pixel array layer, and a touch sensor layer disposed on the encapsulation layer, The touch sensor layer includes a touch electrode part having a touch electrode disposed on the encapsulation layer on the display area, and a common power dummy pattern disposed on the encapsulation layer so as to overlap the common power line and electrically connected to the first portion of the common power line. It may include a dummy pattern portion having.

In the touch screen integrated light emitting display device according to the present application, the resistance of the common power line may be reduced to prevent image quality defects such as unevenness caused by voltage changes of the common power line.

In addition, the touch screen integrated light emitting display device may reduce the bezel width.

In addition to the effects of the present application mentioned above, other features and advantages of the present application will be described below, or will be clearly understood by those skilled in the art from such description and description.

1 is a diagram illustrating a touch screen integrated light emitting display device according to an example of the present application;
FIG. 2 is a diagram for describing the pixel array layer illustrated in FIG. 1.
FIG. 3 is a diagram for describing the touch routing line shown in FIG. 1.
4 is a cross-sectional view taken along the line II ′ shown in FIG. 1.
5 is a cross-sectional view taken along the line II-II ′ shown in FIG. 1.

Advantages and features of the present application, and a method of achieving them will be apparent with reference to the examples described below in detail in conjunction with the accompanying drawings. However, the present application is not limited to the examples disclosed below, but may be implemented in various forms, and only one example of the present application is intended to complete the disclosure of the present application, and is commonly used in the art to which the present invention belongs. It is provided to fully inform those skilled in the art of the scope of the invention, and the invention of the present application is defined only by the scope of the claims.

Shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the example of the present application are exemplary, and thus the present application is not limited to the illustrated items. Like reference numerals refer to like elements throughout. In addition, in describing the example of the present application, when it is determined that the detailed description of the related known technology may unnecessarily obscure the subject matter of the present application, the detailed description thereof will be omitted.

In the case where 'comprises', 'haves', 'consists of' and the like mentioned in the present specification are used, other parts may be added unless 'only' is used. In the case where the component is expressed in the singular, the plural includes the plural unless specifically stated otherwise.

In interpreting a component, it is interpreted to include an error range even if there is no separate description.

In the case of the description of the positional relationship, for example, if the positional relationship of the two parts is described as 'on', 'upper', 'lower', 'next to', etc. Alternatively, one or more other parts may be located between the two parts unless 'direct' is used.

In the case of a description of a temporal relationship, for example, if the temporal after-term relationship is described as 'after', 'following', 'after', 'before', or the like, 'directly' or 'direct' This may include cases that are not continuous unless used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned below may be a second component within the technical spirit of the present application.

The term "at least one" should be understood to include all combinations which can be presented from one or more related items. For example, the meaning of "at least one of the first item, the second item, and the third item" means two items of the first item, the second item, or the third item, as well as two of the first item, the second item, and the third item, respectively. It can mean a combination of all items that can be presented from more than one.

Each of the features of the various examples of the present application may be combined or combined with each other, partly or wholly, and technically various interlocking and driving are possible, and each of the examples may be independently implemented with respect to each other or may be implemented in association with each other. .

Hereinafter, an example of a touch screen integrated light emitting display device according to the present application will be described in detail with reference to the accompanying drawings. In adding reference numerals to components of each drawing, the same components may have the same reference numerals as much as possible even though they are shown in different drawings.

1 is a diagram illustrating a touch screen integrated light emitting display device according to an example of the present application, FIG. 2 is a diagram for explaining a pixel array layer illustrated in FIG. 1, and FIG. 3 is a touch routing line illustrated in FIG. 1. It is a figure for explaining.

1 to 3, a touch screen integrated light emitting display device according to an example of the present application may include a substrate 100, a pixel array layer, a common power line (CPL), an encapsulation layer, and a common power dummy pattern (CPDP). It may include.

The substrate 100 is a base substrate (or base layer) and includes a plastic material or a glass material. According to an embodiment, the substrate 100 may have a rectangular shape in plan view, a rectangular shape in which each corner portion is rounded with a constant radius of curvature, or a non-square shape having at least six sides. Here, the non-square substrate 100 may include at least one protrusion or at least one notch portion.

The substrate 100 according to an example may be divided into a display area AA and a non-display area IA.

The display area AA is provided in the middle area of the substrate 100 and may be defined as an area for displaying an image. According to an embodiment, the display area AA may have a quadrangular shape in plan view, a rectangular shape rounded so that each corner portion has a constant radius of curvature, or a non-square shape having at least six sides. Here, the non-square display area AA may include at least one protrusion or at least one notch.

The non-display area IA is provided in the edge area of the substrate 100 to surround the display area AA, and may be defined as an area in which an image is not displayed or a peripheral area. The non-display area IA according to an example is provided at the first non-display area IA1 provided at the first edge of the substrate 100 and at the second edge of the substrate 100 parallel to the first non-display area IA1. Second non-display area IA2, third non-display area IA3 provided at the third edge of the substrate 100, and fourth non-display provided at the fourth edge of the substrate 100 parallel to the third non-display area. Region IA4 may be included. For example, the first non-display area IA1 is an upper (or lower) edge region of the substrate 100, and the second non-display area IA2 is a lower (or upper) edge region of the substrate 100, a third The non-display area IA3 may be a left (or right) edge area of the substrate 100, and the fourth non-display area IA4 may be a right (or left) edge area of the substrate 100, but is not limited thereto. Do not.

The pixel array layer may be provided on the display area AA of the substrate 100. In an example, the pixel array layer may include a scan line SL, a data line DL, a pixel driving power line PL, and a pixel P.

The scan line SL extends along the first direction X and is disposed along the second direction Y crossing the first direction X. The display area AA of the substrate 100 includes a plurality of scan lines SL spaced apart from each other along the second direction Y while being parallel to the first direction X. FIG. Here, the first direction X may be defined as the horizontal direction of the substrate 100, and the second direction Y may be defined as the longitudinal direction of the substrate 100, but is not necessarily limited thereto and vice versa. May be

The data line DL extends along the second direction Y and is disposed along the first direction X. FIG. The display area AA of the substrate 100 includes a plurality of data lines DL which are parallel to the second direction Y and spaced apart from each other along the first direction X. FIG.

The pixel driving power line PL is disposed on the display area AA of the substrate 100 to be parallel to the data line DL. The display area AA of the substrate 100 includes a plurality of pixel driving power lines PL parallel to the data line DL. In some embodiments, the pixel driving power line PL may be arranged to be parallel to the scan line SL.

The pixel P is disposed in the pixel area defined on the display area AA of the substrate 100 and electrically connected to the adjacent scan line SL, the data line DL, and the pixel driving power line PL. The pixel area may be defined by the intersection of the scan line SL and the data line DL.

In an example, the pixel P may be disposed on the display area AA to have a stripe structure. In this case, one unit pixel may include a red pixel, a green pixel, and a blue pixel, and further, one unit pixel may further include a white pixel.

The pixel P according to another example may be disposed to have a pentile structure on the display area AA. In this case, one unit pixel may include at least one red pixel, at least two green pixels, and at least one blue pixels arranged in a polygonal shape in a plane. For example, one unit pixel having a pentile structure may be disposed such that one red pixel, two green pixels, and one blue pixel have a planar octagonal shape, in which case the blue pixel is relatively It may have a large opening area (or light emitting area), and the green pixel may have a relatively small opening area.

The pixel P includes a pixel circuit PC electrically connected to the adjacent scan line SL, the data line DL, and the pixel driving power line PL, and a light emitting element ED electrically connected to the pixel circuit PC. It may include.

The pixel circuit PC may emit light from the pixel driving power line PL based on a data voltage supplied from an adjacent data line DL in response to a scan signal supplied from at least one adjacent scan line SL. The current Ied flowing in is controlled.

The pixel circuit PC according to an example may include two thin film transistors and one capacitor. For example, the pixel circuit PC according to an example may drive the data thin film transistor that supplies the data current Ied based on the data voltage to the light emitting device ED, and the data voltage supplied from the data line DL. A switching transistor for supplying the thin film transistor, and a capacitor for storing the gate-source voltage of the driving thin film transistor.

The pixel circuit PC according to another example may include at least three thin film transistors and at least one capacitor. For example, the pixel circuit PC according to an example may include a current supply circuit, a data supply circuit, and a compensation circuit according to an operation (or function) of each of the at least three thin film transistors. Here, the current supply circuit may include a driving thin film transistor supplying the data current Ied based on the data voltage to the light emitting device ED. The data supply circuit may include at least one switching thin film transistor supplying a data voltage supplied from the data line DL to the current supply circuit in response to the at least one scan signal. The compensation circuit may include at least one compensation thin film transistor configured to compensate for a change in a characteristic value (threshold voltage and / or mobility) of the driving thin film transistor in response to the at least one scan signal.

The light emitting device ED emits light by the data current Ied supplied from the pixel circuit PC to emit light having a luminance corresponding to the data current Ied. In this case, the data current Ied may flow from the pixel driving power line PL to the common power line CPL through the driving thin film transistor and the light emitting element ED.

According to an exemplary embodiment, the light emitting device ED may include a pixel driving electrode (or first electrode) electrically connected to the pixel circuit PC, a light emitting layer formed on the pixel driving electrode, and a common electrode (or second electrode) electrically connected to the light emitting layer. (CE).

The common power line CPL is disposed on the non-display area IA of the substrate 100 and electrically connected to the common electrode CE disposed on the display area AA.

The common power line CPL according to an example is disposed along the second to fourth non-display areas IA2, IA3, and IA4 adjacent to the display area IA of the substrate 100 and having a constant line width. The remaining portion excluding a portion of the display area AA adjacent to the first non-display area IA1 of 100 is surrounded. One end of the common power line CPL may be disposed on one side of the first non-display area IA1, and the other end of the common power line CPL may be disposed on the other side of the first non-display area IA1. In addition, one end and the other end of the common power line CPL may be disposed to surround the second to fourth non-display areas IA2, IA3, and IA4. Accordingly, the common power line CPL according to an embodiment may have a '∩' shape in which one side corresponding to the first non-display area IA1 of the substrate 100 is opened.

The encapsulation layer is formed on the substrate 100 to surround the pixel array layer and expose the first portion of the common power line CPL provided in the non-display area IA of the substrate 100. The encapsulation layer can prevent oxygen or moisture from penetrating into the light emitting device ED provided in the pixel array layer. The encapsulation layer according to an example may include at least one inorganic layer. The encapsulation layer according to another example may include a plurality of inorganic films and an organic film between the plurality of inorganic films.

The common power dummy pattern CPDP is disposed on the non-display area IA of the substrate 100 to overlap the common power line CPL and is electrically connected to the first portion of the common power line CPL. The common power dummy pattern CPDP is electrically connected to the common power line CPL on the non-display area IA of the substrate 100 to reduce the resistance (or line resistance value) of the common power line CPL, thereby reducing the common power supply. Image quality defects such as unevenness due to a voltage change (or rising) of the line CPL may be prevented. In addition, the common power dummy pattern CPDP is disposed to overlap the common power line CPL, thereby increasing the resistance (or line resistance value) of the common power line CPL without increasing the bezel width of the touch screen integrated light emitting display device. Can be reduced. According to an example, the common power dummy pattern CPDP is formed to have a '∩' shape planarly disposed along the second to fourth non-display areas IA2, IA3, and IA4 of the substrate 100. In the second to fourth non-display areas IA2, IA3, and IA4 of the 100, the common power line CPL may overlap.

The touch screen integrated light emitting display device according to an example of the present application may further include a touch sensor layer disposed on the encapsulation layer.

The touch sensor layer is disposed on the encapsulation layer and senses a touch according to the touch object. Here, the touch object may include a user's finger or a touch pen.

The touch sensor layer according to an example may include a touch electrode part TEP, a touch routing part TRP, and a dummy pattern part DPP.

The touch electrode part TEP may include the touch electrode TE disposed on the display area AA of the substrate 100.

The touch electrode TE may include a plurality of first touch electrodes TE1 and a plurality of second touch electrodes TE2.

The plurality of first touch electrodes TE1 are disposed on the display area AA of the substrate 100 to be spaced apart from each other in the second direction Y while extending in the first direction X. The plurality of first touch electrodes TE1 may be used as touch sensing electrodes (or touch driving electrodes) for sensing touch positions of the touch object.

Each of the plurality of first touch electrodes TE1 may include a plurality of first electrode patterns EP1 and a plurality of bridge patterns BP.

Each of the plurality of first electrode patterns EP1 is disposed on the display area AA of the substrate 100 to be spaced apart from each other along the first direction X. FIG.

Each of the plurality of bridge patterns BP is disposed on the display area AA of the substrate 100 so as to be spaced apart from each other along the first direction X, and two first electrode patterns adjacent to each other along the first direction X. Electrically connect (EP1). Each of the plurality of bridge patterns BP is disposed to overlap with each other between the two first electrode patterns EP1 adjacent to each other along the first direction X, so that the first touch electrode TE1 and the second touch electrode TE2 are disposed. It prevents shorts from each other at the intersection area.

One side of each of the plurality of bridge patterns BP is electrically connected to the first electrode pattern EP1 disposed on one side of two first electrode patterns EP1 adjacent to each other along the first direction X. The other side of each of the bridge patterns BP is electrically connected to the first electrode pattern EP1 disposed on the other side of the two first electrode patterns EP1 adjacent to each other along the first direction X. FIG. Each of the bridge patterns BP according to an example may be formed in a straight line shape, but is not limited thereto and may electrically connect two first electrode patterns EP1 adjacent to each other along the first direction X. It may have a variety of forms, such as a curved form, an angle form, or a mesh form.

The plurality of second touch electrodes TE2 extend in the first direction X while being spaced apart from each other in the second direction Y while being electrically separated from the plurality of first touch electrodes TE1. It is arranged on the display area AA of. The plurality of second touch electrodes TE2 may be used as touch driving electrodes (or touch sensing electrodes) for sensing touch positions of the touch object.

Each of the plurality of second touch electrodes TE2 may include a plurality of second electrode patterns EP2 and a plurality of connection lines CL.

Each of the plurality of second electrode patterns EP2 is disposed on the display area AA of the substrate 100 to be spaced apart from each other along the second direction Y. FIG.

Each of the plurality of connection lines CP is disposed between two second electrode patterns EP2 adjacent to each other along the second direction Y, and thus, two second electrode patterns adjacent to each other along the second direction Y ( EP2) is electrically connected. Each of the plurality of connection lines CP may be disposed on the same layer as each of the plurality of second electrode patterns EP2. Accordingly, each of the plurality of connection lines CP and each of the plurality of second electrode patterns EP2 may be formed of one body. Each of the plurality of connection lines CP is disposed to cross each of the plurality of bridge patterns BP.

Meanwhile, the plurality of bridge patterns BP of the first touch electrode TE1 may be changed into the plurality of connection lines CL of the second touch electrode TE2. In addition, the plurality of connection lines CL of the second touch electrode TE2 may be changed into a plurality of bridge patterns BP of the first touch electrode TE1.

The touch sensor layer may include a first touch electrode layer including a plurality of bridge patterns BP, a second touch electrode layer including a plurality of first electrode patterns EP1 and a plurality of second touch electrodes TE2, And a touch insulating layer disposed between the first touch electrode layer and the second touch electrode layer. Here, the first touch electrode layer may be disposed below or above the second touch electrode layer with the touch insulating layer interposed therebetween. As an example, the touch sensor layer may include a first touch electrode layer having a bridge pattern BP, a touch insulating layer disposed on the first touch electrode layer, and first touch electrodes TE1 and a first touch electrode disposed on the touch insulating layer. The second touch electrode layer having the second touch electrodes TE2 may be included. As another example, the touch sensor layer may include a first touch electrode layer having first touch electrodes TE1 and second touch electrodes TE2, a touch insulating layer disposed on the first touch electrode layer, and a touch insulating layer. It may include a second touch electrode layer having a bridge pattern (BP) disposed.

The touch insulating layer includes a bridge contact hole BCH provided in an overlapping region of the first electrode pattern EP1 and the bridge pattern BP. Accordingly, each of the plurality of bridge patterns BP is electrically connected to one side and the other side of the corresponding first electrode pattern EP1 through the bridge contact hole BCH provided in the touch insulating layer, thereby forming the first direction X. FIG. Accordingly, two first electrode patterns EP1 adjacent to each other are electrically connected to each other.

Each of the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2 may include a mesh structure in which metal lines having a very thin line width cross each other. Here, the metal line is molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Ti), titanium / aluminum / titanium (Ti / Al / Ti), molybdenum / aluminum / molybdenum (Mo / Al / Mo) may have a single layer or a multilayer structure made of a conductive material.

Each of the plurality of first electrode patterns EP1 and the plurality of second electrode patterns EP2 may have a polygonal shape, for example, a rhombus shape. In this case, each of the electrode patterns EP1 and EP2 disposed along the edge of the display area AA may have a triangular shape. Each of the plurality of first electrode patterns EP1 and the plurality of second electrode patterns EP2 may be formed on the encapsulation layer to form metal lines having a mesh shape intersecting with each other, and a preset touch on the display area AA. The plurality of first electrode patterns EP1, the plurality of second electrode patterns EP2, and the plurality of connection lines CL may be simultaneously formed by cutting the metal lines formed on the electrode boundary region.

The touch screen integrated light emitting display device according to the present application senses a touch by using mutual capacitance between the first touch electrode TE1 and the second touch electrode TE2, and the mutual capacitance is formed between the touch boundary regions. Most of the first touch electrode TE1 and the second touch electrode TE2 which are adjacent to each other are formed in the outer portion of the second touch electrode TE1 and TE2. Accordingly, the present application forms the cutting portions of the metal lines positioned at the outer portions of the first touch electrode TE1 and the second touch electrode TE2 in the form of protrusions, thereby forming the first touch electrode TE1 and the second touch electrode ( TE2) each of the outer area (or length) may be increased to increase mutual capacitance formed in the touch boundary region (or sensing region) between the first touch electrode TE1 and the second touch electrode TE2. Thus, the sensing sensitivity of the touch can be improved.

The touch routing part TRP is provided in the non-display area IA of the substrate 100 and electrically connected to the touch electrode TE provided in the touch sensor layer. The touch routing unit TRP according to an example may include a plurality of first touch routing lines RL1 and a plurality of second touch routing lines RL2.

Each of the plurality of first touch routing lines RL1 may be connected one-to-one with the plurality of first electrodes TE1 provided in the touch sensor layer. Each of the plurality of first touch routing lines RL1 is disposed over the other side of the first non-display area IA1 of the substrate 100 and the fourth non-display area IA4 (or the third non-display area IA3). Can be. One end of each of the plurality of first touch routing lines RL1 according to an example may be disposed in the fourth non-display area IA4 (or the third non-display area IA3) of the substrate 100. ) Can be connected one to one.

Each of the plurality of second touch routing lines RL2 may be connected one-to-one with the plurality of second electrodes TE2 provided in the touch sensor layer. Each of the plurality of second touch routing lines RL2 may have one side of the first non-display area IA1, the second non-display area IA2, and the third non-display area IA3 (or the fourth non-display area) of the substrate 100. It may be disposed over the display area IA4. One end of each of the plurality of second touch routing lines RL2 may be connected one-to-one with the plurality of second electrodes TE2 in the second non-display area IA2 of the substrate 100.

The dummy pattern part DPP includes a common power dummy pattern CPDP. The common power dummy pattern CPDP may be formed of the same material as the touch sensor layer. The common power dummy pattern CPDP provided in the dummy pattern part DPP may be formed together with the touch sensor layer without any additional process. In the manufacturing process of the touch sensor layer, a deposition process of forming a conductive material on the entire surface of the substrate 100 and a deposited conductive material may be performed on the plurality of first touch electrodes TE1 and the plurality of second touch electrodes TE2. Patterning process for patterning. In the patterning process of manufacturing the touch sensor layer, the conductive material deposited on the non-display area IA of the substrate 100 overlapping the common power line CPL is left without removing the common power dummy pattern CPDP. ). Accordingly, the present application utilizes a separate additional deposition process by utilizing a common power dummy pattern (CPDP) for reducing the resistance of the common power line (CPL) without removing the conductive material removed by the patterning process of the touch sensor layer. The common power dummy pattern CPDP may be formed to reduce the resistance of the common power line CPL without the patterning process.

The common power dummy pattern CPDP is formed to overlap the common power line CPL disposed along the second to fourth non-display areas IA2, IA3, and IA4 of the substrate 100 to form a common power line. (CPL) can be electrically connected.

The common power dummy pattern CPDP may have a 'DP' shape planarly disposed along the second to fourth non-display areas IA2, IA3, and IA4 of the substrate 100. The common power line CPL may be electrically connected to the entire area of the common power dummy pattern CPDP, but is not limited thereto and may include a plurality of contact areas set at regular intervals along the length direction of the common power dummy pattern CPDP. In each case it can be electrically connected.

According to another example, the common power dummy pattern CPDP is formed on the second to fourth non-display areas IA2, IA3, and IA4 at regular intervals so as to overlap the common power line CPL, so that the common power dummy pattern CPDP may overlap the common power line CPL. It may be electrically connected. In this case, the common power dummy pattern CPDP according to another example may have a dotted line shape disposed along the second to fourth non-display areas IA2, IA3, and IA4 in plan view.

The touch screen integrated light emitting display device according to an exemplary embodiment of the present application further includes a pad part PP, a gate driving circuit 200, a driving integrated circuit 300, a flexible circuit cable 500, and a touch driving circuit 600. It may include.

The pad part PP may include a plurality of pads provided in the non-display area IA of the substrate 100. The pad part PP according to an example may include a plurality of common power supply pads, a plurality of data input pads, a plurality of power supply pads, and a plurality of control signal input pads provided in the first non-display area IA1 of the substrate 100. , And a plurality of touch driving pads.

The gate driving circuit 200 is provided in the third non-display area IA3 and / or the fourth non-display area IA4 of the substrate 100 to be connected one-to-one with the scan lines SL provided in the display area AA. do. The gate driving circuit 200 is integrated in the third non-display area IA3 and / or the fourth non-display area IA4 of the substrate 100 together with the manufacturing process of the pixel array layer, that is, the manufacturing process of the thin film transistor. The gate driving circuit 200 generates a scan signal based on a gate control signal supplied from the driving integrated circuit 300 and outputs the scan signal in a predetermined order to drive each of the plurality of scan lines SL in a predetermined order. The gate driving circuit 200 according to an example may include a shift register.

Meanwhile, the plurality of first touch routing lines RL1 are disposed between the touch electrode part TEP and the dummy pattern part DPP so as to overlap the gate driving circuit 200 in the fourth non-display area IA4. It is possible to minimize the increase in the bezel width along the fourth non-display area IA4 of 100 due to the arrangement area of the plurality of first touch routing lines RL1. Similarly, the plurality of second touch routing lines RL2 overlap the gate driving circuit 200 in the third non-display area IA3 of the substrate 100 so as to overlap the touch electrode part TEP and the dummy pattern part DPP. Since the bezel widths along the third non-display area IA3 of the substrate 100 are increased between the plurality of second touch routing lines RL2, the bezel width may be minimized.

The driving integrated circuit 300 is mounted in the chip mounting area defined in the first non-display area IA1 of the substrate 100 through a chip mounting (or bonding) process. The input terminals of the driving integrated circuit 300 are electrically connected to the pad part PP, and the input terminals of the driving integrated circuit 300 drive the plurality of data lines DL and the plurality of pixels provided in the display area AA. It is electrically connected to the power supply line PL. The driving integrated circuit 300 receives various power sources, timing synchronization signals, digital image data, and the like input from the display driving circuit unit (or host circuit) through the pad unit PP, and generates a gate control signal according to the timing synchronization signal. It generates and controls the driving of the gate driving circuit 200, and at the same time converts the digital image data into an analog pixel data voltage and supplies it to the corresponding data line DL.

The flexible circuit cable 500 is attached to the pad portion PP. The flexible circuit cable 500 electrically connects the display driving circuit unit and the pad unit PP and electrically connects the pad unit PP and the touch driving circuit 600.

The touch driving circuit 600 is mounted on the flexible circuit cable 500 through a chip mounting (or bonding) process. The touch driving circuit 600 is electrically connected to the other end of each of the plurality of first touch routing lines RL1 and the other end of each of the plurality of second touch routing lines RL2 through a plurality of touch driving pads provided in the pad part PP. Is connected. The touch driving circuit 600 touch-drives each of the plurality of second touch electrodes TE2 through the pad part PP and the plurality of second touch routing lines RL2 in response to the touch synchronization signal provided from the host circuit. The touch-low data is sensed by supplying a pulse and sensing a change in capacitance between the first touch electrode TE1 and the second touch electrode TE2 through the pad part PP and the plurality of first touch routing lines RL1. And generate the generated touch row data to the host circuit. The host circuit calculates touch position information on the touch object based on the touch row data provided from the touch driving circuit 600 during the touch report period, and executes an application program associated with the calculated touch position information.

Optionally, the touch driving circuit 600 may be embedded in the driving integrated circuit 300. In this case, the other ends of each of the plurality of first touch routing lines RL1 and the plurality of second touch routing lines RL2 may be formed. It is not connected to the pad part PP but is electrically connected to the driving integrated circuit 300. The driving integrated circuit 300 supplies touch driving pulses to each of the plurality of second touch electrodes TE2 through the plurality of second touch routing lines RL2 in response to the touch synchronization signal provided from the host circuit. The touch row data is generated by sensing a change in capacitance between the first touch electrode TE1 and the second touch electrode TE2 through the first touch routing line RL1, and the generated touch row data is used as a pad part PP. Can be provided to the host circuit.

The touch screen integrated light emitting display device according to an example of the present application may further include a data distribution circuit 400 for reducing the circuit size of the driving integrated circuit 300.

The data distribution circuit 400 receives data voltages sequentially input from the driving integrated circuit 300 for each time division section of one horizontal section, and corresponds to the number of n time division sections corresponding to n (n is a natural number of two or more) during one horizontal section. Distributes sequentially to data lines. The data distribution circuit 400 according to an example includes a plurality of demultiplexing circuits.

Each of the plurality of demultiplexing circuits includes one input terminal connected to an output channel of the driving integrated circuit 300, and first to nth control terminals that individually receive first to third time division control signals from the driving integrated circuit 300. , And first to nth output terminals connected to n data lines. Here, assuming n is 3, and assuming that one horizontal period includes first to third time division intervals, each of the plurality of demultiplexing circuits responds to the first time division control signal for each first time division interval of the horizontal period. The first IC voltage supplied from the driver integrated circuit 300 is supplied to the third i-2 data line (i is a natural number), and the driver integrated circuit 300 is responsive to the second time division control signal in every second time division section of the horizontal period. And supplies a second data voltage supplied from the driving integrated circuit 300 in response to a third time division control signal in every third time division period of the horizontal period. Can be supplied to 3i data lines.

The touch screen integrated display device according to the exemplary embodiment of the present application is common by reducing the resistance of the common power line CPL through the common power dummy pattern CPDP disposed in the non-display area IA of the substrate 100. Image quality defects such as unevenness due to voltage change (or rising) of the power line CPL may be prevented. In addition, in the touch screen integrated display device according to the exemplary embodiment of the present application, when the common power dummy pattern CPDP and the common power line CPL overlap each other, the width of the common power line CPL is not increased or the bezel width is not increased. In addition, the resistance (or line resistance value) of the common power line CPL may be reduced. Accordingly, the present application can provide a touch screen integrated display device having a thin bezel width while reducing the resistance of the common power line CPL.

4 is a cross-sectional view of the line I-I 'shown in FIG. 1, and FIG. 5 is a cross-sectional view of the line II-II' shown in FIG. 1, which is a cross-sectional view of the touch screen integrated light emitting display device according to an example of the present application. It is a figure for demonstrating a structure.

4 and 5, the touch screen integrated light emitting display device according to an example of the present application includes a substrate 100, a pixel array layer 120, an encapsulation layer 130, and a touch sensor layer 140. ) May be included.

The substrate 100 includes a plastic material or a glass material as a base layer.

The substrate 100 according to an example may include an opaque or colored polyimide material. For example, the polyimide substrate 100 may be a cured polyimide resin coated with a predetermined thickness on the front surface of a release layer provided on a relatively thick carrier substrate. In this case, the carrier glass substrate is separated from the substrate 100 by the release of the release layer using a laser release process. The substrate 100 according to this example further includes a back plate coupled to the rear surface of the substrate 100 based on the thickness direction Z. The back plate keeps the substrate 100 in a planar state. The back plate according to one embodiment may include a plastic material, for example, polyethylene terephthalate material. This back plate may be laminated to the back side of the substrate 100 separated from the carrier glass substrate.

The substrate 100 according to an example may be a flexible glass substrate. For example, the glass substrate 100 may be a thin glass substrate having a thickness of 100 micrometers or less, or may be a carrier glass substrate etched to have a thickness of 100 micrometers or less by a substrate etching process.

The substrate 100 includes a display area AA, a non-display area IA surrounding the display area AA, a touch routing part TRP and a dummy pattern part DPP disposed in the non-display area IA. can do.

A buffer layer may be formed on one surface of the substrate 100. The buffer layer is formed on one surface of the substrate 100 to block moisture penetrating into the pixel array layer 120 through the substrate 100 vulnerable to moisture permeation. The buffer layer according to an example may be formed of a plurality of inorganic layers that are alternately stacked. For example, the buffer film may be formed of a multilayer film in which one or more inorganic films of a silicon oxide film (SiOx), a silicon nitride film (SiNx), and a silicon oxynitride film (SiON) are alternately stacked. The buffer film may be omitted.

The pixel array layer 120 may include a thin film transistor layer, a planarization layer 125, a bank pattern 127, and a light emitting device ED.

The thin film transistor layer is provided in the plurality of pixel areas PA defined in the display area AA of the substrate 100 and in the gate driving circuit areas defined in the fourth non-display area IA4 of the substrate 100.

The thin film transistor layer according to an example includes a thin film transistor TFT, a gate insulating layer 121, and an interlayer insulating layer 123. The thin film transistor TFT shown in FIG. 4 may be a driving thin film transistor electrically connected to the light emitting device ED.

The thin film transistor TFT includes a semiconductor layer SCL, a gate electrode GE, a source electrode SE, and a drain electrode DE formed on the substrate 100 or the buffer film. In FIG. 4, the TFT has a top gate (top gate) structure in which the gate electrode GE is positioned on the semiconductor layer SCL. However, the TFT is not limited thereto. The bottom gate (bottom gate) structure in which the gate electrode GE is positioned below the semiconductor layer SCL, or the double gate in which the gate electrode GE is positioned above and below the semiconductor layer SCL, respectively. double gate) structure.

The semiconductor layer SCL may be formed on the substrate 100 or the buffer film. The semiconductor layer SCL may include a silicon semiconductor material, an oxide semiconductor material, or an organic material semiconductor material, and may have a single layer structure or a multilayer structure. A light shielding layer for blocking external light incident to the semiconductor layer SCL may be further formed between the buffer film and the semiconductor layer SCL.

The gate insulating layer 121 may be formed on the entire substrate 100 to cover the semiconductor layer SCL. The gate insulating layer 121 may be formed of an inorganic layer, for example, a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof.

The gate electrode GE may be formed on the gate insulating layer 123 so as to overlap the semiconductor layer SCL. The gate electrode GE may be formed together with the scan line SL. According to an example, the gate electrode GE may be formed of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be formed of a single layer or multiple layers of any one or alloys thereof.

The interlayer insulating layer 123 may be formed on the entire substrate 100 to cover the gate electrode GE and the gate insulating layer 121. The interlayer insulating layer 123 provides a flat surface on the gate electrode GE and the gate insulating layer 121.

The source electrode SE and the drain electrode DE may be formed on the interlayer insulating layer 123 so as to overlap the semiconductor layer SCL with the gate electrode GE therebetween. The source electrode SE and the drain electrode DE may be formed together with the data line DL, the pixel driving power line PL, and the common power line CPL. That is, each of the source electrode SE, the drain electrode DE, the data line DL, the pixel driving power line PL, and the common power line CPL are simultaneously formed by a patterning process for the source drain electrode material.

Each of the source electrode SE and the drain electrode DE may be connected to the semiconductor layer SCL through an electrode contact hole penetrating through the interlayer insulating layer 123 and the gate insulating layer 121. The source electrode SE and the drain electrode DE include molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be formed of a single layer or multiple layers of any one or alloys thereof. Here, the drain electrode DE of the thin film transistor TFT shown in FIG. 4 may be electrically connected to the pixel driving power line PL.

As described above, the thin film transistor TFT provided in the pixel area PA of the substrate 100 constitutes the pixel circuit PC, and the gate driving circuit area defined in the fourth non-display area IA4 of the substrate 100. The thin film transistor TFT provided in the circuit constitutes a gate driving circuit.

The planarization layer 125 is formed on the entire substrate 100 to cover the thin film transistor layer. The planarization layer 125 provides a flat surface on the thin film transistor layer. The planarization layer 125 according to an embodiment may be organic such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. It can be formed into a film.

The planarization layer 125 according to an embodiment includes a common power source provided in the first contact hole 125a and the fourth non-display area IA4 to expose the source electrode SE of the driving thin film transistor provided in the pixel area PA. Second and third contact holes 125b and 125c may be provided to expose the first and second portions of the line CPL, respectively. The second and third contact holes 125b and 125c may be formed in the second and third non-display areas IA2 and IA3 as well as in the fourth non-display area IA4.

The bank pattern 127 is disposed on the planarization layer 125 to define an opening area OA (or a light emitting area) in the pixel area PA of the display area AA. The bank pattern 127 may be represented by a pixel defining layer.

The light emitting device ED includes a pixel driving electrode AE (or an anode electrode), a light emitting layer EL, and a common electrode CE (or a cathode electrode).

The pixel driving electrode AE is formed on the planarization layer 125 overlapping with the opening area OA of the pixel area PA, and the pixel driving electrode AE is formed through the first contact hole 125a provided in the planarization layer 125. It is electrically connected to the source electrode SE. In this case, the remaining edge portion except for the middle portion of the pixel driving electrode AE overlapping the opening region OA of the pixel region PA may be covered by the bank pattern 127. The bank pattern 127 may define an opening area OA of the pixel area PA by covering an edge portion of the pixel driving electrode AE.

The pixel driving electrode AE according to an example may include a metal material having high reflectance. For example, the pixel driving electrode AE may be formed by stacking aluminum (Al) and titanium (Ti) (Ti / Al / Ti), stacking aluminum (Al) and ITO (ITO / Al / ITO), and APC ( Ag / Pd / Cu alloys and multi-layered structures such as APC alloys and ITO laminated structures (ITO / APC / ITO), or silver (Ag), aluminum (Al), molybdenum (Mo), gold (Au) , Magnesium (Mg), calcium (Ca), or barium (Ba) may include a single layer structure made of any one material or two or more alloy materials.

The light emitting layer EL is formed on the entire display area AA of the substrate 100 to cover the pixel driving electrode AE and the bank pattern 127. The light emitting layer EL according to an example includes two or more light emitting parts for emitting white light. For example, the light emitting layer EL according to an example may include a first light emitting part and a second light emitting part for emitting white light by mixing the first light and the second light. Here, the first light emitting unit emits the first light and may include any one of a blue light emitting unit, a green light emitting unit, a red light emitting unit, a yellow light emitting unit, and an yellow green light emitting unit. The second light emitting unit may include a blue light emitting unit, a green light emitting unit, a red light emitting unit, a yellow light emitting unit, and a light emitting unit which emits a second light having a complementary color relationship with the first light among yellow green.

The light emitting layer EL according to another example may include any one of a blue light emitting part, a green light emitting part, and a red light emitting part for emitting color light corresponding to the color set in the pixel P. For example, the light emitting layer EL according to another example may include any one of an organic light emitting layer, an inorganic light emitting layer, and a quantum dot light emitting layer, or may include a stacked or mixed structure of an organic light emitting layer (or an inorganic light emitting layer) and a quantum dot light emitting layer.

In addition, the light emitting device ED according to an example may further include a functional layer for improving light emission efficiency and / or lifespan of the light emitting layer EL.

The common electrode CE is formed to be electrically connected to the emission layer EL. The common electrode CE is formed on the entire display area AA of the substrate 100 so as to be commonly connected to the emission layer EL provided in each pixel area PA.

The common electrode CE according to an example may include a transparent conductive material or a transflective conductive material capable of transmitting light. When the common electrode CE is formed of a transflective conductive material, the light emission efficiency of the light emitted from the light emitting device ED through the micro cavity may be increased. The transflective conductive material according to an example may include magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). In addition, a capping layer may be further formed on the common electrode CE to adjust the refractive index of the light emitted from the light emitting device ED to improve the light emission efficiency of the light.

The common power connection line CPCL is formed along with the pixel driving electrode AE in the fourth non-display area IA4 of the substrate 100. The pixel driving electrode AE and the common power connection line CPCL are simultaneously formed of the same material. The common power connection line CPCL is formed on the planarization layer 125 overlapping with the gate driving circuit 200 and is formed through the third contact hole 125c provided in the planarization layer 125. It is electrically connected with two parts.

The edge of the common electrode CE formed in the fourth non-display area IA4 of the substrate 100 is connected to the common power connection line CPCL through the common electrode contact hole 127a provided in the bank pattern 127. Is electrically connected to the In addition, edge portions of the common electrodes CE formed in the second and third non-display areas IA2 and IA3 of the substrate 100 may also be provided through the common electrode contact hole 127a provided in the bank pattern 127. It may be electrically connected to the connection line CPCL. Accordingly, the common electrode CE is electrically connected to the common power line CPL through the common power connection line CPCL to connect the pad part PP, the common power line CPL, and the common power connection line CPCL. It can be supplied with a uniform common power.

The encapsulation layer 130 is formed to surround the pixel array layer 120. The encapsulation layer 130 serves to prevent oxygen or moisture from penetrating into the light emitting device ED.

The encapsulation layer 130 according to an example includes a first inorganic encapsulation layer 131, an organic encapsulation layer 133 on the first inorganic encapsulation layer 131, and a second inorganic encapsulation layer 135 on the organic encapsulation layer 133. It may include.

The first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 135 serve to block penetration of moisture or oxygen. According to an example, the first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 135 may include silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, or the like. It can be made of minerals. The first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 135 may be formed by a chemical vapor deposition process or an atomic layer deposition process.

The organic encapsulation layer 133 is surrounded by the first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 135. The organic encapsulation layer 133 may be formed to have a relatively thicker thickness than the first inorganic encapsulation layer 131 and / or the second inorganic encapsulation layer 135 to cover particles that may occur during the manufacturing process. have. The organic encapsulation layer 133 may be made of an organic material such as silicon oxycarbon (SiOCz) acrylic or epoxy resin. The organic encapsulation layer 133 may be formed by a coating process, for example, an inkjet coating process or a slit coating process.

The touch sensor layer 140 may include a touch buffer layer TBL, a touch electrode part TEP, a touch routing part TRP, a dummy pattern part DPP, and a touch protective layer TPL.

The touch buffer layer TBL is formed on the substrate 100 to cover the encapsulation layer 130 and to expose the first portion of the power source common line CPL. The touch buffer layer TBL provides a flat surface on the encapsulation layer 130. The touch buffer layer TBL may be formed of an inorganic material or an organic material. The touch buffer layer TBL may be formed by chemical vapor deposition.

The touch electrode part TEP includes the touch electrode TE disposed on the touch buffer layer TBL on the display area AA. The touch electrode part TEP according to an example may include a first touch electrode layer, a touch insulating layer TIL, and a second touch electrode layer.

The first touch electrode layer may include a plurality of bridge patterns BP formed on the touch buffer layer TBL. Each of the bridge patterns BP may be disposed on the touch buffer layer TBL overlapping the bank pattern 127 disposed on the display area AA.

The touch insulating layer TIL is formed on the touch buffer layer TBL to surround the plurality of bridge patterns BP. The touch insulating layer TIL includes a bridge contact hole BCH for exposing one side and the other side of each of the plurality of bridge patterns BP. The touch insulating layer TIL may be formed of an inorganic material, for example, silicon oxide (SiOx) or silicon nitride (SiNx).

The second touch electrode layer may include a plurality of first electrode patterns EP1 and a plurality of second touch electrodes TE2.

Each of the plurality of first electrode patterns EP1 is disposed on the touch insulating layer TIL to be spaced apart from each other along each of the first and second directions X and Y. FIG. In this case, two first electrode patterns EP1 adjacent to each other along the first direction X are electrically connected to the bridge pattern BP through the bridge contact hole BCH. Accordingly, the plurality of first electrode patterns EP1 and the plurality of bridge patterns BP disposed along the first direction X are electrically connected to each other to form one first touch electrode TE1.

The plurality of second touch electrodes TE2 extend along the first direction X and are spaced apart from each other along the second direction Y while being electrically separated from the plurality of first touch electrodes TE1. TIL). Each of the plurality of second touch electrodes TE2 according to an example may be disposed on the touch insulating layer TIL to be spaced apart from each other along the second direction Y, and the second direction. A plurality of connection lines disposed between two second electrode patterns EP2 adjacent to each other along (Y) to electrically connect two second electrode patterns EP2 adjacent to each other along the second direction Y ( CL). Accordingly, the plurality of second electrode patterns EP2 and the plurality of connection lines CL disposed along the first direction X are electrically connected to each other to form one second touch electrode TE2.

The touch routing part TRP is disposed on the non-display area IA of the substrate 100, and the plurality of first touch routing lines RL1 and a plurality of electrically connecting the touch electrode TE and the pad part PP. May include a second touch routing line RL2. In this case, the touch routing part TRP disposed on the third and fourth non-display areas IA3 and IA4 of the substrate 100 overlaps the gate driving circuit 200 provided on the substrate 100.

Each of the plurality of first touch routing lines RL1 is disposed on the touch insulating layer TIL on the first and fourth non-display areas IA1 and IA4 of the substrate 100. Each of the plurality of first touch routing lines RL1 is electrically connected to each of the plurality of first touch electrodes TE1 in the fourth non-display area IA4 of the substrate 100, and the plurality of first touch routing lines ( The other end of each of RL1 is electrically connected to the pad part PP in the first non-display area IA1 of the substrate 100.

Each of the plurality of second touch routing lines RL2 is disposed on the touch insulating layer TIL on the first to third non-display areas IA1, IA2, and IA3 of the substrate 100. Each of the plurality of second touch routing lines RL2 is electrically connected to each of the plurality of second touch electrodes TE2 in the second non-display area IA2 of the substrate 100, and the plurality of second touch routing lines ( Each other end of the RL2 is electrically connected to the pad part PP in the first non-display area IA1 of the substrate 100.

Each of the plurality of first touch routing lines RL1 and the plurality of second touch routing lines RL2 may include a lower touch routing line LLR and an upper touch routing line URL.

The lower touch routing line LLR is formed of the same conductive material as the bridge pattern BP on the touch buffer layer TBL. The lower touch routing line LLR and the bridge pattern BP may be simultaneously formed of the same conductive material.

The upper touch routing line URL is formed on the touch insulating layer TIL so as to overlap the lower touch routing line LLR, and the lower touch routing line through the line contact part LCP provided in the touch insulating layer TIL. LRL) is electrically connected. The upper touch routing line URL is formed of the same conductive material as the electrode patterns EP1 and EP2 of the touch electrode TE. The upper touch routing line URL and the electrode patterns EP1 and EP2 of the touch electrode TE may be formed of the same conductive material and formed at the same time.

The line contact part LCP may include a slit having a line shape or a dotted line shape. Accordingly, the upper touch routing line URL is electrically connected to the lower touch routing line LLR through the line contact part LCP, so that the resistance of the upper touch routing line URL is lower than the lower touch routing line LLR. Can be reduced by

The upper touch routing line URL of each of the plurality of first touch routing lines RL1 extends from the fourth non-display area IA4 of the substrate 100 toward the touch electrode part TEP so that the corresponding first touch electrode ( May be electrically connected to TE1). The upper touch routing line URL of each of the plurality of second touch routing lines RL2 extends from the second non-display area IA2 of the substrate 100 toward the touch electrode part TEP to correspond to the corresponding second touch electrode ( May be electrically connected to TE2).

The dummy pattern part DPP is disposed on the non-display area IA of the substrate 100 to overlap the common power line CPL and is electrically connected to the first portion of the common power line CPL. CPDP).

The common power dummy pattern CPDP is disposed on the touch buffer layer TBL between the touch routing part TRP and the end 100a (or the outer wall) of the substrate 100 so as to overlap the common power line CPL and the common power source. The electrical connection with the first portion of the line CPL reduces the resistance of the common power line CPL. The common power dummy pattern CPDP may be formed of the same conductive material as the touch electrode TE or the touch routing lines RL1 and RL2.

The common power dummy pattern CPDP according to an example may be made of the same material as any one of the bridge pattern BP, the electrode patterns EP1 and EP2, the lower touch routing line LLR, and the upper touch routing line URL. The formed single layer structure is electrically connected to the first portion of the common power line CPL to reduce the resistance of the common power line CPL.

According to another example, the common power dummy pattern CPDP may have at least a two-layer structure. For example, the common power dummy pattern CPDP according to another example may include a lower dummy pattern LDP and an upper dummy pattern UDP.

The lower dummy pattern LDP is disposed on the touch buffer layer TBL to overlap the common power line CPL and is electrically connected to the first portion of the common power line CPL in the non-display area IA of the substrate 100. Is connected. One end of the lower dummy pattern LDP is disposed in the region as close as possible to the touch routing part TRP, and the other side of the lower dummy pattern LDP is connected to the common power through the second contact hole 125b provided in the planarization layer 125. Is electrically connected to the first portion of the line CPL. The lower dummy pattern LDP may be formed of the same material as the bridge pattern BP of the touch electrode TE or the lower touch routing line LLR of the touch routing lines RL1 and RL2. The lower dummy pattern LDP is electrically connected to the common power line CPL to reduce the resistance of the common power line CPL.

The upper dummy pattern UDP is disposed on the lower dummy pattern LDP and electrically connected to the lower dummy pattern LDP. The upper dummy pattern UDP may be stacked on an upper surface of the lower dummy pattern LDP so as to directly contact the lower dummy pattern LDP. The upper dummy pattern UDP may be formed of the same material as the electrode patterns EP1 and EP2 of the touch electrode TE or the upper touch routing line URL of the touch routing lines RL1 and RL2. The upper dummy pattern UDP is electrically connected to the common power line CPL through the lower dummy pattern LDP to further reduce the resistance of the common power line CPL.

The touch protection layer TPL is formed on the substrate 100 to surround the touch sensor layer. The touch protective layer TPL may be formed of an inorganic material, for example, silicon oxide (SiOx) or silicon nitride (SiNx).

The touch screen integrated light emitting display device according to an example of the present application may further include a dam structure 129.

The dam structure 129 is disposed in the non-display area IA of the substrate 100 to prevent the organic encapsulation layer 133 from overflowing. The dam structure 129 according to an example may include a first dam 129a and a second dam 129b disposed side by side while being spaced apart from the first dam 129a in the non-display area IA of the substrate 100. It may include.

The first dam 129a is disposed in the non-display area IA of the substrate 100 to surround the display area AA of the substrate 100 to primarily prevent the overflow of the organic encapsulation layer 133. can do. The first dams 129a disposed in the second to fourth non-display areas IA2, IA3, and IA4 of the substrate 100 may be formed on the substrate 100 in the third contact hole 125c of the planarization layer 125. It can be formed vertically. According to an example, the first dam 129a may be formed of the same material as the bank pattern 127. According to another example, the first dam 129a may be formed of the same material as a spacer (or a partition) vertically formed on the bank pattern 127.

The second dam 129b may be disposed in the non-display area IA of the substrate 100 so as to surround the first dam 129a to serve to prevent the overflow of the organic encapsulation layer 133. . The second dam 129b disposed in the second to fourth non-display areas IA2, IA3, and IA4 of the substrate 100 may be formed vertically on the planarization layer 125 on the common power line CPL. . The second dam 129b may be formed at the same time as the first dam 129a.

The common power connection line CPCL is electrically connected to the second portion of the common power line CPL through the third contact hole 125c of the planarization layer 125 and covers the side surface and the top surface of the first dam 129a. It can be formed so that. In addition, the first inorganic encapsulation layer 131 may be formed to cover the dam structure 129.

The touch screen integrated light emitting display device according to an example of the present application may further include a black matrix and a wavelength conversion layer disposed between the encapsulation layer 130 and the touch sensor layer 140.

The black matrix is disposed on the encapsulation layer 130 to overlap the bank pattern 127.

The wavelength conversion layer is disposed on the encapsulation layer 130 to overlap the opening area OA of the pixel area PA.

The wavelength conversion layer may include a color filter that transmits only a wavelength of a color set to a pixel among white light incident from the light emitting device ED provided in the pixel area PA. For example, the wavelength conversion layer may transmit only red, green, or blue wavelengths.

According to another example, the wavelength conversion layer may include a quantum dot that emits light of a color set in the pixel by re-emission according to white light incident from the light emitting device ED provided in the pixel area PA. Here, the quantum dot may be selected according to the color set in the pixel in CdS, CdSe, CdTe, ZnS, ZnSe, GaAs, GaP, GaAs-P, Ga-Sb, InAs, InP, InSb, AlAs, AlP, or AlSb. For example, the quantum dots of CdSe or InP may emit red light, the quantum dots of CdZnSeS may emit green light, and the quantum dots of ZnSe may emit blue light. As such, when the wavelength conversion layer includes a quantum dot, color reproducibility may be increased.

The wavelength conversion layer according to another example may be formed of a color filter containing quantum dots.

In this example including the wavelength conversion layer, the light emitting device layer 130 may be commonly formed in each pixel P to simplify the manufacturing process.

On the other hand, when the light emitting layer EL of the light emitting device ED includes a light emitting layer emitting red, green, and blue light, the wavelength conversion layer may be omitted.

The touch screen integrated light emitting display device according to an example of the present application may further include an adhesive layer 150, a barrier film 160, an optical adhesive member 170, and an optical path control layer 180.

The adhesive layer 150 is formed on the substrate 100 to cover the touch sensor layer 140. The adhesive layer 150 may be made of a heat curable, photocurable, or naturally curable adhesive.

The barrier film 160 is attached onto the adhesive layer 150. The barrier film 160 is primarily used to prevent moisture or oxygen penetration, and may be made of a material having low moisture permeability.

The optical adhesive member 170 is formed on the barrier film 160. The optical adhesive member 170 may be a transparent adhesive resin layer or a transparent adhesive resin film.

The light path control layer 180 controls the path of incident light.

The light path control layer 180 according to an example may include a plurality of refractive layers. The plurality of refractive layers may have different refractive indices. For example, the optical path control layer 180 may have a structure in which a high refractive index layer and a low refractive layer are alternately stacked. The optical path control layer 180 according to this example changes the path of incident light to minimize color shift according to the viewing angle.

The light path control layer 180 according to another example may be a polarization layer. The polarization layer changes the external light reflected by the thin film transistor and / or the lines provided in the pixel array layer 120 to a circularly polarized state to improve visibility and contrast ratio.

Such a touch screen integrated display device according to an example of the present application is an electronic notebook, an electronic book, a portable multimedia player (PMP), navigation, an ultra mobile PC (UMPC), a smart phone, a mobile communication terminal, a mobile phone Televisions, laptops, monitors, refrigerators, microwave ovens, washing machines, cameras, as well as portable electronic devices such as tablet PCs, personal computers, smart watches, watch phones, or wearable devices. It can be applied to various products such as.

The touch screen integrated display device according to the present application may be described as follows.

A touch screen integrated display device according to an example of the present application includes a substrate including a display area and a non-display area surrounding the display area, a pixel driving electrode disposed on the display area of the substrate, a light emitting layer on the pixel driving electrode, and a common layer on the light emitting layer. A pixel array layer including an electrode, a common power line disposed on a non-display area of the substrate and electrically connected to the common electrode, an encapsulation layer surrounding the pixel array layer and exposing a portion of the common power line, and overlapping with the common power line It may include a common power dummy pattern disposed on the encapsulation layer and electrically connected to a portion of the common power line.

The touch screen integrated display device according to an example of the present application may further include a touch sensor layer having a touch electrode disposed on the encapsulation layer, and the common power dummy pattern may be formed of the same material as the touch electrode.

The touch screen integrated display device according to an example of the present application further includes a touch sensor layer disposed on an encapsulation layer, wherein the touch sensor layer electrically connects a plurality of electrode patterns electrically separated from each other, and a plurality of electrode patterns. The bridge pattern may be formed, and the common power dummy pattern may be formed of the same material as the bridge pattern.

The touch screen integrated display device according to an example of the present application further includes a touch sensor layer disposed on an encapsulation layer, wherein the touch sensor layer electrically connects a plurality of electrode patterns electrically separated from each other, and a plurality of electrode patterns. The common power dummy pattern may include a lower dummy pattern formed of the same material as the bridge pattern and electrically connected to a portion of the common power line, and an upper part formed of the same material as the electrode pattern and electrically connected to the lower dummy pattern. It may include a dummy pattern.

The touch screen integrated display device according to an example of the present application further includes a touch sensor layer having a touch electrode disposed on the encapsulation layer, and the touch sensor layer includes a touch including a touch electrode disposed on the encapsulation layer on the display area. And a touch routing line disposed on the electrode unit and the non-display area and electrically connected to the touch electrode, and the common power dummy pattern may be formed of the same material as the touch routing line.

In an example of the present application, the touch electrode includes a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the touch routing line is a lower touch routing formed of the same material as the bridge pattern. The line and the upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line, the common power dummy pattern may be formed of the same material as the lower touch routing line.

In an example of the present application, the touch electrode includes a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the touch routing line is a lower touch routing formed of the same material as the bridge pattern. A line, and an upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line, wherein the common power dummy pattern is formed of the same material as the lower touch routing line and electrically connected to a portion of the common power line. The lower dummy pattern may be connected to each other, and the upper dummy pattern formed of the same material as the upper touch routing line and electrically connected to the lower dummy pattern.

In one exemplary embodiment, a touch screen integrated display device includes a substrate having a display area and a non-display area surrounding the display area, a pixel array layer including a common electrode disposed on the display area of the substrate, and a non-display area of the substrate. A common power line disposed on and electrically connected to the common electrode, an encapsulation layer covering the remaining second portion except the first portion of the common power line and the pixel array layer, and a touch sensor layer disposed on the encapsulation layer, The touch sensor layer includes a touch electrode part having a touch electrode disposed on the encapsulation layer on the display area, and a common power dummy pattern disposed on the encapsulation layer so as to overlap the common power line and electrically connected to the first portion of the common power line. It may include a dummy pattern portion having.

In one example of the present application, the common power dummy pattern may be formed of the same material as the touch electrode.

In an example of the present application, the touch electrode may include a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the common power dummy pattern may be formed of the same material as the bridge pattern. have.

In an example of the present application, the touch electrode includes a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the common power dummy pattern is formed of the same material as the bridge pattern and is common. The lower dummy pattern may be electrically connected to the first portion of the power line, and the upper dummy pattern may be formed of the same material as the electrode pattern and electrically connected to the lower dummy pattern.

In an example of the present application, the touch sensor layer further includes a touch routing unit having a touch routing line electrically connected to the touch electrode, and the common power dummy pattern may be formed of the same material as the touch routing line.

In an example of the present application, the touch electrode includes a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the touch routing line is a lower touch routing formed of the same material as the bridge pattern. The line and the upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line, the common power dummy pattern may be formed of the same material as the lower touch routing line.

In an example of the present application, the touch electrode includes a plurality of electrode patterns electrically separated from each other, and a bridge pattern electrically connecting the plurality of electrode patterns, and the touch routing line is a lower touch routing formed of the same material as the bridge pattern. A line, and an upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line, wherein the common power dummy pattern is formed of the same material as the lower touch routing line and electrically connected to a portion of the common power line. The lower dummy pattern may be connected to each other, and the upper dummy pattern formed of the same material as the upper touch routing line and electrically connected to the lower dummy pattern.

Features, structures, effects, and the like described in the examples of the present application described above are included in at least one example of the present application, and are not necessarily limited to one example. Furthermore, the features, structures, effects, and the like illustrated in at least one example of the present application may be combined or modified with respect to other examples by those skilled in the art to which the present application belongs. Therefore, contents related to such combinations and modifications should be construed as being included in the scope of the present application.

The present application described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical matters of the present application. It will be apparent to those who have the knowledge of. Therefore, the scope of the present application is represented by the following claims, and it should be construed that all changes or modifications derived from the meaning and scope of the claims and equivalent concepts thereof are included in the scope of the present application.

100: substrate 200: gate driving circuit
300: driver integrated circuit 120: pixel array layer
130: encapsulation layer 140: touch sensor layer
150: adhesive layer CE: common electrode
CPL: Common Power Line CPDP: Common Power Dummy Pattern

Claims (16)

A substrate including a display area and a non-display area surrounding the display area;
A pixel array layer including a pixel driving electrode disposed on a display area of the substrate, a light emitting layer on the pixel driving electrode, and a common electrode on the light emitting layer;
A common power line disposed on the non-display area of the substrate and electrically connected to the common electrode;
An encapsulation layer surrounding the pixel array layer and exposing a portion of the common power line; And
And a common power dummy pattern disposed on the encapsulation layer to overlap the common power line and electrically connected to a portion of the common power line. The method of claim 1,
Further comprising a touch sensor layer having a touch electrode disposed on the encapsulation layer,
The common power dummy pattern is formed of the same material as the touch electrode. The method of claim 1,
Further comprising a touch sensor layer disposed on the encapsulation layer,
The touch sensor layer,
A plurality of electrode patterns electrically separated from each other; And
It includes a bridge pattern for electrically connecting the plurality of electrode patterns,
And the common power dummy pattern is formed of the same material as the bridge pattern. The method of claim 1,
Further comprising a touch sensor layer disposed on the encapsulation layer,
The touch sensor layer,
A plurality of electrode patterns electrically separated from each other; And
It includes a bridge pattern for electrically connecting the plurality of electrode patterns,
The common power dummy pattern is,
A lower dummy pattern formed of the same material as the bridge pattern and electrically connected to a portion of the common power line; And
And an upper dummy pattern formed of the same material as the electrode pattern and electrically connected to the lower dummy pattern. The method of claim 1,
Further comprising a touch sensor layer having a touch electrode disposed on the encapsulation layer,
The touch sensor layer,
A touch electrode part including the touch electrode on the encapsulation layer on the display area; And
A touch routing line disposed on the non-display area and electrically connected to the touch electrode,
And the common power dummy pattern is formed of the same material as the touch routing line. The method of claim 5, wherein
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
A bridge pattern electrically connecting the plurality of electrode patterns;
The touch routing line,
A lower touch routing line formed of the same material as the bridge pattern; And
An upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line,
And the common power dummy pattern is formed of the same material as the lower touch routing line. The method of claim 5, wherein
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
A bridge pattern electrically connecting the plurality of electrode patterns;
The touch routing line,
A lower touch routing line formed of the same material as the bridge pattern; And
An upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line,
The common power dummy pattern is,
A lower dummy pattern formed of the same material as the lower touch routing line and electrically connected to a portion of the common power line; And
And an upper dummy pattern formed of the same material as the upper touch routing line and electrically connected to the lower dummy pattern. A substrate having a display area and a non-display area surrounding the display area;
A pixel array layer including a common electrode on the display area of the substrate;
A common power line disposed on the non-display area of the substrate and electrically connected to the common electrode;
An encapsulation layer covering the remaining second portion except the first portion of the common power line and the pixel array layer; And
It includes a touch sensor layer disposed on the encapsulation layer,
The touch sensor layer,
A touch electrode part having a touch electrode disposed on the encapsulation layer on the display area; And
And a dummy pattern part disposed on the encapsulation layer so as to overlap the common power line and having a common power dummy pattern electrically connected to the first portion of the common power line. The method of claim 8,
The common power dummy pattern is formed of the same material as the touch electrode. The method of claim 8,
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
It includes a bridge pattern for electrically connecting the plurality of electrode patterns,
And the common power dummy pattern is formed of the same material as the bridge pattern. The method of claim 8,
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
It includes a bridge pattern for electrically connecting the plurality of electrode patterns,
The common power dummy pattern is,
A lower dummy pattern formed of the same material as the bridge pattern and electrically connected to the first portion of the common power line; And
And an upper dummy pattern formed of the same material as the electrode pattern and electrically connected to the lower dummy pattern. The method of claim 8,
The touch sensor layer further includes a touch routing unit having a touch routing line electrically connected to the touch electrode.
And the common power dummy pattern is formed of the same material as the touch routing line. The method of claim 12,
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
A bridge pattern electrically connecting the plurality of electrode patterns;
The touch routing line,
A lower touch routing line formed of the same material as the bridge pattern; And
An upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line,
And the common power dummy pattern is formed of the same material as the lower touch routing line. The method of claim 12,
The touch electrode,
A plurality of electrode patterns electrically separated from each other; And
A bridge pattern electrically connecting the plurality of electrode patterns;
The touch routing line,
A lower touch routing line formed of the same material as the bridge pattern; And
An upper touch routing line formed of the same material as the electrode pattern and electrically connected to the lower touch routing line,
The common power dummy pattern is,
A lower dummy pattern formed of the same material as the lower touch routing line and electrically connected to a portion of the common power line; And
And an upper dummy pattern formed of the same material as the upper touch routing line and electrically connected to the lower dummy pattern. The method according to any one of claims 1 to 14,
The non-display area may include a first non-display area defined at a first edge of the substrate, a second non-display area defined at a second edge of the substrate parallel to the first non-display area, and a third edge of the substrate. A third non-display area defined, and a fourth display area defined at a fourth edge of the substrate parallel to the third non-display area,
The first non-display area includes a pad part provided at a first edge of the substrate.
The common power line is electrically connected to the pad part and is disposed along the second to fourth non-display areas.
And the common power dummy pattern overlaps the common power line in the second to fourth non-display areas. The method according to any one of claims 1 to 14,
And a connection line electrically connecting the common power line and the common electrode.

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