KR20190133651A - Light emitting diode and led module having the same - Google Patents

Abstract

Disclosed are a light emitting diode and a light emitting diode module. The light emitting diode comprises: a first conductive semiconductor layer; a mesa positioned on the first conductive semiconductor layer and including an active layer and a second conductive semiconductor layer; a first ohmic contact structure in contact with the first conductive semiconductor layer; a second ohmic contact structure in contact with the second conductive semiconductor layer on the mesa; a lower insulating layer which covers the mesa and the first conductive semiconductor layer and has a first opening exposing the first ohmic contact structure and a second opening exposing the second ohmic contact structure; and a current spreading layer which is connected to the first ohmic contact layer exposed through the first opening of the lower insulating layer and has a third opening exposing the second opening. The first ohmic contact structure is formed separately from the current spreading layer, thereby providing more options of selecting metal materials of the current spreading layer. Accordingly, light reflectance of the current spreading layer can be improved.

Description

LIGHT EMITTING DIODE AND LED MODULE HAVING THE SAME

The present invention relates to a light emitting diode and a light emitting diode module, and more particularly, to a light emitting diode and a light emitting diode module having the same that can be adhered through a solder paste on a substrate such as a printed circuit board.

Since the development of gallium nitride (GaN) -based light emitting diodes, GaN-based LEDs have been used in various applications such as color LED display devices, LED traffic signals, and white LEDs.

A gallium nitride-based light emitting diode is generally formed by growing epi layers on a substrate such as sapphire, and includes an N-type semiconductor layer, a P-type semiconductor layer, and an active layer interposed therebetween. Meanwhile, an N-electrode pad is formed on the N-type semiconductor layer, and a P-electrode pad is formed on the P-type semiconductor layer. The light emitting diode is electrically connected to and driven by an external power source through the electrode pads. At this time, current flows from the P-electrode pad to the N-electrode pad via the semiconductor layers.

On the other hand, a light emitting diode having a flip chip structure is used to prevent light loss caused by a P-electrode pad and to improve heat dissipation efficiency, and various electrode structures have been proposed to assist current dispersion in a light emitting diode having a large area flip chip structure ( US 6,486,499). For example, a reflective electrode is formed on the P-type semiconductor layer, and the extension portions for current dispersion are formed on the exposed N-type semiconductor layer by etching the P-type semiconductor layer and the active layer.

The reflective electrode formed on the P-type semiconductor layer reflects the light generated in the active layer to improve the light extraction efficiency and also helps to distribute current in the P-type semiconductor layer. On the other hand, the extensions connected to the N-type semiconductor layer help to distribute current in the N-type semiconductor layer to generate light evenly in a wide active area. In particular, for a large area light emitting diode of about 1 mm 2 or more used for high power, current dispersion in the N-type semiconductor layer is required along with current dispersion in the P-type semiconductor layer.

However, the prior art has a limitation in distributing the current due to the large resistance of the extensions due to the use of linear extensions. Furthermore, since the reflective electrode is located confinedly on the P-type semiconductor layer, light that is not reflected by the reflective electrode and is lost by the pads and the extensions is generated considerably.

On the other hand, Korean Patent Publication No. 10-2013-0030178 lowers the resistance of the extension by adopting a current distribution layer covering the mesa while ohmic contact to the N-type semiconductor layer. Furthermore, it is disclosed that the current spreading layer comprises a reflective metal layer, thereby reducing light loss.

However, since the current dispersion layer includes an ohmic contact layer and a reflective metal layer, the light reflectance of the current dispersion layer is low.

On the other hand, when the light emitting diode is used in the final product, it is modularized into a light emitting diode module. The light emitting diode module generally includes a printed circuit board and a light emitting diode package mounted on the printed circuit board, and the light emitting diode is mounted in the light emitting diode package in the form of a chip. The conventional LED chip is mounted on a submount, lead frame or lead electrode using silver paste or AuSn solder, and then packaged. Then, the LED package is mounted on a printed circuit board through solder paste. Accordingly, the pads on the light emitting diode chip are located far from the solder paste and are adhered through a relatively stable silver paste or an adhesive material such as AuSn.

However, recently, a technique for manufacturing a light emitting diode module by bonding pads of a light emitting diode directly to a printed circuit board using solder paste has been studied. For example, a light emitting diode module may be manufactured by directly mounting on a printed circuit board without packaging a light emitting diode chip, or by manufacturing a so-called wafer level light emitting diode package and mounting the package on a printed circuit board. Can be. In these cases, since the pads are in direct contact with the solder paste, metal elements such as tin (Sn) in the solder paste diffuse into the light emitting diodes through the pads, thereby causing electrical shorts in the light emitting diodes, resulting in device defects. Can be.

SUMMARY OF THE INVENTION An object of the present invention is to provide a light emitting diode and a light emitting diode module capable of improving current dispersion performance and reducing light loss.

Another object of the present invention is to provide a light emitting diode module having a light emitting diode bonded on a substrate through a solder paste.

Another object of the present invention is to provide a light emitting diode and a light emitting diode module capable of preventing the diffusion of metal elements in the solder paste.

Other features and advantages of the invention will be apparent from the following description.

A light emitting diode according to an aspect of the present invention, the first conductive semiconductor layer; A mesa positioned on the first conductive semiconductor layer and including an active layer and a second conductive semiconductor layer; A first ohmic contact structure contacting the first conductive semiconductor layer; A second ohmic contact structure contacting the second conductivity type semiconductor layer on the mesa; A lower insulating layer covering the mesa and the first conductivity type semiconductor layer, the lower insulating layer having a first opening exposing the first ohmic contact structure and a second opening exposing the second ohmic contact structure; And a current spreading layer connected to the first ohmic contact layer exposed through the first opening of the lower insulating layer and having a third opening exposing the second opening.

By forming the first ohmic contact structure separately from the current spreading layer, the width of the metal material selection of the current spreading layer is increased, thereby improving the light reflectance of the current spreading layer.

In some embodiments, the light emitting diode may include a plurality of first ohmic contact structures. The current spreading layer may electrically connect the plurality of first ohmic contact structures to each other.

Since the plurality of first ohmic contact structures are electrically connected to each other by using the current spreading layer, current can be easily distributed to the first ohmic contact structures, thereby improving the current spreading performance of the light emitting diode. Moreover, the current spreading layer can be formed over a large area of the light emitting diode, thus lowering the resistance of the current spreading layer.

On the other hand, the current spreading layer has a laminated structure different from the first ohmic contact structure, it may include a metal reflective layer. Further, the metal reflective layer may be the lowest layer of the current spreading layer. Therefore, the light emitted through the side of the mesa is reflected directly in the metal reflective layer, as a result, it is possible to reduce the light loss by the current spreading layer.

The light emitting diode may further include a diffusion barrier reinforcement layer positioned in a third opening of the current spreading layer and connected to the second ohmic contact structure exposed through the second opening. Furthermore, the diffusion barrier reinforcing layer may have the same stacked structure as the current spreading layer. By adopting the diffusion preventing reinforcement layer, it is possible to prevent the diffusion of a metal such as Sn into the second ohmic contact structure.

Furthermore, the light emitting diode may include a plurality of mesas and a plurality of second ohmic contact structures connected to the second conductive semiconductor layer on each mesa. The diffusion barrier reinforcement layer may electrically connect the second ohmic contact structures.

The light emitting diode may further include an upper insulating layer covering the current spreading layer. The upper insulating layer has a fourth opening defining the first electrode pad region by exposing the current spreading layer and a fifth opening defining the second electrode pad region by exposing the upper region of the second ohmic contact structure.

The light emitting diode may further include a diffusion barrier reinforcement layer positioned in a third opening of the current spreading layer and connected to the second ohmic contact structure exposed through the second aperture, wherein the diffusion barrier reinforcement layer is It may be exposed to the fifth opening.

In addition, the current spreading layer and the diffusion barrier reinforcing layer may have the same laminated structure, and may include a metal reflective layer.

Furthermore, the current spreading layer may include a metal reflective layer, a diffusion barrier layer, and an antioxidant layer. Accordingly, the light generated in the active layer may be reflected by the current spreading layer and the diffusion preventing reinforcement layer, and the diffusion of Sn, etc. may be prevented, and thus, the LED may be mounted on a printed circuit board using solder paste. have.

In addition, the current spreading layer may further include an adhesive layer located on the antioxidant layer. The adhesive layer improves adhesion between the upper insulating layer and the current spreading layer positioned on the current spreading layer.

According to another aspect of the present invention, a light emitting diode module includes: a printed circuit board; And a light emitting diode bonded on the printed circuit board. The light emitting diode may be any of the light emitting diodes described above, and is bonded onto the printed circuit board through solder paste.

In particular, the light emitting diode includes: a first conductivity type semiconductor layer; A mesa positioned on the first conductive semiconductor layer and including an active layer and a second conductive semiconductor layer; A first ohmic contact structure contacting the first conductive semiconductor layer; A second ohmic contact structure contacting the second conductivity type semiconductor layer on the mesa; A lower insulating layer covering the mesa and the first conductivity type semiconductor layer, the lower insulating layer having a first opening exposing the first ohmic contact structure and a second opening exposing the second ohmic contact structure; A current spreading layer connected to the first ohmic contact layer exposed through the first opening of the lower insulating layer and having a third opening exposing the second opening; And an upper insulating layer covering the current spreading layer. The upper insulating layer may expose the current spreading layer to expose a fourth opening defining a first electrode pad region and an upper region of a second ohmic contact structure exposed through the second opening to expose a second electrode pad region. The first electrode pad region and the second electrode pad region may each be adhered to corresponding pads on the printed circuit board through solder paste.

According to still another aspect of the present invention, there is provided a light emitting diode manufacturing method, wherein a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are formed on a substrate, and the second conductive semiconductor layer and the active layer are patterned. A mesa is formed on a first conductive semiconductor layer, and a first ohmic contact structure is formed on the first conductive semiconductor layer and a second ohmic contact structure is formed on the second conductive semiconductor layer on the mesa. And forming a lower insulating layer covering the mesa and the first conductivity type semiconductor layer, wherein the lower insulating layer exposes a first opening exposing the first ohmic contact structure and a second opening exposing the second ohmic contact structure. And forming a current spreading layer connected to the first ohmic contact structure on the lower insulating layer. In addition, the current spreading layer has a third opening that exposes the second opening.

Since the first ohmic contact structure and the current spreading layer are formed in separate processes, it is not necessary to form the bottom layer of the current spreading layer with an ohmic metal, and therefore, light loss due to the current spreading layer can be reduced.

Meanwhile, the method may further include forming a diffusion barrier reinforcing layer located in the third opening while forming the current spreading layer. The diffusion barrier reinforcement layer may be formed of the same material in the same process as the current dispersion layer, and thus, the diffusion barrier reinforcement layer may have the same laminated structure as the current dispersion layer.

Furthermore, the method may further comprise forming an upper insulating layer covering the current spreading layer, the upper insulating layer exposing a fourth opening exposing the current spreading layer and the diffusion preventing reinforcement layer. It may have an opening.

The current spreading layer and the diffusion barrier reinforcing layer exposed through the fourth opening portion and the fifth opening portion may be used as electrode pads, respectively.

According to the embodiments of the present invention, by forming the first ohmic contact structure separately from the current spreading layer, the width of the metal material selection of the current spreading layer is increased, thereby improving the light reflectance of the current spreading layer. have. Furthermore, it is possible to provide a light emitting diode capable of preventing the diffusion of metal elements in the solder paste and a light emitting diode module having the same by using a current spreading layer and a diffusion preventing reinforcement layer. Furthermore, a light emitting diode with improved current spreading performance, in particular a flip chip type light emitting diode, can be provided.

1 is a schematic cross-sectional view for describing a light emitting diode module according to an embodiment of the present invention.
2 to 9b are views for explaining a method of manufacturing a light emitting diode and a light emitting diode module according to an embodiment of the present invention. In each of FIGS. 2 to 8, (a) is a plan view and (b) is a cutout line (C) shows the cross section taken along the cut line BB.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a schematic cross-sectional view for describing a light emitting diode module according to an embodiment of the present invention.

Referring to FIG. 1, a light emitting diode module includes a printed circuit board 51 having pads 53a and 53b and a light emitting diode 100 bonded to the printed circuit board 51 through solder paste 55. .

The printed circuit board is a substrate on which a printed circuit is formed, and is not particularly limited as long as it is a substrate for providing a light emitting diode module.

Meanwhile, a light emitting diode is mounted on a printed circuit board on which a lead frame or lead electrodes are formed, and a package on which the light emitting diode is mounted has been mounted on a printed circuit board. However, in the present embodiment, the light emitting diode 100 is mounted on the printed circuit board 51 through the solder paste 55 directly.

The light emitting diode 100 is inverted in a flip chip form and mounted on a printed circuit board. The light emitting diode 100 has a first electrode pad region 43a and a second electrode pad region 43b for mounting on a printed circuit board. These first and second electrode pad regions 43a and 43b may be recessed and positioned on one surface of the light emitting diode 100.

Meanwhile, the bottom surface of the light emitting diode 100, that is, the surface facing the first and second electrode pad regions 43a and 43b may be covered by the wavelength converter 45. The wavelength converter 45 may cover the lower surface of the light emitting diode 100 as well as the side surface thereof.

1 is schematically shown for convenience of description, and the structure and each component of the light emitting diode will be more clearly understood through the light emitting diode manufacturing method described below.

2 to 9b are views for explaining a method of manufacturing a light emitting diode and a light emitting diode module according to an embodiment of the present invention. In each of FIGS. 2 to 8, (a) is a plan view and (b) is a perforated line (C) shows the cross section taken along the cut line BB.

First, referring to FIG. 2, a first conductive semiconductor layer 21 is formed on a substrate 21, and a plurality of mesas M spaced apart from each other on the first conductive semiconductor layer 21 are formed. Is formed. The plurality of mesas M may include an active layer 25 and a second conductivity type semiconductor layer 27, respectively. Here, although the three mesas (M) are shown and described to be formed spaced apart from each other, a larger number of mesas (M) may be formed, one or two mesas (M) may be formed.

The plurality of mesas M may include an epitaxial layer including a first conductive semiconductor layer 23, an active layer 25, and a second conductive semiconductor layer 27 on a substrate 21. After growing using the same, the second conductive semiconductor layer 27 and the active layer 25 may be formed by patterning the first conductive semiconductor layer 23 to expose the first conductive semiconductor layer 23. Sides of the plurality of mesas M may be formed to be inclined by using a technique such as photoresist reflow. The inclined profile of the mesa (M) side improves the extraction efficiency of the light generated in the active layer 25.

The substrate 21 may be a substrate capable of growing a gallium nitride based semiconductor layer, and may be, for example, a sapphire substrate, a silicon carbide substrate, a gallium nitride (GaN) substrate, a spinel substrate, or the like. In particular, the substrate may be a patterned substrate, such as a patterned sapphire substrate.

The first conductive semiconductor layer 23 may include, for example, an n-type gallium nitride based layer, and the second conductive semiconductor layer 27 may include a p-type gallium nitride based layer. In addition, the active layer 25 may be a single quantum well structure or a multi-quantum well structure, and may include a well layer and a barrier layer. In addition, the well layer may be selected in its composition according to the wavelength of light required, for example AlGaN, GaN or InGaN. Depending on the compositional elements of the active layer, the light emitting diodes are either light emitting diodes emitting visible light or light emitting diodes emitting ultraviolet light.

As shown in FIG. 2, when a plurality of mesas M are formed on the first conductivity type semiconductor layer 21, the plurality of mesas M have an elongated shape and extend in parallel to each other in one direction. can do. This shape simplifies forming a plurality of mesas M of the same shape in the plurality of chip regions on the substrate 21.

Referring to FIG. 3, a first ohmic contact structure 29 is formed on the first conductive semiconductor layer 21 exposed by mesa etching. The first ohmic contact structure 29 may be formed between the mesas M and along edges along the length direction of the mesas M. As shown in FIG. The first ohmic contact structure 29 may be formed of a material in ohmic contact with the first conductivity-type semiconductor layer 21, and may include, for example, Ti / Al. In particular, in the case of an ultraviolet light emitting diode, the first ohmic contact structure may have a stacked structure of Ti / Al / Ti / Au.

In the present embodiment, although the plurality of first ohmic contact structures 29 are illustrated and described as being spaced apart from each other, one first ohmic contact structure 29 connected to each other is formed on the first conductivity-type semiconductor layer 21. It may be formed.

Referring to FIG. 4, a second ohmic contact structure 35 is formed on the mesas M. Referring to FIG. The second ohmic contact structure 35 may be formed using a lift off technique. The second ohmic contact structure 35 is formed on each mesa M, and has a shape substantially similar to the mesa M. FIG.

The second ohmic contact structure 35 may have a different structure depending on the type of light emitting diode. For example, in the light emitting diode emitting ultraviolet rays in the UVB region and near the UVB region, the second ohmic contact structure 35 may include Ni / Au or Ni / Au and an adhesive layer thereon.

On the other hand, in the case of a blue light emitting diode or an ultraviolet light emitting diode in the UVA region close to blue light, the second ohmic contact structure 35 includes a reflective metal portion 31, a capping metal portion 32, and an anti-oxidation metal portion 33. can do. The reflective metal part 31 may include an ohmic layer and a reflective layer, and may include a stress relaxation layer between the capping metal part 32. The stress relieving layer relieves the stress due to the difference in thermal expansion coefficient between the reflective metal portion 31 and the capping metal portion 32.

The reflective metal part 31 may be formed of, for example, Ni / Ag / Ni / Au, and may have a total thickness of about 1600 mm. The reflective metal portion 31 is formed so that the side is inclined as shown, that is, the bottom portion has a relatively wider shape. The reflective metal part 31 may be formed using an electron-beam evaporation method after forming a photoresist pattern having an opening that exposes the mesas M.

Meanwhile, the capping metal part 32 covers the upper and side surfaces of the reflective metal part 31 to protect the reflective metal part 31. The capping metal portion 32 may be formed using a sputtering technique or by using an electron-beam evaporation method (eg, planetary e-beam evaporation) that rotates and vacuum-deposits the substrate 21. The capping metal part 32 may include Ni, Pt, Ti, or Cr, and may be formed by depositing about 5 pairs of Ni / Pt or about 5 pairs of Ni / Ti, for example. Alternatively, the capping metal part 32 may include TiW, W, or Mo.

The stress relaxation layer may be variously selected according to the metal material of the reflective layer and the capping metal part 32. For example, when the reflective layer is Al or Al alloy, and the capping metal portion 32 includes W, TiW or Mo, the stress relaxation layer is a single layer of Ag, Cu, Ni, Pt, Ti, Rh, Pd or Cr. Or a composite layer of Cu, Ni, Pt, Ti, Rh, Pd or Au. In addition, when the reflective layer is Al or Al alloy and the capping metal part 32 is Cr, Pt, Rh, Pd or Ni, the stress relaxation layer is a single layer of Ag or Cu, or a composite of Ni, Au, Cu or Ag. It may be a layer.

In addition, when the reflective layer is Ag or Ag alloy, and the capping metal portion 32 includes W, TiW or Mo, the stress relaxation layer is a single layer of Cu, Ni, Pt, Ti, Rh, Pd or Cr, or Cu , Ni, Pt, Ti, Rh, Pd, Cr or Au may be a composite layer. In addition, when the reflective layer is Ag or Ag alloy, and the capping metal part 32 is Cr or Ni, the stress relaxation layer is a single layer of Cu, Cr, Rh, Pd, TiW, Ti, or a composite of Ni, Au, or Cu. It may be a layer.

In addition, the anti-oxidation metal part 33 includes Au to prevent oxidation of the capping metal part 32, and may be formed of, for example, Au / Ni or Au / Ti. Ti is preferred because of good adhesion of an oxide layer such as SiO ₂ . The anti-oxidation metal part 33 may also be formed using an electron-beam evaporation method (eg, planetary e-beam evaporation) in which sputtering or vacuum tilting and rotating the substrate 21 are performed.

After the second ohmic contact structure 35 is deposited, the photoresist pattern is removed to leave the second ohmic contact structure structure 35 on the second conductive semiconductor layer 27 as shown in FIG. 4. .

In the present embodiment, the mesa M, the first ohmic contact structure 29 and the second ohmic contact structure 35 have been described as being sequentially formed, but the order of formation thereof may be changed. For example, the second ohmic contact structure 35 may be formed before the first ohmic contact structure 29 and may also be formed before the mesa M.

Referring to FIG. 5, after the first and second ohmic contact structures are formed, a lower insulating layer 37 is formed to cover the mesa M and the first conductive semiconductor layer 21. The lower insulating layer 37 may be formed of an oxide film such as SiO ₂ , a nitride film such as SiNx, or an insulating film of MgF ₂ using a technique such as chemical vapor deposition (CVD). The lower insulating layer 37 may be formed to have a thickness of, for example, 4000 to 12000 μs. The lower insulating layer 37 may be formed as a single layer, but is not limited thereto and may be formed as a multilayer. Further, the lower insulating layer 37 may be formed of a distributed Bragg reflector (DBR) in which the low refractive material layer and the high refractive material layer are alternately stacked. For example, an insulating reflective layer having a high reflectance can be formed by laminating layers such as SiO ₂ / TiO ₂ or SiO ₂ / Nb ₂ O ₅ .

Subsequently, an isolation region 23h may be formed to separate the lower insulating layer 37 and the first conductivity-type semiconductor layer 23 into units of chips using a laser scribing technique. Grooves may also be formed on the upper surface of the substrate 21 by laser scribing. Accordingly, the substrate 21 is exposed near the edge of the first conductivity type semiconductor layer 23.

A separate photo mask is not used because the first conductive semiconductor layer 23 is separated by a chip using a laser scribing technique.

In the present embodiment, after forming the lower insulating layer 37, the lower insulating layer 37 and the first conductive semiconductor layer 23 are separated by a chip unit using a laser scribing technique, but the lower insulating layer Before forming (37), the first conductivity-type semiconductor layer 23 may be separated in units of chips using a laser scribing technique.

Referring to FIG. 6, patterning the lower insulating layer 37 to expose the first ohmic contact structures 29 and the second openings exposing the second ohmic contact structures 35. Field 37b is formed.

As shown in FIG. 6A, the second openings 37b may be formed on each mesa M by being biased at one edge of the substrate 21. In addition, the first ohmic contact structures 29 positioned between the second openings 37b are covered with the lower insulating layer 37, as shown in FIG. 6B.

Meanwhile, the first ohmic contact structures 29 positioned at the edges of the substrate 21 of the first ohmic contact structures 29 may be entirely exposed by the first openings 37a. However, in the case of the first ohmic contact structures 29 located between the mesas M, the first ohmic contact structure 29 and the second ohmic contact structure 35 are prevented from being shorted in a subsequent process. The areas exposed to the first openings 37a are located away from the areas between the second openings 37a.

Referring to FIG. 7, a current spreading layer 39 is formed on the lower insulating layer 37. The current spreading layer 39 covers the mesas M and the first conductivity type semiconductor layer 23. In addition, the current spreading layer 39 has a third opening 39a exposing the second openings 37b. The third opening 39a exposes the second ohmic contact structures 35 exposed through the second openings 37b. Thus, the current spreading layer 39 is insulated from the mesa M and the second ohmic contact structures 35 by the lower insulating layer 37.

Meanwhile, the current spreading layer 39 is electrically connected to the first ohmic contact structure 29 through the openings 37a of the lower insulating layer 37. The first ohmic contact structures 29 spaced apart from each other may be electrically connected to each other through the current spreading layer 39. Furthermore, the current spreading layer 39 can cover the side surfaces of the first ohmic contact structures 29, so that light incident on the side surfaces of the first ohmic contact structures 29 is prevented from the current spreading layer 39. Can be reflected.

As shown in FIG. 7, the current spreading layer 39 covers most of the region on the substrate 21, and thus, the resistance is low so that current can be easily distributed to the first ohmic contact structures 29.

The current spreading layer 39 may include a metal reflective layer, a diffusion barrier layer, and an antioxidant layer. Furthermore, the metal reflective layer can be the lowest layer of the current spreading layer 39. The metal reflective layer reflects light incident to the current spreading layer to increase the reflectance of the light emitting diode. Al may be used as the metal reflective layer. In addition, the diffusion barrier layer protects the metal reflective layer by preventing diffusion of metal atoms. In particular, the diffusion barrier layer can prevent diffusion of metal atoms in the solder paste such as Sn. The diffusion barrier layer may comprise Cr, Ti, Ni, Mo, TiW or W or a combination thereof. Mo, TiW and W may be formed in a single layer. Meanwhile, Cr, Ti, and Ni may be formed in pairs. In particular, the diffusion barrier layer may include at least two pairs of Ti / Ni or Ti / Cr. On the other hand, the antioxidant layer is formed to prevent the oxidation of the diffusion barrier layer, it may include Au.

The current spreading layer 39 has a more improved reflectance compared to a conventional current spreading layer including an ohmic contact layer at a lowermost layer. Accordingly, the light loss generated by absorbing light in the current spreading layer 39 can be reduced.

The current spreading layer may further include an adhesive layer positioned on the antioxidant layer. The adhesive layer may comprise Ti, Cr, Ni or Ta. The adhesive layer may be used to improve the adhesion between the current spreading layer and the upper insulating layer, and may be omitted.

For example, the current spreading layer 39 may have a multilayer structure of Al / Ni / Ti / Ni / Ti / Au / Ti.

Meanwhile, the diffusion barrier reinforcement layer 40 may be formed in the third opening 39a while the current dispersion layer 39 is formed. The diffusion barrier reinforcing layer 40 may be formed of the same material as the current dispersion layer 39 by the same process. Therefore, the diffusion barrier reinforcement layer 40 has the same laminated structure as the current dispersion layer 39.

Meanwhile, the diffusion barrier reinforcing layer 40 is spaced apart from the current spreading layer 39 and connects to the second ohmic contact structures 35 exposed through the second opening 37b. The second ohmic contact structures 35 spaced apart from each other by the diffusion barrier reinforcing layer 40 may be electrically connected to each other. In addition, as shown in FIG. 7C, the diffusion barrier reinforcement layer 40 is insulated from the first ohmic contact structures 29 by the lower insulating layer 37.

In order to prevent light loss, the current spreading layer 39 and the diffusion barrier reinforcing layer 40 may cover 80% or more of the total chip area.

Referring to FIG. 8, an upper insulating layer 41 is formed on the current spreading layer 39. The upper insulating layer 41 exposes the current spreading layer 39 to define the first pad region 43a, and the diffusion preventing reinforcement layer 40 to expose the second pad region 43a. It has an opening part 41b to define. The openings 41a and 41b may have an elongated shape in a direction perpendicular to the mesas M. FIG. Meanwhile, the opening 41b of the upper insulating layer 41 may have a smaller area than the opening 39a of the current spreading layer 39, and may further have a smaller area than the area of the diffusion barrier reinforcing layer 40. . Thus, the upper insulating layer 41 covers the sidewall of the third opening 39a.

On the other hand, when the diffusion barrier reinforcing layer 40 is omitted, the opening 41b exposes the second openings 37b and also the second ohmic contact structures 350 exposed in the second openings 37b. In this case, the second ohmic contact structures 35 may be used as the second pad region.

In addition, the upper insulating layer 41 may also be formed in the chip isolation region 23h to cover the side surface of the first conductivity-type semiconductor layer 23. Accordingly, it is possible to prevent moisture or the like from penetrating through the upper and lower interfaces of the first conductivity type semiconductor layer.

The upper insulating layer 41 may be formed of a silicon nitride film to prevent diffusion of metal elements of the solder paste, and may be formed to a thickness of 1 μm or more and 2 μm or less. If it is less than 1 µm, it is difficult to prevent diffusion of metal elements of the solder paste.

Optionally, a Sn diffusion barrier plating layer (not shown) is added on the first electrode pad region 43a and the second electrode pad region 43b by using an electroless plating technique such as electroless nickel immersion gold (ENIG). It can be formed as.

The first electrode pad region 43a is electrically connected to the first conductive semiconductor layer 23 through the current spreading layer 39 and the first ohmic contact structure 29, and the second electrode pad region 43b is The diffusion preventing reinforcement layer 40 and the second ohmic contact structure 35 are electrically connected to the second conductive semiconductor layer 27.

The first electrode pad region 43a and the second electrode pad region 43b may be used to mount a light emitting diode to a printed circuit board through solder paste. Therefore, in order to prevent the first electrode pad region 43a and the second electrode pad region 43b from being shorted by the solder paste, the distance between the electrode pads is preferably about 300 μm or more.

Thereafter, the bottom surface of the substrate 21 may be partially removed through a grinding and / or lapping process to reduce the thickness of the substrate 21. Subsequently, the light emitting diodes separated from each other are produced by dividing the substrate 21 into individual chip units. In this case, the substrate 21 may be separated in the separation region 23h formed using the laser scribing technique, and thus, it is not necessary to perform laser scribing further for chip separation.

The substrate 21 may be removed from the LED chip before or after being divided into individual LED chip units.

Meanwhile, the wavelength converter 45 of FIG. 1 may be formed on the light emitting diodes separated from each other. The wavelength converter 45 may be formed by coating a resin containing a phosphor on a light emitting diode by using a printing technique, or by coating a phosphor powder on a substrate 21 by using an aerosol spraying device. In particular, by using the aerosol deposition method, it is possible to form a phosphor thin film having a uniform thickness on the light emitting diode, thereby improving the color uniformity of the light emitted from the light emitting diode. Accordingly, a light emitting diode according to embodiments of the present invention is completed, and the light emitting diode is bonded to the corresponding pads 53a and 53b of the printed circuit board 51 through solder paste as shown in FIG. 1. The light emitting diode module is completed.

Specifically, referring to FIGS. 9A and 9B, FIG. 9A is a schematic perspective view of the light emitting diode module, and FIG. 9B (a) is a cross-sectional view of the light emitting diode module taken along the cutting line AA of FIG. 9A. b) is a cross-sectional view of the light emitting diode module taken along the cut line BB of FIG. 9A, and FIG. 9B (c) is a cross-sectional view of the light emitting diode module taken along the cut line CC of FIG. 9A. Unlike the embodiment of FIG. 1 in the present embodiment, the wavelength converter is omitted for the purpose of description, but the present invention is not limited thereto.

9A and 9B, in the light emitting diode module according to the present invention, at least a part of the solder paste 55 is disposed in the first electrode pad region 43a and the second electrode pad region 43b. It can be completed by bonding to each of the corresponding pads (53a, 53b) of the printed circuit board 51.

Claims (15)

A first conductivity type semiconductor layer;
A mesa positioned on the first conductive semiconductor layer and including an active layer and a second conductive semiconductor layer;
An ohmic contact structure contacting the second conductivity type semiconductor layer;
A plurality of first openings covering the mesa and the first conductivity type semiconductor layer, the plurality of first openings partially exposing the first conductivity type semiconductor layer and the ohmic contact structure, and disposed between the first openings; A lower insulating layer having a second opening;
A current spreading layer having a plurality of third openings exposing the second openings and electrically connected to the first conductive semiconductor layer through the first openings;
A diffusion barrier reinforcement layer disposed in a third opening of the current spreading layer and connected to the ohmic contact structure exposed by the second opening and electrically connected to the second conductive semiconductor layer; And
And a light emitting diode comprising an upper insulating layer covering the current spreading layer.
The current spreading layer is spaced apart from the diffusion barrier reinforcement layer is a light emitting diode module surrounding the edge of the diffusion barrier reinforcement layer.
The method according to claim 1,
The ohmic contact structure includes a reflective metal part, a capping metal part, and an anti-oxidation metal part.
The method according to claim 2,
The anti-oxidation metal portion of the light emitting diode module including Au.
The method according to claim 3,
The anti-oxidation metal part further comprises Ti or Ni.
The method according to claim 2,
The anti-oxidation metal part is positioned between the capping metal part and the lower insulating layer and in contact with the capping metal part and the lower insulating layer.
The method according to claim 1,
The plurality of first openings are divided into a plurality of first-first openings and a plurality of 1-2 openings,
The first-second opening is located closer to the edge of the light emitting diode than the first-first opening.
The method according to claim 6,
The first-second opening has a length longer than that of the first-first opening.
The method according to claim 1,
And the current spreading layer and the diffusion barrier reinforcing layer cover 80% or more of the total area of the light emitting diode.
The method according to claim 1,
And the current spreading layer and the diffusion barrier reinforcing layer have the same stacked structure.
The method according to claim 1,
The current spreading layer and the diffusion barrier reinforcing layer comprises a metal reflective layer.
The method according to claim 1,
And a printed circuit board having the light emitting diode mounted thereon and having a first pad and a second pad electrically connected to the light emitting diode.
The method according to claim 11,
The upper insulating layer includes a fourth opening exposing the current spreading layer and defining a first electrode pad region, and a fifth opening exposing an upper region of the diffusion preventing reinforcement layer and defining a second electrode pad region,
The first pad and the second pad of the printed circuit board are bonded to the first electrode pad region and the second pad region of the light emitting diode by solder paste.
The method according to claim 12,
The solder paste is interposed between the first pad and the second pad corresponding to the first electrode pad region and the second electrode pad region.
The method according to claim 13,
And the solder paste is in contact with the current spreading layer and the diffusion barrier reinforcing layer, and a portion of the solder paste is in contact with the upper insulating layer.
The method according to claim 12,
A portion of the solder paste is in contact with the side surface of the upper insulating layer.

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