KR20190063569A - organic light emitting display device - Google Patents

Abstract

The present invention relates to an organic light emission display device capable of reducing power consumption through a high-potential voltage changing method. The organic light emission display device includes: an organic light emission display panel including a plurality of gate lines and a plurality of data lines placed therein and a plurality of sub pixels placed in an area in which the gate lines and the data lines intersect; a power supply circuit outputting a high-potential voltage (EVDD) for operating the organic light emission display panel; a voltage changing circuit changing the high-potential voltage provided from the power supply circuit to the organic light emission display panel into different shapes; a pair of switching circuits selectively delivering the voltage outputted from the voltage changing circuit to the organic light emission display panel in accordance with a switching operation; and a timing control part analyzing input image data and controlling the operation of the voltage changing circuit to generate voltages having different shapes, and controlling the switching operation of the switching circuits. High-potential voltages are alternately operated in a linear area to reduce power consumption.

Description

[0001] The present invention relates to an organic light emitting display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting diode (OLED) display, and more particularly, to an organic light emitting diode (OLED) display capable of reducing power consumption in a variable manner at a high potential.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, there is an increasing demand for an organic light emitting display (OLED). The organic light emitting display includes a display panel including a plurality of sub-pixels, a driver for outputting a drive signal for driving the display panel, and a power supply for generating a power source to be supplied to the display panel and the driver. The driving unit includes a scan driver for supplying a scan signal (or a gate signal) to the display panel, and a data driver for supplying a data signal to the display panel.

In the OLED display device, when driving signals, such as a scan signal and a data signal, are supplied to the subpixels formed on the display panel, the selected subpixel emits light, thereby displaying an image.

There is a need for a method for reducing the power consumption of such an organic light emitting display device.

FIG. 1 is a circuit diagram of a conventional sub-pixel, and FIG. 2 is a current / voltage curve diagram of a driving transistor according to a conventional driving method.

As shown in FIGS. 1 and 2, a subpixel is implemented by driving a driving transistor DTFT in a saturation region, and a high driving voltage (Vds and EVDD ) Was used.

Conventionally, the OLED display uses a driving transistor (DTFT) limited to a saturation region. Therefore, unnecessary power is consumed by using a high level of the high voltage EVDD. Further, there is no logic that can drive the driving transistor by varying the high-potential voltage EVDD applied to the driving transistor DTFT or alternately.

An object of the present invention is to provide an organic light emitting display capable of reducing power consumption.

It is another object of the present invention to provide an organic light emitting diode display device capable of reducing power consumption by alternately driving a high potential voltage in a linear region.

According to an aspect of the present invention, there is provided an OLED display including a plurality of gate lines, a plurality of data lines, and a plurality of subpixels arranged in a region where gate lines and data lines cross each other, ; A power supply unit for outputting a high potential voltage (EVDD) for driving the organic light emitting display panel; A voltage variable circuit which varies the high potential voltage provided from the power supply unit to the organic light emitting display panel in different forms; A pair of switching circuits selectively transmitting a voltage output from the voltage variable circuit to the organic light emitting display panel according to a switching operation; And a timing controller for controlling the operation of the voltage variable circuit to generate voltages of different types by analyzing the data of the input image and controlling the switching operation of the pair of switching circuits .

In the OLED display according to the present invention, the timing controller extracts a luminance component of input image data and determines an output high-potential voltage of the voltage-variable circuit.

In the organic light emitting diode display according to the present invention, the timing control unit assigns a weight according to a display position of an input image to determine an output high potential voltage of the voltage variable circuit.

In the organic light emitting diode display according to the present invention, the timing controller communicates with the power supply circuit to vary the output high-potential voltage of the voltage variable circuit.

The OLED display according to the present invention is characterized in that the voltage variable circuit varies the high-potential voltage (EVDD) received from the power supply unit according to the control signal of the timing control unit to generate the first high- A first converter (Buck converter) And a second buck converter for varying a high potential voltage (EVDD) received from the power supply unit according to a control signal of the timing control unit and outputting a second high potential voltage (EVVD2).

In the organic light emitting display according to the present invention, the output of the first buck converter and the output of the second buck converter may all be used in a linear area and a saturation area in an alternating manner .

In the organic light emitting display according to the present invention, while one of the buck converters of the voltage variable circuit supplies the operating voltage to the organic light emitting display panel, the other buck converter outputs the image data analysis result of the timing controller And outputs a voltage for the next frame.

In the organic light emitting diode display according to the present invention, the timing controller may control a high voltage applied to the organic light emitting display panel in a low period of a vertical synchronization signal or during an off period of a global shutter signal during a blanking period, So that the switching operation of the pair of switching circuits can be controlled.

The organic light emitting diode display according to the present invention may exhibit the following effects.

First, it is possible to reduce the power consumption by alternately driving the high potential voltage in the linear region.

Second, the high-potential voltage can be alternated continuously.

FIG. 1 is a circuit configuration diagram of a conventional subpixel.
2 is a current / voltage curve diagram of a driving transistor according to a conventional driving method.
3 is a block diagram schematically showing an organic light emitting display according to an embodiment of the present invention.
FIG. 4 is a schematic diagram showing the subpixel shown in FIG. 3. FIG.
5 is a block diagram of an organic light emitting display according to an embodiment of the present invention.
6A and 6B are diagrams for explaining an operation of applying different high-potential voltages according to an embodiment of the present invention.
7 is a waveform diagram showing the relationship between the vertical synchronizing signal and the output signal of the voltage variable circuit.
8 is a waveform diagram showing the relationship between the global shutter signal and the output signal of the voltage variable circuit.
9 is a current / voltage curve diagram of a driving transistor according to an embodiment of the present invention.

For specific embodiments of the invention disclosed herein, specific structural and functional descriptions are set forth for the purpose of describing an embodiment of the invention only, and it is to be understood that the embodiments of the invention may be embodied in various forms, And should not be construed as limited to the embodiments described.

The invention is capable of various modifications and may take various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It is to be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but on the contrary, is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

The terms first, second, etc. may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises ", or" having ", and the like, are intended to specify the presence of stated features, integers, But do not preclude the presence or addition of steps, operations, elements, parts, or combinations thereof.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be construed to indicate meaning consistent with the meaning of the context in the relevant art and are to be construed as either ideal or overly formal in meaning unless expressly defined in the present application Do not.

On the other hand, if an embodiment is otherwise feasible, the functions or operations specified in a particular block may occur differently than the order specified in the flowchart. For example, two consecutive blocks may actually be performed at substantially the same time, and depending on the associated function or operation, the blocks may be performed backwards.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

The organic light emitting display may be implemented as a top emission type, a bottom emission type, or a dual emission type depending on a light emitting direction. The organic light emitting display device may include an inverted staggered type or a staggered type including a back channel etched (BCE) or an etch stopper (ES) in a back channel according to a channel structure of a transistor. Or a coplanar structure. The organic light emitting display may be implemented based on oxide, low temperature polysilicon (LTPS), amorphous silicon (a-Si), or polysilicon (p-Si) depending on the semiconductor material of the transistor. The OLED display may be implemented as a television, a navigation system, an image player, a personal computer (PC), a wearable (watch, glasses, etc.), and a mobile phone (smart phone).

3 is a block diagram schematically showing an organic light emitting diode display according to the present invention. 3, the OLED display includes a host system 10, a timing controller 170, a data driver 130, a power supply circuit 140, a gate driver 150, and a display panel 110 .

The host system 10 includes a system on chip (SoC) with a built-in scaler and converts the digital video data of the input image into a data signal of a format suitable for display on the display panel 110 and outputs the data signal. The host system 10 supplies various timing signals together with the data signals to the timing controller 170. [

The timing controller 170 controls the operation timings of the data driver 130 and the gate driver 150 based on the timing signals such as the vertical synchronization signal, the horizontal synchronization signal, the data enable signal, and the main clock input from the host system 10 . The timing controller 170 performs image processing (such as data compensation) on the data signal input from the host system 10 and supplies the data signal to the data driver 130.

The data driver 130 operates in response to the data control signal DDC output from the timing controller 170. The data driver 130 converts the digital data signal DATA input from the timing controller 170 into an analog data signal.

The data driver 130 converts the digital data signal DATA into an analog data signal corresponding to the gamma voltage of the gamma unit provided inside or outside. The data driver 130 supplies data signals to the data lines DL1 to DLn of the display panel 110. [

The gate driver 150 operates in response to the gate control signal GDC output from the timing controller 170. [ The gate driver 150 outputs a gate signal (or a scan signal) of a gate high voltage or a gate low voltage.

The gate driver 150 sequentially outputs the gate signals in the forward direction or sequentially outputs the gate signals in the reverse direction. The gate driver 150 supplies gate signals to the gate lines GL1 to GLm of the display panel 110. [

The power supply circuit 140 supplies a high voltage (drain voltage) and a low potential voltage (source voltage) (EVDD, EVSS) for driving the display panel 110, a collector voltage for driving the data driver 130, And outputs the ground voltage (VCC, GND). In addition, the power supply circuit 140 generates a voltage required for driving the display device, such as a gate high voltage or a gate low voltage, to be transmitted to the gate driver 150.

The display panel 110 includes subpixels SP, data lines DL1 to DLn connected to the subpixels SP and gate lines GL1 to GLm connected to the subpixels SP. The display panel 110 displays an image corresponding to the gate signal output from the gate driver 150 and the data signal DATA output from the data driver 130. The display panel 110 includes a lower substrate and an upper substrate. The subpixels SP are formed between the lower substrate and the upper substrate. The gate driver 130 may be formed on the first side and the second side of the panel 110.

As shown in FIG. 4, one sub-pixel is supplied with a switching thin film transistor SW and a switching thin film transistor SW connected to (or formed at) the gate line GL1 and the data line DL1 And a pixel circuit PC that operates in response to the data signal DATA. The pixel circuit PC includes a circuit such as a driving transistor, a storage capacitor, an organic light emitting diode, and a pixel compensation circuit for compensating for one of them.

The pixel compensation circuit is provided to compensate for the characteristics (threshold voltage, current mobility, etc.) of the driving transistor, the characteristics (threshold voltage) of the organic light emitting diode, and deterioration thereof. The pixel compensation circuit operates on its own or in conjunction with an external circuit. The pixel compensation circuit is composed of one or more thin film transistors, capacitors, and the like. The pixel compensation circuit can be configured in a wide variety of ways according to the compensation method, so that a specific illustration and description thereof will be omitted.

5 is a block diagram of an organic light emitting display according to an embodiment of the present invention.

An organic light emitting display panel (110) including a plurality of sub pixels arranged in a region where a plurality of gate lines and a plurality of data lines are arranged and a gate line and a data line intersect; A power supply circuit 140 for outputting a high potential voltage (EVDD) for driving the organic light emitting display panel 110; A voltage variable circuit (200) for varying a high potential voltage provided to the organic light emitting display panel from the power supply circuit (140) in different forms; A pair of switching circuits (300) for selectively transmitting a voltage output from the voltage variable circuit (200) to the organic light emitting display panel (110) according to a switching operation; A timing controller 170 for controlling the operation of the voltage variable circuit 200 to generate voltages of different types by analyzing data of the input image and controlling the switching operation of the pair of the switching circuits 300, .

The voltage variable circuit 200 varies the high potential voltage EVDD received from the power supply circuit 140 according to the control signal of the timing control unit 170 and outputs the first high potential voltage EVVD1 1 converter 210; And a second converter 220 for varying the high potential voltage EVDD received from the power supply circuit according to the control signal of the timing controller 170 and outputting the second high potential voltage EVVD2 .

The timing controller 170 extracts the luminance component of the input image data and determines the magnitude of the high potential voltage EVDD to be output from the voltage variable circuit 200. In addition, the timing controller 170 assigns a weight according to the display position of the input image, and determines the magnitude of the high-potential voltage EVDD to be output from the voltage variable circuit 200. The timing controller 170 performs a communication operation with the power supply circuit 140 to vary the high potential EVDD. The alternating operation of the high potential voltage EVDD under the control of the timing controller 170 is a continuous operation rather than a discrete operation.

6A and 6B are diagrams for explaining an operation of applying different high-potential voltages according to an embodiment of the present invention. FIG. 6A shows a case where a switching operation signal is provided to the first switch SW1, and FIG. 6B shows a case where a switching operation signal is provided to the second switch SW2.

The timing controller 170 analyzes the transferred image data and outputs a first switching control signal SS1 for operating the first switch SW1 of the switching circuit 300. [ Accordingly, the first switch transmits the first high potential voltage EVVD1 provided through the first converter 210 to the display panel 110. [ The first high potential voltage EVDD1 is a voltage that is varied by the first converter 210 according to the first voltage control signal VCS1 of the timing controller 170. [ The timing controller 170 analyzes the transferred image data and outputs a second switching control signal SS1 for operating the second switch SW1 of the switching circuit 300. [ Accordingly, the second switch transfers the second high voltage EVVD2 provided through the second converter 220 to the display panel 110. The second high potential voltage EVDD2 is a voltage varied by the second converter 220 according to the second voltage control signal VCS1 of the timing controller 170. [

The timing controller may control the timing of the blanking period or the low period of the vertical synchronization signal Vsync or the off period of the global shutter signal as shown in FIG. The power supply variable circuit 200 and the switching circuit 300 are controlled.

That is, since the vertical synchronization signal Vsync is high and the first switching signal SS1 outputted from the timing controller 170 is high, the first switch SW1 To remain on. At this time, since the second switching signal SS2 indicates a low state, the second switch SW2 maintains an off state. Since the first voltage control signal VCS1 provided from the timing controller 170 to the first converter 210 of the power supply variable circuit 200 indicates a low state, And supplies the variable first high voltage EVDD1 received from the supply circuit 140 to the display panel 110 through the first switch SW1 at the subsequent stage. At this time, since the second voltage control signal VCS2 provided from the timing controller 170 to the second converter 220 of the power supply variable circuit 200 shows a high state, And generates the second high potential voltage EVDD2 by varying the high potential voltage supplied from the supply circuit 140. [ Therefore, the high-potential voltage EVDD provided to the display panel 110 represents the first high-potential voltage EVDD1.

On the other hand, in the period (B), the vertical synchronization signal Vsync temporarily indicates a low level and the global shutter signal indicates a temporary on state. The timing control unit 170 outputs the switching signals SS1 and SS2 and the voltage control signal Vsync at the time when the vertical synchronization signal Vsync is switched to the low state or when the global shutter signal is switched to the on state, VCS1, VCS2). That is, the first switching signal SS1 output from the timing controller 170 is switched from a high state to a low state to switch the first switch SW1 to the off state. At this time, since the second switching signal SS2 is changed from a low state to a high state, the second switch SW2 is turned on. Meanwhile, since the first voltage control signal VCS1 supplied from the timing controller 170 to the first converter 210 of the power supply variable circuit 200 is changed from a low state to a high state, And generates the first high potential voltage (EVDD1) by varying the high potential voltage supplied from the circuit (140). At this time, the second voltage control signal VCS2 supplied from the timing controller 170 to the second converter 220 of the power supply variable circuit 200 is changed from a high state to a low state, The controller 210 provides the display panel 110 with the second high voltage EVDD2 varying the voltage received from the power supply circuit 140 during the period A through the second switch SW1 at the subsequent stage. Therefore, the high-potential voltage EVDD provided to the display panel 110 during the (B) period represents the second high-potential voltage EVDD2.

When the vertical synchronization signal Vsync temporarily indicates a low signal or when the global shutter signal indicates a temporary off state as shown in FIG. 8, SS1 and SS2 and the voltage control signals VCS1 and VCS2 have the same states as in the section (A) as described above. That is, the state of each of the switches SW1 and SW2 and the high-potential voltage supplied to the display panel have the same state as the section (A).

The timing controller 170 may control the power supply varying circuit 200 to include the weight according to the position of the image data in the display panel 110 to be output in the next frame. That is, while one of the converters 210 and 220 of the voltage variable circuit supplies the operating voltage to the organic light emitting display panel 110, the other converter 220 or 210 performs the image data analysis of the timing controller 170 And performs an operation of waiting for output by varying the voltage for the next frame according to the result.

The output of the first converter and the output of the second converter may all be used in a linear area and a saturation area. Further, alternation from the section using the first high potential voltage EVDD1 to the section using the second high potential voltage EVDD2 is not realized as a discrete operation but is performed continuously .

9 is a current / voltage curve diagram of a driving transistor according to the present invention. As shown in FIG. 9, in order to reduce the power consumption of the organic light emitting diode display, a saturation region and a linear region are mixed to drive the driving transistor DTFT of the subpixel.

Further, in order to reduce the power consumption of the OLED display device, the level of the high-potential voltage EVDD is changed to a level lower than the data voltage VDATA of the data signal.

For example, according to the present invention, when the driving transistor generates the current (I_oled) for driving the organic light emitting diode, the level of the high potential voltage (EVDD), which is one of the conditions for generating the target current I_target, . When the driving transistor DTFT of the subpixel is driven in the linear region, the level of the high potential voltage EVDD can be further lowered compared to the previous level, so that the stress on the transistor is also mitigated as compared with the previous example. As a result, the deterioration of the transistor is expected to be somewhat delayed as compared with driving in the saturation region.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention as defined by the following claims It can be understood that

10: system 110: display panel
130: Data driver 140: Power supply circuit
150: gate driver 170: timing controller
200: power supply variable circuit 210: first converter
220: second converter 300: switching circuit

Claims (11)

An organic light emitting display panel including a plurality of sub pixels arranged in a region where a plurality of gate lines and a plurality of data lines are arranged and a gate line and a data line intersect;
A power supply circuit for outputting a high potential voltage (EVDD) for driving the organic light emitting display panel;
A voltage variable circuit for varying the high potential voltage provided to the organic light emitting display panel from the power supply circuit in different forms;
A pair of switching circuits selectively transmitting a voltage output from the voltage variable circuit to the organic light emitting display panel according to a switching operation;
And a timing controller for controlling the operation of the voltage variable circuit to generate voltages of different types by analyzing the input image data and controlling the switching operation of the pair of switching circuits. The OLED display according to claim 1, wherein the timing controller extracts a luminance component of input image data and determines an output high-potential voltage of the voltage variable circuit. The organic light emitting diode display according to claim 1, wherein the timing controller assigns a weight according to a display position of an input image to determine an output high potential voltage of the voltage variable circuit. The organic light emitting diode display according to claim 1, wherein the timing controller communicates with the power supply circuit to vary the output high potential voltage of the voltage variable circuit. The voltage-variable circuit according to claim 1,
A first converter (Converter) for varying a high potential voltage (EVDD) received from the power supply circuit according to a control signal of the timing controller and outputting the first high potential voltage (EVVD1); And
And a second converter for varying a high potential voltage (EVDD) received from the power supply circuit according to a control signal of the timing controller and outputting the second high potential voltage (EVVD2). Emitting display device. 6. The OLED display of claim 5, wherein the output of the first converter and the output of the second converter are both used in a linear area and a saturation area. The method as claimed in claim 5, wherein, while one of the converters of the voltage-variable circuit supplies an operation voltage to the organic light-emitting display panel, the other converter varies the voltage for the next frame according to a result of analyzing the image data of the timing controller, And the organic electroluminescent display device is in a standby state. 2. The organic light emitting diode display according to claim 1, wherein the timing controller outputs a control signal for controlling the switching operation of the pair of switching circuits and a control signal for controlling the power supply variable circuit during a blanking period. . The organic light emitting diode display according to claim 1, wherein the timing controller controls a switching operation of the pair of switching circuits so as to alternate a high potential voltage applied to the organic light emitting display panel during a low period of a vertical synchronization signal, And outputs a control signal for controlling the organic light emitting diode. The organic light emitting diode display according to claim 1, wherein the timing controller controls a switching operation of the pair of switching circuits so as to alternate a high potential voltage applied to the organic light emitting display panel in an off interval of a global shutter signal, And outputs a control signal. The OLED display according to claim 1, wherein the alternating operation of the high potential voltage (EVDD) under the control of the timing controller is a continuous operation, not a discrete operation.

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