KR20190009232A - Antenna module and manufacturing method thereof - Google Patents

Abstract

According to an embodiment of the present invention, an antenna module comprises: a wiring package including at least one wiring layer and at least one insulating layer; an IC disposed on a first surface of the wiring package and electrically connected to at least one wiring layer; and a plurality of antenna cells disposed on a second surface of each wiring package. Each of the plurality of antenna cells can comprise: an antenna member configured to transmit or receive an RF signal; a through-via of which one end is electrically connected to the antenna member and the other end is electrically connected to a corresponding wiring of at least one wiring layer; a dielectric layer surrounding a side surface of the through-via and having a height longer than the height of the at least one insulating layer; and a plating member surrounding a side surface of the dielectric layer.

Description

[0001] The present invention relates to an antenna module and an antenna module manufacturing method,

The present invention relates to an antenna module and a method of manufacturing an antenna module.

Recently, millimeter wave (mmWave) communication including 5th generation (5G) communication has been actively researched, and researches for commercialization of an antenna module that smoothly realizes the millimeter wave (mmWave) communication are being actively carried out.

Traditionally, antenna modules that provide a millimeter wave communication environment have been designed to place ICs and antennas on a substrate to meet high frequency antenna performance (eg, transmit / receive ratio, gain, directivity, etc.) As shown in Fig.

However, such a structure may cause a shortage of antenna arrangement space, restriction of the degree of freedom of antenna shape, increase of interference between antenna and IC, and increase in size / cost of antenna module.

US Patent No. 7,109,942

The present invention provides an antenna module and an antenna module manufacturing method which are advantageous for miniaturization while improving the RF signal transmission / reception performance by using a plurality of antenna cells that provide an advantageous environment for ensuring antenna performance.

An antenna module according to an embodiment of the present invention includes: a wiring package including at least one wiring layer and at least one insulating layer; An IC disposed on a first side of the wiring package and electrically connected to the at least one wiring layer; And a plurality of antenna cells disposed on a second surface of the wiring package, respectively; Wherein each of the plurality of antenna cells includes an antenna member configured to transmit or receive an RF signal, and a plurality of antenna members each having one end electrically connected to the antenna member and the other end electrically connected to corresponding wiring of the at least one wiring layer And a plating member surrounding a side surface of the dielectric layer, the dielectric layer surrounding the side surface of the through via and having a height greater than the height of the at least one dielectric layer.

According to an aspect of the present invention, there is provided a method of manufacturing an antenna module including an antenna member configured to transmit or receive an RF signal, a through via electrically connected at one end to the antenna member, a dielectric layer surrounding a side surface of the through via, Fabricating a plurality of antenna cells each comprising a plating member surrounding a side of the dielectric layer; Inserting the plurality of antenna cells into the insertion space of the insulating member provided with the insertion space of the plurality of antenna cells; And at least one wiring layer electrically connected to the other end of the through via, and at least one insulating layer having a height shorter than the height of the dielectric layer; . ≪ / RTI >

The antenna module according to an embodiment of the present invention can have a structure advantageous in miniaturization while improving the RF signal transmission and reception performance by using a plurality of antenna cells that provide an environment favorable for ensuring antenna performance.

1 is a view illustrating an antenna module according to an embodiment of the present invention.
2A to 2C are views illustrating an example of antenna cells of an antenna module, respectively.
3A is a view showing the formation of the bottom plating member and the electrical connection structure of the antenna cell.
3B is a view showing the formation of the antenna member of the antenna cell.
3C is a view showing the formation of through vias in the antenna cell.
FIGS. 3D to 3G are views showing a manufacturing process of the antenna cell of the antenna module.
4A to 4F are views illustrating a method of manufacturing an antenna module according to an embodiment of the present invention.
5 to 7 are views showing another example of an antenna module according to an embodiment of the present invention.
8 is a schematic view of an upper surface of an example of the antenna module.
9 is a view schematically showing an upper surface of another example of the antenna module.
10 is a block diagram schematically showing an example of an electronic device system.
11 is a perspective view schematically showing an example of an electronic apparatus.
FIG. 12 is a cross-sectional view schematically showing the packaging before and after packaging of the fan-in semiconductor package. FIG.
13 is a cross-sectional view schematically showing a packaging process of a fan-in semiconductor package.
14 is a cross-sectional view schematically showing a case where a fan-in semiconductor package is mounted on an interposer substrate and finally mounted on a main board of an electronic apparatus.
15 is a cross-sectional view schematically showing a case where a fan-in semiconductor package is embedded in an interposer substrate and finally mounted on a main board of an electronic apparatus.
16 is a cross-sectional view showing a schematic view of a fan-out semiconductor package.
17 is a cross-sectional view schematically showing a case where the fan-out semiconductor package is mounted on a main board of an electronic apparatus.

The following detailed description of the invention refers to the accompanying drawings, which illustrate, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It should be understood that the various embodiments of the present invention are different, but need not be mutually exclusive. For example, certain features, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the invention in connection with an embodiment. It is also to be understood that the position or arrangement of the individual components within each disclosed embodiment may be varied without departing from the spirit and scope of the invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is to be limited only by the appended claims, along with the full scope of equivalents to which such claims are entitled. In the drawings, like reference numerals refer to the same or similar functions throughout the several views.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily carry out the present invention.

1 is a view illustrating an antenna module according to an embodiment of the present invention.

Referring to FIG. 1, an antenna module according to an embodiment of the present invention may have a heterogeneous structure in which an antenna package 100 and a wiring package 200 are combined. In other words, the antenna module can improve the antenna performance of the antenna package and the circuit pattern of the fan-out package and the characteristics easy to arrange the IC, so that the antenna performance (e.g., transmission / reception ratio, gain, ) Can be improved and the size can be reduced.

The wiring package 200 may include at least one wiring layer 210 and at least one insulating layer 220 and may include wiring vias 230 connected to at least one wiring layer 210 and wiring vias 230, And a passivation layer 250, and may have a structure similar to that of a copper redistribution layer (RDL). An insulating member 140 may be disposed on the upper surface of the wiring package 200.

The antenna package 100 includes antenna elements 115a, 115b, 115c and 115d configured to transmit or receive RF signals and a plurality of antenna elements 115a, 115b, 115c, and 115d having one end electrically connected to the antenna elements 115a, 115b, 115c, and 115d, The through vias 120a, 120b, 120c and 120d electrically connected to the corresponding wiring of the wiring layer 210 and the height of at least one insulating layer 220 surrounding the side surfaces of the through vias 120a, 120b, 120c and 120d A plurality of antenna cells each including dielectric layers 130a, 130b, 130c and 130d having a longer height and a plating member 160 surrounding the sides of the dielectric layers 130a, 130b, 130c and 130d . The plurality of antenna cells may have a block shape, but are not limited thereto.

1, the plurality of antenna cells may be respectively disposed on a top surface of a wiring package 200, and at least a part of the plurality of antenna cells may be inserted into a plurality of insertion spaces provided by the insulating member 140, . For example, the antenna cell may include an electrical connection structure 125d, which, at the same time as the insertion of the antenna cell, connects one end of the corresponding via 120d and at least one wiring layer 210 Can be electrically connected to each other. For example, the electrical connection structure 125d may be implemented as an electrode, a pin, a solder ball, a land, or the like.

That is, since the plurality of antenna cells can be independently manufactured with respect to the wiring package 200, boundary conditions favorable for securing the radiation pattern (e.g., small manufacturing tolerance, short electrical length, smooth surface, large size of dielectric layer, Adjustment, etc.).

For example, the dielectric layers 130a, 130b, 130c, and 130d included in the plurality of antenna cells have a dielectric constant (e.g., a dielectric dissipation factor (Df), a dielectric constant Constant, Dk) or may have a dielectric constant higher than the dielectric constant of the insulating member 140. Generally, a material having a high dielectric constant may be difficult to apply to a manufacturing process of an antenna module. Since the dielectric layers 130a, 130b, 130c, and 130d included in the plurality of antenna cells are manufactured independently, a higher dielectric constant Can easily be obtained. In addition, the high dielectric constant of the dielectric layers 130a, 130b, 130c, and 130d may reduce the antenna performance as well as the overall size of the antenna module.

For example, the dielectric layers 130a, 130b, 130c, and 130d, the insulating member 140, and the at least one insulating layer 220 may be formed of thermosetting resin such as epoxy resin, thermoplastic resin such as polyimide, Filled with resin, prepreg, Ajinomoto Build-up Film (ABF), FR-4, BT (Bismaleimide Triazine), and photosensitive insulation for glass fiber (glass fiber, glass cloth, glass fabric) (Photo Imagable Dielectric (PID) resin, Copper Clad Laminate (CCL), or a glass or ceramic insulating material.

If the dielectric constant of the dielectric layers 130a, 130b, 130c and 130d is different from the dielectric constant of the insulating member 140, the dielectric layers 130a, 130b, 130c and 130d may be formed of glass or ceramics The insulating member 140 and the at least one insulating layer 220 may be formed of a copper clad laminate (CCL) having a relatively low Dk or a prepreg .

In addition, by using the plating member 160, the plurality of antenna cells can improve the isolation degree with respect to other antenna cells while having a favorable boundary condition for securing a radiation pattern. Can be designed more freely and efficiently by being manufactured together when manufactured independently.

For example, the plating member 160 may be designed to cover at least a part of the bottom surface as well as the side surface of the antenna cell, thereby improving the isolation degree to the wiring package and the IC.

The plurality of antenna cells may include a director member disposed to be spaced apart from the antenna members 115a, 115b, 115c and 115d in the top surface direction and configured to transmit or receive RF signals together with the antenna members 115a, 115b, 115c, 110b, 110c, and 110d. The plurality of antenna cells may easily provide a space for arranging the director members 110a, 110b, 110c, and 110d.

For example, the gain or bandwidth of the antenna module may be increased as the number of director members 110a, 110b, 110c, and 110d increases, but the height of the dielectric layers 130a, 130b, 130c, And 110d can be increased, the implementation difficulty of the dielectric layers 130a, 130b, 130c, and 130d can be increased. However, since the plurality of antenna cells can be manufactured independently of the wiring package 200, the dielectric layers 130a, 130b, 130c, and 130d having a height higher than the height of the insulating member 140 can be easily implemented , And the director members 110a, 110b, 110c, and 110d.

According to the design, the plurality of antenna cells can be manufactured independently of each other, and thus can be designed to have different characteristics. For example, the plurality of antenna cells may each include dielectric layers of different materials so as to have different dielectric constants. Here, the antenna cell having a relatively high dielectric constant may be disposed close to the center of the antenna module, and the relatively durable antenna cell may be disposed near the edge of the antenna module.

After the plurality of antenna cells are disposed on the top surface of the wiring package 200, an encapsulation member 150 may be disposed on the plurality of antenna cells. When the sealing member 150 is applied in a liquid state, the sealing member 150 can permeate through the plurality of antenna cells or permeate between the plurality of antenna cells and the insulating member 140. After the closure member 150 is impregnated, the closure member 150 may be cured to a solid state. Accordingly, the closure member 150 can improve the structural stability of the antenna module despite the insertion of the plurality of antenna cells. Meanwhile, the closing member 150 may be implemented as a PIE (Photo Imageable Encapsulant) or an ABF (Ajinomoto Build-up Film), but the present invention is not limited thereto.

2A to 2C are views illustrating an example of antenna cells of an antenna module, respectively.

2A, the antenna cell may include at least a portion of a director member 110e, an antenna member 115e, a through via, an electrical connection structure, a dielectric layer 130e, and a plating member 160e. Here, the plating member 160e may be arranged so as to surround only the side surface of the antenna cell. That is, the lower surface of the antenna cell can be covered by the ground pattern disposed on the upper surface of the wiring package.

2B, the antenna cell includes at least some of the director member 110f, the antenna member 115f, the through vias 120f, the electrical connection structure 125f, the dielectric layer 130f, and the plating member 160f . Here, the plating member 160f may be arranged to cover only a part of the lower surface of the antenna cell. That is, the side surface of the antenna cell can be surrounded by the plating member disposed on the side of the insulating member on the wiring package.

Referring to FIG. 2C, the antenna cell may include at least a portion of the antenna member 110g, the through vias 120g, the electrical connection structure 125g, and the dielectric layer 130g. That is, the side surface of the antenna cell can be surrounded by the plating member disposed on the side of the insulating member on the wiring package, and the lower surface of the antenna cell can be covered by the ground pattern disposed on the upper surface of the wiring package.

Meanwhile, the shape of the antenna members 115e, 115f, and 110g may be polygonal or circular, but is not limited thereto.

FIG. 3A is a view showing the formation of the bottom plating member and the electrical connection structure of the antenna cell, FIG. 3B is a view showing the formation of the antenna member of the antenna cell, and FIG.

Referring to FIG. 3A, the dielectric layer 130h, the electrical connection structure 125h, and the plating member 160h may be disposed on the base 10h. For example, the electrical connection structure 125h and the plating member 160h may be formed according to a negative or positive printing method, and a metal material (e.g., copper (Cu), aluminum (Al) A conductive material such as Ag, Sn, Au, Ni, Pb, Ti, or an alloy thereof.

Referring to FIG. 3B, the dielectric layer 130i and the antenna member 115i may be disposed on the base 10i. For example, the antenna member 115i may be formed according to a negative or positive printing method. The director member may also be formed in the same manner as the antenna member 115i.

Referring to FIG. 3C, the dielectric layer 130j and the through vias 120j may be disposed on the base 10j. For example, the through vias 120j may be formed according to a negative or positive printing method, and may be repeatedly stacked.

The antenna member 115i, the through vias 120j, the electrical connection structure 125h and the plating member 160h may be formed by any one of CVD (Chemical Vapor Deposition), PVD (Physical Vapor Deposition), sputtering, (Semi-Additive Process), MSAP (Modified Semi-Additive Process), etc. However, the present invention is not limited thereto.

FIGS. 3D to 3G are views showing a manufacturing process of the antenna cell of the antenna module.

The first layer including the dielectric layer 131k and the electrical connection structure 125k and the plating member 160k is disposed on the base 10k and the through vias 130k and the dielectric layer 132k are disposed on the base 10k, The included second layer may be disposed on the first layer.

Referring to FIG. 3E, the third to n-th layers respectively including the through vias and the dielectric layer 133k may be repeatedly laminated, and the (n + 1) -th layer including the antenna member 115k and the dielectric layer 134k ) Layer may be disposed on the n-th layer.

Referring to FIG. 3F, an (n + 2) -th layer including the director member 110k may be disposed on the (n + 1) -th layer. All the dielectric layers included in the first to (n + 2) -th layers can be combined into a single dielectric layer 130k.

3G, the antenna cell in which the director member 1101, the antenna member 1151, the through vias 1201, the electrical connection structure 1251, and a part of the plating member 1601 are formed includes a U- And then another part of the plating member 160l can be formed. The antenna cell can be reinserted into the U-shaped base 101 in a rotated state, and then the remainder of the plating member 160l can be formed. On the other hand, the U-shaped base 101 may be a jig, but is not limited thereto.

4A to 4F are views illustrating a method of manufacturing an antenna module according to an embodiment of the present invention.

4A, a part of the insulating member 140m may be etched to provide an insertion space into which a plurality of antenna cells are inserted, and a film 170m may be disposed at a lower end of the insulating member 140m .

4B, the antenna cell including the director member 110m, the antenna member 115m, the through vias 120m, the dielectric layer 130m, and the plating member 160m is inserted into the insertion space of the insulating member 140m, .

Referring to FIG. 4C, the closing member 150m may be disposed on the antenna cell and the insulating member 140m. The closing member 150m may penetrate between the antenna cell and the insulating member 140m.

4D, the film 170m can be removed after the closure member 150m has been cured.

Referring to FIG. 4E, a wiring package including at least one wiring layer 210m, at least one insulating layer 220m, and wiring vias 230m may be formed at the bottom of the antenna cell. For example, the wiring package may be attached to the lower end of the antenna cell after at least one wiring layer 210m is formed to correspond to an arrangement position of the antenna cell.

Referring to FIG. 4F, the connection pad 240m may be connected to the wiring via 230m, and the passivation layer 250m may cover the bottom of the wiring package.

5 to 7 are views showing another example of an antenna module according to an embodiment of the present invention.

5, the antenna member including the director member 110n, the antenna member 115n, the through vias 120n and the dielectric layer 130n, and the insulating member 140n include at least one wiring layer 210n, May be disposed on the upper surface of the wiring package including one insulating layer 220n, wiring vias 230n, connection pads 240n, and a passivation layer 250n.

The RF signal may be transmitted to the antenna cell through the at least one wiring layer 210n and transmitted in the direction of the top surface of the antenna module, and the RF signal received in the antenna cell may be transmitted to the IC 300n through at least one wiring layer 210n. Lt; / RTI >

The IC 300n may include an active surface 310n and an inactive surface 320n and may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240n through the active surface 310n . That is, since the IC 300n can be arranged face-up, the electrical distance to the antenna member 115n can be reduced to reduce the transmission loss of the RF signal.

The inactive surface 320n of the IC 300n may be connected to the metal member 330n. The metal member 330n may dissipate heat generated in the IC 300n or provide ground to the IC 300n.

The passive component 350n may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240n and may provide impedance to the IC 300n or the antenna cell. For example, the passive part 350n may include at least part of a multi-layer ceramic capacitor (MLCC), an inductor, and a chip resistor.

One end of the core via 360n may be disposed on the lower surface of the wiring package while electrically connected to the connection pad 240n and the other end of the core via 360n may be connected to the electrical connection structure 340n.

For example, the core vias 360n may receive a base signal (e.g., power, low frequency signal) from the electrical connection structure 340n and provide the base signal to the IC 300n. The IC 300n may perform frequency conversion, amplification, and filtering phase control using the base signal to generate an RF signal of a millimeter wave (mmWave) band, and may transmit the RF signal to the antenna cell. For example, the frequency of the RF signal may be 28 GHz and / or 36 GHz, but is not limited thereto and may vary depending on the communication method of the antenna module.

On the other hand, the IC 300n and the passive part 350n can be sealed by the sealing material.

6, the antenna member including the director member 110o, the antenna member 115o, the through vias 120o and the dielectric layer 130o and the insulating member 140o include at least one wiring layer 210o, May be disposed on the upper surface of the wiring package including one insulating layer 220o, wiring vias 230o, connection pads 240o, and a passivation layer 250o.

The IC 300o including the active surface 310o and the inactive surface 320o may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240o. The inert surface 320o may be connected to the metal member 330o.

The IC 300o may be implemented as a compound semiconductor (for example, GaAs) or a silicon semiconductor in consideration of high-frequency characteristics.

The IC 300o can be sealed with a sealing material. The sealant may protect the sealant from external electrical / physical / chemical impacts and may be realized by PIE (Photo Imageable Encapsulant), ABIN (Ajinomoto Build-up Film), epoxy molding compound (EMC) But is not limited thereto.

An electrical connection structure 340o may be disposed on the bottom surface of the sealing material.

The passive component 350o may be connected to the electrical connection structure 340o.

A core wiring layer may be connected to one end and the other end of the core via 360o and the core wiring layer may be connected to the connection pad 240o or the electrical connection structure 340o, .

7, the antenna member including the director member 110p, the antenna member 115p, the through vias 120p and the dielectric layer 130p, and the insulating member 140p include at least one wiring layer 210p, May be disposed on the upper surface of the wiring package including one insulating layer 220p, wiring vias 230p, connection pads 240p, and a passivation layer 250p.

The IC 300p including the active surface 310p and the inactive surface 320p may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240p. The inert surface 320p may be connected to the metal member 330p.

The IC 300p may be sealed with a sealing material, and an electrical connection structure 340p may be disposed on a bottom surface of the sealing material. The electrical connection structure 340p may be connected to the core via 360p.

Since the antenna cell is disposed on the upper surface of the wiring package after being independently manufactured, the insulating member 140p can be further freely machined to include the accommodation space.

The passive component 350p may be disposed in the accommodation space. Thus, the size of the lower surface of the wiring package in the antenna module can be reduced, and the impedance provided by the passive component 350p to the antenna member 115p can be more accurately adjusted.

A second antenna member (not shown) configured to transmit and receive a second RF signal in a lateral direction of the antenna module may be disposed in the receiving space of the insulating member 140p. The second antenna member may be implemented as a dipole antenna or a monopole antenna.

On the other hand, the components (IC, seals, passive components, core vias, etc.) arranged on the lower surface of the wiring package shown in Figs. 5 to 7 are independently manufactured, such as a fan-out semiconductor package, And can be manufactured together with the wiring package without a bonding process according to design.

8 is a schematic view of an upper surface of an example of the antenna module.

Each of the plurality of director members 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j, 110k, 110l, 110m, 110n, 110o, 110p includes a patch antenna 160b, 160c, 160d, 160e, 160f, 160g, 160h, 160i, 160j, 160k, 160l, 160m, 160n, 160o, 160p of the plurality of plating members Lt; / RTI > If the antenna module does not include a director member, the plurality of director members 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j, 110k, 110l, 110m, 110n, 110o, May be replaced by a plurality of antenna members.

9 is a view schematically showing an upper surface of another example of the antenna module.

Referring to FIG. 9, each of the plurality of director members 110-1, 110-2, 110-3, 110-4, 110-5, 110-6, 110-7, 110-8, 160-2, 160-3, 160-4, 160-5, 160-6, 160-7, 160-8, 160-9 and a plurality of shielding vias 190-1, 190-2, 190-3, 190-4, 190-5, 190-6, 190-7, 190-8, 190-9. If the antenna module does not include a director member, the plurality of director members 110-1, 110-2, 110-3, 110-4, 110-5, 110-6, 110-7, 110-8, 110-9 may be replaced by a plurality of antenna members.

That is, a part of the side surfaces of the plurality of antenna cells arranged on the wiring package of the antenna module may be surrounded by a plurality of shielding vias instead of the plating member.

On the other hand, the number, arrangement, and shape of the plurality of director members or the plurality of antenna members shown in Figs. 8 and 9 are not particularly limited. For example, the shape of the plurality of director members shown in Fig. 8 may be a circle, and the number of the plurality of director members shown in Fig. 9 may be four.

On the other hand, the lower end of the wiring package disclosed in this specification (corresponding to the IC, sealing material, passive component and core via) can be implemented in accordance with the fan-out semiconductor package. 10 to 17, the fan-out semiconductor package will be described in further detail.

10 is a block diagram schematically showing an example of an electronic device system.

Referring to FIG. 10, the electronic device 1000 receives the main board 1010. The main board 1010 is physically and / or electrically connected to the chip-related components 1020, the network-related components 1030, and other components 1040. They are also combined with other electronic components to be described later to form various signal lines 1090.

Chip related components 1020 include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, etc.; An application processor chip such as a central processor (e.g., a CPU), a graphics processor (e.g., a GPU), a digital signal processor, a cryptographic processor, a microprocessor, An analog-to-digital converter, and a logic chip such as an application-specific IC (ASIC), but the present invention is not limited thereto and other types of chip-related electronic components may be included. It goes without saying that these electronic components 1020 can be combined with each other.

IEEE 802.11 family, etc.), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM , And any other wireless and wired protocols designated as GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G and later, as well as any other wireless or wired Any of the standards or protocols may be included. It goes without saying that the network-related component 1030 can be combined with the chip-related electronic component 1020 with each other.

Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, low temperature co-firing ceramics (LTCC), EMI (Electro Magnetic Interference) filters, and MLCC (Multi-Layer Ceramic Condenser) But is not limited to, passive components used for various other purposes, and the like. Of course, other components 1040 may be combined with chip-related electronic components 1020 and / or network-related electronic components 1030 with each other.

Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the mainboard 1010. Examples of other electronic components include a camera 1050, an antenna 1060, a display 1070, a battery 1080, an audio codec (not shown), a video codec (not shown), a power amplifier (not shown) (Not shown), a CD (compact disk) (not shown), and a mass storage device (not shown), an accelerometer (not shown), a gyroscope And a digital versatile disk (DVD) (not shown). However, the present invention is not limited thereto, and other electronic components used for various purposes may be included depending on the type of the electronic device 1000 .

The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, and the like. However, it is needless to say that the present invention is not limited thereto and may be any other electronic device that processes data.

11 is a perspective view schematically showing an example of an electronic apparatus.

11, the electronic device may be a smartphone 1100, for example. A radio frequency integrated circuit (RF IC) may be applied to the smartphone 1100 in the form of a semiconductor package, and an antenna may be applied in the form of a substrate or a module. The radio frequency integrated circuit and the antenna are electrically connected in the smartphone 1100, so that radiation (R) of the antenna signal in various directions is possible. A semiconductor package including a radio frequency integrated circuit and a substrate or a module including an antenna can be applied to electronic devices such as smart phones in various forms.

In general, a semiconductor chip has many microelectronic circuits integrated therein, but itself can not serve as a finished product of a semiconductor, and there is a possibility of being damaged by external physical or chemical impact. Therefore, the semiconductor chip itself is not used as it is, and the semiconductor chip is packaged and used as electronic devices in a package state.

The reason for the necessity of semiconductor packaging is that there is a difference in circuit width between the semiconductor chip and the main board of the electronic device from the viewpoint of electrical connection. Specifically, in the case of a semiconductor chip, the sizes of the connection pads and the spacing between the connection pads are very small. On the other hand, in the case of the main board used in electronic devices, the size of the electronic component mounting pads and the intervals of the electronic component mounting pads It is much bigger. Therefore, there is a need for a packaging technique which makes it difficult to directly mount a semiconductor chip on such a main board and can buffer the difference in circuit width between the semiconductor chips.

The semiconductor package manufactured by such a packaging technique can be classified into a fan-in semiconductor package and a fan-out semiconductor package depending on the structure and use.

Hereinafter, the fan-in semiconductor package and the fan-out semiconductor package will be described in more detail with reference to the drawings.

FIG. 12 is a cross-sectional view schematically showing the packaging before and after packaging of the fan-in semiconductor package. FIG.

13 is a cross-sectional view schematically showing a packaging process of a fan-in semiconductor package.

12 and 13, the semiconductor chip 2220 includes a body 2221 including silicon (Si), germanium (Ge), gallium arsenide (GaAs), and the like; a body 2221 formed on one side of the body 2221 And a passivation film 2223 such as an oxide film or a nitride film which covers at least a part of the connection pads 2222 and is formed on one surface of the body 2221. The connection pads 2222, For example, an integrated circuit (IC) in a bare state. At this time, since the connection pad 2222 is very small, the integrated circuit (IC) is difficult to be mounted on a medium-level printed circuit board (PCB) as well as a main board of an electronic apparatus.

A connection member 2240 is formed on the semiconductor chip 2220 in accordance with the size of the semiconductor chip 2220 in order to rewire the connection pad 2222. [ The connecting member 2240 is formed by forming an insulating layer 2241 with an insulating material such as a photosensitive insulating resin (PID) on the semiconductor chip 2220 and forming a via hole 2243h for opening the connecting pad 2222, The wiring pattern 2242 and the via 2243 can be formed. Thereafter, a passivation layer 2250 for protecting the connecting member 2240 is formed, and an under-bump metal layer 2260 or the like is formed after the opening 2251 is formed. That is, through a series of processes, a fan-in semiconductor package 2200 including, for example, a semiconductor chip 2220, a connecting member 2240, a passivation layer 2250, and an under bump metal layer 2260, do.

As described above, the fan-in semiconductor package is a package in which all the connection pads of the semiconductor chip, for example, I / O (Input / Output) terminals are disposed inside the element, and the fan-in semiconductor package has good electrical characteristics and can be produced at low cost have. Accordingly, many devices incorporated in a smart phone are manufactured in the form of a fan-in semiconductor package. Specifically, development is being made in order to implement a small-sized and fast signal transmission.

However, in the fan-in semiconductor package, all of the I / O terminals must be disposed inside the semiconductor chip, so that there are many space limitations. Therefore, such a structure is difficult to apply to a semiconductor chip having a large number of I / O terminals or a semiconductor chip having a small size. In addition, due to this vulnerability, the fan-in semiconductor package can not be directly mounted on the main board of the electronic device. This is because even if the size and spacing of the I / O terminals of the semiconductor chip are enlarged by the rewiring process, they do not have a size and a gap enough to be directly mounted on the electronic device main board.

14 is a cross-sectional view schematically showing a case where a fan-in semiconductor package is mounted on an interposer substrate and finally mounted on a main board of an electronic apparatus.

15 is a cross-sectional view schematically showing a case where a fan-in semiconductor package is embedded in an interposer substrate and finally mounted on a main board of an electronic apparatus.

14 and 15, the fan-in semiconductor package 2200 is formed by connecting the connection pads 2222 of the semiconductor chip 2220, that is, the I / O terminals through the interposer substrate 2301, And finally mounted on the main board 2500 of the electronic device with the fan-in semiconductor package 2200 mounted on the interposer substrate 2301. At this time, the solder ball 2270 and the like can be fixed with the underfill resin 2280 and the outside can be covered with the molding material 2290 or the like. Alternatively, the fan-in semiconductor package 2200 may be embedded in a separate interposer substrate 2302, and the interposer substrate 2302 may be embedded in the connection pads 2220 of the semiconductor chip 2220, The I / O terminals 2222, i.e., the I / O terminals, may be re-routed again and finally mounted on the main board 2500 of the electronic device.

Since the fan-in semiconductor package is difficult to be directly mounted on the main board of the electronic apparatus, it is mounted on a separate interposer substrate and then re-packaged to be mounted on the electronic device main board, And is mounted on an electronic device main board while being embedded in a substrate.

16 is a cross-sectional view showing a schematic view of a fan-out semiconductor package.

16, the outer side of the semiconductor chip 2120 is protected by the sealing material 2130 and the connection pad 2122 of the semiconductor chip 2120 is connected Is rewound to the outside of the semiconductor chip (2120) by the member (2140). At this time, a passivation layer 2150 may be further formed on the connecting member 2140, and an under bump metal layer 2160 may be further formed on the opening of the passivation layer 2150. A solder ball 2170 may be further formed on the under bump metal layer 2160. The semiconductor chip 2120 may be an integrated circuit (IC) including a body 2121, a connection pad 2122, a passivation film (not shown), and the like. The connecting member 2140 includes an insulating layer 2141, a re-wiring layer 2142 formed on the insulating layer 2241, and a via 2143 for electrically connecting the connecting pad 2122 and the re-wiring layer 2142 .

As described above, the fan-out semiconductor package is formed by rewiring the I / O terminals to the outside of the semiconductor chip through the connecting member formed on the semiconductor chip. As described above, in the fan-in semiconductor package, all of the I / O terminals of the semiconductor chip must be disposed inside the semiconductor chip. If the element size is reduced, the ball size and pitch must be reduced. On the other hand, in the fan-out semiconductor package, the I / O terminals are rewired to the outside of the semiconductor chip through the connecting member formed on the semiconductor chip so that the size of the semiconductor chip is reduced. And can be mounted on a main board of an electronic device without a separate interposer substrate as will be described later.

17 is a cross-sectional view schematically showing a case where the fan-out semiconductor package is mounted on a main board of an electronic apparatus.

17, the fan-out semiconductor package 2100 may be mounted on the main board 2500 of the electronic device through solder balls 2170 or the like. That is, as described above, the fan-out semiconductor package 2100 includes a connection member 2120 that can rewire the connection pad 2122 to the fan-out area beyond the size of the semiconductor chip 2120 on the semiconductor chip 2120, The standardized ball layout can be used as it is, and as a result, it can be mounted on the main board 2500 of the electronic apparatus without a separate interposer substrate or the like.

Since the fan-out semiconductor package can be mounted on the main board of the electronic device without using a separate interposer substrate, the thickness of the fan-out semiconductor package can be reduced compared to a fan-in semiconductor package using the interposer substrate. Do. In addition, it has excellent thermal characteristics and electrical characteristics and is particularly suitable for mobile products. In addition, it can be implemented more compactly than a general POP (Package on Package) type using a printed circuit board (PCB), and it is possible to solve a problem caused by a bending phenomenon.

On the other hand, the fan-out semiconductor package means a package technology for mounting the semiconductor chip on a main board or the like of an electronic device and protecting the semiconductor chip from an external impact, and the scale, (PCB) such as an interposer substrate having a built-in fan-in semiconductor package.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, Those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.

100: antenna package
110: director absence
115: Antenna member
120: Through via
125, 340: electrical connection structure
130: Dielectric layer
140: Insulation member
150: absence of encapsulation
160, 160-1, 160-9: Plating member
170: Film
190-1, 190-9: Shield vias
200: wiring package
210: wiring layer
220: insulating layer
230: wiring vias
240: connection pad
250: passivation layer
300: Integrated Circuit (IC)
310: active face
320: Inactive face
330: metal member
350: Passive components
360: Core Via

Claims (13)

A wiring package including at least one wiring layer and at least one insulating layer;
An IC disposed on a first side of the wiring package and electrically connected to the at least one wiring layer; And
A plurality of antenna cells each disposed on a second surface of the wiring package; / RTI >
Each of the plurality of antenna cells comprising: an antenna member configured to transmit or receive an RF signal; a through via electrically connected at one end to the antenna member and at the other end to a corresponding wiring of the at least one wiring layer; A dielectric layer surrounding a side surface of the through via and having a height greater than the height of the at least one insulating layer; and a plating member surrounding the side surface of the dielectric layer.
The method according to claim 1,
Wherein each of the plurality of antenna cells further includes an electrical connection structure for electrically connecting one end of the through via and a corresponding one of the at least one wiring layer.
The method according to claim 1,
And the plating member has a shape extending from the second surface of the wiring package toward the through vias.
The method according to claim 1,
An insulating member disposed on a second surface of the wiring package and surrounding a side surface of each of the plurality of antenna cells; And
An encapsulation member disposed on the plurality of antenna cells and the insulating member; And an antenna module.
5. The method of claim 4,
Wherein the dielectric layer has a height greater than a height of the insulating member.
5. The method of claim 4,
Wherein the dielectric layer has a dielectric constant different from the dielectric constant of the insulating member.
The method according to claim 1,
Wherein the dielectric layer has a dielectric constant different from the dielectric constant of the at least one insulating layer.
The method according to claim 1,
Wherein a dielectric constant of a dielectric layer included in a part of the plurality of antenna cells is different from a dielectric constant of a dielectric layer included in another part.
The method according to claim 1,
An insulating member disposed on a second side of the wiring package and providing a receiving space; And
A passive component disposed in the accommodation space and electrically connected to a corresponding wiring of the at least one wiring layer; And an antenna module.
The method according to claim 1,
Further comprising a core via disposed on a first side of the wiring package and electrically connected to a corresponding wiring of the at least one wiring layer,
Wherein the IC receives a base signal from the core via and generates the RF signal in a millimeter wave band based on the base signal.
The antenna of claim 1, wherein each of the plurality of antenna cells comprises:
Further comprising a director member arranged to be spaced away from the antenna member in a direction opposite to the direction of viewing the through vias and configured to transmit or receive the RF signal together with the antenna member,
Wherein the dielectric layer further surrounds the side of the antenna member and the side of the director member.
An antenna member configured to transmit or receive an RF signal, a through via electrically connected at one end to the antenna member, a dielectric layer surrounding a side surface of the through via, and a plating member surrounding the side surface of the dielectric layer Fabricating an antenna cell of the antenna;
Inserting the plurality of antenna cells into the insertion space of the insulating member provided with the insertion space of the plurality of antenna cells; And
Forming at least one wiring layer electrically connected to the other end of the through via and at least one insulating layer having a height shorter than the height of the dielectric layer; The antenna module comprising:
13. The method of claim 12,
Disposing a film at a lower end of the insulating member before the plurality of antenna cells are inserted into the insertion space;
Disposing an encapsulation member on the plurality of antenna cells and the insulating member after the plurality of antenna cells are inserted into the insertion space; And
Removing the film before the closure member is disposed and the wiring package is formed; ≪ / RTI >

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