KR102314698B1 - Antenna module and antenna package - Google Patents

Abstract

An antenna module according to an embodiment of the present invention includes a wiring package including at least one wiring layer and at least one insulating layer, a dielectric layer and at least a part of a patch antenna disposed in the dielectric layer, and a patch antenna corresponding to at least one wiring layer A plurality of antenna cells each including through vias for electrically connecting the wires to be formed and respectively disposed on the upper surface of the wiring package, and a plurality of antenna cells on the upper surface of the wiring package, each surrounding the plurality of antenna cells and comprising a dielectric layer and other insulating material It may include an insulating member.

Description

Antenna module and antenna package {Antenna module and antenna package}

The present invention relates to an antenna module and an antenna package.

Recently, millimeter wave (mmWave) communication including fifth generation (5G) communication has been actively studied, and research for commercialization of an antenna module that smoothly implements this is being actively conducted.

Traditionally, the antenna module that provides millimeter wave communication environment has a coaxial cable by placing IC and antenna on the board to satisfy high level of antenna performance (eg transmission/reception rate, gain, directivity, etc.) according to high frequency. has been using a structure that connects to

However, such a structure may cause insufficient antenna arrangement space, limited degree of freedom in antenna shape, increased interference between the antenna and the IC, and increased size/cost of the antenna module.

US Patent Publication No. 7,109,942

The present invention provides an antenna module and an antenna package.

An antenna module according to an embodiment of the present invention includes: a wiring package including at least one wiring layer and at least one insulating layer; an antenna cell comprising a dielectric layer comprising a dielectric material different from the at least one insulating layer and a plurality of patch antennas disposed on the dielectric layer, the antenna cell disposed on a top surface of the wiring package; and an insulating member including an insulating material different from the dielectric layer and disposed to surround the antenna cell on the upper surface of the wiring package. may include.

An antenna package according to an embodiment of the present invention includes: an antenna cell including a dielectric layer and a plurality of patch antennas disposed on the dielectric layer; an insulating member including an insulating material different from the dielectric layer and disposed to surround the plurality of patch antennas; and an encapsulation member comprising an insulating material different from the insulating member and the dielectric layer and disposed on upper surfaces of the antenna cell and the insulating member; may include.

An antenna module according to an embodiment of the present invention may have a structure advantageous for miniaturization while improving RF signal transmission/reception performance by using a plurality of antenna cells that provide an environment favorable to securing antenna performance.

1 is a view showing an antenna module according to an embodiment of the present invention.
2A to 2C are diagrams each illustrating an example of an antenna cell of an antenna module.
3A is a view showing the formation of a plating member and an electrical connection structure on a lower surface of an antenna cell.
3B is a diagram showing the formation of an antenna member of an antenna cell.
3C is a diagram illustrating the formation of a through-via of an antenna cell.
3D to 3G are diagrams illustrating a manufacturing process of an antenna cell of an antenna module.
4A to 4F are diagrams illustrating a method of manufacturing an antenna module according to an embodiment of the present invention.
5 to 7 are views showing another example of an antenna module according to an embodiment of the present invention.
8 is a diagram schematically showing a top surface of an example of an antenna module.
9 is a view schematically showing a top surface of another example of the antenna module.
10 is a block diagram schematically illustrating an example of an electronic device system.
11 is a perspective view schematically illustrating an example of an electronic device.
12 is a cross-sectional view schematically illustrating a fan-in semiconductor package before and after packaging.
13 is a cross-sectional view schematically illustrating a packaging process of a fan-in semiconductor package.
14 is a cross-sectional view schematically illustrating a case in which a fan-in semiconductor package is mounted on an interposer substrate and finally mounted on a main board of an electronic device.
15 is a cross-sectional view schematically illustrating a case in which a fan-in semiconductor package is embedded in an interposer substrate and finally mounted on a main board of an electronic device.
16 is a cross-sectional view schematically illustrating a fan-out semiconductor package.
17 is a cross-sectional view schematically illustrating a case in which a fan-out semiconductor package is mounted on a main board of an electronic device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [0023] Reference is made to the accompanying drawings, which show by way of illustration specific embodiments in which the present invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the present invention. It should be understood that the various embodiments of the present invention are different but need not be mutually exclusive. For example, certain shapes, structures, and characteristics described herein with respect to one embodiment may be embodied in other embodiments without departing from the spirit and scope of the invention. In addition, it should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the present invention. Accordingly, the following detailed description is not intended to be taken in a limiting sense, and the scope of the present invention is limited only by the appended claims, along with all equivalents as claimed by the claims. Like reference numerals in the drawings refer to the same or similar functions throughout the various aspects.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to enable those of ordinary skill in the art to easily practice the present invention.

1 is a view showing an antenna module according to an embodiment of the present invention.

Referring to FIG. 1 , an antenna module according to an embodiment of the present invention may have a heterogeneous structure in which an antenna package 100 and a wiring package 200 are combined. That is, the antenna module utilizes both the characteristics that are easy to improve the antenna performance of the antenna package and the characteristics that are easy to deploy the circuit pattern or IC of the fan-out package, so that the antenna performance (eg, transmission/reception rate, gain, directivity, etc.) ) can be improved and miniaturized.

The wiring package 200 may include at least one wiring layer 210 and at least one insulating layer 220 , a wiring via 230 connected to the at least one wiring layer 210 , and a wiring via 230 . The connection pad 240 connected thereto and the passivation layer 250 may be further included, and may have a structure similar to that of a copper redistribution layer (RDL). An insulating member 140 may be disposed on the upper surface of the wiring package 200 .

The antenna package 100 includes an antenna member (115a, 115b, 115c, 115d) configured to transmit or receive an RF signal, and one end is electrically connected to the antenna member (115a, 115b, 115c, 115d) and the other end is at least one The height of at least one insulating layer 220 surrounding the through-vias 120a, 120b, 120c, and 120d electrically connected to the corresponding wiring of the wiring layer 210 and the side surfaces of the through-vias 120a, 120b, 120c, and 120d. A plurality of antenna cells each including a dielectric layer 130a, 130b, 130c, 130d having a longer height, and a plating member 160 surrounding the side surface of the dielectric layers 130a, 130b, 130c, 130d. . The plurality of antenna cells may have a block shape, but is not limited thereto.

Referring to FIG. 1 , the plurality of antenna cells may be respectively disposed on the upper surface of the wiring package 200 , and at least some of the plurality of antenna cells are respectively inserted into the plurality of insertion spaces provided by the insulating member 140 . can be For example, the antenna cell may include an electrical connection structure 125d. The electrical connection structure 125d includes one end of a through-via 120d corresponding to the insertion of the antenna cell and at least one wiring layer 210 at the same time. ) can be electrically connected between corresponding wirings. For example, the electrical connection structure 125d may be implemented as an electrode, a pin, a solder ball, a land, or the like.

That is, since the plurality of antenna cells can be independently manufactured with respect to the wiring package 200, boundary conditions favorable to securing a radiation pattern (eg, small manufacturing tolerance, short electrical length, smooth surface, large size of the dielectric layer, and dielectric constant) control, etc.).

For example, the dielectric layers 130a, 130b, 130c, and 130d included in the plurality of antenna cells may have a dielectric constant (eg, Dissipation Factor, Df) of at least one insulating layer 220, a dielectric constant (Dielectric). Constant, Dk)) or may have a higher dielectric constant than the dielectric constant of the insulating member 140 . In general, a material having a high dielectric constant may be difficult to be applied to the manufacturing process of the antenna module, and the dielectric layers 130a, 130b, 130c, and 130d included in the plurality of antenna cells are independently manufactured so that they have a higher dielectric constant. can have it easily. In addition, the high dielectric constant of the dielectric layers 130a, 130b, 130c, 130d may reduce the overall size of the antenna module as well as the antenna performance.

For example, the dielectric layers 130a, 130b, 130c, and 130d, the insulating member 140 and the at least one insulating layer 220 may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or an inorganic resin Resin, prepreg, Ajinomoto Build-up Film (ABF), FR-4, BT (Bismaleimide Triazine), photosensitive insulation (Photo Imagable Dielectric: PID) resin, a general copper clad laminate (CCL), or a glass or ceramic-based insulating material may be implemented.

If the dielectric constants of the dielectric layers 130a, 130b, 130c, and 130d and the dielectric constant of the insulating member 140 are different from each other, the dielectric layers 130a, 130b, 130c, and 130d may be formed of glass or ceramic having a Dk of 5 or more ( ceramic), silicon, etc., and the insulating member 140 and the at least one insulating layer 220 may be implemented with a copper clad laminate (CCL) or prepreg having a relatively low Dk. can

In addition, by using the plating member 160 for the plurality of antenna cells, the degree of isolation from other antenna cells can be improved while having an advantageous boundary condition for securing a radiation pattern. They can be designed more freely and efficiently by being manufactured together when they are manufactured independently.

For example, the plating member 160 may be designed to cover not only the side surface of the antenna cell but also at least a part of the bottom surface, thereby improving the isolation degree for the wiring package or the IC.

In addition, the plurality of antenna cells are disposed to be spaced apart from each other in the upper surface direction of the antenna members 115a, 115b, 115c, and 115d, and a director member configured to transmit or receive RF signals together with the antenna members 115a, 115b, 115c, and 115d. (110a, 110b, 110c, and 110d) may be included, and the plurality of antenna cells may easily provide an arrangement space for the director members 110a, 110b, 110c, and 110d.

For example, the gain or bandwidth of the antenna module may increase as the number of the director members 110a, 110b, 110c, and 110d increases, but the height of the dielectric layers 130a, 130b, 130c, and 130d is the director member 110a, 110b, 110c. , 110d) may increase as the number of the dielectric layers 130a, 130b, 130c, and 130d increases, so the implementation difficulty of the dielectric layers 130a, 130b, 130c, and 130d may increase. However, since the plurality of antenna cells can be independently manufactured with respect to the wiring package 200, the dielectric layers 130a, 130b, 130c, and 130d having a height higher than that of the insulating member 140 can be easily implemented. , the director members 110a, 110b, 110c, and 110d may be easily included.

According to a design, the plurality of antenna cells may be manufactured independently of each other, and thus may be designed to have different characteristics. For example, the plurality of antenna cells may each include dielectric layers of different materials to have different dielectric constants. Here, the antenna cell having a relatively high dielectric constant may be disposed at a position close to the center of the antenna module, and the antenna cell having relatively high durability may be disposed at a position close to the edge of the antenna module.

After the plurality of antenna cells are disposed on the upper surface of the wiring package 200 , an encapsulation member 150 may be disposed on the plurality of antenna cells. When the closing member 150 is applied in a liquid state, it may permeate between the plurality of antenna cells or between the plurality of antenna cells and the insulating member 140 . After the finishing member 150 permeates, the finishing member 150 may be cured to a solid state. Accordingly, the closing member 150 may improve the structural stability of the antenna module despite the insertion of the plurality of antenna cells. On the other hand, the closing member 150 may be implemented as a photo imageable encapsulant (PIE), Ajinomoto build-up film (ABF), or the like, but is not limited thereto.

2A to 2C are diagrams each illustrating an example of an antenna cell of an antenna module.

Referring to FIG. 2A , the antenna cell may include at least a portion of a director member 110e, an antenna member 115e, a through-via, an electrical connection structure, a dielectric layer 130e, and a plating member 160e. Here, the plating member 160e may be disposed to surround only the side surface of the antenna cell. That is, the lower surface of the antenna cell may be covered by the ground pattern disposed on the upper surface of the wiring package.

Referring to FIG. 2B , the antenna cell may include at least a portion of a director member 110f, an antenna member 115f, a through via 120f, an electrical connection structure 125f, a dielectric layer 130f, and a plating member 160f. can Here, the plating member 160f may be disposed to cover only a portion of the lower surface of the antenna cell. That is, the side surface of the antenna cell may be surrounded by the plating member disposed on the side surface of the insulating member on the wiring package.

Referring to FIG. 2C , the antenna cell may include at least a portion of an antenna member 110g, a through-via 120g, an electrical connection structure 125g, and a dielectric layer 130g. That is, the side surface of the antenna cell may be surrounded by the plating member disposed on the side surface of the insulating member on the wiring package, and the lower surface of the antenna cell may be covered by the ground pattern disposed on the top surface of the wiring package.

Meanwhile, the shape of the antenna members 115e , 115f , and 110g may be polygonal or circular, but is not limited thereto.

3A is a view showing the formation of a plating member and an electrical connection structure on the lower surface of the antenna cell, FIG. 3B is a view showing the formation of the antenna member of the antenna cell, and FIG. 3C is a view showing the formation of a through-via of the antenna cell.

Referring to FIG. 3A , the dielectric layer 130h, the electrical connection structure 125h, and the plating member 160h may be disposed on the base 10h. For example, the electrical connection structure 125h and the plating member 160h may be formed according to a negative or positive printing method, and may be formed of a metal material (eg, copper (Cu), aluminum (Al)). , silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or an alloy thereof).

Referring to FIG. 3B , the dielectric layer 130i and the antenna member 115i may be disposed on the base 10i. For example, the antenna member 115i may be formed according to a negative or positive printing method. The director member may be formed in the same manner as the antenna member 115i.

Referring to FIG. 3C , the dielectric layer 130j and the through via 120j may be disposed on the base 10j. For example, the through via 120j may be formed according to a negative or positive printing method, and may be repeatedly stacked.

On the other hand, the antenna member 115i, the through via 120j, the electrical connection structure 125h and the plating member 160h are formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), sputtering, subtractive ( Subtractive), additive (Additive), SAP (Semi-Additive Process), MSAP (Modified Semi-Additive Process) may be formed according to a plating method such as, but is not limited thereto.

3D to 3G are diagrams illustrating a manufacturing process of an antenna cell of an antenna module.

Referring to FIG. 3D , the first layer including the dielectric layer 131k, the electrical connection structure 125k, and the plating member 160k is disposed on the base 10k, and the through via 130k and the dielectric layer 132k are formed thereon. The included second layer may be disposed on the first layer.

Referring to FIG. 3E , the third to nth layers each including the through via and the dielectric layer 133k may be repeatedly stacked, and the (n+1)th layer including the antenna member 115k and the dielectric layer 134k. ) layer may be disposed on the nth layer.

Referring to FIG. 3F , an (n+2)th layer including the director member 110k may be disposed on the (n+1)th layer. All dielectric layers included in the first to (n+2)th layers may be combined into a single dielectric layer 130k.

Referring to FIG. 3G , the antenna cell in which the director member 110l, the antenna member 115l, the through via 120l, the electrical connection structure 125l, and the plating member 160l are partially formed is a U-shaped base 10l. may be inserted, and then another portion of the plating member 160l may be formed. The antenna cell may be re-inserted into the U-shaped base 101 in a rotated state, and then the remaining portion of the plating member 160l may be formed. Meanwhile, the U-shaped base 101 may be a jig, but is not limited thereto.

4A to 4F are diagrams illustrating a method of manufacturing an antenna module according to an embodiment of the present invention.

Referring to FIG. 4A , a portion of the insulating member 140m may be etched to provide an insertion space into which a plurality of antenna cells are inserted, and a film 170m may be disposed at the lower end of the insulating member 140m. .

Referring to FIG. 4B , the antenna cell including the director member 110m, the antenna member 115m, the through via 120m, the dielectric layer 130m, and the plating member 160m is inserted into the insertion space of the insulating member 140m. can be

Referring to FIG. 4C , the closing member 150m may be disposed on the antenna cell and the insulating member 140m. The closing member 150m may permeate between the antenna cell and the insulating member 140m.

Referring to FIG. 4D , the film 170m may be removed after the finishing member 150m is cured.

Referring to FIG. 4E , a wiring package including at least one wiring layer 210m, at least one insulating layer 220m, and a wiring via 230m may be formed at the lower end of the antenna cell. For example, the wiring package may be attached to the lower end of the antenna cell after at least one wiring layer 210m is formed to correspond to the arrangement position of the antenna cell.

Referring to FIG. 4F , the connection pad 240m may be connected to the wiring via 230m, and the passivation layer 250m may cover the lower end of the wiring package.

5 to 7 are views showing another example of an antenna module according to an embodiment of the present invention.

Referring to FIG. 5 , an antenna cell including a director member 110n, an antenna member 115n, a through via 120n, and a dielectric layer 130n, and the insulating member 140n include at least one wiring layer 210n, at least It may be disposed on an upper surface of a wiring package including one insulating layer 220n, a wiring via 230n, a connection pad 240n, and a passivation layer 250n.

The RF signal may be transmitted to the antenna cell through the at least one wiring layer 210n and transmitted in the direction of the top surface of the antenna module, and the RF signal received from the antenna cell may be transmitted to the IC 300n through the at least one wiring layer 210n. can be transmitted to

The IC 300n may include an active surface 310n and a non-active surface 320n, and may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240n through the active surface 310n. . That is, since the IC 300n may be face-up disposed, it is possible to reduce the transmission loss of the RF signal by reducing the electrical distance to the antenna member 115n.

The non-active surface 320n of the IC 300n may be connected to the metal member 330n. The metal member 330n may dissipate heat generated in the IC 300n or provide a ground to the IC 300n.

The passive component 350n may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240n, and may provide an impedance to the IC 300n or the antenna cell. For example, the passive component 350n may include at least a portion of a multi-layer ceramic capacitor (MLCC), an inductor, and a chip resistor.

One end of the core via 360n may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240n, and the other end of the core via 360n may be connected to the electrical connection structure 340n.

For example, the core via 360n may receive a base signal (eg, power, low frequency signal, etc.) from the electrical connection structure 340n and provide the base signal to the IC 300n. The IC 300n may generate a millimeter wave (mmWave) band RF signal by performing frequency conversion, amplification, and filtering phase control using the base signal, and may transmit the RF signal to an antenna cell. For example, the frequency of the RF signal may be 28 GHz and/or 36 GHz, but is not limited thereto and may vary depending on the communication method of the antenna module.

Meanwhile, the IC 300n and the passive component 350n may be sealed by an encapsulant.

Referring to FIG. 6 , an antenna cell including a director member 110o, an antenna member 115o, a through via 120o, and a dielectric layer 130o, and the insulating member 140o include at least one wiring layer 210o, at least It may be disposed on the upper surface of the wiring package including one insulating layer 220o, a wiring via 230o, a connection pad 240o, and a passivation layer 250o.

The IC 300o including the active surface 310o and the inactive surface 320o may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240o. The inactive surface 320o may be connected to the metal member 330o.

The IC 300o may be implemented as a compound semiconductor (eg, GaAs) or a silicon semiconductor in consideration of high-frequency characteristics.

The IC 300o may be sealed with an encapsulant. The encapsulant can protect from external electrical/physical/chemical impacts, and may be implemented with PIE (Photo Imageable Encapsulant), Ajinomoto Build-up Film (ABF), epoxy molding compound (EMC), etc. However, the present invention is not limited thereto.

An electrical connection structure 340o may be disposed on the lower surface of the encapsulant.

The passive component 350o may be connected to the electrical connection structure 340o.

A core wiring layer may be connected to one end and the other end of the core via 360o, respectively, and the core wiring layer may be connected to the connection pad 240o or the electrical connection structure 340o, respectively, and extend in the lateral direction to the other core via 360o. ) can also be connected to

Referring to FIG. 7 , an antenna cell including a director member 110p, an antenna member 115p, a through via 120p, and a dielectric layer 130p, and the insulating member 140p include at least one wiring layer 210p, at least It may be disposed on an upper surface of a wiring package including one insulating layer 220p, a wiring via 230p, a connection pad 240p, and a passivation layer 250p.

The IC 300p including the active surface 310p and the inactive surface 320p may be disposed on the lower surface of the wiring package while being electrically connected to the connection pad 240p. The inactive surface 320p may be connected to the metal member 330p.

The IC 300p may be sealed by an encapsulant, and an electrical connection structure 340p may be disposed on a lower surface of the encapsulant. The electrical connection structure 340p may be connected to the core via 360p.

Since the antenna cell is independently manufactured and then disposed on the upper surface of the wiring package, the insulating member 140p may be processed more freely to include an accommodating space.

The passive component 350p may be disposed in the accommodation space. Accordingly, the size of the lower surface of the wiring package in the antenna module may be reduced, and the impedance provided by the passive component 350p to the antenna member 115p may be more accurately matched.

Meanwhile, a second antenna member (not shown) configured to transmit/receive a second RF signal in the lateral direction of the antenna module may be disposed in the receiving space of the insulating member 140p. The second antenna member may be implemented as a dipole antenna or a monopole antenna.

On the other hand, the components (IC, encapsulant, passive component, core via, etc.) disposed on the lower surface of the wiring package shown in FIGS. 5 to 7 are independently manufactured like a fan-out semiconductor package and then installed in the wiring package. It can be bonded, and according to the design, it can be manufactured together with the wiring package without a bonding process.

8 is a diagram schematically showing a top surface of an example of an antenna module.

Referring to FIG. 8 , each of the plurality of director members 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j, 110k, 110l, 110m, 110n, 110o, and 110p is a patch antenna. of the plurality of plating members corresponding to the plating members (160a, 160b, 160c, 160d, 160e, 160f, 160g, 160h, 160i, 160j, 160k, 160l, 160m, 160n, 160o, 160p). may be surrounded by If the antenna module does not include a director member, the plurality of director members 110a, 110b, 110c, 110d, 110e, 110f, 110g, 110h, 110i, 110j, 110k, 110l, 110m, 110n, 110o, 110p) may be replaced with a plurality of antenna members.

9 is a diagram schematically showing a top surface of another example of the antenna module.

9 , each of the plurality of director members 110-1, 110-2, 110-3, 110-4, 110-5, 110-6, 110-7, 110-8, and 110-9 corresponds to plating members 160-1, 160-2, 160-3, 160-4, 160-5, 160-6, 160-7, 160-8, 160-9 and a plurality of shielding vias 190-1, 190-2, 190-3, 190-4, 190-5, 190-6, 190-7, 190-8, 190-9). If the antenna module does not include a director member, the plurality of director members 110-1, 110-2, 110-3, 110-4, 110-5, 110-6, 110-7, 110-8, 110-9) may be replaced with a plurality of antenna members.

That is, a portion of side surfaces of the plurality of antenna cells disposed on the wiring package of the antenna module may be surrounded by the plurality of shielding vias instead of the plating member.

Meanwhile, the number, arrangement, and shape of the plurality of director members or the plurality of antenna members illustrated in FIGS. 8 and 9 are not particularly limited. For example, the shape of the plurality of director members illustrated in FIG. 8 may be a circle, and the number of the plurality of director members illustrated in FIG. 9 may be four.

Meanwhile, the lower end (corresponding to the IC, the encapsulant, the passive component, and the core via) of the wiring package disclosed herein may be implemented according to a fan-out semiconductor package. 10 to 17 , the fan-out semiconductor package will be described in detail to help understanding thereof.

10 is a block diagram schematically illustrating an example of an electronic device system.

Referring to FIG. 10 , the electronic device 1000 accommodates the main board 1010 . A chip-related component 1020 , a network-related component 1030 , and other components 1040 are physically and/or electrically connected to the main board 1010 . These are also combined with other electronic components to be described later to form various signal lines 1090 .

The chip-related component 1020 includes a memory chip such as a volatile memory (eg, DRAM), a non-volatile memory (eg, ROM), and a flash memory; application processor chips such as a central processor (eg, CPU), a graphics processor (eg, GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller; Logic chips such as analog-to-digital converters and ASICs (application-specific ICs) are included, but are not limited thereto, and of course, other types of chip-related electronic components may be included. Also, it goes without saying that these electronic components 1020 may be combined with each other.

The network-related parts 1030 include Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM. , GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G and any other wireless and wired protocols designated thereafter, including, but not limited to, many other wireless or wired protocols. Any of the standards or protocols may be included. Also, it goes without saying that the network-related component 1030 may be combined with the chip-related electronic component 1020 .

Other components 1040 include a high-frequency inductor, a ferrite inductor, a power inductor, ferrite beads, LTCC (low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filter, MLCC (Multi-Layer Ceramic Condenser), etc. , but is not limited thereto, and may include passive parts used for other various purposes in addition to this. Also, it goes without saying that the other components 1040 may be combined together with the chip-related electronic component 1020 and/or the network-related electronic component 1030 .

Depending on the type of the electronic device 1000 , the electronic device 1000 may include other electronic components that may or may not be physically and/or electrically connected to the main board 1010 . Examples of other electronic components include a camera 1050 , an antenna 1060 , a display 1070 , a battery 1080 , an audio codec (not shown), a video codec (not shown), a power amplifier (not shown), and a compass. (not shown), an accelerometer (not shown), a gyroscope (not shown), a speaker (not shown), a mass storage device (eg, a hard disk drive) (not shown), a compact disk (CD) (not shown), and DVD (digital versatile disk) (not shown), and the like, but is not limited thereto, and other electronic components used for various purposes according to the type of the electronic device 1000 may be included. .

The electronic device 1000 includes a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, and a computer ( computer), monitor, tablet, laptop, netbook, television, video game, smart watch, automotive, and the like. However, the present invention is not limited thereto, and may be any other electronic device that processes data in addition to these.

11 is a perspective view schematically illustrating an example of an electronic device.

Referring to FIG. 11 , the electronic device may be, for example, a smart phone 1100 . A radio frequency integrated circuit (RF IC) may be applied to the smart phone 1100 in the form of a semiconductor package, and an antenna may be applied in the form of a substrate or a module. Since the radio frequency integrated circuit and the antenna are electrically connected in the smart phone 1100, radiation (R) of the antenna signal in various directions is possible. A semiconductor package including a radio frequency integrated circuit and a substrate or module including an antenna may be applied to electronic devices such as smart phones in various forms.

In general, a semiconductor chip has many micro-electric circuits integrated therein, but it cannot function as a finished semiconductor product by itself, and there is a possibility of being damaged by external physical or chemical shock. Therefore, the semiconductor chip itself is not used as it is, but the semiconductor chip is packaged and used in electronic devices and the like as a package.

The reason semiconductor packaging is necessary is because there is a difference in the circuit width between the semiconductor chip and the main board of the electronic device from the viewpoint of electrical connection. Specifically, in the case of a semiconductor chip, the size of the connection pad and the interval between the connection pads are very fine, whereas in the case of a main board used for electronic devices, the size of the electronic component mounting pad and the interval between the electronic component mounting pads are larger than the scale of the semiconductor chip. much bigger Therefore, it is difficult to directly mount the semiconductor chip on such a main board, and a packaging technology capable of buffering a circuit width difference between each other is required.

A semiconductor package manufactured by such packaging technology may be divided into a fan-in semiconductor package and a fan-out semiconductor package according to a structure and use.

Hereinafter, a fan-in semiconductor package and a fan-out semiconductor package will be described in more detail with reference to the drawings.

12 is a cross-sectional view schematically illustrating a fan-in semiconductor package before and after packaging.

13 is a cross-sectional view schematically illustrating a packaging process of a fan-in semiconductor package.

12 and 13, the semiconductor chip 2220 is a body 2221 including silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc., and aluminum ( A connection pad 2222 including a conductive material such as Al), and a passivation film 2223 such as an oxide film or a nitride film formed on one surface of the body 2221 and covering at least a part of the connection pad 2222, including, For example, it may be an integrated circuit (IC) in a bare state. At this time, since the connection pad 2222 is very small, it is difficult for the integrated circuit (IC) to be mounted on the main board of an electronic device, as well as on a mid-level printed circuit board (PCB).

Accordingly, in order to redistribute the connection pad 2222 , the connection member 2240 is formed on the semiconductor chip 2220 according to the size of the semiconductor chip 2220 . The connecting member 2240 forms an insulating layer 2241 of an insulating material such as a photosensitive insulating resin (PID) on the semiconductor chip 2220, and forms a via hole 2243h for opening the connection pad 2222, It may be formed by forming the wiring pattern 2242 and the via 2243 . Thereafter, a passivation layer 2250 protecting the connection member 2240 is formed, an opening 2251 is formed, and an under-bump metal layer 2260 and the like are formed. That is, through a series of processes, for example, the fan-in semiconductor package 2200 including the semiconductor chip 2220 , the connection member 2240 , the passivation layer 2250 , and the under-bump metal layer 2260 is manufactured. do.

As described above, the fan-in semiconductor package is a package in which the connection pads of the semiconductor chip, for example, I/O (Input/Output) terminals, are all arranged inside the device, and the fan-in semiconductor package has good electrical characteristics and can be produced inexpensively. have. Accordingly, many devices for smart phones are being manufactured in the form of a fan-in semiconductor package, and specifically, development is being made in the direction of implementing small and fast signal transmission.

However, in the fan-in semiconductor package, all I/O terminals must be placed inside the semiconductor chip, so there are many space restrictions. Accordingly, this structure is difficult to apply to a semiconductor chip having a large number of I/O terminals or a semiconductor chip having a small size. In addition, due to this weakness, the fan-in semiconductor package cannot be directly mounted on the main board of an electronic device and used. This is because even if the size and spacing of the I/O terminals of the semiconductor chip are increased through the rewiring process, they are not large enough to be directly mounted on the main board of an electronic device.

14 is a cross-sectional view schematically illustrating a case in which a fan-in semiconductor package is mounted on an interposer substrate and finally mounted on a main board of an electronic device.

15 is a cross-sectional view schematically illustrating a case in which a fan-in semiconductor package is embedded in an interposer substrate and finally mounted on a main board of an electronic device.

14 and 15 , in the fan-in semiconductor package 2200 , the connection pads 2222 of the semiconductor chip 2220 , ie, I/O terminals, are redistributed once again through the interposer substrate 2301 . Finally, the fan-in semiconductor package 2200 may be mounted on the main board 2500 of the electronic device in a state in which the fan-in semiconductor package 2200 is mounted on the interposer substrate 2301 . In this case, the solder ball 2270 and the like may be fixed with an underfill resin 2280 , and the outside may be covered with a molding material 2290 , or the like. Alternatively, the fan-in semiconductor package 2200 may be embedded in a separate interposer substrate 2302 , and in an embedded state, the connection pads of the semiconductor chip 2220 by the interposer substrate 2302 . 2222 , that is, the I/O terminals may be re-wired once again, and finally mounted on the main board 2500 of the electronic device.

As described above, since it is difficult for the fan-in semiconductor package to be directly mounted on the main board of an electronic device and used, it is mounted on a separate interposer substrate and then mounted on the main board of the electronic device through a packaging process or an interposer. It is mounted on the main board of an electronic device while being embedded in the board and used.

16 is a cross-sectional view schematically illustrating a fan-out semiconductor package.

Referring to FIG. 16 , in the fan-out semiconductor package 2100 , for example, the outside of the semiconductor chip 2120 is protected by an encapsulant 2130 , and the connection pad 2122 of the semiconductor chip 2120 is connected. The redistribution is carried out to the outside of the semiconductor chip 2120 by the member 2140 . In this case, a passivation layer 2150 may be further formed on the connection member 2140 , and an under-bump metal layer 2160 may be further formed in the opening of the passivation layer 2150 . Solder balls 2170 may be further formed on the under bump metal layer 2160 . The semiconductor chip 2120 may be an integrated circuit (IC) including a body 2121 , a connection pad 2122 , a passivation layer (not shown), and the like. The connecting member 2140 may include an insulating layer 2141, a redistribution layer 2142 formed on the insulating layer 2241, and a via 2143 electrically connecting the connection pad 2122 and the redistribution layer 2142, etc. can

As described above, the fan-out semiconductor package has a form in which the I/O terminals are redistributed to the outside of the semiconductor chip through the connection member formed on the semiconductor chip. As described above, in the fan-in semiconductor package, all I/O terminals of the semiconductor chip must be disposed inside the semiconductor chip, and accordingly, when the device size is reduced, the ball size and pitch must be reduced, so a standardized ball layout cannot be used. On the other hand, the fan-out semiconductor package is a form in which the I/O terminals are redistributed to the outside of the semiconductor chip through the connection member formed on the semiconductor chip as described above, and the standardized ball layout is implemented even if the size of the semiconductor chip is small. Since it can be used as it is, it can be mounted on the main board of an electronic device without a separate interposer board, as will be described later.

17 is a cross-sectional view schematically illustrating a case in which a fan-out semiconductor package is mounted on a main board of an electronic device.

Referring to FIG. 17 , the fan-out semiconductor package 2100 may be mounted on the main board 2500 of the electronic device through a solder ball 2170 . That is, as described above, in the fan-out semiconductor package 2100 , the fan-out semiconductor package 2100 has a connection member capable of rewiring the connection pad 2122 to the fan-out region that exceeds the size of the semiconductor chip 2120 on the semiconductor chip 2120 . Since the 2140 is formed, a standardized ball layout can be used as it is, and as a result, it can be mounted on the main board 2500 of an electronic device without a separate interposer board.

In this way, since the fan-out semiconductor package can be mounted on the main board of an electronic device without a separate interposer substrate, it can be implemented to be thinner than the fan-in semiconductor package using the interposer substrate. do. In addition, it is particularly suitable for mobile products because of its excellent thermal and electrical properties. In addition, it can be implemented more compactly than a general POP (Package on Package) type using a printed circuit board (PCB), and can solve a problem due to the occurrence of a warpage phenomenon.

On the other hand, the fan-out semiconductor package refers to a package technology for mounting the semiconductor chip on the main board of an electronic device as described above and for protecting the semiconductor chip from external impact, which is different in scale, use, etc., It is a concept different from a printed circuit board (PCB) such as an interposer board in which a fan-in semiconductor package is embedded.

In the above, the present invention has been described with specific matters such as specific components and limited embodiments and drawings, but these are provided to help a more general understanding of the present invention, and the present invention is not limited to the above embodiments. , those of ordinary skill in the art to which the present invention pertains can make various modifications and variations from these descriptions.

100: antenna package
110: director (director) absent
115: antenna member
120: through via (through via)
125, 340: electrical connection structure
130: dielectric layer
140: insulating member
150: absence of encapsulation
160, 160-1, 160-9: plating member
170: film
190-1, 190-9: shielded vias
200: wiring package
210: wiring layer
220: insulating layer
230: wiring via
240: connection pad
250: passivation layer
300: IC (Integrated Circuit)
310: active surface
320: inactive surface
330: metal member
350: passive parts
360: core via

Claims (16)

a wiring package including at least one wiring layer and at least one insulating layer;
an antenna cell comprising a dielectric layer comprising a dielectric material different from the at least one insulating layer and a plurality of patch antennas disposed on the dielectric layer, the antenna cell disposed on a top surface of the wiring package; and
an insulating member including an insulating material different from the dielectric layer and disposed to surround the antenna cell on an upper surface of the wiring package; An antenna module comprising a.
According to claim 1,
The insulating member is an antenna module disposed to surround each of the plurality of patch antennas.
3. The method of claim 2,
The antenna module further comprising a plating member disposed on a side facing the plurality of patch antennas in the insulating member to surround each of the plurality of patch antennas.
4. The method of claim 3,
A portion of the plating member is disposed between the plurality of patch antennas and the wiring package.
According to claim 1,
The antenna cell further comprises a plurality of director members spaced above the plurality of patch antennas and disposed on the dielectric layer.
According to claim 1,
The antenna cell further includes a plurality of through-vias extending perpendicular to the plurality of patch antennas.
According to claim 1,
The insulating member has a height greater than a height of the at least one insulating layer antenna module.
According to claim 1,
The antenna module further comprising an encapsulation member comprising an insulating material different from the insulating member and the dielectric layer and disposed on upper surfaces of the antenna cell and the insulating member.
9. The method of claim 8,
and a portion of the closure member is disposed between the plurality of patch antennas.
An antenna cell comprising a dielectric layer and a plurality of patch antennas disposed on the dielectric layer;
an insulating member including an insulating material different from the dielectric layer and disposed to surround the plurality of patch antennas; and
an encapsulation member comprising an insulating material different from the insulating member and the dielectric layer and disposed on upper surfaces of the antenna cell and the insulating member; Antenna package comprising a.
11. The method of claim 10,
and a portion of the closure member is disposed between the plurality of patch antennas.
11. The method of claim 10,
The insulating member is an antenna package disposed to surround each of the plurality of patch antennas.
13. The method of claim 12,
The antenna package further comprising a plating member disposed on a side facing the plurality of patch antennas in the insulating member to surround the plurality of patch antennas.
11. The method of claim 10,
The antenna package further comprising a passive component disposed within the insulating member.
11. The method of claim 10,
The antenna package further includes a plurality of through-vias extending perpendicular to the plurality of patch antennas.
11. The method of claim 10,
The antenna cell further includes a plurality of director members spaced apart from the upper side of the plurality of patch antennas and disposed on the dielectric layer.

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