KR20180118958A - Thin film transistor and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a thin film transistor and a method for manufacturing the same and, more specifically, to a thin film transistor capable of preventing deterioration of electrical characteristics due to a gate insulating film and a method for manufacturing the same. According to an embodiment of the present invention, the thin film transistor includes a gate electrode, a gate insulating film provided on the gate electrode, an active layer provided on the gate insulating film, and source and drain electrodes provided on the active layer and spaced apart in a horizontal direction. The gate insulating film includes a first insulating thin film including a SiCH_4 component, adjacent to the gate electrode and formed by a CVD process, and a second insulating thin film formed, adjacent to the active layer and formed by an ALD process.

Description

[0001] THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME [0002]

The present invention relates to a thin film transistor and a method of manufacturing the same, and more particularly, to a thin film transistor capable of preventing deterioration of electrical characteristics due to a gate insulating film and a manufacturing method thereof.

A thin film transistor (TFT) is used as a circuit for independently driving each pixel in a liquid crystal display (LCD) or an organic EL (Electro Luminescence) display device. Such a thin film transistor is formed with a gate line and a data line on a lower substrate of a display device. That is, the thin film transistor includes a gate electrode which is a part of a gate line, an active layer which is used as a channel, a source electrode and a drain electrode which are a part of the data line, and a gate insulating film. An example of such a thin film transistor is disclosed in Korean Patent Publication No. 2011-0131120.

The thin film transistor mainly uses silicon oxide as a gate insulating film and the silicon oxide is formed using silane (SiH ₄ ). However, when a gate insulating film is formed using silane, H due to the decomposition of SiH ₄ is present in the gate insulating film during deposition. H existing in the gate insulating film causes a leakage current and reduces the lifetime of the carrier, and the like, which causes the electrical characteristics of the thin film transistor to deteriorate.

In addition, when silane is used, deposition is possible only by a chemical vapor deposition (CVD) method, so that it is difficult to form a thin film having a thickness of several tens of angstroms for implementation of a flexible display, and it is difficult to control physical properties of a thin film.

KR 10-2011-0131120 A

The present invention provides a thin film transistor capable of minimizing the amount of hydrogen remaining in a gate insulating film and a method of manufacturing the same.

The present invention also provides a thin film transistor capable of preventing deterioration of electrical characteristics due to a gate insulating film and a method of manufacturing the same.

A thin film transistor according to an embodiment of the present invention includes a gate electrode, a gate insulating film provided on the gate electrode, an active layer provided on the gate insulating film, a source electrode and a drain electrode provided on the active layer, Wherein the gate insulating film includes a SiCH ₄ component and is adjacent to the gate electrode and is formed by a CVD process; And a second insulating thin film formed adjacent to the active layer and formed by an ALD process.

The gate insulating layer may further include a third insulating thin film formed between the gate electrode and the first insulating thin film by an ALD process.

The gate insulating film may be formed using a silicon containing organic source and a reactive source.

The active layer may be formed of a zinc oxide thin film doped with Group 3 or Group 4 elements.

And a protective layer provided between the active layer and the source electrode and the drain electrode. The protective layer may be formed using a silicon containing organic source and a reactive source.

The protective film may include a first protective thin film adjacent to the active layer and formed by an ALD process; And a second protective thin film adjacent to the source and drain electrodes and formed by a CVD process.

The first protective film may have a higher oxygen content than the second protective film.

The charge mobility of the thin film transistor may vary within a range of 3% or less.

The threshold voltage of the thin film transistor may vary within a range of 10% or less.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor including: forming a gate electrode on a substrate; Forming a gate insulating film on the gate electrode; Forming an active layer on the gate insulating layer; And forming a source electrode and a drain electrode on the active layer, wherein the process of forming the gate insulating layer includes forming a first insulating thin film on the gate insulating film by using a silicon containing organic source and a reactive source, ; And forming a second insulating thin film on the first insulating thin film by an ALD process using a silicon containing organic source and a reaction source.

In the process of forming the gate insulating film, an organic component contained in the silicon-containing organic source may react with hydrogen atoms to form a SiCH ₄ component.

The gate insulating film can control the on current, the off current, the threshold voltage, and the charge mobility by controlling the deposition method.

And forming a protective layer on the active layer after forming the active layer on the gate insulating layer. The process for forming the protective layer may include forming a protective layer on the active layer using a silicon containing organic source and a reactive source, A process of forming a first protective film by a process; And forming a second protective thin film on the first protective thin film by a CVD process using a silicon containing organic source and a reactive source.

In the thin film transistor according to the embodiment of the present invention, the gate insulating film is formed by using a silicon-containing organic source and reaction sources such as oxygen and nitrogen, H is combined with CH _{3 in} the gate insulating film to exist as a CH ₄ component, The generation of phosphorus H can be suppressed. Therefore, since the amount of H remaining in the gate insulating film can be minimized, deterioration in electrical characteristics due to H can be prevented.

Further, by forming at least one of the gate insulating film and the protective film by the ALD process and the CVD process, the productivity can be improved and the operation reliability can be ensured. That is, if only the ALD process is used, the productivity is lowered due to the slow process speed. If the CVD process alone is used, the film quality is not precise and normal operation is impossible. However, productivity and reliability can be guaranteed by using ALD process and CVD process together .

1 illustrates a thin film transistor according to an embodiment of the present invention.
2 illustrates a thin film transistor according to another embodiment of the present invention.
3 illustrates a thin film transistor according to another embodiment of the present invention.
4 is a characteristic graph of a thin film transistor according to a process of forming a gate insulating film and a protective layer.
5 is a graph showing a change in mobility of a thin film transistor over time.
6 is a graph showing a change in a threshold voltage with time of a thin film transistor.
7-11 are views for explaining a method of manufacturing a thin film transistor according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, Is provided to fully inform the user.

It is to be understood that when an element, such as a film, a region, or a substrate, is referred to as being "on" another element throughout the specification, the element may be directly "on" It is to be understood that there may be other components intervening in the system.

Further, relative terms such as "upper" or "lower" may be used herein to describe the relative relationship of certain elements to other elements as shown in the Figures. Relative terms are intended to include different orientations of the device in addition to those depicted in the Figures. Wherein like numerals refer to like elements.

FIG. 1 is a view showing a thin film transistor according to an embodiment of the present invention, and FIG. 2 is a view showing a thin film transistor according to another embodiment of the present invention. 3 is a view illustrating a thin film transistor according to another embodiment of the present invention.

1, a thin film transistor according to an exemplary embodiment of the present invention includes a gate electrode 110, a gate insulating film provided on the gate electrode 110, an active layer 130 provided on the gate insulating film, A thin film transistor comprising a source electrode (150a) and a drain electrode (150b) provided on an active layer (130) and horizontally spaced apart, wherein the gate insulating film includes a SiCH ₄ component and has at least two layers Thin film. The thin film transistor according to an embodiment of the present invention may further include a protection layer provided between the active layer 130 and the source electrode 150a and the drain electrode 150b.

The gate electrode 110 is formed in a predetermined region on the substrate 100.

For example, a silicon substrate or a glass substrate can be used as the substrate 100, and a plastic substrate (PE, PES, PET, PEN, etc.) can be used when a flexible display is implemented.

The gate electrode 110 may be formed using a conductive material such as a metal, a metal alloy, a metal oxide, a transparent conductive film, or a compound thereof. For example, the gate electrode 110 may include at least one of aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo), and copper Any one metal or an alloy containing them may be used.

In addition, the gate electrode 110 can be formed as a single layer as well as multiple layers of a plurality of metal layers. That is, a metal layer of chromium (Cr), titanium (Ti), tantalum (Ta), molybdenum (Mo) or the like having excellent physical and chemical properties and an aluminum (Al) Of the metal layer.

On the other hand, the gate electrode 110 can be formed simultaneously with the gate line of the liquid crystal display device, for example. That is, when a plurality of gate lines are formed on the substrate 100 at predetermined intervals in one direction, the gate electrode 110 may be formed at a predetermined distance from a predetermined region of the gate line.

A gate insulating film may be formed on the substrate 100 including the top and sides of the gate electrode 110. That is, the gate insulating film may be formed on the entire upper surface of the substrate 100 including the gate electrode 110, and may be formed on one region of the substrate 100 so as to cover the gate electrode 110.

The gate insulating film includes a SiCH ₄ component, and the gate insulating film containing a SiCH ₄ component can be formed using an organic source containing silicon and a reactive source. The silicon containing organic source may be selected from the group consisting of hexamethyldisiloxane (HMDSO), tetramethyldisilazane (TMDS), hexamethyldisilazane (HMDSN), bis (diethylamino) silane (BEDEAS) .

Further, the reaction source may include an oxygen-containing gas, a nitrogen-containing gas, or the like. Therefore, the gate insulating film contains a silicon component, at least one of oxygen and nitrogen, and may be formed of a hybrid film containing an organic component. Such a gate insulating film has a dielectric constant of about 4 to 6 depending on the ratio of the reactive gas and the organic source, and thus functions as an insulating film.

In the gate insulating film thus formed, the hydrogen element in the film, that is, H bonds with the CH ₃ of the organic source and exists in the form of CH ₄ . That is, when the gate insulating film is formed using a silicon-containing organic source and an oxygen-containing gas, for example, when forming using a hexamethyldisiloxane and an oxygen gas, components such as SiO, SiCH ₃ , CH ₂ and CH ₃ A part of SiCH ₃ reacts with H to form a SiCH ₄ component and can inhibit the production of independent H through Si-CH ₄ bonding. Therefore, the gate insulating film contains the SiCH ₄ component, and the amount of H remaining in the gate insulating film can be minimized, so that deterioration in electrical characteristics such as leakage current caused by H can be prevented. In addition, the gate insulating film can control the content of organic components such as SiCH ₃ by controlling the ratio of organic source and O ₂ , thereby improving characteristics such as charge mobility.

The gate insulating film is formed of a thin film of at least two layers having different film qualities and the gate insulating film is formed by chemical vapor deposition such as atomic layer deposition (ALD) or chemical vapor deposition Process. ≪ / RTI > Here, when the gate insulating film is formed only by the ALD process, a thin film having a good film quality can be formed, but the film formation rate is very slow and the productivity is lowered. In addition, when the gate insulating film is formed only by the CVD process, the productivity is improved but the film quality is lowered and a thin film having a thin thickness can not be formed. Therefore, by forming the gate insulating film into a thin film having at least two layers having different film qualities, including a thin film having a dense film quality formed by an ALD process and a film having a relatively degraded film quality formed by a CVD process, And reliability of operation can be ensured, and a thin film of tens of angstroms thick can be formed for the implementation of a flexible display.

As such, the gate insulating film may be formed of a thin film of at least two layers having different film qualities, wherein the thin film of at least two layers is adjacent to the gate electrode 110 as shown in one embodiment in FIG. 1, And a second insulating thin film 126 adjacent to the active layer 130 and formed by an ALD process. Here, the CVD process forms a thin film by introducing a source gas, for example, a silicon-containing organic source and a reactive gas, for example, a reaction source, and the ALD process includes a source gas introduction, a purge gas introduction, The inflow is repeated to form a thin film. Accordingly, the first insulating thin film 124 is deposited at a high rate on the gate 110 to improve productivity. Since the second insulating thin film 126 on the first insulating thin film 124 has excellent film quality and interfacial characteristics, The active layer 130,

The gate insulating film may further include a third insulating thin film 122 formed between the gate electrode 110 and the first insulating thin film 124 by an ALD process. That is, as shown in another embodiment in FIG. 2, a third insulating thin film 122 having excellent film quality and interfacial characteristics is formed on the gate 110 by the ALD process, and the first insulating thin film 122 on the third insulating thin film 122 The insulating thin film is formed by a CVD process. The use of the CVD process enables high-speed deposition, thereby improving productivity. In addition, the second insulating thin film 126 on the first insulating thin film 124 can be formed by the ALD process to have excellent film quality and interface characteristics.

As described above, the gate insulating film can be formed not only by CVD but also by ALD by using an organic source containing silicon, and the electrical characteristics of the gate insulating film can be controlled by changing the deposition method.

The active layer 130 is formed on the gate insulating film, and at least a part of the active layer 130 is formed to overlap with the gate electrode 110. The active layer 130 may be formed of a metal oxide, for example, zinc oxide (ZnO).

In order to improve the film quality of the ZnO thin film, the active layer 130 may be formed by doping at least one element of Group 3 or Group 4 elements such as indium (In), gallium (Ga), and tin (Sn) The stability of the thin film transistor can be improved by inducing the ZnO thin film. For example, the active layer 130 may be formed of indium gallium zinc oxide (IGZO) thin film doped with indium and gallium in a ZnO thin film, and indium tin zinc oxide (ITZO) doped with indium and tin ) Thin film.

In addition, the active layer 130 using a doped ZnO thin film, for example, an IGZO thin film, may be formed by a chemical vapor deposition method such as ALD or CVD, and may be formed as a plurality of layers having different compositions as required. On the other hand, the IGZO thin film can be formed using an indium source, a gallium source, a zinc source and an oxygen source.

For example, the first IGZO thin film adjacent to the gate insulating film may have a higher film quality and higher interfacial property and a higher conductivity than the second IGZO thin film on the upper side thereof. . Here, since the first IGZO thin film has excellent film quality and interfacial characteristics, it can be used as a front channel which is important for channel formation. That is, when a positive (+) voltage is applied to the gate electrode 110, (-) charges are accumulated in a part of the active layer 130 above the gate insulating film to form a front channel, and as the current flows well through the front channel, Becomes excellent. Also, the second IGZO thin film may be used as a back channel by forming the first IGZO thin film with a different composition ratio from the first IGZO thin film.

That is, when a negative (-) voltage is applied to the gate electrode 110, a negative (-) charge is accumulated in a part of the active layer 130 under the source electrode 150a and the drain electrode 150b. Therefore, the back channel forms a second IGZO thin film so as to prevent a charge transfer, that is, a conductivity lower than that of the first IGZO thin film acting as a front channel. For this, the inflow amount of at least one of the indium source, the gallium source and the zinc source can be adjusted by controlling the inflow amount of the first IGZO thin film and the inflow amount of the oxygen source can also be controlled. For example, indium of the second IGZO thin film may be made smaller than that of the first IGZO thin film, or gallium of the second IGZO thin film may be made larger than that of the first IGZO thin film. By doing so, the characteristics of the first IGZO thin film and the second IGZO thin film, such as mobility and electrical conductivity, can be controlled.

The protective layer acts as an etch stop layer in order to prevent the active layer 130 from being exposed and damaged in the etching process for forming the source electrode 150a and the drain electrode 150b after the formation of the active layer 130. [ In addition, the passivation layer can prevent the active layer 130 from being exposed to the atmosphere after the source electrode 150a and the drain electrode 150b are completed.

That is, when the active layer 130 formed of the IGZO thin film is exposed to the atmosphere, oxygen or the like may penetrate and the characteristics may be deteriorated. The protective layer may prevent the penetration of oxygen and may be formed of a material having a different etch selectivity with respect to the active layer 130 in the etching process. For example, the protective layer may be formed of silicon oxide (SiO2), silicon nitride (SiN) A single layer or a multilayer can be formed using an insulating material such as silicon nitride (SiON) or aluminum oxide (Al2O3). In addition, the protective film may be formed by a chemical vapor deposition method not using plasma and a chemical vapor deposition method using plasma.

That is, when the protective layer is formed using plasma, since the active layer 130 is damaged by the plasma, at least a partial thickness of the active layer 130 in contact with the active layer 130 is formed by an ALD method or a CVD method which does not use plasma, So that the film quality can be improved.

On the other hand, the protective film can be formed by using a silicon-containing organic source and a reactive source similarly to the gate insulating film. That is, when silane gas is used to form a protective film with silicon oxide or the like, H may exist in the film, and H may cause deterioration of electrical characteristics. Accordingly, a protective film may be formed using a reaction source of at least one of silicon-containing organic sources such as HMDSO, TMDS, HMDSN, and BEDEAS, and an oxygen-containing gas and a nitrogen-containing gas to form a hybrid film containing an organic component. For example, when a protective film is formed using HMDSO and oxygen, components such as SiO, SiCH3, and SiCH4 are present in the film, and independent H formation can be suppressed through Si-CH4 bonding.

The protective film may also be formed of a thin film having at least two layers which are different from each other in film quality. The thin film of at least two layers is adjacent to the active layer 130, and the first protective film 142 and the source electrode 150a And a second protective film 144 adjacent to the drain electrode 150b and formed by a CVD process. 3, a third protective film 146 may be further formed on the second protective film 144 by an ALD process, as shown in another embodiment. That is, a first protective film 142 having excellent film quality and interface characteristics is formed on the active layer 130 by an ALD process, and the second protective film 144 on the first protective film 144 is formed by a CVD process do. As described above, it is possible to improve productivity by enabling high-speed deposition using a CVD process. In addition, the third protective thin film 146 on the second protective thin film 144 may be formed by an ALD process to have excellent film quality and interface characteristics.

In addition, the protective film may be formed in an oxygen-rich state, at least a part of which has a high oxygen content. That is, when the protection film is formed as a single layer, a part of the lower side is formed in an oxygen rich state and the protective film is formed to include multiple layers, for example, the first protective film 142 and the second protective film 144 The first protective thin film can be formed in an oxygen rich state with an oxygen content higher than that of the second protective thin film 144.

Oxygen or an ozone treatment may be performed after forming at least a part of the protective film to form at least a part of the protective film in the oxygen rich state. For example, the protective film may be formed of a single material, and a part of the thickness in contact with the active layer 130 may be formed with an oxygen content greater than the remaining thickness.

In addition, the passivation layer may be formed of different materials. For example, aluminum oxide having a predetermined thickness may be formed in contact with the active layer 130, and a predetermined thickness of silicon oxide may be formed thereon. At this time, the aluminum oxide may be formed into an oxygen rich state. By forming at least a part of the thickness of the protective layer in contact with the active layer 130 with oxygen richness, the oxygen of the IGZO thin film used as the active layer 130 can be prevented from diffusing into the protective layer, thereby preventing the IGZO thin film from becoming conductive The switching characteristics of the thin film transistor can be maintained.

The source electrode 150a and the drain electrode 150b are formed on the active layer 130 and are spaced apart from each other with the gate electrode 110 interposed therebetween. That is, the source electrode 150a and the drain electrode 150b are formed apart from each other on the protective film. The source electrode 150a and the drain electrode 150b may be formed by the same process using the same material and may be formed using a conductive material. For example, aluminum (Al), neodymium (Nd), silver Ag, Cr, Ti, Ta, and Mo, or an alloy containing any of these metals. That is, the gate electrode 110 may be formed of the same material as the gate electrode 110, but may be formed of another material. In addition, the source electrode 150a and the drain electrode 150b can be formed as a single layer as well as multiple layers of a plurality of metal layers.

As described above, the thin film transistor according to one embodiment of the present invention can be formed by using a silicon-containing organic source such as HMDSO, TMDS, HMDSN, BEDEAS, and a reactive gas such as oxygen or nitrogen. A gate insulating film according to the present invention is to combine the H and CH ₃ to CH ₄ present in the film it is possible to suppress the generation of independent H.

Therefore, since the amount of H remaining in the gate insulating film can be minimized, the electrical characteristics of the thin film transistor can be improved compared with the conventional method of forming the gate insulating film using silane.

Comparative Example  One Comparative Example  2 Comparative Example  3 Example  One Example  2
Thin film structure
Thermal growth
SiH4 Source
(CVD) Si  contain
Organic matter Source
(CVD) Si  contain
Organic matter Source
( ALD / CVD) Si  contain
Organic matter Source
( ALD / CVD / ALD ) Refractive
Index
1.47
1.46 to 1.50
1.481
1.479
1.479 Wet Etch Rate
(Å / min)
384
637
450
390
331 Cox
(F / cm2)
3.49E-08
3.90E-08
3.21E-08
3.21E-08
3.21E-08 permittivity
(K)
3.90
4.3
4.3
4.2
4.10 Breakdown
Voltage
(MV / cm2)
8.5
7.2
7.6
8.3
8.8

Table 1 is a table comparing the physical properties according to the thin film structure.

Referring to Table 1, Comparative Example 1 shows the physical properties when an insulating thin film is formed by a thermally grown process, and Comparative Example 2 shows an insulating thin film formed by a CVD process using silane (SiH ₄ ) And Comparative Example 3 shows the physical properties when a single-layer insulating thin film is formed by a CVD process using a silicon-containing organic source. Example 1 shows the physical properties when a first insulating thin film was formed by a CVD process using a silicon containing organic source and a second insulating thin film was formed by an ALD process on the first insulating thin film, 2, a first insulating thin film is formed by an ALD process using a silicon-containing organic source, a second insulating thin film is formed by a CVD process on the first insulating thin film, and a second insulating thin film is formed on the second insulating thin film by an ALD process 3 shows the physical properties when an insulating thin film is formed.

In the case of the refractive index, a value of 1.47 in the case of the comparative example 1 which can obtain the best film quality, a value of 1.46 to 1.50 in the case of the comparative example 2, and a value of 1.481 in the case of the comparative example 3. Further, the refractive index has a value of 1.479 in the case of Embodiment 1 and in the case of Embodiment 2. As a result, it can be seen that the refractive index is excellent in each case except for Comparative Example 2.

In the case of the etch rate, the value of 384 in the case of the comparative example 1, the value of 637 in the case of the comparative example 2, and the value of 450 in the case of the comparative example 3. In addition, the etching rate has a value of 390 in the case of Embodiment 1, and 331 in the case of Embodiment 2. As a result, Examples 1 and 2 have a low etching rate and excellent characteristics when used as an etch stop layer. In the case of Example 2, the lowest etching rate is exhibited.

The capacitance C _ox has a value of 3.49E-08 in the case of the comparative example 1, and 3.90E-08 in the case of the comparative example 2. Also, the capacitance has a value of 3.21E-08 in the case of each of the comparative example 3, the example 1 and the example 2. Therefore, it can be seen that all of the silicon-containing organic sources have an excellent capacitance value.

The dielectric constant has a value of 3.90 in the case of the comparative example 1 and 4.3 in the case of the comparative example 2 and the comparative example 3. [ In addition, the dielectric constant has a value of 4.2 in the case of the first embodiment, and a value of 4.10 in the case of the second embodiment. As a result, it can be seen that the films of Examples 1 and 2 have the closest dielectric constant to that of Comparative Example 1 in which the best film quality can be obtained.

In addition, the breakdown voltage has a value of 8.5 in Comparative Example 1, 7.2 in Comparative Example 2, and 7.6 in Comparative Example 3. In addition, the breakdown voltage has a value of 8.3 in the case of Embodiment 1, and a value of 8.8 in case of Embodiment 2. As a result, it can be seen that the breakdown voltages of Examples 1 and 2 are closest to those of Comparative Example 1 in which the best film quality can be obtained.

4 is a characteristic graph of a thin film transistor according to a process of forming a gate insulating film and a protective layer. FIG. 4A is a characteristic graph when the gate insulating film and the protective film are formed by a CVD process using silane (SiH ₄ ), FIG. 4B is a characteristic graph showing an ALD process, a CVD process, and an ALD And a protective film is formed by a CVD process using silane (SiH ₄ ). 4 (c) shows a method of forming a gate insulating film sequentially stacked from the bottom by an ALD process, a CVD process, and an ALD process using a silicon-containing organic source, and performing an ALD process, a CVD process, And a protective film which is sequentially stacked from the bottom by an ALD process is formed.

Referring to FIG. 4, the subthreshold swing is 0.34 in FIG. 4 (a), 0.33 in FIG. 4 (b), and 0.25 in FIG. 4 (c). The average threshold voltage (Avg. Vth) is -3.56 in FIG. 4A, -3.42 in FIG. 4B, and -2.33 in FIG. 4C. In addition, the average mobility is 34.14 in FIG. 4 (a), 43.60 in FIG. 4 (b), and 45.06 in FIG. 4 (c). That is, FIG. 4 (b) shows superior results to all the characteristics in FIG. 4 (a), and FIG. 4 (c) shows better results than FIG. 4 (b). As a result, the on-state current, the off-state current, the threshold voltage, and the charge mobility can be controlled by controlling the method of depositing the gate insulating film or the passivation film, and it can be understood that FIG. 4 (c) has the best characteristics.

FIGS. 5 and 6 are graphs showing the results of measuring the mobility and the change in the threshold voltage with time, respectively, by inserting the thin film transistor in the evaluation equipment having the severe condition for the durability test. Here, the thin film transistor is formed by a CVD process using a silane (SiH ₄ ) or a gate insulating film and a protective film using a silicon containing organic source, a gate insulating film And a thin film transistor in which a protective film which is sequentially stacked from the bottom by an ALD process, a CVD process and an ALD process is formed by using a silicon containing organic source is used.

As shown in FIG. 5, the thin film transistor according to the embodiment of the present invention has an initial value of 43.6 (mobility) as compared with the case where the gate insulating film and the protective film are formed by a CVD process using silane (SiH ₄ ) To 44.1 at the maximum. That is, it can be seen that the charge mobility of the thin film transistor according to the embodiment of the present invention varies by about 1.47% with respect to the initial value, and varies within the range of 0% to 3%.

As shown in FIG. 6, the thin film transistor according to the embodiment of the present invention has a threshold voltage (Vth) which is lower than an initial value when a gate insulating film and a protective film are formed by a CVD process using silane (SiH ₄ ) -2.33 to -2.53 at the maximum. That is, it can be seen that the threshold voltage of the thin film transistor according to the embodiment of the present invention changes by about 8.58% with respect to the initial value, and varies within a range of 0% to 10%.

7 to 11 are sectional views sequentially illustrating a method of manufacturing a thin film transistor according to an embodiment of the present invention.

A method of fabricating a thin film transistor according to an embodiment of the present invention includes forming a gate electrode 110 on a substrate 100; Forming a gate insulating film on the gate electrode 110; Forming an active layer 130 on the gate insulating layer; And forming a source electrode (150a) and a drain electrode (150b) on the active layer (130), wherein the process for forming the gate insulating layer comprises: forming a gate insulating layer Forming a first insulating thin film 124 by a CVD process; And forming a second insulating thin film 126 on the first insulating thin film by an ALD process using a silicon containing organic source and a reactive source.

The method of fabricating a thin film transistor according to an embodiment of the present invention may further include forming a protective layer on the active layer 130 after forming the active layer 130 on the gate insulating layer .

Referring to FIG. 7, a gate electrode 110 is formed on a predetermined region of the substrate 100, and a gate insulating film is formed on the entire surface including the gate electrode 110. A first conductive layer is formed on the substrate 100 by using CVD, for example, to form the gate electrode 110, and then the first conductive layer is patterned by photolithography and etching using a predetermined mask. In addition, the gate insulating film may be formed on the entire upper surface including the gate electrode 110, and may be formed using an organic source and at least one reaction gas of oxygen and nitrogen. Therefore, the gate insulating film may be formed of a hybrid film containing components such as SiO, SiCH4, and the like.

The first insulating thin film 124 is formed on the gate electrode 110 by a CVD process and the second insulating thin film 126 is formed on the first insulating thin film 124 by an ALD process . The third insulating thin film 122 is formed on the gate electrode 110 by the ALD process and the first insulating thin film 124 is formed on the third insulating thin film 122 by the CVD process. And the second insulating thin film 126 may be formed on the first insulating thin film 124 by the ALD process.

Further, during the formation of the gate insulating film, at least one treatment, preferably two to four treatments can be performed. The treatment can be performed, for example, in an oxygen atmosphere, and can be performed at a temperature lower than the deposition temperature of the gate insulating film. For example, the gate insulating film may be formed at a temperature of 300 ° C to 400 ° C, and the treatment may be performed at a temperature of 200 ° C to 300 ° C.

In addition, the treatment can be performed for 10 seconds to 60 seconds for each treatment. By controlling the deposition method and treatment of the gate insulating film, the composition of the gate insulating film can be controlled and the electrical characteristics of the thin film transistor can be controlled accordingly.

Referring to FIG. 8, an active layer 130, for example, a metal oxide thin film is formed on a substrate 100. In order to form the active layer 130, the substrate 100 is maintained at a temperature of about 300 ° C or lower, for example, 100 to 300 ° C, and then the active layer 130 is formed on the entire upper surface including the gate insulating layer.

Here, the active layer 130 may be formed of an IGZO thin film, an ITZO thin film, or the like using an ALD process, a CVD process, or the like. For example, when an IGZO thin film is formed by an ALD process, an indium source, a gallium source, and a zinc source are simultaneously supplied into a reaction chamber to be adsorbed on a substrate 100, followed by purging the unadsorbed source gas using a purge gas, An oxidizing source may be supplied into the reaction chamber and reacted on the substrate 100 to form an IGZO thin film of a single atomic layer, and then the unreacted reaction gas may be purged using a purge gas.

Here, for example, the indium source and trimethyl indium _{(Trimethyl Indium; In (CH 3} ) 3) (TMIn) into the can be used, the gallium source, such as trimethyl gallium _{(Trimethyl Gallium; Ga (CH 3} ) 3) (TMGa ) And the like can be used. As the zinc source, diethyl zinc (Zn (C ₂ H ₅ ) ₂ ) (DEZ), dimethyl zinc (Zn (CH ₃ ) ₂ ) . At least one of oxygen-containing materials such as oxygen (O ₂ ), ozone (O ₃ ), water vapor (H ₂ O), N ₂ O and CO ₂ can be used as the oxygen source, Ozone (O ₃ ) is preferably used, and oxygen (O ₂ ), N ₂ O, and CO ₂ can be excited into a plasma state.

A part of the active layer 130 may be formed by an ALD process, and the remainder may be formed by a CVD process. For this purpose, for example, when an IGZO thin film is formed by a CVD process, an indium source, a gallium source, a zinc source and an oxidizing source simultaneously flow into the reaction chamber. In the case where the active layer 130 is formed in a two-layer structure by different deposition methods, the active layer 130 may be formed with different composition ratios. At least one inflow amount of the source material may be controlled to be more or less than that of the single- And the inflow amount of the oxidizing source can also be controlled. By doing so, the characteristics of the metal oxide thin film of other layers, such as mobility and electrical conductivity, can be controlled as compared with the metal oxide thin film of the first layer.

Referring to FIG. 9, a protective film is formed on the active layer 130. The passivation layer may be formed of a material that prevents penetration of oxygen and differs in etching selectivity from the active layer 130. An insulating layer such as silicon oxide, silicon oxynitride, or aluminum oxide may be used. The protective film can be formed using an organic source and a reactive gas. That is, the protective film may be formed of the same material as the gate insulating film, and therefore H may not remain in the film.

The protective layer can be formed by forming the first protective layer 142 on the active layer 130 by the ALD process and forming the second protective layer 144 on the first protective layer 142 by the CVD process . In addition, the protective film may be formed by forming the first protective film 142 on the active layer 130 by the ALD process and forming the second protective film 144 on the first protective film 142 by the CVD process. And the third protective thin film 146 may be formed on the second protective thin film 144 by the ALD process.

Referring to FIG. 10, a predetermined region of the protective film is then etched and patterned. The protective film is then patterned so as to remain in a region where the source electrode 150a and the drain electrode 150b are spaced apart. That is, the protective film is patterned to partially overlap the source electrode 150a and the drain electrode 150b.

On the other hand, the annealing process may be performed before the protective film is patterned. The annealing process may be carried out to compensate for the off current after the deposition of the protective film, which may be changed. Here, the annealing process can be performed in a vacuum state using oxygen or ozone. That is, the annealing process can be performed at a pressure lower than the atmospheric pressure (760 Torr), more preferably 0.1 Torr to 10 Torr. At this time, the process temperature is maintained at 200 to 450 占 폚, and the process time can be variously varied from 1 minute to 30 minutes depending on the required device characteristics.

Referring to FIG. 11, the active layer 130 is patterned to cover the gate electrode 110. Next, a second conductive layer is formed on the active layer 130, and then patterned by a photolithography and etching process using a predetermined mask to form a source electrode 150a and a drain electrode 150b. The source electrode 150a and the drain electrode 150b overlap with the upper portion of the gate electrode 110 and are spaced apart from the upper portion of the gate electrode 110. [ At this time, the etching process is performed so that the protective film is exposed. Here, the second conductive layer may be formed using a metal, a metal alloy, a metal oxide, a transparent conductive film, or a compound thereof by CVD. Further, the second conductive layer may be formed of a plurality of layers in consideration of the conductive characteristic and the resistance characteristic.

While the preferred embodiments of the present invention have been described and illustrated above using specific terms, such terms are used only for the purpose of clarifying the invention, and the embodiments of the present invention and the described terminology are intended to be illustrative, It will be obvious that various changes and modifications can be made without departing from the spirit and scope of the invention. Such modified embodiments should not be individually understood from the spirit and scope of the present invention, but should be regarded as being within the scope of the claims of the present invention.

100: substrate 110: gate electrode
122, 124, 126: Gate insulating film 130:
142, 144, 146:
150a and 150b: source and drain electrodes

Claims (13)

1. A thin film transistor comprising a gate electrode, a gate insulating film provided on the gate electrode, an active layer provided on the gate insulating film, and source and drain electrodes provided on the active layer and horizontally spaced apart,
Wherein the gate insulating layer includes a SiCH ₄ component and is adjacent to the gate electrode and is formed by a CVD process; And a second insulating thin film adjacent to the active layer and formed by an ALD process.
The method according to claim 1,
Wherein the gate insulating film
And a third insulating thin film formed between the gate electrode and the first insulating thin film by an ALD process.
The method according to claim 1,
Wherein the gate insulating film is formed using a silicon containing organic source and a reaction source.
The method according to claim 1,
Wherein the active layer is formed of a zinc oxide thin film doped with Group 3 or Group 4 elements.
The method according to claim 1,
And a protective film provided between the active layer and the source electrode and the drain electrode,
Wherein the protective film is formed using a silicon containing organic source and a reactive source.
The method of claim 5,
The protective film may be formed,
A first protective film adjacent to the active layer and formed by an ALD process; And
And a second protective thin film adjacent to the source and drain electrodes and formed by a CVD process.
The method of claim 6,
Wherein the first protective thin film has a higher oxygen content than the second protective thin film.
The method of claim 6,
Wherein the charge mobility of the thin film transistor varies within a range of 3% or less.
The method of claim 6,
Wherein a threshold voltage of the thin film transistor varies within a range of 10% or less.
Forming a gate electrode on a substrate;
Forming a gate insulating film on the gate electrode;
Forming an active layer on the gate insulating layer; And
And forming a source electrode and a drain electrode on the active layer,
The process of forming the gate insulating film includes:
Forming a first insulating thin film on the gate insulating film by a CVD process using a silicon-containing organic source and a reactive source; And
And forming a second insulating thin film on the first insulating thin film by an ALD process using a silicon containing organic source and a reactive source.
The method of claim 10,
The process of forming the gate insulating film includes:
Wherein an organic component contained in the silicon-containing organic source reacts with hydrogen atoms to form a SiCH ₄ component.
The method of claim 10,
Wherein the gate insulating film controls the ON current, the OFF current, the threshold voltage, and the charge mobility by controlling the deposition method.
The method of claim 10,
And forming a protective layer on the active layer after forming the active layer on the gate insulating layer,
The process of forming the protective film may include:
Forming a first protective thin film on the active layer by an ALD process using a silicon-containing organic source and a reactive source; And
And forming a second protective thin film on the first protective thin film by a CVD process using a silicon containing organic source and a reactive source.

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