KR20180105088A - System and methods for bonding semiconductor elements - Google Patents

Abstract

An ultrasonic bonding method of a semiconductor element comprises the following steps: (a) aligning each surface of a plurality of first conductive structures of a first semiconductor element to each surface of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between each of the first and second conductive structures; and (c) forming completed bonds between the first and second conductive structures.

Description

Technical Field [0001] The present invention relates to a system and method for bonding semiconductor elements,

This application is a continuation-in-part of application Ser. No. 15 / 147,015, filed May 5, 2016, which is a divisional application of Application No. 14 / 822,164 filed on August 10, 2015, Filed October 3, 2008 (now U.S. Patent No. 9,136,240), which claims the benefit of Provisional Application No. 61 / 888,203, filed October 8, 2013, Are incorporated herein by reference.

The present invention relates to the formation of semiconductor packages, and more particularly to improved systems and methods for bonding semiconductor elements together.

Traditional semiconductor packaging typically involves a die attach process and a wire bonding process. Advanced semiconductor packaging technologies (e.g., flip chip bonding, thermocompression bonding, etc.) are becoming more attractive in this industry. For example, during thermal compression bonding, heat and pressure are used to form a plurality of interconnects between semiconductor elements.

Advanced packaging techniques are increasingly used, but there are a number of limitations to these techniques, including, for example, the limitations associated with the relative immaturity of any advanced packaging technology. Thus, it would be desirable to provide an improved system and method for bonding semiconductor elements together.

According to one exemplary embodiment of the present invention, there is provided a semiconductor element ultrasonic bonding method for ultrasonically bonding semiconductor elements. The method includes the steps of: (a) aligning a surface of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming a temporary bonding portion between the first conductive structure and each second conductive structure; And (c) forming a completed junction between the first conductive structure and the second conductive structure.

According to another exemplary embodiment of the present invention, a bonding system is provided. The bonding system includes a support structure for supporting a first semiconductor element, wherein the first semiconductor element comprises a plurality of first conductive structures. The bonding system also includes a bonding tool having a second semiconductor element comprising a plurality of second conductive structures, wherein the bonding tool applies ultrasonic energy to the second semiconductor element to form a plurality of And to form a temporary joint between the corresponding first conductive structures.

BRIEF DESCRIPTION OF THE DRAWINGS The invention is best understood from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. It is emphasized that, according to common practice, the various elements of the drawing do not scale. Conversely, the dimensions of the various elements are arbitrarily enlarged or reduced for clarity. The figure includes the following figures.

1A-1C are block diagrams of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with an exemplary embodiment of the present invention.
2A is a block diagram of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
FIG. 2B is an enlarged view of the "FIG. 2B" portion of FIG. 2A.
Figure 2c is a view of Figure 2b after ultrasonic bonding;
3 is a block diagram of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
4A is a block diagram of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
Figure 4b is an enlarged view of the "Figure 4b" portion of Figure 4a.
Figure 4c is a view of Figure 4b after ultrasonic bonding.
5A is a block diagram of a portion of an ultrasonic bonding machine illustrating a structure and a method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
5B is an enlarged view of the "FIG. 5B" portion of FIG. 5A.
Figure 5c is a view of Figure 5b after ultrasonic bonding;
6A is a block diagram of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
FIG. 6B is an enlarged view of the "FIG. 6B" portion of FIG. 6A.
Figure 6c shows a portion of Figure 6a after contact between the conductive structures.
7 is a flow chart illustrating a method of ultrasonically bonding semiconductor elements in accordance with an exemplary embodiment of the present invention.
8A-8E are block diagrams of a portion of an ultrasonic bonding machine illustrating a structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with an exemplary embodiment of the present invention.
9 is a flow chart illustrating a method of ultrasonically bonding semiconductor elements in accordance with an exemplary embodiment of the present invention.
10A-10E are block diagrams of a portion of an ultrasonic bonding machine illustrating another structure and method for bonding an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
11 is a flow chart illustrating yet another method of ultrasonically bonding semiconductor elements in accordance with another exemplary embodiment of the present invention.
12A-12D are block diagrams of a portion of an ultrasonic bonding machine illustrating yet another structure and method for joining an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
Figure 13 is a flow diagram illustrating yet another method of ultrasonically bonding semiconductor elements in accordance with another exemplary embodiment of the present invention.
14A-14D are block diagrams of a portion of an ultrasonic bonding machine illustrating yet another structure and method of joining an upper semiconductor element to a lower semiconductor element in accordance with another exemplary embodiment of the present invention.
15 is a flow chart illustrating yet another method of ultrasonically bonding semiconductor elements in accordance with another exemplary embodiment of the present invention.

"Semiconductor element, " as used herein, refers to any structure that includes a semiconductor chip or die (or that is configured to include a semiconductor chip or die at a later stage). Exemplary semiconductor elements include, among others, a bare semiconductor die, a semiconductor die (e.g., leadframe, PCB, carrier, etc.) on a substrate, a packaged semiconductor device, a flip chip semiconductor device, . In addition, the semiconductor element may include elements (such as spacers, substrates, etc.) to be bonded to or otherwise included in a semiconductor package.

According to certain exemplary embodiments of the present invention, an inventive technique (and structure) for assembling a semiconductor device, such as a package on package (PoP), is provided. For example, a plurality of semiconductor elements (which may be packages) may be arranged in a stacked configuration. Each element preferably comprises aluminum (or aluminum alloy, or partially aluminum) bonded together ultrasonically. Such techniques include, for example, reduced density compared to other interconnect technologies (e.g., solder-based PoP technology); Unlike other interconnect technologies, solder mass reflow is not used; And some applications have some advantages, including the possibility of room temperature ultrasonic bonding through the use of aluminum-aluminum interconnects.

1A shows a portion of an ultrasonic bonding machine 100 that includes a bonding tool 124 and a support structure 150. Fig. As is known to one of ordinary skill in the art, a thermal compression bonding machine (e.g., machine 100, or any of the other machine embodiments described herein) includes many elements (not shown here for the sake of simplicity) can do. Exemplary elements include, among other elements, an input element for providing an input work to be joined, for example, with additional semiconductor elements; An output element for receiving a processed workpiece comprising an additional semiconductor element; A transfer element for moving the workpiece; An imaging system for imaging and aligning a workpiece; A bonding head assembly having a bonding tool; A motion system for moving the joint head assembly; And a computer system including software for operating the machine.

1A, the upper semiconductor element 108 is held by a holding portion 110 of the bonding tool 124 (e.g., a vacuum applied through a vacuum port formed on the holding surface of the holding portion 110) ). The upper semiconductor element 108 includes upper semiconductor structures 112a and 112b at its lower surface. The lower semiconductor element 160 includes a semiconductor die 102 that is bonded to (or supported by) a substrate 104. And the lower conductive structures 106a and 106b are provided on the upper surface of the lower semiconductor die 102. [ The substrate 104 is supported by a support structure 150 (e.g., a thermal block of the machine 100, an anvil of the machine 100, or other desired support structure). In the configuration shown in Fig. 1A (preparation for bonding), each of the upper conductive structures 112a and 112b is aligned with each of the lower conductive structures 106a and 106b facing each other. The semiconductor element 108 is moved downwardly through the motion of the bonding tool 124 (as indicated by arrow 126 in FIG. 1A). Figure IB shows the contact between each conductive structure 106a, 112a; 106b, 112b that occurs after this movement. Ultrasonic energy 114 is transmitted through the bonding tool 124 to the upper semiconductor element 108 and the upper conductive structure (not shown) using an ultrasonic transducer (not shown, but denoted "USG " 112a, 112b. For example, an ultrasonic transducer having a bonding tool 124 may be retained in the bonding head assembly of the machine 100.

During ultrasonic bonding, the lower conductive structures 106a, 106b may remain relatively stationary through the support of the lower semiconductor element 160 by the support structure 150 (e.g., the support surface 150 of the support structure 150) May include one or more vacuum ports to secure substrate 104 to support structure 150 during bonding). Ultrasonic energy 114 (with optional bonding force and / or heat) can cause partial deformation of the conductive structure. For example, in FIG. 1C, the conductive structures 106a, 106b (112a, 112b) are shown partially strained. In Fig. 1C, an ultrasonic bonding portion is formed between each pair of conductive structures. For example, an ultrasonic bonding portion 128a is formed between the deformed conductive structures 112a '/ 106a' and an ultrasonic bonding portion 128b is formed between the deformed conductive structures 112b '/ 106b'. The conductive structures 106a, 106b (112a, 112b) may be formed of aluminum or an aluminum alloy, or may contain aluminum at the junction surface or the like.

Each pair of conductive elements 106a, 112a; 106b, 112b may be joined together at room temperature (without the addition of heat during the bonding process). Alternatively, additional heat may be applied to the upper semiconductor element 108 through the bonding tool 124 during the bonding process to heat the upper conductive elements 112a, 112b and / or (2) May be applied to the lower semiconductor element 160 through the structure 150 (e.g., thermal block 150) to heat the lower conductive structures 106a, 106b. Such selective heating (e.g., via a bonding tool and / or support structure, etc.) may be applied to any of the embodiments of the present invention illustrated and described herein.

The semiconductor elements 160, 108 shown in Figs. 1A-1C may be any of a number of semiconductor elements configured to be joined together. The semiconductor element 160 is a processor (e.g., a mobile phone processor, also known as an APU (application processor unit)), a semiconductor element 108, May be a memory device configured to be coupled to the processor as shown in Figs. 1A-1C.

The conductive structures (i.e., 112a, 112b, 106a, 106b) shown in Figs. 1A-1C are shown as a general structure. These structures can be used in particular as conductive pillar stud bumps (formed using a stud bumping machine, for example), electroplated conductive structures, sputtered conductive structures, wire portions, bond pads, contact pads It can take many different forms. The various other drawings provided herein illustrate specific examples of such structures. According to some embodiments of the present invention, the conductive structure comprises aluminum at the contact region (i.e., the junction surface) that is bonded to another conductive structure. In such an embodiment, the conductive structure may be formed of aluminum or an aluminum alloy (e.g., aluminum alloyed with copper, aluminum alloyed with silicon and copper, etc.). As another example, the conductive structure may include a base conductive material (e.g., copper) other than aluminum, and aluminum (or aluminum alloy) in the contact area. Throughout this application, when the conductive structure is referred to as "aluminum ", the conductive structure may be aluminum, aluminum alloy, or may comprise aluminum (or aluminum alloy) in the contact area of such conductive structure .

2A shows a portion of an ultrasonic bonding machine 200 that includes a bonding tool 224 and a support structure 250. Fig. The upper semiconductor element 208 is held (e.g., in vacuum) by the holding portion 210 of the bonding tool 224 and is electrically connected to the upper conductive structures 222a and 222b 222a, 222b). The lower semiconductor element 260 includes a semiconductor die 202 that is bonded to (or supported by) the substrate 204. The lower conductive structures 206a and 206b are provided on the upper surface of the lower semiconductor die 202. And the substrate 204 is supported by the support structure 250. In the configuration shown in FIG. 2A, each of the upper conductive structures 222a and 222b is aligned (also configured to be ultrasonically joined) with each of the lower conductive structures 206a and 206b facing each other. The lower conductive structure 206a includes a copper (Cu) pillar 230 provided on the upper surface of the lower semiconductor die 202 and an upper aluminum contact structure 216 on the upper surface of the Cu pillar 230 . The upper aluminum contact structure 216 may be electroplated or sputtered on the upper surface of the lower copper pillar 230, for example. FIG. 2B is an enlarged view of the "B" portion of FIG. 2A, showing the top portion of the lower conductive structure 206a in contact with the upper conductive element 222a.

Ultrasonic energy is applied to the upper semiconductor element 208 through the bonding tool 224 using an ultrasonic transducer (not shown). The ultrasonic energy can cause partial deformation of the conductive structure as shown in Fig. 2C. That is, an ultrasonic bonding portion 228 is formed between the deformed upper conductive structure 222a 'and the deformed contact structure 216' (as shown in FIG. 2c).

As is known to one of ordinary skill in the art, the Cu pillar 230 (including the electroplated or sputtered aluminum contact structure / portion 216) is only one example of a conductive structure comprising aluminum. 2A illustrates another exemplary conductive structure 206b. The lower conductive structure 206b is an aluminum structure (or aluminum alloy structure) such as a piece of aluminum wire (which may be bonded using a wire bonding process), aluminum pillar, or the like.

Figure 3 shows a portion of an ultrasonic bonding machine 300 that includes a bonding tool 324 and a support structure 350. The upper semiconductor element 308 is held (e.g., in vacuum) by the holding portion 310 of the bonding tool 324 and the upper conductive structures 322a and 322b (i.e., the conductive aluminum pads 322a and 322b) . 3 illustrates bonding the packaged semiconductor device 360 (i.e., the lower semiconductor element 360) to the upper semiconductor element 308. As shown in FIG. The lower semiconductor element 360 includes a semiconductor die 302 that is bonded to (or otherwise supported by) the substrate 304. And the lower conductive structures 306a and 306b are provided on the upper surface of the substrate 304. [ And the substrate 304 is supported by the support structure 350. Wire loops 320a and 320b are bonded between the semiconductor die 302 and the substrate 304 (although not shown in FIG. 3, the die 302 may be mounted on the substrate 304 in opposition to, or in addition to, 304). ≪ / RTI > A coating / capsule 334 (e.g., an epoxy molding compound) is applied over die 302 and wire loops 320a and 320b. As shown, the upper portions of the lower conductive structures 306a, 306b are exposed above the coating / capsule 334 to enable electrical connection with the upper semiconductor element 308. [

In the configuration shown in Fig. 3, each of the upper conductive structures 322a and 322b is aligned (also configured to be ultrasonically joined) with each of the lower conductive structures 306a and 306b facing each other. 3, each of the lower conductive structures 306a and 306b is formed on the upper surface of each of the Cu pillars 330a and 330b and the Cu pillars 330a and 330b on the upper surface of the substrate 304, And includes respective upper side aluminum contact structures 316a and 316b. The upper aluminum contact structures 316a and 316b may be electroplated or sputtered onto each upper surface of the Cu pillars 330a and 330b. As shown, the semiconductor element 308 has been moved downwardly through the motion of the bonding tool 324 (as indicated by the arrows in Figure 3), so that Figure 3 shows the conductive structures 306a, 322a, 306b , 322b. Ultrasonic energy (with optional heat and / or bonding forces) may be applied to the upper semiconductor element 308 (e.g., via the bonding tool 324) using an ultrasonic transducer so that the aluminum conductive structures 322a, 322b and And the aluminum contact structures 316a and 316b of the ultrasonic bonding structure.

4A shows a portion of an ultrasonic bonding machine 400 that includes a bonding tool 424 and a support structure 450. The upper semiconductor element 408 is held (e.g., in vacuum) by a retaining portion 410 of the bonding tool 424 and secured to the upper conductive structures 412a and 412b (i.e., sputtered aluminum bumps, Bumps, etc.). The lower semiconductor element 460 includes a semiconductor die 402 that is bonded (or otherwise supported) to a support structure 404 (e.g., FR4 support structure). The lower conductive structures 406a and 406b (i.e., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on the upper surface of the lower semiconductor die 402. And the substrate 404 is supported by the support structure 450. In the configuration shown in FIG. 4A, each of the upper conductive structures 412a and 412b is aligned (also configured to be ultrasonically joined) with each of the lower conductive structures 406a and 406b facing each other. Details of the structures 412a and 406b (before ultrasonic bonding) are shown in Fig. 4B. 4A, the semiconductor element 408 is moved downwardly through the motion of the bonding tool 424 (as indicated by the arrows in FIG. 4A) so that the conductive structures 406a, 412a, 406b, 412b. Ultrasonic energy 414 (along with optional heat and / or bonding forces) may be applied to the upper semiconductor element 408 (e.g., via the bonding tool 424) using an ultrasonic transducer, (E.g., as shown in FIG. 4C) between the deformed structure 412a 'and the deformed structure 406a', as shown in FIG. 4c, between the respective deformed lower aluminum contact structures 428a and 428b Formed ultrasound junction 428a ').

5A shows a portion of an ultrasonic bonding machine 500 that includes a bonding tool 524 and a support structure 550. The upper semiconductor element 508 is held (e.g., in vacuum) by the holding portion 510 of the bonding tool 524 and the upper conductive structures 522a and 522b (i.e., the conductive aluminum pads 522a and 522b) . The lower semiconductor element 560 includes a semiconductor die 502 that is bonded (or otherwise supported) to a substrate 504 (e.g., an FR4 support structure). The lower conductive structures 506a and 506b (i.e., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on the upper surface of the lower semiconductor die 502. And the substrate 504 is supported by the support structure 550. In the configuration shown in Fig. 5A, each of the upper conductive structures 522a and 522b is aligned (also configured to be ultrasonically joined) with each of the lower conductive structures 506a and 506b facing each other. Details of the structures 522a and 506b (before ultrasonic bonding) are shown in Fig. 5B. As shown, the semiconductor element 508 has been moved downwardly through the motion of the bonding tool 524 (as indicated by the arrows in FIG. 5A), so that FIG. 5A shows a state in which the conductive structures 506a and 522a Lt; / RTI > Ultrasonic energy (along with optional heat and / or bonding forces) may be applied to the upper semiconductor element 508 (e.g., via the bonding tool 424) using an ultrasonic transducer so that the deformed upper aluminum conductive structure and each deformation 528b between the deformed structure 522a 'and the deformed structure 506a', as shown in Figure 5c) Ultrasonic bonding portion 528a ').

6A illustrates an ultrasonic bonding machine 600 that includes a bonding tool 624 and a support structure 650. In Fig. 6, a plurality of semiconductor elements are bonded together in a stacked configuration according to the teachings of the present invention. In particular, the semiconductor element 660a includes a semiconductor die 602a bonded (or otherwise supported) to a substrate 604a and includes conductive structures 606a and 606b (e.g., sputtered aluminum bumps, aluminum Stud bump or the like) is provided on the upper surface of the semiconductor die 602a. Semiconductor element 660a is supported by support structure 650.

Other semiconductor elements 660b (including the corresponding semiconductor die 602b bonded to or otherwise supported by the substrate 604b and conductive structures 612a and 612b on the substrate 604b) Element 660a. More specifically, the bonding tool 624 may be formed by bonding an element 660b to an element 660a in advance (e.g., by ultrasonic bonding) and ultrasonic waves between the pairs of aluminum conductive structures 612a, 606a; 612b, 606b The junctions 628a and 628b are formed. Element 660b also includes conductive structures 606a ', 606b' bonded to the conductive structure of element 660c in the steps described below. 6B shows a detailed view of the ultrasonic bonding portion 628a including the deformed conductive structures 612a and 606a.

Similarly, other semiconductor elements 660c (corresponding semiconductor die 602c bonded to or otherwise supported by substrate 604c, and conductive structures 612a ', 612b' on substrate 604c) ) Was previously bonded to the semiconductor element 660b. More specifically, the bonding tool 624 is formed by joining the element 660c to the element 660b in advance (for example, by ultrasonic bonding) and bonding each pair of aluminum conductive structures 612a ', 606a', 612b ', 606b' The ultrasonic bonding portions 628a 'and 628b' are formed. Element 660c also includes a conductive structure 606a ", 606b "to be bonded to the conductive structure of element 660d in the steps described below.

6A, the upper semiconductor element 660d is held (e.g., in vacuum) by a holding portion 610 of the bonding tool 624 and bonded to the substrate 604d Lt; / RTI > semiconductor die 602d. Conductive structures 612a "and 612b" (i.e., sputtered aluminum bumps, aluminum stud bumps, etc.) are provided on the lower surface of the substrate 604d. The conductive structures 612a ", 612b "are aligned (and are also configured to be ultrasonically bonded) to the generally facing respective conductive structures 606a ", 606b ". Semiconductor element 660d is moved downward (as indicated by the arrows in Figure 6a) of bonding tool 624. After this downward movement, contact will occur between each pair of conductive structures 612a ", 606a"; 612b ", 606b" (eg, contact between structures 612a ", 606a" before deformation via ultrasonic bonding) (See the detailed view of FIG. Ultrasonic energy is applied to the upper semiconductor element 604d through the bonding tool 624 using an ultrasonic transducer (not shown) to form a gap between each pair of conductive structures 612a ", 606a ", 612b ", 606b " Thereby forming an ultrasonic bonding portion.

 While certain exemplary upper and lower aluminum conductive structures are shown, one of ordinary skill in the art will appreciate that various shapes and designs of the upper and lower aluminum conductive structures are permissible within the teachings of the present invention.

Figure 7 is a flow chart illustrating a method of bonding semiconductor elements together in accordance with an exemplary embodiment of the present invention. As will be appreciated by those of ordinary skill in the art, some of the steps included in the flowchart may be omitted, some additional steps may be added, and the order of the steps may be changed from the order shown. In step 700, a first semiconductor element (e.g. comprising a semiconductor die on a substrate) is supported on a support structure of the bonding machine. The first semiconductor element (e.g., the upper surface of the semiconductor structure) comprises a plurality of first conductive structures at least partially comprised of aluminum (e.g., structures 106a and 106b of element 160 in FIG. 1A) A structure 206a and 206b of the element 260 in Figure 2a; a structure 306a and 306b of the element 360 in Figure 3a; a structure 406a and 406b of the element 460 in Figure 4a; Structures 606a ", 606b "of element 660c in Fig. 6a); At step 702, the second semiconductor element is held by the holding portion of the bonding tool of the bonding machine (see, for example, elements 108, 208, 308, 408, 508, 660d in the corresponding figures). The second semiconductor element comprises a plurality of second conductive structures (e.g., on the lower surface of the second semiconductor element) at least partially composed of aluminum. In step 704, the first conductive structure and the second conductive structure are aligned with each other (see, for example, Figs. 1A and 6A) and then brought into contact with each other. In optional step 706, the plurality of aligned first conductive structures and the second conductive structures are pressed together in a predetermined amount of bonding force. The predetermined amount of bonding force may be a single bonding force value, or it may be a bonding force profile in which the actual bonding force varies during the bonding operation. In optional step 708, the plurality of aligned first conductive structures and / or the second conductive structures are subjected to heat. For example, the heat may be applied to the first conductive structure using a support structure that supports the first semiconductor element. Likewise, heat may be applied to the second conductive structure using a bonding tool to hold the second semiconductor element. In step 710, the plurality of first conductive structures and the second conductive structures are ultrasonically joined together to form an ultrasonic bond therebetween.

As one of ordinary skill in the art will appreciate, the present invention can be easily achieved with ultrasonic energy and / or bonding forces without bonding the aluminum material to the aluminum material, There is a special advantage when it comes.

While the present invention has been shown and described with respect to two pairs of conductive structures primarily bonded together by ultrasonic waves, the present invention is of course not limited thereto. Indeed, semiconductor packages (e. G., Advanced packages) assembled in accordance with the present invention may have any number of conductive structures and may have hundreds of pairs (even thousands of pairs) of conductive structures joined together by ultrasonic waves. Also, the conductive structures need not be bonded in pairs. For example, one structure may be bonded to two or more facing structures. Thus, any number of conductive structures in one semiconductor element can be ultrasonically bonded to any number of conductive structures in another semiconductor element.

Although the invention primarily describes (and illustrates) applying ultrasonic energy through a splicing tool (e.g., a splicing tool combined with an ultrasonic transducer), the invention is not so limited. Rather, the ultrasonic energy can be transmitted through any desired structure, for example, through a support structure.

As will be appreciated by those of ordinary skill in the art, the details of ultrasonic bonding may vary widely depending upon the particular application. Nonetheless, we now explain some non-limiting illustrative details. For example, the frequency of an ultrasonic transducer can be designed in conjunction with the design of a conductive structure (e.g., a pillar structure, etc.) so that the transducer resonant frequency is substantially matched to the resonant frequency of a given semiconductor element, The conductive structure can act dynamically as a cantilever beam. In another exemplary alternative, the transducer may be operated at an out-of-resonance condition for the semiconductor element in a simple "driven" manner.

An exemplary range for the energy applied to the ultrasonic transducer (e.g., applied to the piezoelectric crystal / ceramic of the transducer driver) may be 0.1 kHz-160 kHz, 10 kHz-120 kHz, 20 kHz-60 kHz, A single frequency may be applied during the bonding, or multiple frequencies may be applied (e.g., sequentially, simultaneously, or both). A scrub of the semiconductor element (i. E., The vibration energy applied to the semiconductor element held by the bonding tool) can be applied in any of a number of desired directions, and among other configurations, a bonding tool (As shown), or through a support structure that supports the semiconductor element. In particular, with reference to the embodiment shown here (the ultrasonic energy is applied through a bonding tool holding the semiconductor element), the rubbing is carried out in a direction substantially parallel or substantially perpendicular to the longitudinal axis of the bonding tool ). ≪ / RTI >

The vibration energy exerted by the ultrasonic transducer may be applied in a peak-to-peak amplitude range of, for example, 0.1 um to 10 um (e.g., constant voltage, constant current feedback control, With alternating control schemes including, but not limited to, ramp current, ramp voltage or proportional feedback control.

As described herein, the bonding force may also be applied during at least a portion of the ultrasonic bonding cycle. An exemplary range of bonding force is 0.1 kg to 100 kg. The bonding force may be applied at a constant value, or it may be a bonding force profile that varies during the bonding cycle. When the bonding force is controlled, the feedback control of the bonding force may be constant, oblique, or proportional based on one or more inputs (e.g., ultrasonic amplitude, time, velocity, strain, temperature, etc.).

As described herein, one or more of the semiconductor elements may be heated before and / or during the bonding cycle. An exemplary range of temperatures of the semiconductor elements is 20 ° C to 250 ° C. The heat (e.g. applied through one or both of the bonding tool and the support structure, or other element) can be applied at a constant value or can be a temperature profile that varies during the bonding cycle and can be controlled using feedback control have.

While the present invention has been shown and described primarily for forming an ultrasonic bond between aluminum conductive structures in each semiconductor element, the present invention is of course not limited thereto. That is, the teachings of the present invention can also be applied to forming an ultrasonic bonding portion between conductive structures having different compositions. Examples of materials for the conductive structure to be bonded include aluminum and copper (i.e., forming an ultrasonic bond between an aluminum conductive structure in one semiconductor element and a copper conductive structure in another semiconductor element); Lead free solder (e.g., mainly composed of tin) and copper; Lead-free solder and aluminum; Copper and copper; Aluminum and silver: copper and silver; Aluminum and gold; Gold and gold; And copper and gold. Of course, other combinations of conductive structure composition (e.g., indium) are also contemplated.

As mentioned above, aspects of the present invention have been described with reference to aluminum materials included in various conductive structures of semiconductor elements, but the present invention is not limited thereto. That is, the conductive structure of the semiconductor element may comprise (or may be formed of) such a variety of different materials. For example, a conductive structure in an upper semiconductor element (e.g., an element held and bonded using a bonding tool), and / or a conductive structure in a lower semiconductor element (e.g., an element to which the upper conductive element is bonded) (Or may include copper).

According to certain aspects of the present invention, ultrasonic rubbing / energy may be used in connection with the multistage bonding process. For example, ultrasonic rub / energy may be used as an initiator for flip chip and / or thermal compression bonding processes. Ultrasonic rubbing can be used to prepare the final bonding process (e.g., a diffusion bonding process) by removing the oxide, for example, in connection with the formation of the initial bonding. This multi-step bonding process can have many different configurations. For example, using ultrasonic rubbing / energy, the bonding tool forms an initial bond (e.g., a "tack" bond) between the first conductive structure on the first semiconductor element and the second conductive structure on the second semiconductor element . The joints may be completed using the same tool (e.g., by applying heat and / or force), and Figures 8A-8D illustrate one example of such a process. As another example, the joining can be completed later using another process (e.g., in the same joining machine, in another joining machine, etc.). Using this later (different) process, a plurality of element joints can be completed at one time through a " gang "type junction process, and further FIG. 8E shows an example of such a process with FIGS. 8A-8C .

Thus, in accordance with certain embodiments of the present invention, a stable and robust weld (e.g., a semiconductor die) prior to subsequent flip chip and / or thermal compression bonding to other semiconductor elements (With force, if necessary) is used to initiate the < / RTI > By ultrasonic movement, the oxide on the surface to be bonded is rubbed away. Ultrasonic rubbing and / or force is for temporarily bonding together the interconnects (i.e., the interconnections of the conductive structures of the first semiconductor element and the second semiconductor elements) together, and in this connection, A desired effect of preventing oxidation is obtained. Examples of the conductive structure to be bonded include Sn-Cu, Cu-Al, Al-Al, and Cu-Cu. Of course, other combinations of conductive structure materials are also contemplated. After the temporary bonding, the semiconductor elements (e.g., die) can be bonded individually or collectively.

12A-12D (along with the flow diagram of FIG. 13) and FIGS. 14A-14D (with the flow diagram of FIG. 15), FIGS. 10A-10E ) Illustrate a system and method for forming interconnects between semiconductor elements using an exemplary multi-step bonding process. Figures 9, 11, 13 and 15 are flow charts illustrating a method of bonding semiconductor elements together according to an exemplary embodiment of the present invention. As will be appreciated by those of ordinary skill in the art, some steps included in the flowchart may be omitted, some additional steps may be added, and the order of the steps may be changed from the order shown.

8A, the upper semiconductor element 808 is held by a holding portion 810 of the bonding tool 824 (e.g., via a vacuum port formed in the holding surface of the holding portion 810) By the vacuum given). The upper semiconductor element 808 includes upper conductive structures 812a and 812b (e.g., a copper conductive structure such as a copper pillar, or other conductive structure) at its lower surface. The lower semiconductor element 860 includes a semiconductor die 802 bonded to (or otherwise supported by) a substrate 804. The substrate 804 may be, for example, an organic substrate, a semiconductor wafer, a temporary support structure (e.g., silicon, metal or glass wafer or panel) among other substrates. As another example, the semiconductor die 802 may still be a part of the semiconductor wafer, regardless of the drawing showing the separate substrate 804. The lower conductive structures 806a and 806b (e.g., a copper conductive structure such as a copper pillar or other conductive structure) are provided on the upper surface of the lower semiconductor die 802. The substrate 804 is then supported by a support structure 850 (e.g., a thermal block of the machine 800, an anvil of the machine 800, or other desired support structure). Alternatively, the semiconductor die 802 may be part of a full or partial wafer that is directly supported by the support structure 850 without an additional intervening substrate 804. 8A, each of the upper conductive structures 812a and 812b is aligned with each of the lower conductive structures 806a and 806b facing each other. The semiconductor element 808 is moved downwardly through the motion of the bonding tool 824 (as indicated by arrow 826 in FIG. 8A). Figure 8b shows the contact between each conductive structure 806a, 812a, 806b, 812b that occurs after this movement. Ultrasonic energy 814 is injected through the bonding tool 824 into the upper semiconductor element 808 and the upper conductive structure 808 using an ultrasonic transducer (not shown but denoted "USG " 812a, 812b. For example, an ultrasonic transducer having a bonding tool 824 may be retained in the bonding head assembly of the flip chip bonding machine 800. During ultrasonic bonding, the lower conductive structures 806a, 806b may remain relatively stationary through the support of the lower semiconductor element 860 by the support structure 850 (e.g., the support surface of the support structure 850) May include one or more vacuum ports to secure substrate 804 to support structure 850 during bonding). Ultrasonic energy 814 (with optional bonding force and / or heat) can cause partial deformation of the conductive structure. For example, in FIG. 8C, the conductive structures 806a and 806b (812a and 812b) are shown in a strained (or at least partially strained) state. In Fig. 8C, an initial (temporary) ultrasonic junction is formed between each pair of conductive structures. For example, as shown in Fig. 8C, an initial (e.g., temporary) ultrasonic bonding portion 828a is formed between the deformed conductive structures 812a '/ 806a' and a deformed conductive structure 812b '/ 806b' An initial (e.g., temporary) ultrasonic bonding portion 828b is formed.

In some embodiments of the present invention, the multi-step bonding process can be completed as shown in Figure 8D. 8C, the final joint may be formed using heat and / or force exiting the bonding tool 824 or other bonding tool 824a (see, e.g., FIG. 8B) , On the same or another machine).

In another embodiment of the present invention, the final joints may be grouped or "collectively " formed (e.g., on the same or different machine) using other joining tools, as shown in FIG. In this embodiment, following FIG. 8C, the conductive structures of the semiconductor elements 808 and 860 are "temporarily bonded " together. 8E, a group of upper semiconductor elements 808 is "collectively " glued (e.g., using heat and / or force) to each group of lower semiconductor elements 860. In the example shown in Figure 8E, a population bonding tool 875 is provided, which can be used in the machine 800 or other flip chip and / or thermal compression machine of Figure 8A. In the same machine, support structure 850 (Fig. 8A) may be used to support a plurality of lower semiconductor elements 860 during a "bulk " bonding process. In other machines, support structure 879 may be used to support a plurality of lower semiconductor elements 860 during a "population " bonding process. The collective bonding tool 875 (including the retaining portion 877) completes bonding the conductive structures of the plurality of upper semiconductor elements 808 to the conductive structure of the corresponding lower semiconductor element 860 Each element 860 includes a die 802, as described above with respect to Figs. During this final bonding process, heat and / or force may be applied by the bonding tool 875, the support structure 850/879, or both.

Referring specifically to Fig. 9, at step 900, a first semiconductor element (e.g. comprising a semiconductor die on a substrate, such as element 860 shown in Fig. 8A) is supported on a support structure of a bonding machine do. The first semiconductor element (e.g., the upper surface of the semiconductor structure) includes a plurality of first conductive structures. In step 902, the second semiconductor element is held by the retaining portion of the bonding tool of the bonding machine (e.g., see element 808 in FIG. 8A). The second semiconductor element includes a plurality of second conductive structures (e.g., on the lower surface of the second semiconductor element). In step 904, the first conductive structure and the second conductive structure are aligned with each other (e.g., see FIG. 8A) and then contact each other (see FIG. 8B, for example). In step 906, ultrasonic energy is applied to the second semiconductor element (via a bonding tool having the second semiconductor element, as in Fig. 8B), so that, as shown in Fig. 8C, (E.g., temporarily bonded) to the conductive structure of the first semiconductor element (see temporal joints 828a and 828b).

Where steps 908A, 908B and 908C are generally considered to be alternatives to each other. In step 908A, the flip chip (e.g., thermal compression) bonding process of the first conductive structure to the second conductive structure is completed individually using the same bonding tool used in step 906 (bonding the semiconductor elements one at a time ). For example, referring to the example shown in FIG. 8D, a completed junction 828a '(including further modified conductive structures 806a' and 812a '), 828b' (further modified conductive structures 806b ", 812b & ) May be applied using heat and / or pressure using a bonding tool 824 to form a heat spreader (not shown).

As an alternative to step 908A, at step 908B, the flip chip (e.g., thermal compression) bonding process of the first conductive structure to the second conductive structure may be performed using other tools Other bonding tools on the machine, and other bonding tools on different machines) (bonding the semiconductor elements one at a time). For example, referring again to the example shown in FIG. 8d (element 860 is supported by support structure 850a), a completed junction 828a '(including more modified conductive structures 806a ", 812a " (Including retaining portion 810a) to form heat and / or pressure (e. G., Including the retaining portion 810a) to form a plurality of conductive structures 828a ', 828b' (including more deformed conductive structures 806b ", 812b & Can be applied.

As an alternative to step 908A or step 908b, in step 908C, the flip chip (e.g., thermal compression) bonding process of the first conductive structure to the second conductive structure may be performed using other tools (E.g., by joining a plurality of semiconductor elements at the same time) using a different bonding tool (e.g., other bonding tool in the same machine, different bonding tool in another machine). For example, referring now to the example shown in Figure 8E, a bonding tool (not shown) may be used to form a completed bond comprising a further modified conductive structure pair 806a'a, 812a'a '; 806b'b, 812b'b 875 (including the retaining portion 877 and joining the plurality of semiconductor elements 808 to the corresponding semiconductor elements 860) (the elements 860 are shown in the same joining machine 800 as the support structure 850 And may be supported in the support structure 879 in other joining machines) to apply heat and / or pressure.

Accordingly, various types of systems and methods for temporary bonding and weld bonding (or temporary bonding and collective bonding) are described through the options described in FIG. 9 (shown in FIGS. 8A-8E). Of course, further variations in forming an initial (temporary) joint next to the finished (final) joint are, of course, contemplated within the scope of the present invention. Certain variations on the systems and processes (and other systems and processes within the scope of the present invention) that are illustrated and described in connection with Figs. 8A-8E and Fig. 9 include non-conductive materials , A paste, an epoxy, an acrylate, a silicone, a bis-maleimide, a polyimide, a polyester or the like or a non-conductive film). Such a non-conductive material may contain an inorganic filler material such as silica or alumina powder. Figs. 10A-10E (and the flowchart of Fig. 11), Figs. 12A-12D (and the flowchart of Fig. 13), and Figs. 14A-14D (and the flowchart of Fig. 15) show examples of such systems and processes.

10A, the upper semiconductor element 1008 is held by a holding portion 1010 of the bonding tool 1024 (e.g., via a vacuum port formed on the holding surface of the holding portion 1010) By the vacuum given). The upper semiconductor element 1008 includes upper conductive structures 1012a and 1012b (e.g., a copper conductive structure such as a copper pillar or other conductive structure) at its lower surface. The lower semiconductor element 1060 includes a semiconductor die 1002 that is bonded to (or otherwise supported by) a substrate 1004. The substrate 1004 may be, for example, an organic substrate, a semiconductor wafer, a temporary support structure (e.g., silicon, metal or glass wafer or panel) among other substrates. In another example, the semiconductor die 1002 may still be a part of a semiconductor wafer, regardless of the diagram representing the separate substrate 1004. The lower conductive structures 1006a and 1006b (e.g., a copper conductive structure such as a copper pillar, or another conductive structure) are provided on the upper surface of the lower semiconductor die 1002. [ The substrate 1004 is then supported by a support structure 1050 (e.g., a thermal block of the machine 1000, an anvil of the machine 1000, or other desired support structure). Alternatively, the semiconductor die 1002 may be part of a full or partial wafer that is directly supported by the support structure 1050 without an additional intervening substrate 1004. 10A, each of the upper conductive structures 1012a and 1012b is aligned with each of the lower conductive structures 1006a and 1006b facing each other. The semiconductor element 1008 is moved downwardly through the motion of the bonding tool 1024 (as indicated by arrow 1026 in FIG. 10A). Figure 10B shows the contact between each of the lower conductive structures 1006a, 1012a, 1006b, and 1012b that occurs after this movement. Ultrasonic energy 1014 is transmitted through the bonding tool 1024 to the upper semiconductor element 1008 and the upper conductive structure (not shown) using an ultrasonic transducer (not shown but denoted "USG " 1012a, and 1012b. For example, an ultrasonic transducer having a bonding tool 1024 may be retained in the bonding head assembly of the flip chip bonding machine 1000. During ultrasonic bonding, the lower conductive structures 1006a, 1006b may remain relatively stationary through the support of the lower semiconductor element 1060 by the support structure 1050 (e.g., May include one or more vacuum ports to secure substrate 1004 to support structure 1050 during bonding). Ultrasonic energy 1014 (with optional bonding force and / or heat) can cause partial deformation of the conductive structure. For example, in FIG. 10C, the conductive structures 1006a, 1006b; 1012a, 1012b are shown in a strained (or at least partially strained) state (as compared to FIGS. 10A-10B). In Fig. 10C, initial (temporary) ultrasonic junctions 1028a and 1028b are formed between each pair of conductive structures. For example, as shown in Fig. 10C, an initial (e.g., temporary) ultrasonic bonding portion 1028a is formed between the deformed conductive structures 1012a '/ 1006a' and a deformed conductive structure 1012b ' An initial (e.g., temporary) ultrasonic bonding portion 1028b is formed.

After formation of the initial (temporary) ultrasonic bond as shown in FIG. 10C, a non-conductive material 1040 (e.g., non-conductive material) is formed between the semiconductor element 1008 and the semiconductor element 1002, (This non-conductive material may include inorganic particles such as silica or alumina particles, etc.). [0033] The term " non-conductive material " The material 1040 can be applied in any desired manner (e.g., dispersed as a fluid, or dispersed using a capillary underfill technique, etc.) according to other details of the material and application selected. 10E, the coupling of the first conductive structure to the second conductive structure is completed (e.g., using heat, pressure, etc.) and the completed junction 1028a '(further modified conductive structures 1006a ", 1012a " (Including the more modified conductive structures 1006b ", 1012b "). In Figure 10e, the non-conductive material applied in Figure 10d is cured to form a cured non-conductive material 1040 ' ) Was formed.

Referring specifically to FIG. 11, at step 1100, a first semiconductor element (including, for example, a semiconductor die on a substrate, such as element 1060 shown in FIG. 10A) do. The first semiconductor element (e.g., the upper surface of the semiconductor structure) includes a plurality of first conductive structures. In step 1102, the second semiconductor element is held by the retaining portion of the bonding tool of the bonding machine (e.g., see element 1008 in FIG. 10A). The second semiconductor element includes a plurality of second conductive structures (e.g., on the lower surface of the second semiconductor element). In step 1104, the first conductive structure and the second conductive structure are aligned with each other (e.g., see FIG. 10A) and then contact each other (see FIG. 10B, for example). In step 1106, ultrasonic energy is applied to the second semiconductor element (via a bonding tool having the second semiconductor element, as in Fig. 10B), so that the conductivity of the first semiconductor element (E. G. Temporarily bonded) (see temporal bonds 1028a and 1028b). In step 1108, a non-conductive material is applied between the first semiconductor element and the second semiconductor element (e.g., see material 1040 applied in FIG. 10D). At step 1110, the flip chip and / or thermocompression bonding of the first and second conductive structures is completed (e.g., by applying heat and / or force), and at step 1112, the non-conductive material is cured Reference). As those skilled in the art will appreciate, steps 1110 and 1112 may be performed concurrently if desired.

12A, the upper semiconductor element 1208 is held by a retaining portion 1210 of the bonding tool 1224 (e.g., via a vacuum port formed in the retaining surface of the retaining portion 1210) By vacuum). The upper semiconductor element 1208 includes upper conductive structures 1212a and 1212b (e.g., a copper conductive structure such as a copper pillar or other conductive structure) at its lower surface. The lower semiconductor element 1260 includes a semiconductor die 1202 that is bonded to (or otherwise supported by) a substrate 1204. The substrate 1204 can be, for example, an organic substrate, a semiconductor wafer, a temporary support structure (e.g., silicon, metal or glass wafer or panel) among other substrates. As another example, the semiconductor die 1202 may still be a part of a semiconductor wafer, regardless of the diagram representing the separate substrate 1204. The lower conductive structures 1206a and 1206b (e.g., a copper conductive structure such as a copper pillar, or another conductive structure) are provided on the upper surface of the lower semiconductor die 1202. [ The substrate 1204 is then supported by a support structure 1250 (e.g., a heat block of the machine 1200, an anvil of the machine 1200, or other desired support structure). Alternatively, semiconductor die 1202 may be part of a full or partial wafer that is directly supported by support structure 1250 without additional intervening substrate 1204. 12A, each of the upper conductive structures 1212a and 1212b is aligned with each of the lower conductive structures 1206a and 1206b facing each other. 12A also illustrates a non-conductive material 1240 (e.g., a non-conductive paste, an epoxy material, an acrylate, a silicone, and the like) applied between the semiconductor element 1208 and the semiconductor element 1202, (This non-conductive material may include silica or alumina particles and the like and inorganic particles) (in this example, the material 1240 is actually a semiconductor material, such as, for example, . The material 1240 can be applied in any desired manner (e.g., dispersed as a fluid, or dispersed using a capillary underfill technique, etc.) according to other details of the material and application selected.

As shown in FIG. 12A, the semiconductor element 1208 is moved downwardly through the motion of the bonding tool 1224 (as indicated by arrow 1226 in FIG. 12A). As a result of this movement, the non-conductive material 1240 is dispersed between the semiconductor element 1208 and the semiconductor element 1260, including the surrounding material 1206a, 1212a; 1206b, 1212b. Figure 12B shows the contact between each conductive structure 1206a, 1212a (1206b, 1212b) that occurs after this movement. Ultrasonic energy 1214 is transmitted through the bonding tool 1224 to the upper semiconductor element 1208 and the upper conductive structure 1208 using an ultrasonic transducer (not shown, but denoted "USG " 1212a, and 1212b. For example, an ultrasonic transducer having a bonding tool 1224 may be retained in the bonding head assembly of the flip chip bonding machine 1200. During ultrasonic bonding, the lower conductive structures 1206a and 1206b may remain relatively stationary through the support of the lower semiconductor element 1260 by the support structure 1250 (e.g., the support surface of the support structure 1250) May include one or more vacuum ports to secure substrate 1204 to support structure 1250 during bonding). Ultrasonic energy 1214 (with optional bonding force and / or heat) can cause partial deformation of the conductive structure. For example, in FIG. 12C, the conductive structures 1206a ', 1206b'; 1212a ', 1212b' are shown in a strained (or at least partially strained) state (as compared to FIGS. 12a and 12b). In Fig. 12C, initial (temporary) ultrasonic junctions 1228a and 1228b are formed between each pair of conductive structures. For example, as shown in Fig. 12C, an initial (e.g., temporary) ultrasonic bonding portion 1228a is formed between the deformed conductive structures 1212a '/ 1206a' and a deformed conductive structure 1212b ' An initial (e.g., temporary) ultrasonic bonding portion 1228b is formed.

After formation of the initial (temporary) ultrasonic bond as shown in FIG. 12C, the bonding of the first conductive structure to the second conductive structure is completed (e.g., using heat, pressure, etc.) (Including further modified conductive structures 1206a ", 1212a "), and 1228b '(including further modified conductive structures 1206b ", 1212b" In Fig. 12D, the non-conductive material applied in Fig. 12A is cured to form a cured non-conductive material 1240 '.

Referring specifically to Figure 13, at step 1300, a first semiconductor component (e.g., including a semiconductor die on a substrate, such as element 1360 shown in Figure 12a) is supported on a support structure of a bonding machine do. The first semiconductor element (e.g., the upper surface of the semiconductor structure) includes a plurality of first conductive structures. In step 1302, the second semiconductor element is held by the retaining portion of the bonding tool of the bonding machine (e.g., see element 1308 in FIG. 12A). The second semiconductor element includes a plurality of second conductive structures (e.g., on the lower surface of the second semiconductor element). In step 1304, a non-conductive material is applied between the first semiconductor element and the second semiconductor element (e.g., see material 1240 applied in FIG. 12A). In step 1306, the first conductive structure and the second conductive structure are aligned with each other (see, e.g., Fig. 12A) and then contact each other (see, e.g., Fig. 12B). In step 1308, ultrasonic energy is applied to the second semiconductor element (via a bonding tool having the second semiconductor element, as in FIG. 12B), so that the conductive structure of the second semiconductor is formed as shown in FIG. 12C (E. G., Temporarily bonded) to the conductive structure of the first semiconductor element (see temporal joints 1228a and 1228b). In step 1310, the flip chip and / or thermal compression bonding of the first and second conductive structures is completed (e.g., via heat and / or force) and the non-conductive material is cured in step 1312 Reference). As known to those skilled in the art, steps 1310 and 1312 may be performed concurrently if desired.

14A, the upper semiconductor element 1408 is held by a holding portion 1410 of the bonding tool 1424 (e.g., via a vacuum port formed in the holding surface of the holding portion 1410) By the vacuum given). The upper semiconductor element 1408 includes upper conductive structures 1412a and 1412b (e.g., a copper conductive structure such as a copper pillar, or other conductive structure) at its lower surface. The lower semiconductor element 1460 includes a semiconductor die 1402 that is bonded to (or otherwise supported by) a substrate 1404. The substrate 1404 can be, for example, an organic substrate, a semiconductor wafer, a temporary support structure (e.g., silicon, metal or glass wafer or panel) among other substrates. As another example, the semiconductor die 1402 may still be a part of a semiconductor wafer, regardless of the diagram representing the separate substrate 1404. The lower conductive structures 1406a and 1406b (e.g., copper conductive structures such as copper pillars or other conductive structures) are provided on the upper surface of the lower semiconductor die 1402. [ The substrate 1404 is then supported by a support structure 1450 (e.g., a thermal block of the machine 1400, an anvil of the machine 1400, or other desired support structure). Alternatively, the semiconductor die 1402 may be part of a full or partial wafer that is directly supported by the support structure 1450 without an additional intervening substrate 1404. In the configuration shown in Fig. 14A (preparation for bonding), each of the upper conductive structures 1412a and 1412b is aligned with each of the lower conductive structures 1406a and 1406b facing each other. 14A also shows a non-conductive film 1440 (e.g., applied as a solid non-conductive film, etc.) applied between the semiconductor element 1408 and the semiconductor element 1402 (in this example, Actually applied to the semiconductor die 1402).

14A, the semiconductor element 1408 is moved downwardly through the motion of the bonding tool 1424 (as indicated by arrow 1426 in FIG. 14A). As a result of this movement, a non-conductive film 1440 (perhaps exaggerated in Figure 14b) is dispersed between the semiconductor element 1408 and the semiconductor element 1460, including the peripheral conductive structures 1406a, 1412a; 1406b and 1412b, do. Fig. 14B shows the contact between each conductive structure 1406a, 1412a (1406b, 1412b) that occurs after this movement. Ultrasonic energy 1214 is transmitted through the bonding tool 1424 to the upper semiconductor element 1408 and the upper conductive structure (not shown) using an ultrasonic transducer (not shown but denoted "USG " 1412a, 1412b. For example, an ultrasonic transducer having a bonding tool 1424 may be retained in the bonding head assembly of the flip chip bonding machine 1400. During ultrasonic bonding, the lower conductive structures 1406a, 1406b may remain relatively stationary through the support of the lower semiconductor element 1460 by the support structure 1450 (e.g., the support surface 1450 of the support structure 1450) May include one or more vacuum ports to secure substrate 1404 to support structure 1450 during bonding). Ultrasonic energy 1414 (with optional bonding force and / or heat) can cause partial deformation of the conductive structure. For example, in FIG. 14C, the conductive structures 1406a ', 1406b'; 1412a ', 1412b' are shown in a strained (or at least partially strained) state (as compared to FIGS. 14a and 14b). In Fig. 14C, initial (temporary) ultrasonic junctions 1428a and 1428b are formed between each pair of conductive structures. For example, as shown in Fig. 14C, an initial (e.g., temporary) ultrasonic bonding portion 1428a is formed between the deformed conductive structures 1412a '/ 1406a' and deformed conductive structures 1412b ' An initial (e.g., temporary) ultrasonic bonding portion 1428b is formed.

After the formation of the initial (temporary) ultrasonic bond as shown in FIG. 14C, the bonding of the first conductive structure to the second conductive structure is completed (e.g., using heat, pressure, etc.) (Including further strained conductive structures 1406a ", 1412a ") and 1428b '(including further strained conductive structures 1406b ", 1412b" In Fig. 14D, the non-conductive material applied in Fig. 14A is cured to form a cured non-conductive material 1440 '.

Referring specifically to FIG. 15, at step 1500, a first semiconductor element (including, for example, a semiconductor die on a substrate, such as element 1460 shown in FIG. 14A) do. The first semiconductor element (e.g., the upper surface of the semiconductor structure) includes a plurality of first conductive structures. In step 1502, the second semiconductor element is held by the retaining portion of the bonding tool of the bonding machine (e.g., see element 1408 in FIG. 14A). The second semiconductor element includes a plurality of second conductive structures (e.g., on the lower surface of the second semiconductor element). In step 1504, a non-conductive film is applied between the first semiconductor element and the second semiconductor element (e.g., see film 1440 applied in FIG. 14A). In step 1506, the first conductive structure and the second conductive structure are aligned with each other (e.g., see Fig. 14A) and then contact each other (see Fig. 14B, for example). In step 1508, ultrasonic energy is applied to the second semiconductor element (via a bonding tool having the second semiconductor element, as in Fig. 14b), so that the conductivity of the first semiconductor element (E. G. Temporarily bonded) (see temporal joints 1428a and 1428b). At step 1510, the flip chip and / or thermocompression bonding of the first and second conductive structures is completed (e.g., by applying heat and / or force) and the non-conductive film is cured at step 1512 ). As those skilled in the art will appreciate, steps 1510 and 1512 may be performed concurrently if desired.

Figures 10a-10e, 12a-12d and 14a-14d are shown to use the original bonding tool to complete the initial (temporary) ultrasonic bonding and subsequent complete bonding steps. However, it will be appreciated that each of these embodiments (and the corresponding flow diagrams shown in FIGS. 11, 13 and 15) may utilize other tools to complete the final splice, in which case the other tool may be the same splice machine or other splice Tool, and other tools may also bond the semiconductor elements individually or in groups (e.g., as in Figure 8e). The embodiments shown in Figures 8a-8e, 9, 10a-10e, 11, 12a-12d, 13, 14a-14d and 15 have particular applicability for ad hoc and collective processes, (E. G., Figs. 8c, 10c, 12c, 14c) and then joined together using heat and / or pressure to further deform the conductive structure into a final fully bonded state (Using a collective bonding tool such as the tool 875 shown in Figure 8e). These temporary and collective processes have good applicability in chip to wafer ("C2W") environments, in which separate semiconductor die (chips) are individually ultrasonically implanted in the wafer using ultrasonic bonding tools , And then a group of bonded dies are collectively bonded (e.g., by applying heat and / or pressure) using a bulk bonding tool.

(I) the initial ultrasonic temporary bonding process (where the individual semiconductor elements (e.g., die) are temporarily bonded using an ultrasonic bonding tool) and then (ii) the bulk bonding process (Using a collective bonding tool in conjunction with pressure) is subjected to a final bonding process) is used to bond the upper copper conductive structure (in the upper semiconductor element) to the lower copper conductive structure (in the lower semiconductor element) It has special applicability. The process of forming the final junction tends to include annealing to grow the particles across the interface of the upper and lower conductive structures. This process tends to take a relatively significant amount of time. In order to provide useful process throughput (e.g., UPHs (units per hour)), the collective junction has a special application. Thus, a relatively "temporary" ultrasonic bonding process can be completed by bonding one semiconductor element at a time, and a relatively slow " collective "bonding process (using heat and / or pressure) Can be completed.

While the present invention has been particularly shown and described with reference to specific embodiments thereof, the invention is not limited to the details shown. Rather, various modifications may be made in the details within the equivalents of the claims and without departing from the invention.

Claims (30)

1. A semiconductor element ultrasonic bonding method for ultrasonic bonding a semiconductor element,
(a) aligning a surface of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element;
(b) ultrasonically forming a tack junction between the first conductive structure and each second conductive structure; And
(c) forming a completed junction between the first conductive structure and the second conductive structure. The method according to claim 1,
Wherein the first semiconductor element is a semiconductor die. The method according to claim 1,
Wherein each of the first semiconductor element and the second semiconductor element is a respective semiconductor die. The method according to claim 1,
Wherein the first semiconductor element comprises a semiconductor die. The method according to claim 1,
Wherein each of the first semiconductor element and the second semiconductor element comprises a respective semiconductor die. The method according to claim 1,
Further comprising moving the first semiconductor element toward the second semiconductor element such that the lower surface of the first conductive structure contacts the upper surface of each second conductive structure. The method according to claim 1,
Further comprising applying a pressure between the first semiconductor element and the second semiconductor element during at least a portion of step (b). The method according to claim 1,
Further comprising deforming the first conductive structure during step (b). The method according to claim 1,
Wherein step (b) is performed at ambient temperature. The method according to claim 1,
Further comprising heating at least one of the first semiconductor element and the second semiconductor element during at least a portion of step (b). The method according to claim 1,
Further comprising heating the first semiconductor element during at least a portion of step (b) using a bonding tool to hold the first semiconductor element. The method according to claim 1,
Further comprising heating the second semiconductor element during at least a portion of step (b) using a support structure that supports the second semiconductor element during step (b). The method according to claim 1,
Wherein at least one of the plurality of first conductive structures and the plurality of second conductive structures is formed of copper. The method according to claim 1,
Wherein each of the plurality of first conductive structures and the plurality of second conductive structures is a copper conductive structure. The method according to claim 1,
Wherein step (b) comprises ultrasonically bonding said first conductive structure to each second conductive structure using a bonding tool holding said first semiconductor element during step (b). 16. The method of claim 15,
Wherein the bonding tool is coupled with an ultrasonic transducer for providing ultrasound energy during step (b). 16. The method of claim 15,
Wherein the bonding tool holds the first semiconductor element using a vacuum during step (b). The method according to claim 1,
Wherein step (b) comprises ultrasonically forming the temporary bond using a bonding tool configured to bond the second semiconductor element to the first semiconductor element. 19. The method of claim 18,
Wherein step (c) comprises heating said second semiconductor element with said bonding tool to form a finished joint. The method according to claim 1,
Wherein step (c) comprises heating at least one of the element and the second semiconductor element in the first half-circle to form a finished junction. The method according to claim 1,
The step (c) includes the step of forming a plurality of first junctions in a gang junction process in which a plurality of completed junctions are formed between the first conductive structure of the plurality of first semiconductor elements and the corresponding second conductive structure of the plurality of second semiconductor elements Semiconductor element ultrasonic bonding method. 23. The method of claim 21,
Wherein the collective bonding process is completed using a heated collective bonding tool. The method according to claim 1,
Further comprising the step of applying a non-conductive material between the first semiconductor element and the second semiconductor element. As a bonding system,
A support structure for supporting a first semiconductor element comprising a plurality of first conductive structures;
And a second semiconductor element including a plurality of second conductive structures and configured to apply ultrasonic energy to the second semiconductor element to form a temporary bonding portion between the plurality of second conductive structures and a plurality of corresponding first conductive structures A bonding system comprising a bonding tool. 27. The method of claim 24,
Wherein the bonding tool is configured to form a completed bond between the plurality of second conductive structures and a plurality of corresponding first conductive structures after forming the temporary bond. 26. The method of claim 25,
Wherein the bonding tool is a heated bonding tool and the bonding tool applies heat to the second semiconductor element to form a finished bonding. 27. The method of claim 24,
Wherein the second bonding tool forms a completed bond between the plurality of second conductive structures and the plurality of corresponding first conductive structures after formation of the temporary bond by the bonding tool Wherein the bonding system comprises: 28. The method of claim 27,
Wherein the second bonding tool is a bonding tool that is heated and the second bonding tool applies heat to the second semiconductor element to form a finished bond. 27. The method of claim 24,
Wherein the collective bonding tool is configured to form a finished bond between the plurality of first semiconductor elements and each of the plurality of respective second semiconductor elements after formation of the temporary bond by the bonding tool The joining system. 29. The method of claim 29,
Wherein the collective bonding tool is a heated bonding tool and the collective bonding tool applies heat to the second semiconductor element to form a finished bond.

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