KR20180086073A - Composition for plating of substrate and plating method using the same - Google Patents

Abstract

The present invention relates to a composition for plating substrates, composed of alkylammonium halide; and at least one selected among formaldehyde and an ethylene oxide-propylene oxide (EO-PO) copolymer. The present invention further relates to a plating method using the same. According to the present invention, it is possible to maximize effects of suppressing electrodeposition on a surface of the substrate.

Description

TECHNICAL FIELD The present invention relates to a composition for plating a substrate and a plating method using the same.

The present invention relates to a composition for substrate plating and a method for plating a substrate using the same.

BACKGROUND ART As electronic devices including printed circuit boards (PCBs) have become lighter, smaller, and higher in density, a build-up method has been used as a manufacturing method of multilayer printed circuit boards. One of the important parts of the build-up method is to fill the vias with metal to energize the lower layers. A representative metal used for filling the via is copper, which is typically filled by electroplating.

When the vias are filled with the electroplating method, the surface is plated as well, thereby increasing the surface thickness. The lower the filling efficiency of the via, the greater the surface thickness increase. In the case of a plating solution for fill plating, an organic material for controlling the filling efficiency of a via typically enters the plating solution as an additive. The added organic materials are conveniently referred to as a suppressor, a leveler, an accelerator, a brightener, an inhibitor, a leveling agent, an accelerator, or a brightener depending on their main function.

As substrates become increasingly thinner, a lower surface coating thickness is required. If low surface plating thickness is required, plating the required thickness may result in defects in the production of the printed circuit board due to incomplete filling of the vias, so plating until the filling is completed and then lowering the excess surface plating thickness again Giving method is used. If the target thickness is exceeded, a process of lowering the thickness, such as usually etching or grinding, is added. As a result, the manufacturing efficiency is deteriorated and the uniformity of the thickness is deteriorated.

As a background of the present invention, Korean Patent Registration No. 10-1072338 discloses a composition for metal electroplating comprising a leveling agent.

The present invention relates to alkylammonium halides; And at least one selected from the group consisting of formaldehyde and ethylene oxide-propylene oxide copolymer (EO-PO copolymer), thereby maximizing the electrodeposition inhibiting effect on the substrate surface, The present invention relates to a composition for plating a substrate, which enables efficient and uniform filling of vias without plating, and a plating method using the same.

According to an aspect of the present invention, there is provided a process for the preparation of an alkylammonium halide; And at least one selected from formaldehyde and ethylene oxide-propylene oxide copolymer (EO-PO copolymer).

According to an embodiment of the present invention, the composition for substrate plating may be an acidic coin solution composition.

According to one embodiment of the present invention, the composition for substrate plating may include an acid, a copper salt, and a chloride ion.

According to one embodiment of the present invention, the alkylammonium halide may be a compound of the formula 1:

According to an embodiment of the present invention, the alkylammonium halide may be composed of 10 to 30 carbons.

According to one embodiment of the invention, the alkyl ammonium halides are _{N (CH 3) 3 (C} 4 H 9) + X -, N (CH 3) 3 (C 8 H 17) + X -, N (CH 3 _{) 3 (C 12 H 25)} + X -, N (CH 3) 3 (C 16 H 33) + X -, N (CH 3) 3 (C 20 H 41) + X -, N (C 2 H 5 _{) 3 (C 4 H 9)} + X -, N (C 2 H 5) 3 (C 8 H 17) + X -, N (C 2 H 5) 3 (C 12 H 25) + X -, N ( _{C 2 H 5) 3 (C} 16 H 33) + X -, N (CH 3) 4 + X -, N (C 2 H 5) 4 + X -, N (C 3 H 7) 4 + X -, N (C ₄ H ₉ ) ₄ ⁺ X ^- and N (C ₇ H ₁₅ ) ₄ ⁺ X ^- , and X is Cl, Br, or I.

According to one embodiment of the present invention, the alkylammonium halide is selected from the group consisting of cetyltrimethylammonium bromide (CTAB), cetyltrimethylammonium chloride (CTAC), dodecyltrimethylammonium chloride (DTAC), and dodecyltrimethylammonium chloride And dodecyltrimethylammonium bromide (DTAB).

According to an embodiment of the present invention, it may include an alkylammonium halide in an amount of more than 0.0003 parts by weight and less than 0.01 parts by weight based on the total weight of the composition for substrate plating.

According to an embodiment of the present invention, at least one selected from the formaldehyde and the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) may be contained in an amount of 0.0001 to 0.5 part by weight based on the total weight of the composition for substrate plating .

According to one embodiment of the present invention, the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) may have a molecular weight of 1,000 to 100,000.

According to one embodiment of the present invention, the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) may be a copolymer having a part or more of the ethylene oxide moiety in the copolymer.

According to an embodiment of the present invention, the composition for plating may further include a surface modifier.

According to an embodiment of the present invention, the surface modifier may have a molecular weight of 50 to 1500.

According to one embodiment of the present invention, 0.0001 to 1 part by weight of the surface modifier may be included relative to the total weight of the composition for substrate plating.

According to another aspect of the present invention, there is provided a semiconductor device comprising a first insulating layer, a first copper foil layer formed on an upper surface of the first insulating layer, a second insulating layer formed on an upper surface of the first copper foil layer, A substrate comprising a via formed through a layer, the via being filled upon plating, but not substantially plated on the surface of the substrate around the via.

According to one embodiment of the present invention, when the vias are substantially filled, the substrate surface may be plated at all or plated to a thickness of less than or equal to 1 μm.

According to an embodiment of the present invention, the vias are filled with the composition for plating a substrate according to the present invention.

According to one embodiment of the present invention, the thickness (a) of the plating layer on the substrate surface and the thickness (b) of the plated layer from the bottom to the top surface of the via may be a / b <

According to an embodiment of the present invention, a surface plating layer of the substrate may be further included.

According to an embodiment of the present invention, a seed layer may be formed on the upper surface of the second insulating layer.

According to one embodiment of the present invention, the substrate includes an insulating layer interposed between a first copper foil layer, a second copper foil layer, a first copper foil layer and a second copper foil layer, and an insulating layer interposed between the second copper foil layer and the insulating layer And vias formed up to the top surface of the first copper layer.

According to another aspect of the present invention, there is provided a composition for substrate plating comprising an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) and being an acidic coin solution composition.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a via in a substrate; And contacting the substrate on which the via is formed with the above-described substrate plating composition of the present invention, applying current to fill the via, and plating the surface plating growth to inhibit the substrate plating.

According to an embodiment of the present invention, a step of forming a seed layer on the surface of the substrate and the surface of the via may be further included before filling and plating the via.

According to an embodiment of the present invention, the step of filling and filling the via may further include plating the substrate surface with a second plating composition.

According to an embodiment of the present invention, the substrate may be a copper clad laminate (CCL).

According to an embodiment of the present invention, the surface plating thickness can be suppressed to 1 μm or less due to the surface plating growth inhibiting effect.

According to one embodiment of the present invention, there is provided a composition for substrate plating maximizing the effect of suppressing surface plating, so that the thickness of the surface of the substrate does not increase during filling of vias, thereby minimizing defects due to plating thickness variations . Therefore, a planarization process such as etching or grinding of the substrate surface plating is not required, and the substrate can be efficiently manufactured.

According to an embodiment of the present invention, the thickness of the plating on the surface of the substrate can be freely adjusted by separately forming the surface plating of the substrate after filling the via. Since the via fill characteristics are not considered when selecting the composition for plating the surface of the substrate, it is possible to select the composition most suitable for the improvement of the thickness deviation, and the plating thickness deviation on the surface of the substrate can be remarkably improved without any special effort. Therefore, it is possible to improve the impedance matching failure, the unetched etching and overetching of the tenting product, the defective stacking, and the defective wafers due to the plating thickness deviation on the surface of the substrate.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of a substrate which is plated with a substrate surface after performing a zero thickness fill (ZTF) plating without surface plating using a plating composition according to an embodiment of the present invention; Sectional view.
2 is a cross-sectional view for explaining the relationship between the depth of vias and the surface plating thickness of the substrate in the via fill plating according to an embodiment of the present invention.
3 is a cross-sectional view schematically showing a substrate plating method including a seed layer according to an embodiment of the present invention.
4 is a cross-sectional view schematically showing a method of plating a substrate in a state where a dry film pattern is formed on a substrate according to an embodiment of the present invention.
FIG. 5 is a cross-sectional view schematically showing a method of plating via holes in a copper clad laminate (CCL) according to an embodiment of the present invention.
FIG. 6 is a cross-sectional view of a vias that have been plated with a via fill and a substrate using vias 90 μm in diameter and 80 μm in depth, according to an embodiment of the present invention, to be.
FIG. 7 is a cross-sectional photograph of a via showing a fill plating process of a via having a diameter of 90 .mu.m and a depth of 80 .mu.m according to an embodiment of the present invention.
FIG. 8 is a cross-sectional photograph showing that vias having a diameter of 90 .mu.m and a depth of 80 .mu.m are filled in accordance with the embodiments of the present invention and the thickness is controlled by further plating the surface of the substrate.
Figure 9 is a plan view of a via-plated substrate in accordance with embodiments of the present invention. It can be seen that 25 locations in the substrate were photographed and filled uniformly over the entire area without defects.
Figure 10 is a plan view of a substrate that is filled with 50 ppm of formaldehyde in accordance with embodiments of the present invention and is plated with a composition for substrate plating comprising various concentrations of alkylammonium halides. If less than 3 ppm or 100 ppm or more, defects may occur depending on plating conditions. It can be seen that the concentration range that can be used stably is considerably wide.
11 is a plane photograph of a substrate plated with a composition for substrate plating containing only an alkylammonium halide in an acidic copper electrolytic solution according to comparative examples of the present invention. As shown in the photograph, it is difficult to obtain a uniform surface.
12 to 15 are cross-sectional photographs of vias that are plated with a composition for substrate plating to which a surface modifier is added according to one embodiment of the present invention.
FIG. 16 is a cross-sectional photograph of a via-plated vias after a hole is formed in a CCL substrate according to an embodiment of the present invention and a seed layer is formed by chemical vapor deposition.
17 is a cross-sectional photograph of a via showing etched lines of via-plated vias in accordance with embodiments of the present invention. The etch line is a line that separates the via fill plating from the surface plating. The position of the etching line can be formed at an arbitrary position in the via by adjusting the amount of via fill plating.
FIG. 18 shows a state after plating with a composition for substrate plating in which an alkylammonium halide is not contained in an acidic copper electrolytic solution but only formaldehyde, and the state after the plating (left) is coated with a composition for substrate plating including alkylammonium halide and formaldehyde (Right). Fig.
19 is a cross-sectional photograph showing a via fill plating using a plating solution VR of JCU, which is a prior art.
20 is a cross-sectional photograph showing a via-fill plating with an acidic coin solution containing no organic additive.
21 is a plan view showing a via-plated coating with a composition for substrate plating comprising an alkylammonium halide (CTAB) and an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) according to an embodiment of the present invention.
22 is a photograph showing a via-plated coating with a composition for substrate plating comprising an alkylammonium halide (DTAB) and an EO-PO copolymer according to an embodiment of the present invention.
Figure 23 is a graph showing the results of a comparison of the results of the experiments of the present invention using a composition for substrate plating in which an alkylammonium halide is not contained in an acidic coin solution but an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) Is a plan view of a plated substrate.
24 is a graph showing a result of simulating plating growth with an increase in plating time using a composition for substrate plating with a weak surface suppression effect according to the prior art.
FIG. 25 is a graph showing a result of simulation of plating growth with an increase in plating time using a substrate plating composition having a strong effect of suppressing surface plating according to an embodiment of the present invention. FIG.
FIG. 26 is a graph showing a result of simulation of plating growth with an increase in plating time using a composition for substrate plating having a surface plating inhibiting effect which is excessively increased in an amount of the surface plating inhibitor in the embodiment of FIG. 25;

It is to be understood that the words or words used in the present specification and claims should not be construed in a conventional and dictionary sense and that the inventor can properly define the concept of a term in order to best explain its invention And should be construed in accordance with the meaning and concept consistent with the technical idea of the present invention.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise.

In this application, the terms "comprises", "having", and the like are intended to specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

In the present application, when a component is referred to as "comprising ", it means that it can include other components as well, without excluding other components unless specifically stated otherwise. Also, throughout the specification, the term "on" means to be located above or below the object portion, and does not necessarily mean that the object is located on the upper side with respect to the gravitational direction.

BRIEF DESCRIPTION OF THE DRAWINGS The present invention is capable of various modifications and various embodiments, and particular embodiments are illustrated in the drawings and will be described in detail in the detailed description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail.

Hereinafter, the present invention will be described in more detail.

Composition for substrate plating

According to an aspect of the present invention, there is provided a process for the preparation of an alkylammonium halide; There is provided a composition for substrate plating comprising at least one selected from the group consisting of formaldehyde and ethylene oxide-propylene oxide copolymer (EO-PO copolymer).

The alkylammonium halide may be a compound represented by the following general formula (1).

[Chemical Formula 1]

The alkylammonium halide preferably has 10 to 30 carbon atoms constituting the alkyl chain, but is not limited thereto. When the number of carbon atoms constituting the alkyl chain of the alkylammonium halide is less than 10 or more than 30, restrictions on plating conditions are increased. In general, when the number of carbon atoms is less than 10, the effect of suppressing surface plating is insufficient and the characteristic of filling only vias becomes weak. When the number of carbon atoms exceeds 30, uneven type of abnormal plating occurs on the surface of the substrate, And the process control becomes difficult.

The alkyl ammonium halides are _{N (CH 3) 3 (C} 4 H 9) + X -, N (CH 3) 3 (C 8 H 17) + X -, N (CH 3) 3 (C 12 H 25) + _{^{X -, N (CH 3)}} 3 (C 16 H 33) + X -, N (CH 3) 3 (C 20 H 41) + X -, N (C 2 H 5) 3 (C 4 H 9) + _{^{X -, N (C 2 H}} 5) 3 (C 8 H 17) + X -, N (C 2 H 5) 3 (C 12 H 25) + X -, N (C 2 H 5) 3 (C 16 ^{_{H 33) + X -, N}} (CH 3) 4 + X -, N (C 2 H 5) 4 + X -, N (C 3 H 7) 4 + X -, N (C 4 H 9) 4 + X ^- and N (C ₇ H ₁₅ ) ₄ ⁺ X ^- , and X is Cl, Br, or I. However, the present invention is not limited thereto.

The alkylammonium halide may be selected from the group consisting of cetyltrimethylammonium bromide (CTAB), cetyltrimethylammonium chloride (CTAC), dodecyltrimethylammonium chloride (DTAC), and dodecyltrimethylammonium bromide ), And CTAB may be most suitable. However, the present invention is not limited thereto.

The alkyl ammonium halide may be used in an amount of more than 0.0003 parts by weight, less than 0.01 parts by weight, more than 0.0003 parts by weight and less than 0.007 parts by weight, more than 0.0003 parts by weight and less than 0.005 parts by weight, 0.001 parts by weight or more and 0.007 parts by weight or less, 0.001 parts by weight or more and less than 0.01 parts by weight, 0.001 parts by weight or more and 0.007 parts by weight or less, 0.001 parts by weight or more and 0.005 parts by weight or less But are not limited thereto. If the amount of the alkylammonium halide is 0.0003 parts by weight or less or 0.01 parts by weight or more based on the total weight of the composition for substrate plating, the surface of the substrate may be plated. In the present specification, parts by weight means% by weight.

The at least one selected from the formaldehyde and the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is preferably included in the amount of 0.0001 to 0.5 part by weight based on the total weight of the substrate plating composition, but is not limited thereto. If the formaldehyde and the like are less than 0.0001 parts by weight or more than 0.5 parts by weight based on the total weight of the composition for substrate plating, the surface of the substrate may be plated.

The ethylene oxide-propylene oxide copolymer (EO-PO copolymer) may have a molecular weight of 1,000 to 100,000, but is not limited thereto. If the molecular weight of the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is less than 1,000 or more than 100,000, the surface of the substrate may be plated.

The ethylene oxide-propylene oxide copolymer (EO-PO copolymer) preferably has a proportion of ethylene oxide in the copolymer of 1/3 or more, but is not limited thereto. When an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) having an ethylene oxide moiety fraction of less than 1/3 is used, the surface defect phenomenon is increased.

The composition for substrate plating of the present invention may be a composition of an acidic coin solution.

The composition of the acidic coin solution may comprise an acid, a copper salt, and a chloride ion.

The acid is necessary for electroplating conductivity as an electrolyte. The acid may be at least one member selected from sulfuric acid (H ₂ SO ₄ ), hydrochloric acid (HCl), acetic acid (CH ₃ COOH) and borofluoric acid (HBF ₄ ) and sulfuric acid is suitable. The higher the sulfuric acid concentration, the lower the liquid conductivity and the better the electric conductivity. However, when the copper sulfate content is increased, the precipitation easily occurs, and when the sulfuric acid concentration is lower, the uniform electrodepositivity is lowered. The acid may be used in an amount of 0.05 part by weight to 8 parts by weight based on the total weight of the composition for substrate plating according to the present invention, but is not limited thereto. The acid which is the main component of the plating solution composition should be supplemented regularly by analysis.

The copper salt is the group consisting of copper sulfate _{(CuSO 4 · 5H 2 O)} , copper nitrate _{(Cu (NO 3) 2)} , formic acid, copper (Cu (HCOO) ₂₎ and cupric chloride (CuCl ₂ · 2H ₂ O) But the present invention is not limited thereto.

The higher the concentration of the copper salt is, the more favorable to fill plating but the uniform electrodepositivity may be lowered. The amount of copper in the copper salt is preferably 0.05 to 5 parts by weight based on the total weight of the plating composition, but is not limited thereto. If the amount of copper in the copper salt is less than 0.05 part by weight based on the total weight of the plating composition, tumbling tends to occur at a high current density portion, and if it exceeds 5 parts by weight, precipitation tends to occur.

The chloride ion may be selected from sodium chloride and hydrochloric acid. When the concentration of chlorine ions is high, a passive film is formed on the anode, which lowers the dissolution and conductivity of the anode and may cause precipitation unevenness. The chlorine ion may be used in an amount of 0.0002 parts by weight to 0.02 parts by weight based on the total weight of the composition for substrate plating according to the present invention, but is not limited thereto.

The composition for substrate plating of the present invention may further comprise a surface modifier.

The surface modifier is for planarization and homogenization of the exposed surface of the via in the via when only via filling is required.

The surface modifier preferably has a molecular weight of 50 or more and 1500 or less, but is not limited thereto. If the molecular weight of the surface modifier is less than 50 or more than 1,500, the surface modifying synergistic effect may be lowered. Preferably, the molecular weight of the surface modifier is 100 to 500, but is not limited thereto.

The concentration of the surface modifier may be appropriately adjusted by a person skilled in the art according to the size and current conditions of vias. The concentration of the surface modifier may be 0.0001 part by weight to 1 part by weight based on the total weight of the composition for substrate plating of the present invention, but is not limited thereto.

The surface modifier may be at least one selected from the group consisting of triarylmethane dyes, azoles, azole derivatives, pyrimidines and derivatives, and brighteners, but is not limited thereto. The surface modifier may be selected and combined with an optimum material according to the size and current condition of vias, and the like by a person skilled in the art to which the present invention pertains.

The triarylmethane dyes include methyl violet 2B, methyl violet 6B, methyl violet 10B, para rosaniline, fuccine (hydrochloride salt), new fuchsine (As chloride), fuccinic acid, phenolphthalein, phenol red (Phenol red), Chlorophenol red, Cresol red, Bromocresol purple, Bromocresol green, Malachite green, Brilliant green (dyestuff) Brilliant Blue FCF, Victoria Blue B, Victoria Blue FBR, Victoria blue BO, Victoria Blue FGA (Victoria Blue FGA), Brilliant Blue FCF, ), Victoria blue 4R, and Victoria blue R. The term &quot; black &quot;

Wherein the azole is selected from the group consisting of imidazole, pyrazole, 1,2,3-triazole, 1,2,4-triazole, tetrazole, pentazole, oxazole, isoxazole, Oxadiazole (1,2,4-oxadiazole), furanz (1,2,5-oxadiazole), 1,3,4-oxadiazole, thiazole; (1,2,3-thiadiazole), 1,2,4-thiadiazole, 1,2,5-thiadiazole, and 1,3,4-thiadiazole But is not limited thereto.

Wherein the azole derivative is selected from the group consisting of imidazole, 1-methylimidazole, 1-ethylimidazole, 1-isopropylimidazole, 1-butylimidazole, benzimidazole, , 4-triazole, benzotriazole, pyrazole, benzoxazole, benzothiazole, but is not limited thereto.

The pyrimidine derivative may be selected from cytosine, thiamine, uracil, but is not limited thereto.

The brightener may be selected from 3-mercapto-1-propanesulfonic acid, bis- (sodium sulfopropyl) -disulfide, bipyridine, and the like, but is not limited thereto.

Board

1 is a plan view schematically showing a plating of the surface of a substrate after performing a zero thickness fill (ZTF) plating using a composition for plating according to an embodiment of the present invention, (The seed layer is not shown).

Referring to FIG. 1, according to another aspect of the present invention, there is provided a semiconductor device comprising a first insulating layer 10, a first copper foil layer 20 formed on an upper surface of the first insulating layer 10, And a via formed through the first copper layer (20) in the second insulating layer (12), the via being filled during plating, The substrate is provided with a substrate that is not substantially plated.

In the present invention, the fact that the plating composition is not substantially plated on the surface of the substrate means that the via is substantially filled, but the surface of the substrate is hardly plated, so that etching or grinding is unnecessary for planarization and thickness adjustment of the substrate surface it means. This is referred to as Zero Thickness Fill (ZTF) in the present invention. For example, a state in which the plating film is hardly formed on the surface of the substrate or plated to a thickness of 1 탆 or less when the via is substantially filled, but the present invention is not limited thereto.

The vias are filled with the composition for plating a substrate according to the present invention.

In the present invention, the substrate may be a printed circuit board and a semiconductor substrate, and a printed circuit board is suitable. However, the present invention is not limited thereto.

In the present invention, the vias include both blind vias, trenches, and through-holes formed in the substrate.

Referring to FIG. 1 (a), a substrate 100 in which a first insulating layer 10, a first copper foil layer 20, and a second insulating layer 12 are continuously laminated is shown. A via is formed in the second insulating layer 12 of the printed circuit board using a laser or the like.

Referring to FIG. 1 (b), a second copper layer 22 is formed by filling a composition for plating a substrate according to an embodiment of the present invention.

As described above, the composition for substrate plating according to the present invention maximizes the surface plating inhibition effect, and ZTF plating capable of efficiently and uniformly filling only vias without being plated on the substrate surface is possible.

Thus, the thickness of the surface does not increase during filling of the vias, thereby minimizing defects due to plating thickness. In addition, the second copper foil layer 22 can be efficiently formed without requiring a planarization step such as etching or grinding of the plated surface.

According to the present invention, according to the present invention, when the surface of a substrate is plated together with a conventional substrate plating composition, voids in which an inlet is clogged are easily formed. However, according to the present invention, My voids do not form well.

Furthermore, since the effect of suppressing the surface plating is maximized, the vias can be efficiently and uniformly filled without being plated on the surface of the substrate.

Fig. 1 (c) shows that the second copper layer 22 is formed of the composition for substrate plating of the present invention, and then the surface plating layer 24 is formed of the second plating composition. The second plating composition may be a plating solution composition capable of improving uniformity. As the composition for plating which can improve the uniformity as described above, a conventionally known composition can be used, thereby minimizing the thickness variation of the plating. A known plating composition capable of improving the uniformity may be, for example, ST-2000 from Enthone.

Therefore, the plating thickness of the surface of the substrate can be freely adjusted without any additional etching or grinding process, and the plating thickness deviation of the surface of the substrate can be remarkably improved. Therefore, it is possible to improve the impedance matching failure, the unetched etching and overetching of the tenting product, the defective stacking, and the defective wafers due to the plating thickness deviation on the surface of the substrate.

2 is a cross-sectional view of a substrate 100 for explaining the relationship between the depth of vias and the thickness of the surface plating of the substrate in the via fill plating according to an embodiment of the present invention.

Referring to FIG. 2, when the substrate is plated with the composition for substrate plating of the present invention, there is a relation that the thickness a of the plating layer on the substrate surface and the thickness b of the plated layer from the bottom to the top surface of the via are a / b < . At this time, the thicknesses a and b are thicknesses excluding the seed layer.

The above relationship shows that the composition for substrate plating according to the present invention maximizes the effect of suppressing the surface plating of the substrate, so that it is possible to perform ZTF plating capable of efficiently and uniformly filling only the vias without being plated on the substrate surface.

Thus, the substrate formed by the present invention may have lateral or vertical etch lines between the via plating and the substrate surface layer when vias are etched and etched (see FIGS. 16 and 17).

3 is a cross-sectional view schematically showing a substrate plating method including a seed layer according to an embodiment of the present invention.

Referring to FIG. 3A, the substrate 100 may further include a seed layer 26 formed on the upper surface of the second insulating layer 12. The seed layer 26 allows the current drawn from the outside of the substrate to flow smoothly into the entire surface of the substrate and into the via when plating the second copper layer 22 in the via and the surface plated layer 24 of the substrate. The seed layer 26 may be formed of at least one selected from conductive metals such as gold, silver, copper, and nickel, but is not limited thereto. In addition, the seed layer may be formed by electroless plating or sputtering, but is not limited thereto. The steps of FIGS. 3 (b) and 3 (c) are the same as those of FIGS. 1 (b) and 1 (c).

4 is a cross-sectional view schematically showing a method of plating a substrate in a state where a dry film pattern is formed on a substrate according to an embodiment of the present invention.

Referring to FIG. 4A, after vias are filled with the composition for plating a substrate of the present invention in a state where vias and dry film 28 patterns are formed, So that the surface of the substrate can be plated smoothly. The steps of FIGS. 4 (b) and 4 (c) are the same as those of FIGS. 1 (b) and 1 (c). Referring to FIG. 4 (d), when the dry film 28 is removed after the surface plating of the substrate is completed, a substrate having a metal surface plating layer 24 pattern formed on the substrate can be provided.

FIG. 5 is a cross-sectional view schematically illustrating a method of forming vias in a copper clad laminate (CCL) 300 according to an embodiment of the present invention, followed by plating vias (the seed layer is not shown).

Referring to FIG. 5A, the CCL 300 includes a first copper layer 310, a second copper layer 310 ', a first copper layer 310 and a second copper layer 310' And an insulating layer 312 interposed between the second copper foil layer 310 'and the insulating layer 312 so as to extend to the upper surface of the first copper foil layer 310.

Referring to FIG. 5 (b), the third copper layer 322 may be formed by filling the via with the composition for plating according to the present invention.

At this time, the composition for plating according to the present invention maximizes the effect of inhibiting the surface plating, so that only vias can be efficiently and uniformly filled without being plated on the substrate surface, so that the second copper foil layer 310 ' Layer. As a result, the uniformity of the surface of the substrate can be remarkably improved as compared with the conventional substrate having a structure in which vias and surface plating are simultaneously formed.

Referring to FIG. 5 (b), a vertical etch line appears between the via plating and the substrate surface plating when the end face of the substrate manufactured according to this embodiment is etched.

Via  Phil plating method

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: forming a via in a substrate; And contacting the substrate with the via formed thereon to a plating composition according to the present invention, applying a current to fill the via, and plating the surface plating growth to be suppressed.

More specifically, the substrate plating method according to the present invention can be performed by immersing a substrate in a composition for plating according to the present invention, under a working environment of a current density of 0.01 to 5.0 A / dm ² and at a temperature of 20 to 60 ° C . At this time, when the environment in the workplace is less than 20 ° C, there is a problem in the solubility between the compositions. When the environment is more than 60 ° C, it is included in the range of the flash point of the reducing agent.

The method may further include forming a seed layer on the substrate surface and the via top surface before filling and plating the via.

And filling the via with plating and then plating the surface of the substrate with a second plating composition.

The second plating composition may be a plating solution composition capable of improving uniformity. As the composition for plating capable of improving the uniformity as described above, a known composition can be used, thereby minimizing variations in the thickness of the plating. A known plating composition capable of improving the uniformity may be, for example, ST-2000 of Enthone. The plating composition capable of alleviating the rough surface may be, for example, VR of JCU Corporation. In the case of simply raising the surface, a plating solution composed of an inorganic composition containing no organic additive may be used.

The surface plating growth can suppress the surface plating thickness to 1 탆 or less.

The present invention will be described in more detail in the following Examples. However, the following examples are illustrative of the present invention, and the present invention is not limited by the following examples.

[ Example ]

A via hole having a diameter of 90 mu m and a depth of 80 mu m was processed on the printed circuit board. Then, copper electroplating was performed to impart electrical conductivity to the surface of the substrate and the via. Next, the via hole was plated in a bath containing the copper electroplating composition having the compositions of Examples 1 to 16 below at a current density of 0.5 A / dm &lt; ² &gt; at a room temperature and a temperature of 22 DEG C, Plane.

The compositions of the compositions for substrate plating according to Examples 1 to 16 and Comparative Examples 1 to 6 are shown in Table 1 below.

FIG. 6 is a cross-sectional photograph of a via-filled and surface-plated vias using vias 90 μm in diameter and 80 μm in depth, according to one embodiment of the present invention, compared with the cross-section of vias plated according to prior art.

According to the prior art, vias with a diameter of 90 [mu] m and a depth of 80 [mu] m can not be completely filled when the surface plating thickness is 20 [mu] m. In order to completely fill the vias, additional plating is required, so that the surface plating thickness becomes higher.

In the case of the present invention, since only the vias are filled with the fill plating composition of the present invention, secondary plating is performed and the surface is plated to a desired thickness, so that a low surface plating thickness without dimples can be realized. Since the etching line separating the primary plating and the secondary plating appears in the cross-section image, the plating method of the present invention and the conventional technique can be distinguished from each other because of the feature that the position of the etching line shown on the cross section is localized around the via.

FIG. 7 is a cross-sectional photograph of a via showing a fill plating process of a via having a diameter of 90 .mu.m and a depth of 80 .mu.m according to an embodiment of the present invention.

As shown in FIG. 7, it was confirmed that the fill-plating composition of the present invention was plated only in the via-hole without plating the surface during the plating process.

8 is a cross-sectional photograph showing filling of vias having a diameter of 90 mu m and a depth of 80 mu m according to the embodiments of the present invention and further controlling the plating thickness of the substrate surface by further plating the substrate surface.

The present invention can control the thickness of the plating when filling the vias with the composition for fill plating and plating with a conventionally known composition for plating and it can be shown that the vias can be filled with a low surface plating thickness 8.

8 is a photograph showing embodiments of the present invention in which the substrate is controlled to have a thickness of 10 m, 12 m, 14 m and 16 m from the substrate. Thus, the present invention can provide a composition for via plating that is flat and easy to control thickness.

Figure 9 is a plan view of a via-plated substrate in accordance with embodiments of the present invention. It can be seen that 25 locations in the substrate were photographed and filled uniformly over the entire area without defects.

That is, referring to FIG. 9, it can be seen that the via fill characteristic of the present invention is not local, but occurs over the entire area of the substrate. Thus, it was confirmed that only the vias were plated on the surface of the substrate without being plated.

Figure 10 is a plan view of a substrate that is filled with vias using a composition for substrate plating comprising 50 ppm of formaldehyde in accordance with embodiments of the present invention and containing various concentrations of alkylammonium halide.

Referring to FIG. 10, it can be seen that plating is also generated on the surface of the substrate when the concentration of the alkylammonium halide is 3 ppm and 100 ppm (Comparative Examples 1 and 2 in Table 1). However, when the concentration of the alkylammonium halide is 10 to 70 ppm (Examples 1 to 4 in Table 1), it can be confirmed that the surface of the substrate is plated with vias without being plated. Therefore, it is preferable that the alkylammonium halide is contained in an amount of more than 3 ppm and less than 100 ppm, more preferably 10 ppm or less and less than 100 ppm. The appropriate concentration may vary depending on the molecular weight or the number of carbon atoms of the alkylammonium halide. Since the proper concentration range is shifted depending on the type of halide, that is, Cl ^- or Br ^- , it is preferable to evaluate and use the appropriate concentration range according to the type of halide used and the plating condition.

11 is a plane photograph of a via-plated substrate with a composition for substrate plating containing only an alkylammonium halide in an acidic copper electrolytic solution according to comparative examples of the present invention.

Referring to the second and third columns of FIG. 11, even though the alkylammonium halide is contained in an appropriate amount (for example, 10 ppm and 30 ppm), it contains no formaldehyde or ethylene oxide-propylene oxide copolymer (EO-PO copolymer) (Comparative Examples 3 and 4 in Table 1), it was confirmed that abnormal plating occurred on the surface of the substrate. However, when at least one selected from the above-mentioned formaldehyde and ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is included, it can be confirmed that the surface growth inhibiting property is better controlled as shown in FIGS. 9 and 10.

12 to 15 are cross-sectional photographs of vias that are plated with a composition for substrate plating to which a surface modifier is added according to one embodiment of the present invention.

Referring to Figs. 12 to 15, in the case of containing a surface modifier which is a triarylmethane dye, an azole, a pyrimidine derivative, or a polish agent (Examples 5 to 8 in Table 1), a relatively comparatively fill- .

As a result, it was confirmed that the embodiment of the present invention can efficiently fill only vias without being plated on the substrate surface unlike the comparative example. Further, it was confirmed that the occurrence of the non-uniform plating area on the substrate can be controlled.

16 is a cross-sectional photograph of a via-plated vias after hole processing in a CCL substrate having a surface of any thickness according to an embodiment of the present invention and forming a seed layer chemically. A copper foil and a via fill plating layer are separately formed, and vertical etching lines are formed on the surface of the substrate. Referring to FIG. 16, it can be seen that when the composition for plating a substrate according to the present invention is used, the surface of the copper foil can be filled with only vias without being plated, and also applicable to through holes.

When a copper foil having a thickness corresponding to a plating thickness target is laminated and subjected to a circuit etching process or a tenting process after plating with the composition of the present invention, a circuit having high thickness uniformity can be formed.

17 is a cross-sectional photograph of a via showing etched lines of via-plated vias in accordance with embodiments of the present invention. The etch line is a line that separates the via fill plating from the surface plating. The position of the etching line can be formed at an arbitrary position in the via by adjusting the amount of via fill plating.

Referring to FIG. 17, the via-fill plating and the surface plating are formed in different steps using the composition for substrate plating of the present invention and the conventionally known composition for plating, and the cross-section of the substrate is observed after plating is completed. According to an embodiment of the present invention, via-fill plating is performed to reveal an etched line across the inside of the via. The position of the etched line can be adjusted as required, or it can be positioned in the middle of the insulating layer. Even if the via surface is not smooth, it is covered during the thickness plating. Therefore, when the thickness plating is separately provided, much care is not taken to manage the surface shape. However, if the via fill plating is not sufficient, the vias may not be completely filled in the plating of the thickness (right side in FIG. 17), so it is necessary to select an appropriate position in accordance with the product specification.

FIG. 18 shows a state after plating with a composition for substrate plating in which an alkylammonium halide is not contained in an acidic copper electrolytic solution but containing only formaldehyde, and after plating (left) with a composition for substrate plating including alkylammonium halide and formaldehyde (Right). Fig.

That is, the photograph on the left side of FIG. 18 shows a state after the via fill plating in the case where the composition for plating the acidic coin plating solution contains no alkylammonium halide but only formaldehyde (Comparative Example 5 in Table 1) This is a comparative photo showing the filled state of the vias. As shown in the photograph on the left side of FIG. 18, it was found that there was no via fill effect as in the case of plating with only the composition for plating an acidic coin solution substrate. Therefore, it can be confirmed that a via fill effect appears only in the case of a substrate plating composition containing formaldehyde and an alkylammonium halide at the same time.

19 is a cross-sectional photograph showing a via fill plating using a plating solution VR of JCU, which is a prior art. The left side of Fig. 19 shows a result obtained by plating 1.5 ASD for 30 minutes. For the intermediate image, 1.5 ASD for 45 minutes, plated on the right side shows 1.5 ASD for 90 minutes. Via size was 90 mu m in diameter and 80 mu m in depth.

Referring to FIG. 19, when the plating thickness is low, the via hole is not formed. When the plating amount is increased, the via hole is formed and the thickness of the surface plating is increased. Also, as the amount of plating increased, dimples decreased. As a result of plating for 90 minutes, the thickness of the surface plating increased to 30 μm and the dimple was still 9 μm.

20 is a cross-sectional view (Via size 50 μm in diameter, 25 μm in depth) showing an acidic coin solution containing no organic additive.

Referring to FIG. 20, when via plating was performed with a conventional acidic coin solution (Comparative Example 6 in Table 1) not containing alkylammonium halide and formaldehyde, the vias were not filled even though the plating time increased.

21 is a plan view showing a via-plated coating with a composition for substrate plating comprising an alkylammonium halide (CTAB) and an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) according to an embodiment of the present invention.

Referring to FIG. 21, when the formaldehyde was used in place of the EO-PO copolymer (Example 9 in Table 1), vias were plated without being plated on the surface. Here, since the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) may have a somewhat different property depending on the molecular weight, an ordinary skilled artisan can select the ethylene oxide-propylene oxide copolymer at an appropriate molecular weight in accordance with the via specification.

22 is a photograph showing a via-plated coating with a composition for substrate plating comprising an alkylammonium halide (DTAB) and an EO-PO copolymer according to an embodiment of the present invention.

Referring to FIG. 22, when CTAB was replaced with DTAB as the alkylammonium halide and formaldehyde was substituted for the EO-PO copolymer (Example 10 of Table 1), vias were plated without plating on the surface .

Figure 23 is a graph showing the results of a comparison of the results of the experiments of the present invention using a composition for substrate plating in which an alkylammonium halide is not contained in an acidic coin solution but an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) Is a plan view of a substrate that is plated.

23, it is possible to fill a vias only with no increase in surface plating even when a composition for substrate plating in which only an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is added without adding an alkylammonium halide to an acidic coin solution It was confirmed that it was possible. Further, ZTF is possible using a composition for substrate plating (Examples 11 to 16 in Table 1) in which an ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is contained at various concentrations ranging from 2.5 ppm to 50 ppm. However, the composition of the present invention may not have a relatively high uniformity and a wide range of available concentration, as compared with a composition for substrate plating that includes an alkylammonium halide and an ethylene oxide-propylene oxide copolymer (EO-PO copolymer).

24 is a graph showing a result of simulating plating growth with an increase in plating time using a composition for substrate plating with a weak surface suppression effect according to the prior art.

Referring to FIG. 24, the purple is copper, and the yellow dot is a dot indicating a place where the surface plating inhibitor is attached to the copper surface to inhibit the surface plating. Depending on the type of surface plating inhibitor, it may be buried, or it may fall off into the liquid after its surface plating function is lost by the reaction, or may move along the surface. Here, the buried model, which is a basic model, is used. It can be seen that the surface plating inhibitor is less distributed in the vias. Since the copper reduction can not be completely blocked even though it has a surface plating inhibiting effect, the surface is plated with the vias filled in the shape as it grows. This represents typical plating characteristics of existing fill plating solutions.

FIG. 25 is a graph showing a result of simulation of plating growth with an increase in plating time using a substrate plating composition having a strong effect of suppressing surface plating according to an embodiment of the present invention. FIG.

Referring to FIG. 25, the inside of the via is filled with the surface growth being suppressed. It was also confirmed that the surface of the via was grown roughly when the surface inhibition effect was strong. Even if the surface is slightly plated at the initial stage of the plating, if the surface is completely covered with the inhibitor during the plating, the plating is no longer grown on the surface, and the plating proceeds only in the via. Therefore, if the concentration of the surface growth inhibitor is not sufficient, surface growth may occur as in the case where the concentration of the alkylammonium halide of FIG. 10 is 3 ppm because the entire surface is not covered. Further, even if the concentration of the alkylammonium halide is sufficiently high, if the coverage uniformity is poor, abnormal plating may occur on the surface as shown in FIG. However, the embodiment of the present invention shows a uniform coverage as well as a complete surface plating blocking effect as shown in FIG. 25, and is a composition for via fill plating which suppresses surface growth and fills vias. Thus, FIG. 25 shows that through a composition capable of suppressing surface plating and filling the via, it is possible to completely fill the via without causing surface anomalies while completely suppressing surface growth.

FIG. 26 is a graph showing a result of simulation of plating growth with an increase in plating time using a composition for substrate plating having a surface plating inhibiting effect which is excessively increased in an amount of the surface plating inhibitor in the embodiment of FIG. 25;

Referring to Fig. 26, the surface growth inhibition effect is strong, and the surface growth is strongly suppressed from the beginning of plating. As the plating progresses, the inside of the via is covered with the inhibitor, and the plating growth inside the via also stops. In the actual plating, the current is continuously injected. Therefore, unlike the simulation, the plating is stopped, but abnormal plating occurs in any part of the substrate as in the case where the concentration of the alkylammonium halide in FIG. 10 is 100 ppm.

While the present invention has been particularly shown and described with reference to specific embodiments thereof, those skilled in the art will appreciate that such specific embodiments are merely preferred embodiments and that the scope of the invention is not limited thereby. It will be obvious. It is therefore intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

10: first insulating layer
12: second insulating layer
20,310: a first copper layer
22,310 ': a second copper foil
24: Surface plated layer
26: Seed layer
28: Dry film
100, 300: substrate
322: third copper layer

Claims (20)

Alkylammonium halide; And
And at least one selected from formaldehyde and ethylene oxide-propylene oxide copolymer (EO-PO copolymer).
The method according to claim 1,
A composition for substrate plating, which is an acidic coin solution composition.
3. The method of claim 2,
An acid, a copper salt, and a chloride ion.
The method according to claim 1,
Wherein the alkylammonium halide is a compound of Formula 1:
[Chemical Formula 1]

5. The method of claim 4,
Wherein the alkylammonium halide is comprised of 10 to 30 carbons.
5. The method of claim 4,
The alkylammonium halide
_{N (CH 3) 3 (C} 4 H 9) + X -, N (CH 3) 3 (C 8 H 17) + X -, N (CH 3) 3 (C 12 H 25) + X -, N ( _{CH 3) 3 (C 16 H} 33) + X -, N (CH 3) 3 (C 20 H 41) + X -, N (C 2 H 5) 3 (C 4 H 9) + X -, N ( _{C 2 H 5) 3 (C} 8 H 17) + X -, N (C 2 H 5) 3 (C 12 H 25) + X -, N (C 2 H 5) 3 (C 16 H 33) + X ^{_{-, N (CH 3) 4}} + X -, N (C 2 H 5) 4 + X -, N (C 3 H 7) 4 + X -, N (C 4 H 9) 4 + X - , and N ( C ₇ H ₁₅ ) ₄ ⁺ X ^- , and X is Cl, Br, or I.
5. The method of claim 4,
The alkylammonium halide may be selected from the group consisting of cetyltrimethylammonium bromide (CTAB), cetyltrimethylammonium chloride (CTAC), dodecyltrimethylammonium chloride (DTAC), and dodecyltrimethylammonium bromide ). &Lt; / RTI &gt;
The method according to claim 1,
Wherein the composition comprises an alkylammonium halide in an amount of more than 0.0003 parts by weight and less than 0.01 parts by weight based on the total weight of the composition for substrate plating.
The method according to claim 1,
Wherein at least one selected from the formaldehyde and the ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is contained in an amount of 0.0001 to 0.5 part by weight based on the total weight of the composition for substrate plating.
The method according to claim 1,
The ethylene oxide-propylene oxide copolymer (EO-PO copolymer)
Having a molecular weight of 1,000 to 100,000,
A composition for substrate plating.
The method according to claim 1,
The ethylene oxide-propylene oxide copolymer (EO-PO copolymer) is a copolymer having a proportion of ethylene oxide in the copolymer of 1/3 or more,
A composition for substrate plating.
The method according to claim 1,
A composition for substrate plating, further comprising a surface modifier.
13. The method of claim 12,
Wherein the surface modifier has a molecular weight of 50 to 1,500.
13. The method of claim 12,
A composition for substrate plating comprising 0.0001 to 1 part by weight of a surface modifier based on the total weight of the composition for substrate plating.
An ethylene oxide-propylene oxide copolymer (EO-PO copolymer)
A composition for substrate plating which is an acidic coin solution composition.
Forming a via in the substrate; And
Contacting the substrate on which the via is formed with the substrate plating composition according to claim 1, applying current to fill the via, and plating the surface plating growth to be inhibited.
17. The method of claim 16,
Further comprising forming a seed layer on the substrate surface and the via top surface prior to filling and plating the via.
17. The method of claim 16,
After filling and filling the vias,
Further comprising the step of plating the substrate surface with a second plating composition.
17. The method of claim 16,
Wherein the substrate is a copper clad laminate (CCL).
17. The method of claim 16,
Wherein the surface plating growth is performed by a substrate plating method

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