KR20180079561A - Display Device and Driving Method thereof - Google Patents

Abstract

The present invention relates to a display device that is capable of reducing power consumed and burn-in of pixels. According to the present invention, the display device includes: a display panel having pixels arranged in a form of a matrix by means of an intercrossing structure of data lines and gate lines; and a driving circuit part for recording data on the display panel and displaying preset information on at least a portion of the display panel for a period of time of a standby mode, wherein the data lines are grouped to a plurality of data line groups each having one or more data lines, and the driving circuit part supplies a data voltage by the unit of data line group while not supplying the data voltage to at least one data line group for the period of time of the standby mode.

Description

DISPLAY DEVICE AND DRIVING METHOD THEREOF

The present invention relates to a display device having a standby mode display function and a driving method thereof.

2. Description of the Related Art Flat panel displays (FPDs) are widely used not only for monitors of desktop computers but also for portable computers such as notebook computers and PDAs, as well as mobile phone terminals, because they are advantageous in downsizing and light weight. Such a flat panel display device includes a liquid crystal display (LCD) (LCD), a plasma display panel (PDP), a field emission display (FED) and an organic light emitting diode display (OLED).

The organic light emitting diode (OLED), which is a light emitting device, includes an anode electrode, a cathode electrode, and an organic compound layer formed therebetween. The organic compound layer includes a hole transport layer (HTL), an emission layer (EML), and an electron transport layer (ETL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light. An active matrix type organic light emitting display device includes an organic light emitting diode (OLED) that emits light by itself, and has been widely used because of its high response speed, light emitting efficiency, luminance, and viewing angle.

Since it is very important to reduce the power consumption of a personal portable terminal using an organic light emitting diode, it has been common to stop the display device in a standby mode in which no image is displayed.

In recent years, in order to reduce the inconvenience of restarting the mobile terminal when the user views simple information such as a clock, a standby mode display function that displays information to be frequently checked, such as a clock, Has emerged. The standby mode display function is also referred to as the AOD (Always On Display) function. The portable terminal does not drive the entire screen during the standby mode display period but only partially drives the simple standby mode display image such as a clock, a message, and a picture. Since the idle mode display image has almost no change in the image image as compared with a general moving image, each pixel displays the same image, so that the deterioration of the pixels becomes severe. As a result, the pixels of the organic light emitting diode cause a burn-in phenomenon. The burn-in phenomenon refers to a non-restored after-image in which a previous fixed pattern is visible even when an organic light emitting diode of a pixel for displaying a fixed pattern (character, image, etc.) for a long time is deteriorated in the organic light emitting display and another image is displayed on the pixels. Therefore, the burn-in phenomenon causes a residual image even in a daily image using the entire screen.

The present invention is intended to provide a display device capable of improving the burn-in phenomenon of pixels while reducing power consumption.

In order to achieve the above object, a display device according to the present invention includes a display panel and a driver circuit portion. The pixels are arranged in a matrix form by the intersection structure of the data lines and the gate lines in the display panel. The drive circuit section writes data in the display panel, and displays predetermined information in at least a part of the display panel during the standby mode. The data lines are grouped into a plurality of data line groups, each of which includes one or more data lines. The driving circuit unit supplies the data voltage in units of the data line group but does not supply the data voltage to at least one data line group during the standby mode.

According to the embodiments of the present invention, the data lines are driven alternately during the standby mode, thereby reducing power consumption.

In addition, the data lines are alternately driven during the standby mode to improve the pixel deterioration caused by displaying the fixed image for a long time.

1 and 2 are perspective views showing a display device according to the present invention.
3 is a block diagram showing a configuration of a display device according to the present invention.
4 is a view showing an array structure of a display panel.
5 is a diagram showing a data driver and a pixel structure.
6 is a view showing a driving period according to the present invention.
7 is a diagram showing a video display period according to the present invention.
8 is a diagram showing an example of a standby mode image.
9 is a diagram showing an example of data line grouping.
10 and 11 are views showing a method of driving the data driver according to the first embodiment.
12 and 13 are views showing a method of driving the data driver according to the second embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

1 and 2 are views schematically showing a portable display device according to an embodiment of the present invention. 1 and 2 illustrate a mobile terminal having a full touch screen structure, the present invention is not limited thereto.

1 and 2, the portable display device of the present invention includes a display panel 10, a front cover 101 surrounding the display panel 10, a back cover 103, a main board (not shown) 104 and a battery 105.

In the display panel 10, touch sensors may be disposed on the entire screen. The display panel drive circuit includes a drive IC (DIC) and a flexible circuit board (FPC) connecting the drive IC (DIC) to the main board 104. The drive IC 46 writes the image data input through the main board 104 to the pixels of the display panel 10. [

The front cover 101 includes tempered glass covering the display panel 10. [ The front cover 101 covers the front surface of the mobile terminal. A screen of the display panel 10 is exposed on the front surface of the mobile terminal. A front camera and various sensors may be disposed on the front of the mobile terminal. A back camera and various sensors may be disposed on the back of the mobile terminal.

The mid frame 102, the main board 104, the battery 105, and the like are disposed in a space between the front cover 101 and the back cover 103. [ The mid frame 102 supports the display panel 10 and spatially separates the display panel 10 from the main board 104. [ The flexible circuit board (FPC) of the display device is connected to the main board 104. The front cover 101 and the back cover 103 are provided with an A / V (Audio / Video) input unit, a user input unit, a speaker, and a microphone. The A / U input unit, the user input unit, the speaker, and the microphone are connected to the main board 104. The user input unit may include a touch key pad, a dome switch, a touch pad, a jog wheel, a jog switch, and the like.

The main board 104 includes a display device, a wireless communication module, a short distance communication module, a mobile communication module, a broadcast reception module, an A / U input portion, a GPS (Global Position System) module, A user input unit, a speaker, a microphone, a battery 105, and the like are connected to the main board 104. The power supply circuit removes noise from the voltage of the battery 105 and supplies it to the module power supply of the main board 104 and the display panel driving circuit. The main board 104 of the mobile device may include an application processor (AP). The AP transmits and receives image data to and from the drive IC (DIC) of the display device through a mobile industry processor interface (MIPI).

The main board 14 may be a main board such as a phone system, a television system, a set top box, a navigation system, a DVD player, a Blu-ray player, a personal computer (PC), and a home theater system.

3 is a block diagram showing a configuration of an organic light emitting diode display according to the present invention. 4 is a view showing an array arrangement of the display panel shown in Fig. 3 shows a display device in which the driving circuit section shown in FIG. 2 is divided into a timing controller 11, a data driving section 12 and a gate driving section 13 according to a functional configuration.

3, the OLED display includes a display panel 10 on which pixels PXL are formed, a timing controller 11, a data driver 12, and a gate driver 13, Respectively.

In the display panel 10, a plurality of pixels P are arranged in a matrix form. Each of the pixels P is connected to the data line portion 14 and the gate line portion 15. The data line section 14 includes a data line DL and a reference voltage line VIL. The gate line portion 15 includes a plurality of gate lines.

The semiconductor layer of the transistors constituting the pixel P may be an oxide semiconductor layer, an amorphous silicon (a-Si), a polycrystalline silicon (poly-Si) or an organic semiconductor.

The timing controller 11 controls the operation timing of the data driver 12 based on the timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the dot clock signal DCLK and the data enable signal DE And a gate control signal GDC for controlling the operation timing of the gate driver 13. The gate control signal GDC for controlling the operation timing of the gate driver 13, The timing controller 11 modulates the input digital video data DATA by referring to the digital sensing voltage value supplied from the data driver 12 to generate a digital compensation signal for compensating a threshold voltage change and a mobility change of the driving transistor After generating the data (MDATA), the digital compensation data (MDATA) is supplied to the data driver (12).

The data driver 12 supplies a sensing data voltage synchronized with the first sensing signal to the pixels P based on the data control signal DDC from the timing controller 11, , Converts the sensing voltages input from the display panel 10 through the reference voltage line into a digital value, and supplies the digital value to the timing controller 11. [ The data driver 12 converts the digital compensation data MDATA input from the timing controller 11 to the image display data voltage based on the data control signal DDC at the time of driving the image display, And supplies the voltage to the data lines in synchronization with the first scan signal for image display.

The gate driver 13 generates gate pulses based on the gate control signal GDC from the timing controller 11. [ The gate pulse includes a scan signal, a sense signal, and a black data control signal. The black data control signal maintains the gate off voltage at the time of sensing operation. The timing of the scan signal and the sense signal may be different in sensing operation and display operation. The gate driver 13 may be formed directly on the display panel 10 according to a gate-driver In Panel (GIP) scheme.

FIG. 4 is a view showing an array arrangement of the display panel shown in FIG. 3, and FIG. 5 is a view showing a pixel structure.

5 is a diagram illustrating a pixel structure and a data driver according to the present invention.

3 to 5, each of the pixels is connected to the data driver 12 through a data line DL and a first reference voltage line VIL. The reference voltage line VIL may be formed with a sensing capacitor Cx for storing the source voltage of the second node N2 as the sensing voltage Vsen.

The data driver 12 includes a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), an initialization switch SW1 and a sampling switch SW2.

The digital-to-analog converter (DAC) can generate the sensing data voltage (Vdata) under the control of the timing controller 11 during the sensing operation and output it to the data line DL. The DAC can convert the digital compensation data into the image display data voltage (Vdata) under the control of the timing controller (11) when driving the image display, and output the data to the data line (DL).

The initialization switch SW1 switches the current flow between the input terminal of the initialization voltage Vpre and the reference voltage line VIL in response to the initialization control signal SPRE. The sampling switch SW2 switches the current flow between the reference voltage line VIL and the analog-to-digital converter ADC in response to the sampling control signal SSAM during sensing operation, The source voltage of the driving transistor DT stored in the capacitor Cx is supplied to the ADC as the sensing voltage Vsen. The ADC converts the analog sensing voltage stored in the sensing capacitor Cx into a digital value Vsen and supplies it to the timing controller 11. The sampling switch SW2 maintains the turn-off state in response to the sampling control signal SSAM at the time of driving the display.

Each of the pixels P includes an organic light emitting diode (OLED) driving transistor DT, first and second transistors T1 and T2, and a capacitor Cst.

The organic light emitting diode OLED emits light by a driving current supplied from the driving transistor DT. A multilayer organic compound layer is formed between the anode electrode and the cathode electrode of the organic light emitting diode (OLED).

The driving transistor DT controls the driving current Ioled flowing through the organic light emitting diode OLED according to the gate-source voltage Vgs. The driving transistor DT includes a gate electrode connected to the first node N1, a drain electrode connected to the input terminal of the high potential driving voltage EVDD, and a source electrode connected to the second node N2.

The storage capacitor Cst is connected between the first node N1 and the second node N2.

The first transistor T1 includes a gate electrode connected to an input terminal for supplying a scan signal SCAN, a drain electrode connected to the data line DL, and a source electrode connected to the first node N1.

The second transistor T2 includes a gate electrode connected to the input terminal for supplying the sense signal SEN, a drain electrode connected to the second node N2, and a source electrode connected to the reference voltage line VIL.

The reference voltage Vref applied through the reference voltage line VIL may be selected within a voltage range sufficiently lower than the operating voltage of the organic light emitting diode OLED so that the organic light emitting diode OLED does not emit light during the programming period. That is, the reference voltage Vref may be set to be equal to or lower than the low-potential driving voltage VSS.

6 is a diagram illustrating a driving period of the organic light emitting display according to the present invention.

Referring to FIG. 6, the driving period of the OLED display according to the present invention includes first and second non-display periods X1 and X2 and an image display period X0.

The first non-display period X1 is defined as a period from several tens to several hundreds of frames elapsed from the power-on (PON), and the second non-display period X2 is defined as a period from power- It can be defined as a section from several tens to several hundreds of frames elapsed.

The image display period X0 includes a display period DF in which a data voltage is written to the pixels P and a vertical blank period VB in which no image data is written.

The compensation period is located outside the display period DF. The compensation period may belong to the first and second non-display periods X1 and X2 or the vertical blank period VB. During the compensation period, the data driver 12 extracts the threshold voltage Vth of the driving transistor DT, and calculates a variation amount of the threshold voltage Vth based on the extracted threshold voltage Vth to generate a compensated data voltage.

The compensation period includes a programming period Tpg, a sensing period Tsen, and a sampling period Tsam, respectively.

7 is a timing chart of scan signals and switch control signals during a display period in an image display period.

The operation of the display period (DF) pixel P in conjunction with FIG. 5 and FIG. 7 will now be described. The operation of each pixel P in the display period DF is the same, and the operation will be described centering on one pixel P hereinafter.

The image display driving of the present invention is divided into (1), (2), and (3) periods.

In the (1) period, the initialization switch SW1 and the second transistor ST2 are turned on to reset the second node N2 to the initializing voltage Vpre.

In the (2) period, the first transistor ST1 is turned on to supply the data voltage Vdata to the first node N1. The data voltage Vdata may be an analog data voltage converted using digital compensation data (Mdata). At this time, the second node N2 maintains the initialization voltage Vpre through the second transistor ST2. Therefore, in this period, the gate-source voltage Vgs of the driving transistor DT is programmed to a desired level.

The first and second transistors ST1 and ST2 are turned off and the driving transistor DT generates the driving current Ioled at the programmed level and applies the driving current Ioled to the organic light emitting diode OLED. The organic light emitting diode OLED emits light with a brightness corresponding to the driving current Ioled to display the gradation.

In the period (2) shown in FIG. 7, the data driver changes the method of supplying the data voltage to the data line in accordance with the driving mode of the display device.

In the general video display mode, the data driver 11 supplies data voltages to all the data lines DL. In the standby mode, the data driver 11 supplies a data voltage to some of the data lines DL.

8 is a diagram showing an example of a standby mode image.

Referring to FIG. 8, the standby mode image may be displayed only in a part of the display panel 10. The idle mode image may include information such as time and calendar.

In order to selectively drive the data lines DL in the standby mode, the data lines are grouped into a plurality of data line groups.

9 is a diagram illustrating grouping of data lines according to the present invention.

Referring to FIG. 9, the data lines DL1 to DL2m according to the present invention are grouped into first to m-th data line groups GR1 to GRm.

The first to m-th data line groups GR1 to GRm include one or more data lines DL. For example, as shown in FIG. 9, each of the data line groups GR1 to GRm includes two data lines can do. The data lines belonging to the respective data line groups GR1 to GRm are made up of adjacent data lines.

The data driver 11 supplies data voltages in units of groups in a standby mode, but does not supply data voltages to at least one of the data lines. As shown in FIG. 8, since the standby mode image displays simple information, the user can confirm the information displayed on the standby mode image for a short period of time. Therefore, the resolution of the standby mode image is not so important to the user. The data driver 11 of the present invention does not supply the data voltage to the predetermined data lines DL when displaying the standby mode image, thereby reducing power consumption.

FIG. 10 is a diagram illustrating a method of driving a data driver in a standby mode according to the first embodiment, and FIG. 11 is a diagram illustrating light emission of pixels by the driving method shown in FIG.

A method of driving the grouped data lines as shown in FIG. 9 will be described below.

10 and 11 are schematic diagrams of the first data line group GR1 and the second data line group GR2 among the odd data line groups GR2n among the odd-numbered data line groups GR (2n-1) For example.

9 to 11, the data driver 11 according to the first embodiment supplies a data voltage to the first data line group GR1 during k (k is a natural number) 1) th frame period, the data voltage is supplied to the second data line group GR2.

As a result, during the k-th frame, the pixels connected to the first data line group GR1 emit light and the pixels connected to the second data line group GR2 emit no light. During the (k + 1) th frame, the pixels connected to the second data line group GR2 emit light, and the pixels connected to the first data line group GR1 emit no light.

FIG. 12 is a diagram illustrating a method of driving a data driver in a standby mode according to a second embodiment, and FIG. 13 is a diagram illustrating light emission of pixels by the driving method shown in FIG. 12 and 13 illustrate a first data line group as a first (3n-2) data line group, a second data line group as a first (3n-1) data line group and a first data line group as a first And a third data line group.

12 and 13, the data driver 11 supplies the data voltages to the first and second data line groups GR1 and GR2 during the k-th frame period, The data voltage is not supplied. The data driver 11 supplies the data voltages to the first and third data line groups GR1 and GR3 and the data voltage to the second data line group GR2 during the (k + 1) Do not supply. The data driver 11 supplies the data voltages to the second and third data line groups GR2 and GR3 during the (k + 2) th frame period and supplies the data voltages to the first data line group GR1 Do not supply.

In this way, the data driver 11 can reduce the power consumption by alternately driving the data line groups GR.

The embodiment of the present invention has been described mainly on the embodiments in which the period for alternately driving the data line groups GR is set as the frame period. However, the period in which the data line groups GR are alternately driven is not limited to this, and may be arbitrarily set.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: Display panel 11: Timing controller
12: Data driver 13: Gate driver
GR: Data line group

Claims (7)

A display panel in which pixels are arranged in a matrix form by an intersection structure of data lines and gate lines; And
And a drive circuit for writing data in the display panel and displaying predetermined information in at least a part of the display area during a standby mode,
The data lines are grouped into a plurality of data line groups each including one or more data lines,
Wherein the driving circuit unit supplies a data voltage in units of the data line group and does not supply the data voltage to at least one data line group during the standby mode period.
The method according to claim 1,
The driving circuit
numbered data line group among the data line groups during k (k is a natural number) frame period,
and alternately drives the data line groups by supplying data voltages to the odd data line groups among the data line groups during a (k + 1) th frame period.
The method according to claim 1,
The driving circuit
(3n-2) th data line group and the (3n-1) th data line group among the data line groups during a k-th frame period,
(3n-2) th data line group and the (3n) th data line group among the data line groups during a (k + 1) th frame period,
and alternately drives the data line groups by supplying a data voltage to the (3n-1) th data line group and the (3n-1) th data line group during a (k + 2) th frame period.
The method according to claim 1,
During the standby mode, the driving circuit
A display device that displays information that can be designated by a clock, character, image, or user's selection.
A method of driving a display device including a plurality of data line groups including at least one data line,
a first step of supplying a data voltage to at least one of the data line groups during k (k is a natural number) frame period; And
and supplying a data voltage to a data line group to which a data voltage is not supplied in the (k) th frame period during a (k + 1) th frame period.
6. The method of claim 5,
Wherein the first step supplies a data voltage to the odd-numbered data line group among the data line groups,
Wherein the second step alternately drives the data line groups by supplying a data voltage to the odd data line groups among the data line groups.
6. The method of claim 5,
Wherein the first step supplies a data voltage to the (3n-2) th data line group and the (3n-1) th data line group among the data line groups,
Wherein the second step supplies a data voltage to the (3n-2) th data line group and the (3n) th data line group among the data line groups,
(3n-1) th data line group and the (3n) th data line group during the (k + 1) -th frame period following the second step, And a driving method of the display device.

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