KR20180047167A - Organic light emitting display device - Google Patents

Abstract

The present invention relates to an organic light emitting display device of a new structure for minimizing occurrence of cracks in various insulating layers and wirings formed in a region bent in the organic light emitting display device. The organic light emitting display device comprises: a substrate defining an active region and a bending region; a thin film transistor located on the substrate in the active region; a first wiring located on the substrate in the bending region; a first planarization layer located on the thin film transistor in the active region, and located on the first wiring in the bending region; a second wiring located on the first planarization layer in the bending region; a second planarization layer located on the first planarization layer in the active region, and located on the first planarization layer and the second wiring in the bending region; an organic light emitting element located on the second planarization layer in the active region; and a micro cover layer located on the second planarization layer in the bending region.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting diode (OLED) display device, and more particularly, to an organic light emitting diode display device capable of minimizing stresses that may occur in bending wirings and inorganic layers.

In recent years, as the information age has come to a full-fledged information age, a display field that visually expresses electrical information signals has been rapidly developed. In response to this demand, various flat display devices having excellent performance such as thinning, light- Devices have been developed and are rapidly replacing existing cathode ray tubes (CRTs).

Specific examples of such flat panel display devices include a liquid crystal display (LCD), an organic light emitting display (OLED), an electrophoretic display (EPD), a plasma display (PDP) have. Particularly, an organic light emitting display device is a next generation display device having self-emission characteristics, and has excellent characteristics in terms of a viewing angle, a contrast, a response speed, and a power consumption as compared with a liquid crystal display device.

In addition, in recent years, a display device which is formed by forming a display portion, a wiring, or the like on a flexible substrate such as a plastic, which is a flexible material, and is capable of displaying an image even if bent like paper, has been attracting attention as a next generation display device.

As described above, it is necessary to secure the flexibility of the substrate, the various insulating layers formed on the substrate, and the wiring formed of the metal material while manufacturing the organic light emitting display device using a flexible substrate such as plastic or the like Do.

In the case of wiring, cracking may occur in the wiring due to the stress due to bending when the substrate on which the wiring is formed is bent. If a crack is generated in the wiring, normal signal transmission is not performed, so that the thin film transistor or the organic light emitting element can not operate normally, leading to the failure of the organic light emitting display.

In the case of the insulating layer, since the inorganic film constituting the insulating layer or the organic film material itself has a brittleness characteristic, the insulating layer is significantly poor in flexibility as compared with a wiring formed of a metal. Therefore, when the substrate on which the insulating layer is formed is bent, cracks may be generated in the insulating layer due to stress caused by bending.

When cracks are generated in a part of the insulating layer, the generated cracks propagate to other regions of the insulating layer and propagate to the wiring in contact with the insulating layer, leading to defective display of the organic light emitting display.

Accordingly, the inventors of the present invention invented an organic light emitting display device having a new structure for minimizing the occurrence of cracks in various insulating layers and wiring lines formed in a region to be bent in an organic light emitting display device. In addition, the inventors of the present invention have recognized that as the resolution of an organic light emitting display increases, the space for arranging wires, capacitors, and the like is insufficient. Therefore, when the bezel region is increased to arrange the wiring, the capacitor, and the like, difficulties may arise in implementing the narrow bezel. Therefore, the inventors of the present invention have invented a new structure of an organic light emitting display device capable of more freely arranging wirings, capacitors, and the like within a limited space.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an organic light emitting diode display device capable of minimizing the stress applied to wiring and an insulating layer formed in a bending region by adjusting insulating layers disposed in a bending region.

Another object of the present invention is to provide an organic light emitting diode display device capable of maximally securing a space in which a metal material layer can be disposed by using a plurality of planarization layers.

The problems of the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided an OLED display including a substrate having an active region and a bending region defined therein, a thin film transistor disposed on the substrate in an active region, A first wiring disposed on the thin film transistor in the active region, a first planarization layer disposed on the first wiring in the bending region, a second wiring disposed on the first planarization layer in the bending region, A second planarization layer disposed on the planarization layer and disposed on the first planarization layer and the second wiring in the bending region, an organic light emitting element disposed on the second planarization layer in the active region, And a micro-cover layer disposed on the micro-cover layer.

The details of other embodiments are included in the detailed description and drawings.

The present invention minimizes the stress applied to various wiring and inorganic layers disposed in the bending area by disposing various insulating layers such as a plurality of planarizing layers, banks, spacers, and micro-cover layers in the bending area.

In addition, the present invention can maximize the space in which a metal material layer such as a wiring or a capacitor can be disposed by using a plurality of planarization layers.

The effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the specification.

1 is a schematic plan view for explaining an organic light emitting display according to an embodiment of the present invention.
FIG. 2A is a cross-sectional view of the organic light emitting diode display according to II-II 'of FIG.
FIG. 2B is an enlarged view of region A of FIG. 2A.
3 is a schematic cross-sectional view illustrating the compressive and tensile forces received by the layers disposed above and below the neutral plane, respectively, when the support layer is bent.
4A is a schematic cross-sectional view illustrating an organic light emitting display according to another embodiment of the present invention.
4B is a schematic plan view illustrating a wiring structure of an OLED display according to another embodiment of the present invention.
5 to 7 are schematic cross-sectional views illustrating an organic light emitting display according to various embodiments of the present invention to which a micro-cover layer is applied.
8A and 8B are schematic cross-sectional views illustrating an OLED display according to another embodiment of the present invention.
FIG. 9 is a schematic cross-sectional view illustrating a structure of the organic light emitting display shown in FIG. 5 in a final bending state.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Where the terms "comprises", "having", "done", and the like are used in this specification, other portions may be added unless "only" is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

An element or layer is referred to as being another element or layer "on ", including both intervening layers or other elements directly on or in between.

Although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The sizes and thicknesses of the individual components shown in the figures are shown for convenience of explanation and the present invention is not necessarily limited to the size and thickness of the components shown.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other partially or entirely and technically various interlocking and driving is possible as will be appreciated by those skilled in the art, It may be possible to cooperate with each other in association.

Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

1 is a schematic plan view for explaining an organic light emitting display according to an embodiment of the present invention.

The substrate 110 includes an active area AA and a non-display area NA surrounding the active area AA. The active area AA is an area where an image is displayed in the organic light emitting diode display device 100 and various active elements for driving the organic light emitting element 180 and the organic light emitting element 180 . The non-display area NA is an area where no image is displayed in the organic light emitting diode display 100, and various signal lines such as a scan line SL and a circuit part such as a wiring 170 and a gate driver 190 are formed Area. The gate driver 190 may be arranged in a GIP form as shown in FIG. 1A.

A pad 195 is disposed in the non-display area NA. 1A, a pad 195 is disposed on one side of a substrate 110 in a non-display area NA. The pad 195 is a metal pattern to which an external module, for example, a flexible printed circuit board (FPCB), a chip on film (COF), or the like is bonded.

And the wiring 170 is arranged in the non-display area NA. The wiring 170 is a wiring 170 for transferring a signal (voltage) from an external module bonded to the pad 195 to a circuit portion such as the active region AA or the gate driver 190. For example, various signals for driving the gate driver 190 through the wiring 170, data signals, high voltage VDD, low voltage VSS, and the like can be transmitted. The wiring 170 may be formed simultaneously with the same material as the various conductive elements disposed in the active area AA.

The bending area BA is defined in the non-display area NA adjacent to the active area AA. The bending area BA is an area for disposing the pad 195 and the external module bonded to the pad 195 on the back side of the substrate 110. [ That is, as the bending area BA is bent (in the direction of the arrow in FIG. 1A), the external module bonded to the pad 195 of the substrate 110 moves to the backside of the substrate 110, External modules may not be visible when viewed. Also, as the bending area BA is bent, the size of the non-display area NA, which is visible on the substrate 110, is reduced, and a narrow bezel can be realized.

Hereinafter, FIGS. 2A and 2B will be referred to for a more detailed description of the components of the organic light emitting diode display device 100. FIG.

FIG. 2A is a cross-sectional view of the organic light emitting diode display according to II-II 'of FIG.

The organic light emitting display 100 according to an embodiment of the present invention shown in FIG. 2A includes a plurality of organic light emitting diodes (OLEDs) 100, Emitting display device of the top emission type

The substrate 110 supports various components of the OLED display 100. The substrate 110 may be made of a plastic material having flexibility, and may be made of, for example, polyimide (PI). In the case where the substrate 110 is made of polyimide (PI), the manufacturing process is performed in the state where the support substrate made of glass is disposed under the substrate 110, and the support substrate is released after the manufacturing process is completed have. Further, after the supporting substrate is released, a back plate for supporting the substrate may be disposed under the substrate 110. [

Referring to FIG. 2A, a buffer layer 111 is formed on a substrate 110. The buffer layer 111 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) which is an inorganic material or a multilayer of silicon nitride (SiNx) and silicon oxide (SiOx). The buffer layer 111 improves adhesion between the layers formed on the buffer layer 111 and the substrate 110 and blocks alkaline components and the like flowing out from the substrate 110. However, the buffer layer 111 is not an essential component and may be omitted based on the type and material of the substrate 110, the structure and type of the thin film transistor 130, and the like.

Referring to FIG. 2A, a thin film transistor 130 is disposed on a buffer layer 111. The thin film transistor 130 includes an active layer 131 made of polysilicon, a gate electrode 134, a source electrode 132, and a drain electrode 133. The thin film transistor 130 is a driving thin film transistor and the gate electrode 134 is a thin film transistor of a top gate structure in which the active layer 131 is disposed. 2A, only the driving thin film transistors among various thin film transistors that can be included in the OLED display 100 are shown for convenience of description. However, other thin film transistors such as switching thin film transistors may be included in the organic light emitting display 100 have. Also, although the thin film transistor 130 is described as a coplanar structure in this specification, the thin film transistor 130 may be implemented with another structure such as a staggered structure.

Referring to FIG. 2A, an active layer 131 of the thin film transistor 130 is disposed on the buffer layer 111. The active layer 131 includes a channel region CA in which a channel is formed when the thin film transistor 130 is driven, a source region SA on both sides of the channel region CA, and a drain region DA. The channel region CA, the source region SA and the drain region DA are defined by ion doping (impurity doping).

The active layer 131 of the thin film transistor 130 may be made of polysilicon. Thus, polysilicon is formed by depositing an amorphous silicon (a-Si) material on the buffer layer 111, performing a dehydrogenation process, a crystallization process, an activation process, and a hydrogenation process, (131) may be formed. When the active layer 131 is formed of polysilicon, the thin film transistor 130 may be an LTPS thin film transistor 130 using low temperature poly-silicon (LTPS). The polysilicon material has a high mobility, and when the active layer 131 is made of polysilicon, it has an advantage of low energy consumption and excellent reliability.

In addition, the active layer 131 of the thin film transistor 130 may be made of an oxide semiconductor material. The active layer 131 of the thin film transistor 130 may be formed of a metal oxide, for example, a metal oxide such as IGZO, but is not limited thereto. Since the oxide semiconductor material has a larger bandgap than the silicon material, the electrons can not go beyond the bandgap in the off state and thus the off-current is low.

Referring to FIG. 2A, a gate insulating layer 112 is disposed on the active layer 131 and the buffer layer 111. The gate insulating layer 112 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) which is an inorganic material or a multilayer of silicon nitride (SiNx) or silicon oxide (SiOx). A contact hole is formed in the gate insulating layer 112 so that each of the source electrode 132 and the drain electrode 133 contacts each of the source region SA and the drain region DA of the active layer 131. [ Although the gate insulating layer 112 is illustrated as being planarized for ease of description in FIG. 2A, the gate insulating layer 112 may be formed along the shape of the components disposed below.

Referring to FIG. 2A, a gate electrode 134 is disposed on the gate insulating layer 112. A metal layer such as molybdenum (Mo) is formed on the gate insulating layer 112, and a gate electrode 134 is formed by patterning the metal layer. The gate electrode 134 is disposed on the gate insulating layer 112 so as to overlap the channel region CA of the active layer 131.

Referring to FIG. 2A, an interlayer insulating layer 115 is disposed on the gate electrode 134. The interlayer insulating layer 115 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) which is an inorganic material or a multilayer of silicon nitride (SiNx) or silicon oxide (SiOx). A contact hole is formed in the interlayer insulating layer 115 so that each of the source electrode 132 and the drain electrode 133 contacts each of the source region SA and the drain region DA of the active layer 131. Although the interlayer insulating layer 115 is illustrated as being planarized for ease of explanation in FIG. 2A, the interlayer insulating layer 115 may be formed along the shape of the components disposed below.

Referring to FIG. 2A, a source electrode 132 and a drain electrode 133 are disposed on the interlayer insulating layer 115. The source electrode 132 and the drain electrode 133 may be formed of a conductive metal material and may have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) Each of the source electrode 132 and the drain electrode 133 is connected to each of the source region SA and the drain region DA of the active layer 131 via the contact hole.

Referring to FIG. 2A, a storage capacitor 120 is disposed on a substrate 110. The storage capacitor 120 includes a first electrode 121 disposed on the gate insulating layer 112 and a second electrode 122 disposed on the interlayer insulating layer 115. The first electrode 121 of the storage capacitor 120 is simultaneously formed of the same material as the gate electrode 134 of the thin film transistor 130 and the second electrode 122 of the storage capacitor 120 is formed of the same material as the thin film transistor 130. [ The source electrode 132 and the drain electrode 133 may be formed of the same material. Accordingly, the storage capacitor 120 can be formed during the manufacturing process of the thin film transistor 130 without requiring any additional process, so that there is efficiency in terms of process cost and process time.

Referring to FIG. 2A, a passivation layer 116 may be disposed on the thin film transistor 130 and the storage capacitor 120. The passivation layer 116 is an insulating layer for protecting the thin film transistor 130 and the storage capacitor 120. The passivation layer 116 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), which are inorganic materials. The passivation layer 116 includes a contact hole through which the anode 181 of the organic light emitting diode 180 is connected to the thin film transistor 130. However, the passivation layer 116 is not necessarily a necessary component, and may be omitted depending on the design of the organic light emitting display 100.

Referring to FIG. 2A, a planarization layer 113 is disposed on the passivation layer 116. The planarization layer 113 is an insulating layer for planarizing the upper surface of the thin film transistor 130, and may be formed of an organic material. The passivation layer 116 is formed along the shape of the upper portion of the thin film transistor 130 and the storage capacitor 120 as shown in FIG. 2A, the passivation layer 116 and the storage capacitor 120 are formed by the thin film transistor 130 and the storage capacitor 120, ) Can not be flattened and a step may exist. Thus, the organic light emitting device 180 can be more reliably formed by flattening the upper portion of the thin film transistor 130 and the storage capacitor 120. A contact hole for exposing the source electrode 132 of the thin film transistor 130 is formed in the planarization layer 113.

Referring to FIG. 2A, the organic light emitting diode 180 is disposed on the planarization layer 113. The organic light emitting device 180 is formed on the planarization layer 113 and includes an anode 181 electrically connected to the source electrode 132 of the thin film transistor 130, an organic layer 182 disposed on the anode 181, 182). ≪ / RTI > The anode 181 is formed of a reflective layer for reflecting the light emitted from the organic layer 182 toward the cathode 183 and a reflective layer for reflecting the light emitted from the organic layer 182 to the organic layer 182 And may include a transparent conductive layer for supplying. However, the anode 181 may include only the transparent conductive layer, and the reflective layer may be defined as being a separate component from the anode 181. [ The organic layer 182 may include one of a red organic light emitting layer, a green organic light emitting layer, a blue organic light emitting layer, and a white organic light emitting layer as an organic layer for emitting light of a specific color. If the organic layer 182 includes a white organic light emitting layer, a color filter for converting white light from the white organic light emitting layer into light having a different color may be disposed on the organic light emitting diode 180. The organic layer 182 may further include various organic layers such as a hole transport layer, a hole injection layer, an electron injection layer, and an electron transport layer in addition to the organic emission layer. The cathode 183 may be made of a transparent conductive material, for example, a transparent conductive oxide such as IZO or ytterbium (Yb).

2A, a bank 114 is disposed on the anode 181 and the planarization layer 113. [ The bank 114 defines a pixel region in a manner that distinguishes adjacent pixel regions in the active region AA. The bank 114 may be made of organic material. For example, the bank 114 may be made of polyimide, acryl or benzocyclobutene (BCB) resin, but is not limited thereto.

Although not shown in FIG. 2A, an encapsulant may be formed on the organic light emitting diode 180 to protect the organic light emitting diode 180, which is vulnerable to moisture, from exposure to moisture. For example, the sealing portion may have a structure in which an inorganic layer and an organic layer are alternately stacked.

Referring to FIG. 2A, a wiring 170 is disposed in the bending area BA. The wiring 170 may be formed of the same material as the conductive element disposed in the active area AA. 2A, the wiring 170 may be formed of the same material as the source electrode 132 and the drain electrode 133, but is not limited thereto and may be formed of the same material as the gate electrode 134. For example, .

The wiring 170 may be surrounded by an insulating material for protecting the wiring 170. Specifically, the wiring 170 may be surrounded by an inorganic film for protecting the wiring 170. 2A, a buffer layer 111 made of an inorganic material is formed under the wiring 170, and a passivation layer 116 made of an inorganic material is formed so as to surround the upper and side portions of the wiring 170 . Thus, the phenomenon that the wiring 170 reacts with water or the like and is corroded can be prevented.

As described above, when the organic light emitting diode display 100 includes a single planarization layer, the wiring 170 is formed in the bending area BA in a single-layer structure. That is, in the bending area BA, the wiring 170 can not be formed in a multilayer structure, and the wiring 170 is formed in a single-layer structure as shown in FIG. 2A.

When the wiring 170 is formed in a single-layer structure, a large amount of space is required to form a specific number of wirings 170. In order to form the wiring 170, a conductive material is deposited in the bending area BA, and then a conductive material is patterned by a process such as etching in the shape of the wiring 170 to be formed. However, the fineness of the etching process is limited The distance between the wiring 170 and the wiring 170 is limited. In addition, since the insulating layers surrounding the wiring 170 also have to be patterned, the distance between the wirings 170 can not be narrowed beyond a specific interval. Accordingly, since a large space is required to form the wiring 170 in the bending area BA, the area of the non-display area NA becomes large, which may cause difficulties in implementing the narrow bezel.

Also, when one wiring 170 is used to transmit one signal, the corresponding signal may not be transmitted when the wiring 170 is cracked or cracked. Since the wiring 170 is disposed in the bending area BA as described above, the wiring 170 itself can be cracked in the course of bending the substrate 110. [ Since the inorganic material constituting the buffer layer 111 and the passivation layer 116 is more susceptible to bending stress than the conductive material constituting the wiring 170, the buffer layer 111 and the passivation layer 116, The cracks generated in the passivation layer 111 and the passivation layer 116 may propagate to the wiring 170. [ When the wiring 170 is cracked, the signal transmitted by the wiring 170 is not transmitted or the resistance of the wiring 170 is greatly increased, so that a desired signal may not be transmitted.

However, since the wiring 170 is formed in a single-layer structure as described above, if a plurality of wirings 170 are used to transmit one signal, the area occupied by the wiring 170 in the non-display area NA . For example, when two wirings 170 are used to transmit one signal, the area occupied by the wirings 170 is doubled. Accordingly, it is very difficult to prepare for cracking of the wiring 170 when the single flattening layer 113 is used.

In addition, when a single planarization layer 113 is used, it is possible that various signal lines such as a scan line SL, a data line, and the like arranged in the active area AA as well as the bending area BA are implemented as one layer high. That is, in the active area AA, various driving elements such as the thin film transistor 130, the storage capacitor 120, and the like are disposed, and the scan line SL, the source electrode 132, And a data line made of the same material as the drain electrode 133 are arranged closely. Therefore, it is very difficult to secure the extra conductive layer for using the scan lines SL and the data lines in a multi-layered structure, so it is very difficult to reduce the resistance of various signal lines such as the scan lines SL and data lines and the like .

In order to increase the capacitance of the storage capacitor 120, it is preferable that the storage capacitor 120 is implemented in a structure in which a plurality of capacitors are connected in parallel with each other. However, in order to connect the storage capacitors 120 in parallel, a plurality of electrodes arranged to overlap each other is required. In order to secure a plurality of electrodes, a plurality of conductive layers must be secured. However, as described above, since various driving elements and signal lines are already arranged closely in the active region AA and the number of conductive layers usable is limited, it is very difficult to secure an extra conductive layer.

2A, in the bending area BA, the buffer layer 111 and the passivation layer 116 surrounding the wirings 170 and the wirings 170 in the process of bending the substrate 110 are subjected to a tensile force there is a high possibility that the wiring 170 and / or the buffer layer 111 and the passivation layer 116 are cracked because a tensile force is applied and the magnitude of the tensile force is large.

Hereinafter, FIG. 3 will be referred to first to explain cracks in the wiring 170 and / or the buffer layer 111 and the passivation layer 116. FIG.

3 is a schematic cross-sectional view illustrating the compressive and tensile forces received by the layers disposed above and below the neutral plane, respectively, when the support layer is bent. 3, the first layer L1 is disposed on the upper surface of the support layer M, the second layer L2 is disposed on the lower surface of the support layer M, It is assumed that the two layers (L2) are formed of the same material and the same thickness. The support layer M shown in Figure 3 corresponds to the substrate 110 and the first layer L1 or the second layer L2 corresponds to either the wiring 170, the buffer layer 111, or the passivation layer 116 .

Neutral plane (NP) means a virtual plane where the compressive force and tensile force applied to the structure are canceled each other and are not subjected to stress when the structure is bent. As described above, the first layer L1 is disposed on the upper surface of the support layer M, the second layer L2 is disposed on the lower surface of the support layer M, both ends of the support layer M are lowered, The first layer L 1 disposed on the upper surface of the support layer M is stretched as shown in FIG. 3, and therefore, when the support layer M is bent in a shape in which the central portion of the support layer M is raised, The second layer (L2) disposed on the lower surface of the support layer (M) is compressed and therefore receives a compressive force. The neutral plane NP is disposed on the support layer M in the middle portion in the structure in which the first layer L1, the support layer M and the second layer L2 are laminated. That is, when the other side of the supporting layer M is bent downward in a state where one side of the supporting layer M is fixed, the first layer L1 positioned above the neutral plane NP receives a tensile force and the neutral plane NP And the second layer (L2) located under the first layer (L2) is subjected to compressive force. However, since the wiring 170, the buffer layer 111 and the passivation layer 116 are more vulnerable when they are subjected to a compressive force and a tensile force of the same magnitude, the distance from the neutral plane NP is the same, (L1) is more likely to be cracked than the second layer (L2).

Therefore, the wiring 170, the buffer layer 111, and the passivation layer 116 disposed in the bending area BA shown in FIG. 2A are not subjected to a tensile force or are subjected to a tensile force, (NP) is very important.

Hereinafter, the theory of the above-described compressive force and tensile force is applied to the organic light emitting diode display 100 shown in FIG. 2A together with FIG. 2B.

FIG. 2B is an enlarged view of region A of FIG. 2A.

2B, a buffer layer 111 is disposed on the substrate 110, a wiring 170 is disposed on the buffer layer 111, and a passivation layer (116). The neutral plane NP is determined in consideration of the thickness, Young's modulus, material, and the like of the components disposed in the corresponding region. In the OLED display 100 as shown in FIG. 2B, Is located on the substrate 110. Thus, when the substrate 110 is bent downward, both the buffer layer 111, the wiring 170, and the passivation layer 116 disposed on the substrate 110 are subjected to a tensile force, Either one of the buffer layer 111 and the passivation layer 116 is cracked and the crack is propagated to the wiring 170 and the wiring 170 may be cracked. Thus, there is a need to design the OLED display 100 such that the buffer layer 111, the wiring 170, and the passivation layer 116 are disposed below the neutral plane NP.

4A is a schematic cross-sectional view illustrating an organic light emitting display according to another embodiment of the present invention. The organic light emitting diode display 400 shown in FIG. 4A differs from the OLED display 200 shown in FIG. 2A in that the planarization layers 413 and 417 are changed into a two-layer structure, Except that the connection relation between the source electrode 132 of the storage capacitor 130 is changed and the storage capacitor 420 is changed and the arrangement relationship of the wiring 470 and the insulating layers in the bending area BA is changed, Therefore, redundant description will be omitted.

Referring to FIG. 4A, a first planarization layer 413 is disposed on the passivation layer 116. The first planarization layer 413 is substantially the same as the planarization layer 113 shown in FIG.

An additional buffer layer 418 is disposed on the first planarization layer 413. The additional buffer layer 418 may include various conductive elements formed on the additional buffer layer 418 such as an intermediate electrode 439 to be described later, a third electrode 423 of the storage capacitor 420, an additional wiring 440, The second wiring 472 disposed in the bending area BA, and the like. The additional buffer layer 418 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), which are inorganic. However, the additional buffer layer 418 is not necessarily a necessary component, and may be omitted according to the design of the organic light emitting display 400.

An intermediate electrode 439 is disposed on the additional buffer layer 418. The intermediate electrode 439 is connected to the source electrode 132 of the thin film transistor 130 through the passivation layer 116 and the contact hole of the first planarization layer 413. The intermediate electrode 439 may be laminated so as to be connected to the source electrode 132, and the data line may also be formed in a multi-layer structure. That is, the data line may have a structure in which a lower layer made of the same material as the source electrode 132 and the drain electrode 133, and an upper layer made of the same material as the intermediate electrode 439 are connected. Therefore, the data line can be implemented in a structure in which two lines are connected to each other in parallel, so that the wiring resistance of the data line can be reduced.

A third electrode 423 of the storage capacitor 420 formed simultaneously with the intermediate electrode 439 is disposed on the additional buffer layer 418. Thus, the storage capacitor 420 includes a first electrode 121, a second electrode 122, and a third electrode 423. The storage capacitor 420 includes a capacitor having the first electrode 121 and the second electrode 122 as both terminals and a capacitor having the second electrode 122 and the third electrode 423 as both terminals. And thus the capacitance of the storage capacitor 420 can be increased.

Further, on the additional buffer layer 418, an additional wiring 440 which is formed simultaneously with the same material as the intermediate electrode 439 is disposed. As the additional wiring 440 is disposed in the first planarization layer 413, the number of wirings 470 for transmitting signals in the active area AA can be more easily ensured.

An additional passivation layer 419 is disposed over the first planarization layer 413 to cover the intermediate electrode 439, the third electrode 423 of the storage capacitor 420, and the additional wiring 440. The additional passivation layer 419 is formed to protect the intermediate electrode 439, the third electrode 423 of the storage capacitor 420 and the additional wiring 440. The additional passivation layer 419 is formed of silicon nitride (SiNx) or silicon oxide ) Or a multilayer of silicon nitride (SiNx) or silicon oxide (SiOx). However, the additional passivation layer 419 is not necessarily a necessary component, and may be omitted depending on the design of the organic light emitting display 400.

A second planarization layer 417 is disposed to planarize the intermediate electrode 439, the third electrode 423 of the storage capacitor 420, and the additional wiring 440. The second planarization layer 417 may have the same function as the planarization layer 113 shown in FIG. 2A, or may be made of the same material. The anode 181 of the organic light emitting diode 180 is connected to the intermediate electrode 439 through the contact holes of the second planarization layer 417 and the additional passivation layer 419 and the thin film transistor 130 may be electrically connected to the source electrode 132 of the pixel electrode.

Referring to FIG. 4A, a first wiring 471 is disposed on a substrate 110 in a bending area BA. More specifically, a buffer layer 111 is disposed on the substrate 110, a first wiring 471 is disposed on the buffer layer 111, and a passivation layer 116 is disposed to surround the first wiring 471. Since the first wiring 471 is substantially the same as the wiring 170 shown in FIG. 2A, the duplicated description will be omitted.

The first planarization layer 413 is disposed on the first wiring 471 and the second wiring 472 is disposed on the first planarization layer 413. [ Specifically, an additional buffer layer 418 is disposed on the first planarization layer 413, a second wiring 472 is disposed on the additional buffer layer 418, and an additional passivation layer 418 is formed to surround the second wiring 472. [ (419). The second wiring 472 may be formed simultaneously with the same material as the intermediate electrode 439 formed in the active area AA. At this time, the second wiring 472 may be arranged so as not to overlap with the first wiring 471. That is, the second wirings 472 may be arranged to correspond to each other between the neighboring first wirings 471.

As described above, since the wiring 470 is arranged in a two-layer structure of the first wiring 471 and the second wiring 472, when the same number of wirings 470 is arranged, the area occupied by the wiring 470 is . Therefore, the area of the non-display area NA can be reduced, and a narrow bezel can also be implemented.

Further, if the area occupied by the wiring 470 is kept the same, the number of wirings 470 for transmitting one signal can be increased. For example, the wiring 470 can be configured such that two first wirings 471 carry one signal and two second wirings 472 carry another signal. See also FIG. 4B for a more detailed description.

4B is a schematic plan view illustrating a wiring structure of an OLED display according to another embodiment of the present invention. 4B, only the wiring 470 including the first wiring 471 and the second wiring 472 is shown for convenience of explanation.

As described above, if the area occupied by the wiring 470 is kept the same, the number of wirings 470 for transmitting one signal can be increased. For example, as shown in FIG. 4B, when two adjacent first wires 471 transmit one signal and two adjacent second wires 472 transmit another signal, The wiring 470 can be constituted. Further, as shown in FIG. 4B, the first wiring 471 and the second wiring 472 may be alternately arranged on a plane.

As described above, the first wiring 471 and the second wiring 472 located in different layers transmit different signals, so that the interval between the first wiring 471 and the second wiring 472 is maximized desirable. That is, as the distance between the first wiring 471 and the second wiring 472 decreases, the possibility of interference with signals transmitted through the first wiring 471 and the second wiring 472 increases, It is preferable that the interval between the first wiring 471 and the second wiring 472 is maximized within a designable range. Thus, the first wiring 471 and the second wiring 472 do not overlap each other, and the second wiring 472 is provided between the neighboring first wirings 471, for example, between the neighboring first wirings 471 471, respectively.

Each of the first wirings 471 and the second wirings 472 may be formed to extend in a direction different from the extending direction of the first wirings 471 and the second wirings 472. 4B, the first wiring 471 and the second wiring 472 extend downward. However, the direction in which the first wiring 471 and the second wiring 472 are actually formed extends in the diagonal direction . This allows the force applied to the first wiring 471 and the second wiring 472 to be dispersed while bending and the buffer layer 111 surrounding the first wiring 471 and the second wiring 472, The force applied to the buffer layer 418, the passivation layer 116, and the additional passivation layer 419 can also be dispersed.

Referring again to FIG. 4A, in the bending area BA, a buffer layer 111 is disposed on the substrate 110, a first wiring 471 is disposed on the buffer layer 111, A passivation layer 116 is disposed to surround. A first planarization layer 413 is disposed on the buffer layer 111 and the wiring 470 and the passivation layer 116. An additional buffer layer 418 and a second wiring 472 are formed on the first planarization layer 413, And an additional passivation layer 419 are disposed. A second planarization layer 417 is also disposed over the first planarization layer 413 to cover the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419. The neutral plane NP is determined in consideration of the thickness, Young's modulus, materials, and the like of the components disposed in the region. In the organic light emitting diode display 400 as shown in FIG. 4A, Layer 413 as shown in FIG. Thus, when the substrate 110 is bent downward, both the buffer layer 111, the first wiring line 471, and the passivation layer 116 disposed under the first planarization layer 413 are subjected to a compressive force, The additional buffer layer 418, the second wiring 472 and the additional passivation layer 419 disposed on the first planarizing layer 413 are subjected to tensile force. It is therefore necessary to optimize the neutral plane NP so that the additional buffer layer 418, the second wirings 472 and the additional passivation layer 419 are also disposed below the neutral plane NP so that the need for designing the organic light emitting display 400 .

5 to 7 are schematic cross-sectional views illustrating an organic light emitting display according to various embodiments of the present invention to which a micro-cover layer is applied. Specifically, Figures 5-7 illustrate various embodiments for optimizing the neutral plane (NP) in the bending area BA. The organic light emitting display devices 500, 600, and 700 shown in FIGS. 5 to 7 are different from the OLED display 400 shown in FIG. 4A in that micro cover layers 550, 650, And therefore, redundant description is omitted.

5, a micro cover layer 550 (see FIG. 5) is formed on the second planarization layer 417 to optimize the neutral plane NP in the bending area BA of the OLED display 500 . The components under the second planarization layer 417 are substantially the same as the components shown in FIG. 4A, and redundant description will be omitted.

As noted above, certain components are more susceptible to cracking when subjected to tensile forces of the same compressive and tensile forces. 5, the buffer layer 111 and the passivation layer 116 surrounding the first wiring 471 and the second wiring 472 as well as the first wiring 471 and the second wiring 472, respectively, ), An additional buffer layer 418 and an additional passivation layer 419 may be disposed below the neutral plane NP. The micro cover layer 550 is disposed on the second planarization layer 417 to arrange the neutral plane NP as described above and the thickness d and the constituent material of the micro cover layer 550 are determined.

First, the thickness d of the micro-cover layer 550 can be determined so that the neutral plane NP is arranged as shown in Fig. The neutral plane NP increases as the thickness d of the micro cover layer 550 disposed on the second planarization layer 417 increases. The thickness d of the micro cover layer 550 is determined such that the thickness d of the micro cover layer 550 has a large value so that the neutral plane NP is disposed on the additional passivation layer 419. [ It is possible. However, if the thickness d of the micro cover layer 550 is excessively large, a problem may occur in the system connection process of the OLED display 500. In addition, if the thickness d of the micro-cover layer 550 is too thin, the neutral plane NP may not be disposed on the additional passivation layer 419. Accordingly, the thickness d of the micro cover layer 550 can be determined in consideration of the above-described matters, and for example, the thickness d of the micro cover layer 550 can be 70 to 120 占 퐉.

Also, in order for the neutral plane NP to be arranged as shown in Fig. 5, the constituent material of the micro cover layer 550 can be determined. The micro-cover layer 550 may be made of an organic material so as to have the thickness described above. In addition, one important factor determining the position of the neutral plane NP is the Young's modulus of the constituent material of the micro cover layer 550. Young's modulus is a value indicating the ductility of a material and is a characteristic characteristic of a material which indicates the degree of resistance to tensile or compression of the material. When the Young's modulus of a specific material is high, the shape is not easily deformed because the tensile is also resistant to compression, and when the Young's modulus of a specific material is low, the shape and strain can be easily deformed because the tensile and compressive resistance are small. When the Young's modulus of the constituent material of the micro-cover layer 550 is large, the position of the neutral plane NP can be raised. Also, if the Young's modulus of the material of the micro cover layer 550 is excessively large, the micro cover layer 550 itself may be cracked during the bending process. Further, if the Young's modulus of the constituent material of the micro-cover layer 550 is too small, the neutral plane NP may not be disposed on the additional passivation layer 419. [ That is, when the Young's modulus of the constituent material of the micro cover layer 550 is too small and the neutral plane NP is disposed under the additional passivation layer 419, the second wiring 472 and the additional buffer layer 418, the additional passivation layer 419, the second wirings 472 and the additional buffer layer 418 are disposed on the neutral plane NP to be subjected to a tensile force and may be cracked. Thus, the material of the microcover layer 550 is formed to have a Young's modulus such that the microcover layer 550 is not broken due to an increase in the Young's modulus while the neutral plane NP is disposed on the additional passivation layer 419 And the micro-cover layer 550 can be made of a material having a Young's modulus of 0.3 GPa to 0.85 GPa. That is, the micro cover layer 550 can be formed of a material having a relatively high Young's modulus. For example, the micro cover layer 550 may be made of an acrylic material and may be made of urethane acrylate.

If the thickness d of the micro cover layer 550 and the constituent materials are adjusted as described above and the neutral plane NP is disposed on the additional passivation layer 419 as shown in Fig. 5, The buffer layer 111 made of an inorganic material, the additional buffer layer 418, the passivation layer 116 and the additional passivation layer 419 as well as the second wiring 471 and the second wiring 472 are arranged below the neutral plane NP. As a result, both the first wiring 471, the second wiring 472, the buffer layer 111, the additional buffer layer 418, the passivation layer 116, and the additional passivation layer 419 are subjected to a compressive force at the time of bending, The generation of cracks in the first wiring 471, the second wiring 472, the buffer layer 111, the additional buffer layer 418, the passivation layer 116, and the additional passivation layer 419 can be reduced.

6, the organic light emitting diode display 600 is configured such that the neutral plane NP is disposed in one of the additional buffer layer 418, the second wiring line 472, and the additional passivation layer 419. In this case, The thickness of the layer 650 and the constituent material may be determined.

As described above, certain components are more susceptible to cracking when they are subjected to the same compressive force and tensile force. Therefore, the thickness and the constituent material of the micro-cover layer 650 can be determined so that all the components vulnerable to cracks are subjected to a compressive force as shown in FIG. However, the thickness and the constituent material of each of the components of the organic light emitting diode display device 600 may cause the buffer layer 111, the first wiring line 471, and the passivation layer 116, which are relatively far from the neutral plane NP, The buffer layer 111, the first wiring 471, and the passivation layer 116 may be cracked. In this case, the thickness and constituent material of the micro-cover layer 650 may be changed to lower the position of the neutral plane NP.

6, since the neutral plane NP is a surface that is not stressed at the time of bending because the compressive force and the tensile force are the same, When the thickness of the cover layer 650 and the constituent material are determined, the second wiring 472 may not be stressed. Further, when the thickness and the constituent material of the micro cover layer 650 are determined such that the neutral plane NP is disposed in the additional buffer layer 418 made of an inorganic material or the additional passivation layer 419, the additional buffer layer 418, The layer 419 may not be stressed.

7, the thickness and constituent material of the micro-cover layer 750 may be determined such that the neutral plane NP is disposed in the first planarization layer 413 in the organic light emitting diode display 700. [

As described above, certain components are more susceptible to cracking when they are subjected to the same compressive force and tensile force. Accordingly, the thickness and constituent material of the micro-cover layer 750 can be determined so that all of the components vulnerable to cracks are subjected to compressive force as shown in FIG. However, the thickness of the respective components of the organic light emitting diode display device 700 and the size of the buffer layer 111, the first wiring line 471, and the passivation layer 116, which are relatively far from the neutral plane NP, The buffer layer 111, the first wiring 471, and the passivation layer 116 may be cracked. In this case, the thickness and constituent material of the micro-cover layer 750 may be changed to lower the position of the neutral plane NP. 6, the neutral plane NP may be disposed in any one of the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419 A compressive force of a considerable size may be applied to the buffer layer 111, the first wiring line 471, and the passivation layer 116 as well.

Thus, the thickness and the constituent material of the micro-cover layer 750 may be determined so that the neutral plane NP is disposed at a lower portion and disposed in the first planarization layer 413 as shown in FIG. However, when the neutral plane NP is disposed in the first planarization layer 413, an additional buffer layer 418, a second wiring 472, and an additional passivation layer 419 are disposed on the neutral plane NP, Tensile force is applied when bending. Thus, it may be desirable to arrange the neutral plane NP as close to the additional buffer layer 418, the second wiring 472 and the additional passivation layer 419 as possible.

8A is a schematic cross-sectional view illustrating an OLED display according to another embodiment of the present invention. The organic light emitting diode display 800 shown in FIG. 8A is different from the organic light emitting display 400 shown in FIG. 4A in that a spacer 809 is added, the organic light emitting diode 880 is changed, Except that the spacer 809 and the bank 114 are additionally disposed on the substrate 100. Therefore, redundant description will be omitted. In FIG. 8A, the micro cover layer 850 disposed in the bending area BA is not shown, and the micro cover layer 850 will be described in detail with reference to FIG. 8B.

8A, banks 114 are disposed on the anode 181 and the second planarization layer 417 in the active area AA. The bank 114 defines a pixel region in a manner that distinguishes adjacent pixel regions in the active region AA. Also, the bank 114 is disposed on the second planarization layer 417 in the bending area BA.

Referring to FIG. 8A, a spacer 809 is disposed on the bank 114 in the active area AA. The spacer 809 may be formed by contacting a fine metal mask (FMM) used to form an organic light emitting layer of the organic light emitting diode 880 directly to the bank 114 or the anode 181 Damage to the organic light emitting element 880 can be prevented. Further, a spacer 809 is disposed on the bank 114 in the bending area BA. The spacer 809 may be made of the same material as the bank 114, but may be made of a different insulating material than the bank 114, but is not limited thereto.

8A, the organic layer 882 of the organic light emitting diode 880 may be formed only in the region on the eyelid 181 opened by the bank 114, not on the front surface of the substrate 110. [ Here, the organic layer 882 may include one of a red organic light emitting layer, a green organic light emitting layer, and a blue organic light emitting layer as an organic layer for emitting light of a specific color. The organic layer 882 may be formed in such a manner that the organic material is deposited while the fine metal mask is disposed on the spacer 809 as described above. 8A, the organic layer 882 may include various organic layers such as a hole transporting layer, a hole injecting layer, an electron injecting layer, and an electron transporting layer in addition to the organic light emitting layer. One or more layers of the hole transporting layer, the hole injecting layer, the electron injecting layer, and the electron transporting layer may be formed over the entire surface of the substrate 110.

In the OLED display 800 according to another embodiment of the present invention, as shown in FIG. 8A, the bank 114 and the spacer 809 are arranged in the bending area BA, The neutral plane NP can be further raised. Therefore, the buffer layer 111, the first wiring 471, the passivation layer 116, the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419, which are disposed in the bending area BA, The stress can be reduced. See also FIG. 8B for a more detailed description.

8B is a schematic cross-sectional view illustrating an OLED display according to another embodiment of the present invention. In FIG. 8B, a micro cover layer 850 omitted in the organic light emitting display 800 shown in FIG. 8A is added.

8B, a bank 114 is disposed on the second planarization layer 417 in the bending area BA, a spacer 809 is disposed on the bank 114, and a micro- A cover layer 850 is disposed. In other words, as compared with the organic light emitting display devices 500, 600 and 700 shown in FIGS. 5 to 7, the bank 114 and the spacers 809 are provided between the second planarization layer 417 and the micro cover layer 850, . Accordingly, since layers are additionally disposed on the buffer layer 111, the first wiring 471, the passivation layer 116, the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419, NP) may be positioned higher than the organic light emitting display devices 500, 600, and 700 shown in FIGS.

As described above, the buffer layer 111, the first wiring 471, the passivation layer 116, the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419, which are disposed in the bending area BA, Are more susceptible to cracking when subjected to tensile force among the same compressive force and tensile force. Therefore, the buffer layer 111, the first wiring 471, the passivation layer 116, the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419, which are disposed in the bending area BA, It is important to set the position of the neutral plane NP so that it is located in the area where the neutral plane NP is received. Accordingly, in the OLED display 800 according to another embodiment of the present invention, the bank 114 and the spacer disposed in the active area AA are also disposed in the bending area BA to perform additional deposition and etching processes The buffer layer 111, the first wiring 471, the passivation layer 116, the additional buffer layer 418, the second wiring 472, and the additional passivation layer 419 by bending The applied tensile force can be minimized.

8A and 8B, the bank 114 and the spacer 809 are described as being separate components. However, the bank 114 and the spacer 809 may be integrally formed. That is, in the active area AA, the bank 114 may be formed in a shape having an upward protruding portion, wherein the protruding portion protruding upward may have the same shape as the spacer 809, no.

8A and 8B both the bank 114 and the spacer 809 are shown to be disposed in the bending area BA but only one of the bank 114 and the spacer 809 is shown in the bending area BA, And may be disposed between the planarization layer 417 and the micro-cover layer 850.

FIG. 9 is a schematic cross-sectional view illustrating a structure of the organic light emitting display shown in FIG. 5 in a final bending state. FIG. 9 shows a final bending structure of the OLED display 500 shown in FIG. In FIG. 9, only the micro-cover layer 550 among various components disposed on the substrate 110 is shown for convenience of explanation.

A barrier film (501) is disposed on the substrate (110). The barrier film 501 may be arranged to correspond to at least the active area AA of the organic light emitting display 500 as a structure for protecting various components of the organic light emitting display 500. The barrier film 501 may be made of a material having adhesiveness and serve to fix the polarizing plate 502 on the barrier film 501. The micro cover layer 550 may be formed so as to cover one side of the barrier film 501.

A back plate 503 is disposed under the substrate 110. As described above, in the case where the substrate 110 is made of a plastic material such as polyimide (PI), the manufacturing process of the organic light emitting display 500 is performed in a state where a support substrate made of glass is disposed under the substrate 110 And the supporting substrate may be released after the manufacturing process of the OLED display 500 is completed. However, a back plate 503 for supporting the substrate 110 may be disposed under the substrate 110, since a component for supporting the substrate 110 is required even after the supporting substrate is released. The back plate 503 may be disposed adjacent to the bending area BA in another area of the substrate 110 except for the bending area BA. The back plate 503 may be made of a plastic film formed of polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), other suitable polymers, a combination of these polymers, and the like.

A support member 505 is disposed between the two back plates 503 and the support member 505 can be bonded to the back plate 503 by the adhesive layer 504. [ The support member 505 may be formed of a plastic material such as polycarbonate (PC), polyimide (PI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), other suitable polymers, . The strength of the support member 505 formed of such plastic materials may be controlled by providing additives to increase the thickness and / or strength of the support member 505. [ The support member 505 may be formed with a desired color (e.g., black, white, etc.). Further, the support member 505 may be formed of glass, ceramic, metal or other rigid materials or combinations of the above-described materials.

The COF 506 may be disposed on the pad 195 disposed on one side of the substrate 110, as described above with reference to FIG. Various IC chips may be arranged in the COF 506. Further, the micro cover layer 550 may be disposed so as to cover one side of the COF 506.

An organic light emitting display according to various embodiments of the present invention can be described as follows.

The organic light emitting display includes a substrate on which an active region and a bending region are defined, a thin film transistor disposed on the substrate in the active region, a first wiring disposed on the substrate in the bending region, a first wiring disposed on the thin film transistor in the active region, A second wiring disposed on the first planarization layer in the bending region, a second wiring disposed on the first planarization layer in the active region, and a second planarization layer disposed on the first planarization layer in the bending region, An organic light emitting device disposed on the second planarization layer in the active region, and a micro-cover layer disposed on the second planarization layer in the bending region, the second planarization layer disposed on the wiring.

According to another aspect of the present invention, the micro-cover layer can be configured to minimize the stress experienced by the first wiring and the second wiring by bending the bending region.

According to another aspect of the present invention, the micro-cover layer may be configured such that, when the bending region is bent, the neutral plane is disposed on the first wiring and the second wiring.

According to still another aspect of the present invention, the micro-cover layer may be configured such that, when the bending region is bent, the neutral plane is disposed in the second wiring.

According to another aspect of the present invention, the micro-cover layer can be configured such that, when the bending region is bent, the neutral plane is disposed between the first wiring and the second wiring.

According to another aspect of the present invention, the thickness of the micro-cover layer and the Young's modulus of the constituent material can be adjusted to minimize the stress applied to the first wiring and the second wiring.

According to another aspect of the present invention, there are a plurality of first wirings and second wirings, respectively, and the first wirings and the second wirings may be alternately arranged when viewed in a plan view.

According to another aspect of the present invention, an organic light emitting display includes an intermediate electrode disposed on a first planarization layer and electrically connecting an anode and a thin film transistor of the organic light emitting diode, And may be made of the same material.

According to another aspect of the present invention, an organic light emitting display device is disposed on a first planarization layer, and further includes an additional wiring for transferring a signal to the thin film transistor, wherein the additional wiring is made of the same material as the second wiring have.

According to another aspect of the present invention, an OLED display includes a storage capacitor having a first electrode formed of the same material as the gate electrode of the thin film transistor, and a second electrode formed of the same material as the source electrode and the drain electrode of the TFT, .

According to another aspect of the present invention, a storage capacitor further includes a third electrode disposed on the first planarization layer and made of the same material as the second wiring, and the storage capacitor includes a first electrode and a second electrode, And a capacitor having a second electrode and a third electrode as both terminals may be connected in parallel to each other.

According to another aspect of the present invention, the first wiring may be made of the same material as the gate electrode or the source electrode and the drain electrode of the thin film transistor.

According to another aspect of the present invention, a buffer layer made of an inorganic material is disposed under each of the first wiring and the second wiring, a passivation layer made of an inorganic material is disposed on the upper and side portions of the first wiring and the second wiring, Each of the first wiring and the second wiring may be surrounded by a buffer layer and a passivation layer.

According to another aspect of the present invention, an organic light emitting display further comprises a bank disposed on the second planarization layer in the active region, and a spacer disposed on the bank in the active region, wherein at least one of the bank and the spacer includes a bending region And a second planarization layer disposed on the second planarization layer.

According to another aspect of the present invention, the organic light emitting display further includes a bank disposed on the second planarization layer in the active region and the bending region, and the bank disposed in the active region may include a protruding portion projecting upwardly have.

According to another aspect of the present invention, the organic light emitting device may include one of a red organic light emitting layer, a green organic light emitting layer, and a blue organic light emitting layer.

Although the embodiments of the present invention have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to those embodiments and various changes and modifications may be made without departing from the scope of the present invention. . Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

110: substrate
111: buffer layer
112: gate insulating layer
113: planarization layer
413: first planarization layer
114: bank
115: interlayer insulating layer
116: Passivation layer
417: second planarization layer '
418: additional buffer layer
419: Additional passivation layer
809: Spacer
120, 420: storage capacitor
121: first electrode
122: second electrode
423: Third electrode
130: thin film transistor
131: active layer
132: source electrode
133: drain electrode
134: gate electrode
SA: source region
DA: drain region
CA: Channel area
439: intermediate electrode
440: Additional wiring
550, 650, 750, 850: Micro cover layer
170, 470: Wiring
471: first wiring
472: second wiring
180, 880: Organic light emitting element
181: anode
182, 882: organic layer
183: Cathode
190: Gate driver
195: Pad
501: barrier film
502: polarizer
503: back plate
504:
505: Support member
506: COF
100, 400, 500, 600, 700, 800: organic light emitting display
AA: active area
NA: non-display area
BA: Bending area
SL: scan line
NP: Neutral side
M: Support layer
L1: first layer
L2: Second layer

Claims (16)

A substrate on which an active region and a bending region are defined;
A thin film transistor disposed on the substrate in the active region;
A first wiring disposed on the substrate in the bending region;
A first planarization layer disposed on the thin film transistor in the active region and disposed on the first wiring in the bending region;
A second wiring disposed on the first planarization layer in the bending region;
A second planarization layer disposed on the first planarization layer in the active region and disposed on the first planarization layer and the second wiring in the bending region;
An organic light emitting diode disposed on the second planarization layer in the active region; And
And a micro-cover layer disposed on the second planarization layer in the bending region. The method according to claim 1,
Wherein the micro-cover layer is configured to minimize stress applied to the first wiring and the second wiring by bending of the bending region. The method according to claim 1,
Wherein the micro cover layer is configured such that a neutral plane is disposed on the first wiring and the second wiring when the bending region is bent. The method according to claim 1,
Wherein the micro cover layer is configured such that a neutral plane is disposed in the second wiring when bending the bending region. The method according to claim 1,
Wherein the micro cover layer is configured such that a neutral plane is disposed between the first wiring and the second wiring when bending the bending region. 6. The method according to any one of claims 2 to 5,
Wherein a stress applied to the first wiring and the second wiring is minimized by adjusting a thickness of the micro cover layer and a Young's modulus of the constituent material. The method according to claim 1,
Each of the first wiring and the second wiring is a plurality of,
Wherein the first wiring and the second wiring are alternately arranged when viewed in a plan view. The method according to claim 1,
Further comprising an intermediate electrode disposed on the first planarization layer and electrically connecting the anode of the organic light emitting diode and the thin film transistor,
And the intermediate electrode is made of the same material as the second wiring. The method according to claim 1,
Further comprising an additional wiring disposed on the first planarization layer for transferring a signal to the thin film transistor,
Wherein the additional wiring is made of the same material as the second wiring. The method according to claim 1,
And a storage capacitor having a first electrode made of the same material as the gate electrode of the thin film transistor and a second electrode made of the same material as the source electrode and the drain electrode of the thin film transistor. 11. The method of claim 10,
The storage capacitor further comprises a third electrode disposed on the first planarization layer and made of the same material as the second wiring,
Wherein the storage capacitor comprises a capacitor having the first electrode and the second electrode as both terminals, and a capacitor having the second electrode and the third electrode as both terminals are connected in parallel to each other. The method according to claim 1,
Wherein the first wiring is made of the same material as the gate electrode or the source electrode and the drain electrode of the thin film transistor. The method according to claim 1,
A buffer layer made of an inorganic material is disposed under each of the first wiring and the second wiring,
A passivation layer made of an inorganic material is disposed on upper and side portions of each of the first wiring and the second wiring,
Wherein each of the first wiring and the second wiring is surrounded by the buffer layer and the passivation layer. The method according to claim 1,
A bank disposed on the second planarization layer in the active region; And
Further comprising a spacer disposed on the bank in the active region,
Wherein at least one of the bank and the spacer is disposed on the second planarization layer in the bending region. The method according to claim 1,
Further comprising: a bank disposed on the second planarization layer in the active region and the bending region,
Wherein the bank disposed in the active region includes a protruding portion protruding upward. 16. The method according to any one of claims 14 and 15,
Wherein the organic light emitting device comprises one of a red organic light emitting layer, a green organic light emitting layer, and a blue organic light emitting layer.

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