KR20180037666A - Solar cell and solar cell panel including the same - Google Patents

Solar cell and solar cell panel including the same Download PDF

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Publication number
KR20180037666A
KR20180037666A KR1020160128103A KR20160128103A KR20180037666A KR 20180037666 A KR20180037666 A KR 20180037666A KR 1020160128103 A KR1020160128103 A KR 1020160128103A KR 20160128103 A KR20160128103 A KR 20160128103A KR 20180037666 A KR20180037666 A KR 20180037666A
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South Korea
Prior art keywords
pad
outer pad
solar cell
semiconductor substrate
bus bar
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KR1020160128103A
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Korean (ko)
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KR101890288B1 (en
Inventor
조윤희
송원두
김영준
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엘지전자 주식회사
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Priority to KR1020160128103A priority Critical patent/KR101890288B1/en
Priority to US15/711,530 priority patent/US11462652B2/en
Priority to EP17192609.0A priority patent/EP3300123B1/en
Priority to JP2017184404A priority patent/JP6818670B2/en
Priority to CN201710880148.2A priority patent/CN107871788B/en
Publication of KR20180037666A publication Critical patent/KR20180037666A/en
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Publication of KR101890288B1 publication Critical patent/KR101890288B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/02002—Arrangements for conducting electric current to or from the device in operations
    • H01L31/02005—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier
    • H01L31/02008—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules
    • H01L31/0201—Arrangements for conducting electric current to or from the device in operations for device characterised by at least one potential jump barrier or surface barrier for solar cells or solar cell modules comprising specially adapted module bus-bar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

According to an embodiment of the present invention, a solar cell comprises: a semiconductor substrate; a first conductive-type area which is located on one side of the semiconductor substrate; a second conductive-type area which is located on the other side of the semiconductor substrate; a first electrode which is electrically connected to the first conductive-type area on the one side of the semiconductor substrate; and a second electrode which is electrically connected to the second conductive area on the other side of the semiconductor substrate. The first electrode comprises a plurality of finger lines, which are located in a first direction and are in parallel with each other, and a first bus bar which is electrically connected to the first finger lines, is located in a second direction crossing the first direction and comprises a first outer pad and a first inner pad. The second electrode comprises a second bus bar, which is located in a location corresponding to the first bus bar in the second direction, and a plurality of second pad units comprising a second outer pad and a second inner pad. The first and second outer pads, located near an edge of the semiconductor substrate, are located in different locations. The present invention is to provide the solar cell having increased output and reliability.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a solar cell,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell and a solar cell panel including the solar cell, and more particularly, to a solar cell having improved electrode structure and a solar cell panel including the same.

With the recent depletion of existing energy sources such as oil and coal, interest in alternative energy to replace them is increasing. Among them, solar cells are attracting attention as a next-generation battery that converts solar energy into electric energy.

A plurality of such solar cells are connected in series or in parallel by a ribbon, and are manufactured in the form of a solar cell panel by a packaging process for protecting a plurality of solar cells. Solar panels require long-term reliability because they must be developed for a long time in various environments. At this time, conventionally, a plurality of solar cells are connected by a ribbon.

However, if a solar cell is connected using a ribbon having a large width of about 1.5 mm, since the large width of the ribbon may cause light loss, it is necessary to reduce the number of ribbons disposed in the solar cell. On the other hand, if the number of the ribbons is increased in order to reduce the movement distance of the carrier, the resistance is lowered, but the output may be largely lowered due to the shading loss. Therefore, a wiring material having a width smaller than that of the ribbon can be used in a larger number than the ribbon. Thermal stress may then occur at the boundary between the portions where a large number of wiring materials are attached and the portions where no wiring material is attached. Particularly, the boundary between the portion where the wiring material is attached and the portion where the wiring material is not adhered is located equally on both sides of the semiconductor substrate, whereby thermal stress can be concentrated. If heat stress is concentrated, cracks may occur in the solar cell or the characteristics of the solar cell may be deteriorated, and reliability of the solar cell panel may be deteriorated.

The present invention provides a solar cell and a solar cell panel capable of improving the output and reliability of the solar cell panel.

A solar cell according to an embodiment of the present invention includes: a semiconductor substrate; A first conductive type region located on one side of the semiconductor substrate or on one side of the semiconductor substrate; A second conductive type region located on the other surface of the semiconductor substrate or on the other surface of the semiconductor substrate; A first electrode electrically connected to the first conductive type region on one side of the semiconductor substrate; And a second electrode electrically connected to the second conductive type region on the other side of the semiconductor substrate. Wherein the first electrode comprises a plurality of first finger lines located in a first direction and parallel to each other and a second outer pad located in a second direction that is electrically connected to the first finger line and intersects the first direction, And a first bus bar including a plurality of first pad portions including a first inner pad. The second electrode includes a second bus bar including a plurality of second pad portions located in the second direction at a position corresponding to the first bus bar and including a second outer pad and a second inner pad. The first and second outer pads located near the edge of the semiconductor substrate are located at different positions.

A solar cell panel according to an embodiment of the present invention includes a plurality of solar cells including first and second solar cells positioned at least adjacent to each other; And a plurality of wiring members connecting the first solar cell and the second solar cell and including rounded portions. The plurality of solar cells have the above-described structure.

According to this embodiment, since the positions of the first and second outer pads located at the positions corresponding to or adjacent to each other on both sides of the solar cell are made different from each other, the boundary portion with the wiring material is dispersed to reduce and disperse the thermal stress have. Particularly, in the structure in which the wiring material having a narrow width is widely used as in the present embodiment, the effect of reducing and dispersing the thermal stress can be further enhanced. Thus, cracking of the solar cell can be prevented and reliability of the solar cell panel can be improved.

1 is a perspective view illustrating a solar cell panel according to an embodiment of the present invention.
2 is a cross-sectional view taken along the line II-II in FIG.
3, a solar cell included in a solar cell panel according to an embodiment of the present invention and wiring materials connected thereto will be described in more detail.
FIG. 4 is a perspective view schematically showing a first solar cell and a second solar cell included in the solar cell panel shown in FIG. 1 and connected by a wiring material.
5 is a front plan view of the solar cell shown in FIG.
FIG. 6A is a partial front plan view showing a state in which a wiring material is attached to part A in FIG. 5, and FIG. 6B is a partial rear plan view showing a state in which wiring material is attached to part A in FIG. to be.
7 is a cross-sectional view schematically showing a state in which a wiring material is attached to a solar cell along a line VII-VII in FIG.
8 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention.
9 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention.
10 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention.
11 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention.
12 is a front plan view of a solar cell according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, it is needless to say that the present invention is not limited to these embodiments and can be modified into various forms.

In the drawings, the same reference numerals are used for the same or similar parts throughout the specification. In the drawings, the thickness, the width, and the like are enlarged or reduced in order to make the description more clear, and the thickness, width, etc. of the present invention are not limited to those shown in the drawings.

Wherever certain parts of the specification are referred to as "comprising ", the description does not exclude other parts and may include other parts, unless specifically stated otherwise. Also, when a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it also includes the case where another portion is located in the middle as well as the other portion. When a portion of a layer, film, region, plate, or the like is referred to as being "directly on" another portion, it means that no other portion is located in the middle.

Hereinafter, a solar cell and a solar cell panel according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a perspective view showing a solar cell panel according to an embodiment of the present invention, and FIG. 2 is a sectional view cut along a line II-II in FIG.

1 and 2, the solar cell panel 100 according to the present embodiment includes a plurality of solar cells 150 and a wiring material 142 for electrically connecting the plurality of solar cells 150. The solar cell panel 100 includes a sealing member 130 that surrounds and seals a plurality of solar cells 150 and a wiring member 142 that connects the solar cells 150 and a front surface 130 that is positioned on the front surface of the solar cell 150 on the sealing member 130. [ A substrate 110 and a rear substrate 120 positioned on the back surface of the solar cell 150 on the sealing member 130. This will be explained in more detail.

First, the solar cell 150 may include a photoelectric conversion unit that converts the solar cell into electric energy, and an electrode that is electrically connected to the photoelectric conversion unit and collects and transfers a current. The plurality of solar cells 150 may be electrically connected in series, parallel, or series-parallel by the wiring member 142. Specifically, the wiring material 142 electrically connects two neighboring solar cells 150 among the plurality of solar cells 150.

The bus ribbons 145 are connected by the wiring members 142 to connect both ends of the wiring material 142 of the solar cell 150 (that is, the solar cell string) forming one row alternately. The bus ribbon 145 may be disposed at an end of the solar cell string and in a direction intersecting the end. These bus ribbons 145 may connect solar cell strings adjacent to each other, or may connect solar cell strings or solar cell strings to a junction box (not shown) that prevents current flow backward. The material, shape, connection structure, etc. of the bus ribbon 145 can be variously modified, and the present invention is not limited thereto.

The sealing material 130 includes a first sealing material 131 located on the front surface of the solar cell 150 connected by the wiring material 142 and a second sealing material 132 located on the rear surface of the solar cell 150 . The first sealing material 131 and the second sealing material 132 prevent moisture and oxygen from entering and chemically bind each element of the solar cell panel 100. The first and second sealing members 131 and 132 may be made of an insulating material having translucency and adhesiveness. For example, an ethylene-vinyl acetate copolymer resin (EVA), a polyvinyl butyral, a silicon resin, an ester-based resin, an olefin-based resin, or the like may be used for the first sealant 131 and the second sealant 132. The rear substrate 120, the second sealing material 132, the solar cell 150, the first sealing material 131 and the front substrate 110 are integrated by a lamination process using the first and second sealing materials 131 and 132, So that the solar cell panel 100 can be constructed.

The front substrate 110 is disposed on the first sealing material 131 to constitute the front surface of the solar cell panel 100 and the rear substrate 120 is disposed on the second sealing material 132 to form the front surface of the solar cell 150. [ Configure the rear. The front substrate 110 and the rear substrate 120 may be formed of an insulating material capable of protecting the solar cell 150 from external shock, moisture, ultraviolet rays, or the like. The front substrate 110 may be made of a light transmissive material through which light can be transmitted, and the rear substrate 120 may be made of a light transmissive material, a non-transmissive material, or a reflective material. For example, the front substrate 110 may be a glass substrate or the like, and the rear substrate 120 may be a film or a sheet. The back substrate 120 may have a TPD (Tedlar / PET / Tedlar) type or a polyvinylidene fluoride (PVDF) formed on at least one side of a base film (for example, polyethylene terephthalate (PET) And may include a resin layer.

However, the present invention is not limited thereto. Accordingly, the first and second sealing materials 131 and 132, the front substrate 110, and the rear substrate 120 may include various materials other than those described above, and may have various shapes. For example, the front substrate 110 or the back substrate 120 may have various shapes (e.g., substrate, film, sheet, etc.) or materials.

3, a solar cell included in a solar cell panel according to an embodiment of the present invention and wiring materials connected thereto will be described in more detail.

3 is a partial cross-sectional view illustrating an example of a solar cell included in the solar cell panel of FIG. 1 and a wiring material connected thereto.

3, the solar cell 150 includes a semiconductor substrate 160, a first conductive type region 20 formed on one surface of the semiconductor substrate 160 or on one surface of the semiconductor substrate 160, A second conductive type region 30 formed on the other surface of the substrate 160 or on the other surface of the semiconductor substrate 160, a first electrode 42 connected to the first conductive type region 20, And a second electrode (44) connected to the region (30). The first and second passivation films 22 and 32, the antireflection film 24, and the like.

The semiconductor substrate 160 may include a base region 110 having a first or second conductivity type including a first or a second conductivity type dopant at a relatively low doping concentration. As an example, the base region 110 may have a second conductivity type. The base region 110 may be comprised of a single crystalline semiconductor (e.g., a single single crystal or polycrystalline semiconductor, such as single crystal or polycrystalline silicon, particularly monocrystalline silicon) comprising a first or second conductivity type dopant. The solar cell 150 based on the base region 110 or the semiconductor substrate 160 having a high degree of crystallinity and having few defects is excellent in electrical characteristics.

An anti-reflection structure capable of minimizing reflection can be formed on the front surface and the rear surface of the semiconductor substrate 160. For example, a texturing structure having a concavo-convex shape in the form of a pyramid or the like may be provided as an antireflection structure. The texturing structure formed on the semiconductor substrate 160 may have a certain shape (e.g., a pyramid shape) having an outer surface formed along a specific crystal plane (e.g., (111) plane) of the semiconductor. When the surface roughness of the semiconductor substrate 160 is increased due to such texturing, the reflectance of the light incident into the semiconductor substrate 160 may be reduced to minimize the loss of light. However, the present invention is not limited thereto. A texturing structure may be formed on only one side of the semiconductor substrate 160, or a texturing structure may not be formed on the front and back sides of the semiconductor substrate 160.

A first conductive type region 20 having a first conductive type may be formed on one side (e.g., a front side) of the semiconductor substrate 160. A second conductivity type region 30 having a second conductivity type may be formed on the rear surface of the semiconductor substrate 160. The first and second conductivity type regions 20 and 30 may have a different conductivity type than the base region 110 or may have a higher doping concentration than the base region 110 when the first and second conductivity type regions 20 and 30 have the same conductivity type as the base region 110 I have.

In the figure, the first and second conductivity type regions 20 and 30 are constituted by a doped region constituting a part of the semiconductor substrate 160 as an example. In this case, the first conductive type region 20 may be composed of a crystalline semiconductor (for example, a single crystal or a polycrystalline semiconductor, for example, single crystal or polycrystalline silicon, particularly monocrystalline silicon) including the first conductive type dopant. And the second conductivity type region 30 may be composed of a crystalline semiconductor (e.g., a single crystal or a polycrystalline semiconductor, for example, a single crystal or a polycrystalline silicon, particularly, a single crystal silicon) including a second conductive type dopant. When the first and second conductivity type regions 20 and 30 are formed as a part of the semiconductor substrate 160, the junction characteristics with the base region 110 can be improved.

However, the present invention is not limited thereto, and at least one of the first and second conductivity type regions 20 and 30 may be formed separately from the semiconductor substrate 160 on the semiconductor substrate 160. In this case, a semiconductor layer (for example, an amorphous semiconductor layer, an amorphous semiconductor layer, or the like) having a crystal structure different from that of the semiconductor substrate 160 is formed so that the first or second conductivity type regions 20 and 30 can be easily formed on the semiconductor substrate 160. A microcrystalline semiconductor layer, or a polycrystalline semiconductor layer, for example, an amorphous silicon layer, a microcrystalline silicon layer, or a polycrystalline silicon layer).

One of the first and second conductivity type regions 20 and 30, which has a conductivity type different from that of the base region 110, constitutes at least a part of the emitter region. The emitter region forms a pn junction with the base region 110 to produce a carrier by photoelectric conversion. The other of the first and second conductivity type regions 20 and 30 having the same conductivity type as the base region 110 constitutes at least a part of a surface field region. The electric field region forms an electric field that prevents carriers from being lost by recombination at the surface of the semiconductor substrate 160. [ For example, in this embodiment, the base region 110 has the second conductivity type, the first conductivity type region 20 forms the emitter region, the second conductivity type region 30 is the back electric field region back surface field). However, the present invention is not limited thereto.

In the figure, the first and second conductive regions 20 and 30 are formed as a whole and have a homogeneous structure having a uniform doping concentration. Thereby forming a sufficient area and can be manufactured by a simple process. However, the present invention is not limited thereto. Thus, the first conductive type region 20 may be a uniform structure or a selective structure, and the second conductive type region 30 may be a uniform structure, an optional structure, or a local structure . The selective structure has a high doping concentration, a large junction depth, and a low resistance in a portion adjacent to the first or second electrode 42 or 44 in the first or second conductivity type region 20 or 30, Doping concentration, small junction depth, and high resistance. In the local structure, the second conductivity type region 300 may be formed locally only at a portion where the second electrode 44 is located.

For example, in this embodiment, the base region 110 and the second conductivity type region 30 may have an n-type and the first conductivity type region 20 may have a p-type. Then, the base region 110 and the first conductivity type region 20 form a pn junction. When the pn junction is irradiated with light, electrons generated by the photoelectric effect move toward the rear surface of the semiconductor substrate 160 and are collected by the second electrode 44, and the holes move toward the front surface of the semiconductor substrate 160, 1 electrode 42. In this case, Thereby, electric energy is generated. Then, holes having a slower moving speed than electrons may move to the front surface of the semiconductor substrate 160, rather than the rear surface thereof, thereby improving the efficiency. However, the present invention is not limited thereto, and it is also possible that the base region 110 and the second conductivity type region 30 have a p-type and the first conductivity type region 20 has an n-type.

The first and second passivation films 22 and 32 and the anti-reflection film 24 may be formed on the surface of the semiconductor substrate 160. More specifically, a re-passivation film 22 is formed (e.g., contacted) on the front surface of the semiconductor substrate 160, more precisely on the first conductive region 20 formed in the semiconductor substrate 160, An antireflection film 24 may be formed (e.g., in contact) on the first passivation film 22. The second passivation film 32 may be formed on the rear surface of the semiconductor substrate 160 and more precisely on the second conductive type region 30 formed on the semiconductor substrate 160. [

The first passivation film 22 and the antireflection film 24 are substantially formed on the semiconductor substrate 160 except for the portion corresponding to the first electrode 42 (more precisely, the portion where the first opening portion 102 is formed) Can be formed on the entire front surface. Similarly, the second passivation film 32 is formed on the entire rear surface of the semiconductor substrate 160 except the portion corresponding to the second electrode 44 (more precisely, the portion where the second opening 104 is formed) .

The first passivation film 22 or the second passivation film 32 is formed in contact with the semiconductor substrate 160 to passivate defects present in the front surface or bulk of the semiconductor substrate 160. Accordingly, it is possible to increase the open-circuit voltage of the solar cell 150 by removing recombination sites of the minority carriers. The antireflection film 24 reduces the reflectance of light incident on the front surface of the semiconductor substrate 160, thereby increasing the amount of light reaching the pn junction. Accordingly, the short circuit current Isc of the solar cell 150 can be increased.

The first passivation film 22, the antireflection film 24, and the second passivation film 32 may be formed of various materials. In one example, the first passivation film 22, the anti-reflection film 24 or the passivation film 32 is a silicon nitride film, a silicon nitride film containing hydrogen, silicon oxide, silicon nitride oxide, aluminum oxide film, a silicon carbide film, MgF 2, ZnS , TiO 2, and CeO 2 , or a multi-layer structure in which two or more films are combined.

For example, in the present embodiment, the first passivation film 22 and / or the antireflection film 24 and the second passivation film 32 may not have a dopant or the like so as to have excellent insulating properties, passivation properties, and the like . However, the present invention is not limited thereto.

The first electrode 42 is formed by filling at least a portion of the first opening 102 and is electrically connected to the first conductive region 20 2 opening portion 104 and is electrically connected to (e.g., formed in contact with) the second conductive type region 30. [0050] The first and second electrodes 42 and 44 are made of various conductive materials (for example, metal) and may have various shapes. The shape of the first and second electrodes 42 and 44 will be described later.

As described above, in this embodiment, the first and second electrodes 42 and 44 of the solar cell 150 have a predetermined pattern, so that the solar cell 150 can receive light from the front and back surfaces of the semiconductor substrate 160 It has a bi-facial structure. Accordingly, the amount of light used in the solar cell 150 can be increased to contribute to the efficiency improvement of the solar cell 150.

However, the present invention is not limited thereto, and it is also possible that the second electrode 44 is formed entirely on the rear side of the semiconductor substrate 160. It is also possible that the first and second conductivity type regions 20 and 30 and the first and second electrodes 42 and 44 are located on one side (for example, the rear side) of the semiconductor substrate 160, It is also possible that at least one of the first and second conductivity type regions 20 and 30 is formed over both sides of the semiconductor substrate 160. That is, the solar cell 150 described above is merely an example, and the present invention is not limited thereto.

The solar cell 150 described above is electrically connected to the neighboring solar cell 150 by the wiring member 142 positioned (for example, in contact with) the first electrode 42 or the second electrode 44, Will be described in more detail with reference to FIG. 4 together with FIGS. 1 to 3. FIG.

4 is a perspective view schematically illustrating a first solar cell 151 and a second solar cell 152 included in the solar cell panel 100 shown in FIG. 1 and connected by a wiring material 142. FIG. In FIG. 4, the first and second solar cells 151 and 152 are schematically shown only on the semiconductor substrate 160 and the electrodes 42 and 44, respectively.

4, two solar cells 150 (for example, the first solar cell 151 and the second solar cell 152) which are adjacent to each other among the plurality of solar cells 150 are connected to the wiring member 142 ). The wiring member 142 is electrically connected to the first electrode 42 positioned on the front surface of the first solar cell 151 and the second solar cell 152 positioned on one side The second electrode 44 located on the rear side of the second electrode 44 is connected. And the other wiring material 1420a is electrically connected to the second electrode 44 located on the rear surface of the first solar cell 151 and the other electrode on the other side of the first solar cell 151 The first electrode 42 is connected. Another wiring material 1420b is disposed between the first electrode 42 located on the front surface of the second solar cell 152 and the rear surface of another solar cell positioned on one side The second electrode 44 is connected to the second electrode 44. Accordingly, the plurality of solar cells 150 can be connected to each other by the wiring materials 142, 1420a, and 1420b. Hereinafter, the description of the wiring material 142 can be applied to all the wiring materials 142, 1420a, and 1420b that connect the two adjacent solar cells 150 to each other.

In this embodiment, the wiring material 142 is formed on the entire surface of the first solar cell 151 by the first electrode 42 (more specifically, the bus bar of the first electrode 42 And a second portion extending from the first edge 161 to the opposite second edge 162 and a second portion extending from the rear surface of the second solar cell 152 to the second electrode 44 A second portion extending from the first edge 161 to the opposite second edge 162 in a state of being connected to the bus bar of the second electrode 44, And a third portion extending from the front surface of the second edge 162 to the rear surface of the second solar cell 152 and connecting the first portion and the second portion. As a result, after the wiring member 142 traverses the first solar cell 151 in a partial area of the first solar cell 151, the second solar cell 152 traverses the second solar cell 152 in a partial area of the second solar cell 152 Can be located. As described above, the wiring member 142 is formed on a part of the first and second solar cells 151 and 152 (for example, the bus bar 42b) with a width smaller than that of the first and second solar cells 151 and 152 The first and second solar cells 151 and 152 can be effectively connected even by a small area formed only at the corresponding portion.

The wiring member 142 may be arranged so as to extend along the bus bar 42b while contacting and joining the bus bar 42b on the bus bar 42b at the first and second electrodes 42 and 44 . Thus, the wiring material 142 and the first and second electrodes 42 and 44 are continuously contacted with each other, thereby improving electrical connection characteristics. However, the present invention is not limited thereto.

A plurality of wiring materials 142 may be provided on the basis of one surface of each solar cell 150 to improve the electrical connection characteristics of the neighboring solar cells 150. Particularly, in this embodiment, the wiring material 142 is composed of a wire having a width smaller than that of a ribbon having a relatively wide width (for example, 1 mm to 2 mm) (For example, 2 to 5) of the number of the conventional ribbons 142 are used.

In one example, the wiring member 142 is made of a metal, which is made of a metal (142a in Fig. 3, hereinafter the same), a thin layer of a coating on the surface of the core layer 142a, And a solder layer (reference numeral 142b in Fig. 3, hereinafter the same) for enabling soldering. For example, the core layer 142a may include Ni, Cu, Ag, Al as a main material (for example, at least 50 wt% or more specifically at least 90 wt%). The solder layer 142b may include a material such as Pb, Sn, SnIn, SnBi, SnPb, SnPbAg, SnCuAg, or SnCu as a main material. However, the present invention is not limited thereto, and the core layer 142a and the solder layer 142b may include various materials.

As described above, when a wire having a width smaller than that of the conventional ribbon is used as the wiring material 142, the material cost can be greatly reduced. Since the width of the wiring member 142 is smaller than that of the ribbons, a sufficient number of the wiring members 142 can be provided to minimize the movement distance of the carriers, thereby improving the output of the solar cell panel 100.

Further, the wire constituting the wiring material 142 according to the present embodiment may include rounded portions. That is, the wire constituting the wiring material 142 may have a round cross section, an elliptic cross section, or a round cross section or a round cross section. Thus, the wiring material 142 can induce reflection or diffuse reflection. The light reflected from the rounded surface of the wire constituting the wiring member 142 is reflected or totally reflected on the front substrate 110 or the rear substrate 120 located on the front or rear surface of the solar cell 150, ). ≪ / RTI > Thus, the output of the solar cell panel 100 can be effectively improved. However, the present invention is not limited thereto. Therefore, the wire constituting the wiring member 142 may have a polygonal shape such as a quadrangle, or may have various other shapes.

In this embodiment, the width (or diameter) of the wiring material 142 may be less than 1 mm (for example, 250 to 500 um). The thickness of the solder layer 142b is very small and may have various thicknesses depending on the position of the wiring material 142. The width of the wiring material 142 may be a width of the core layer 142a, have. Alternatively, the width of the wiring material 142 can be seen as the width passing through the center of the wiring material 142 above the line portion (reference numeral 421 in FIG. 5). The current generated in the solar cell 150 by the wire-shaped wiring material 142 having such a width is efficiently supplied to the external circuit (for example, a bypass diode of a bus ribbon or a junction box) or another solar cell 150 . In this embodiment, the wiring material 142 can be individually positioned and fixed on the electrodes 42 and 44 of the solar cell 150 without being inserted into a separate layer, film, or the like. If the width of the wiring material 142 is less than 250 袖 m, the strength of the wiring material 142 may be insufficient, and the connecting area of the electrodes 42 and 44 may be very small, resulting in poor electrical connection characteristics and low adhesion. If the width of the wiring material 142 is 1 mm or more (for example, 500 m or more), the cost of the wiring material 142 increases and the wiring material 142 hinders the incidence of light incident on the front surface of the solar cell 150, shading loss can be increased. The force exerted in the direction in which the wiring member 142 is spaced apart from the electrodes 42 and 44 becomes large so that the adhesion between the wiring member 142 and the electrodes 42 and 44 may be low and the electrodes 42 and 44, It is possible to cause a problem such as cracks in the resin layer 160. In one example, the width of the wiring material 142 may be in the range of 350 to 450um (particularly, 350um to 400um). The output can be improved while increasing the adhesion with the electrodes 42 and 44 in this range.

At this time, the number of the wiring members 142 (or the number of the bus bars 42b corresponding thereto) may be 6 to 33 based on one surface of the solar cell 150. At this time, in order to further improve the output of the solar cell panel 100, the number of the wiring materials 142 may be 10 or more (for example, 12 to 24). However, the present invention is not limited to this, and the number of the wiring materials 142 and thus the number of the bus bars 42b may have different values.

An example of the electrodes 42 and 44 of the solar cell 150 to which the wiring material 142 according to the embodiment of the present invention is attached will be described in detail with reference to FIGS. 1 to 4 together with FIG. 5 to FIG. 5 to 7, a pair of first and second electrodes 42 and 44 located at positions corresponding to (e.g., matched to) each other on opposite sides of the semiconductor substrate 160 The bus bar 440 will be described in detail.

5 is a front plan view of the solar cell 150 shown in FIG. 6A is a partial front plan view showing a state in which a wiring material 142 is attached to part A in Fig. 5, Fig. 6B is a sectional front plan view showing a state in which a wiring material 142 is attached to part A in Fig. Fig. And FIG. 7 is a cross-sectional view schematically showing a state in which the wiring material 142 is attached to the solar cell 150 along the line VII-VII in FIG. Only the semiconductor substrate 160, the pad portions 422 and 442, and the wiring material 142 are shown in FIG. 7 for simplicity and clarity.

1 to 7, in this embodiment, the first electrode 42 located on one side of the semiconductor substrate 160 includes a plurality of first electrodes 42 extending in a first direction The first finger line 42a is electrically connected to the first finger line 42a and is formed in a second direction (longitudinal direction in the drawing) intersecting (for example, orthogonal) to the first finger line 42a, And a first bus bar 42b to which the first bus bar 142 is connected or attached. In the drawing, a frame line 42c is formed which connects ends of a plurality of first finger lines 42a in the vicinity of both side edges. The edge line 42c has the same or similar width as the finger line 42a and may be composed of the same material as the finger line 42a. However, it is also possible not to include the border line 42c.

The first finger lines 42a may be spaced apart from each other with a uniform width and pitch. Although the first finger lines 42a are parallel to the main edges of the solar cell 150 (particularly, the first and second edges 161 and 162) in the first direction, But is not limited thereto.

At this time, the width of the wiring material 142 may be smaller than the pitch of the first finger line 42a and may be larger than the width of the first finger line 42a. However, the present invention is not limited thereto and various modifications are possible.

As described above, the first bus bar 42b may be positioned so as to correspond to the portion where the wiring material 142 for connection with the neighboring solar cell 150 is located. The first bus bar 42b may be provided so as to correspond one-to-one to each of the wiring members 142 located on this surface. Accordingly, in this embodiment, the first bus bar 42b and the wiring material 142 are provided in the same number on the basis of one surface of the solar cell 150. [

In the present embodiment, the first bus bar 42b includes a plurality of first pad portions 422 located in a second direction corresponding to the respective wiring materials 142. [ The first bus bar 42b includes a first line portion 421 having a width narrower than that of the first pad portion 422 and extending long between the first pad portions 422 along the direction in which the wiring material 142 is connected, ).

The first pad portion 422 is a region having a relatively wide width and substantially fixed with the wiring material 142 attached thereto. The width of the first pad portion 422 measured in the first direction is larger than the width of the first line portion 421 and the width of the first finger line 42a measured in the second direction, It can be equal to or greater than the width. The length of the first pad portion 422 measured in the second direction may be greater than the width of the first finger line 42a. The first pad portion 422 improves the adhesion between the wiring member 142 and the second bus bar 42b and reduces contact resistance.

The plurality of first pad portions 422 may include a first outer pad 424 located outside the first bus bar 42b in the second direction and a second inner pad 424 located outside the first outer pad 424, (426). The first outer pad 424 has first and second edges 161 and 162 of the solar cell 150 (or the semiconductor substrate 160) as viewed in the second direction among the plurality of first pad portions 422, The first inner pad 424 may be referred to as a first outer pad 424a and a first outer pad 424b positioned closest to each of the first inner pad 424 and the second outer pad 424, Quot; pad " Here, the outer / inner reference is based on only a plurality of the first pad portions 422. Accordingly, the first line portion 421 and the like may be located outside the first outer pad 424. The area (or length) of the first outer pad 424 to which the force is applied to the wiring member 142 in the direction away from the solar cell 150 can be made larger than the area (or length) of the first inner pad 422 . Then, it is possible to reinforce the attachment characteristics in the first outer pad 424. However, the present invention is not limited thereto.

The first line portion 421 connects the plurality of first finger lines 42a and the first pad portion 422 to provide a path through which the carrier can bypass when some of the first finger lines 42a are disconnected do. The width of the first line portion 421 measured in the first direction is smaller than the width of the first pad portion 422 and the wiring material 142 and smaller than the width of the first finger line 42a measured in the second direction Or greater or equal. In this way, the first line portion 421 is formed with a relatively narrow width to minimize the area of the first electrode 42, thereby reducing the shading loss and the material cost. The wiring member 142 may be attached to the first line portion 421 and the wiring member 142 may be placed on the first line portion 421 without the wiring member 142 being attached to the first line portion 421 Lt; / RTI >

Similarly, in the present embodiment, the second electrode 44 located on the other side of the semiconductor substrate 160 is connected to the second bus bar 44b located in the second direction at a position corresponding to the first bus bar 42b, And may further include a second finger line 44a and / or a second edge line (not shown). The second electrode 44 may have the second bus bar 44b and may not have the second finger line 44a and the second edge line. The second bus bar 44b includes a plurality of second pad portions 442 including a second outer pad 444 and a second inner pad 446, End outer pad 444a and the second other-end outer pad 444b positioned closest to the first and second edges 161 and 162 of the battery 150, respectively. And the second bus bar 44b may further include a second line portion 441. [

The second outer pad 444 including the second finger line 44a, the second bus bar 44b (i.e., the second one-end outer pad 444a and the second other-end outer pad 444b) (The second pad portion 442 including the second bus line 446 and the second line portion 441) and the first finger line 42a and the first bus bar 42b A first pad portion 422 including a first outer pad 424 and a first inner pad 426 including an outer pad 424a and a first other outer pad 424b, 421) and the first border line 42c may be applied as they are.

The first bus bar 42b and the second bus bar 44b may be formed in the same number. In the drawing, the first and second finger lines 42a and 44a have the same width, pitch, and number. However, the present invention is not limited thereto, and at least one of the first finger line 42a and the second finger line 44a may be different in width, pitch and number.

In this embodiment, in the pair of bus bars 440, the first and second edges 161 and 162 corresponding to the edges of the same semiconductor substrate 160 (i.e., the first or second edges 161 and 162) The outer pads 424 and 444 are located at different positions. For example, the outer edges OL11, OL12 (OL21, OL12) of the first and second outer pads 424, 444 located in the vicinity of the first or second edge 161, 162 of the semiconductor substrate 160 in the second direction, OL22 are located at different positions.

The first and second outer pads 424 and 444 are positioned near the edge of the semiconductor substrate 160 and are the last portions to which the wiring material 142 is substantially attached. The first and second outer pads 424 and 444 The outer edges OL11 and OL12 OL21 and OL22 substantially constitute the boundary between the wiring material 142 and the first and second bus bars 42b and 44b. Accordingly, whether the wiring material 142 is attached or not is determined based on the outer edges OL11 and OL12 (OL21 and OL22) of the first and second outer pads 424 and 444, so thermal stress may be generated in the corresponding portion . Such thermal stress may occur at a bonding process of the wiring material 142, a thermal shock test (TC), or a temperature change when the solar cell panel 100 is used. Particularly, in the vicinity of the first and second outer pads 424 and 444, there is a portion of the wiring material 142 bent for connection with the other solar cell 150, whereby the wiring material 142 is separated from the other solar cell 150 As the force to move away is applied, the problem caused by heat stress may be more serious.

In consideration of this, in this embodiment, the positions of the first and second outer pads 424 and 444, more specifically, the outer edges OL11 and OL12 of the first and second outer pads 424 and 444, OL22 are made to be different from each other and the boundary portions are dispersed, heat stress can be reduced and dispersed. Particularly, in the case of applying the wiring material 142 having a narrow width as in the present embodiment, since the wiring material 142 is provided in a relatively large number, the first and second outer pads 424, 444) is increased, so that concentration of heat stress can be intensified. Therefore, if the positions of the first and second outer pads 424 and 444 are made different in the structure in which the wiring material 142 having a narrow width is used, the effect of reducing the thermal stress can be further enhanced. For reference, the position of the bus bar electrode and the ribbon can be adjusted by adjusting the position of the flux when the ribbon is attached to the bus bar electrode having a wide width, which was used in the past. However, as in the present embodiment, It is difficult to adjust the positions of the wiring material 142 and the first and second outer pads 424 and 444 by adjusting the position of the flux.

On the other hand, unlike the present embodiment, when the first and second outer pads located at corresponding positions are formed at the same position and the first and second outer pads and the wiring material have the same boundary, Heat stress is concentrated in the vicinity of the solar cell, which may cause cracks or the like in the solar cell, which may lower the reliability of the solar cell panel.

The first outer pad 424 has a first one end outer pad 424a and a first other end outer pad 424b and the second outer pad 444 has a second one end outer pad 444a, And a second other-end outer pad 444b. The outer edge OL11 of the first one end outer pad 424a adjacent to the first edge 161 of the semiconductor substrate 160 and the outer edge OL21 of the second one end outer pad 444a are located at different positions And the outer edge OL12 of the first other end outer pad 424b adjacent to the second edge 162 of the semiconductor substrate 160 and the outer edge OL22 of the second other end outer pad 444b, May be located at different positions. In this embodiment, the outer edges OL11 and OL12 of the first and second outer pads 424a and 424b are connected to the outer edges OL21 and OL22 of the second and first outer pads 424b and 444b, As shown in FIG. Thus, the attachment positions of the wiring materials 142 on both sides of the first and second bus bars 42b, 44b constituting the pair of bus bars 440 can be made different from each other, and the effect of reducing and dispersing the thermal stress Can be maximized.

In this embodiment, the first end outer pad 424a and the second end outer pad 444a, and the first end outer pad 424b and the second end outer pad 444b may be symmetrically disposed with respect to each other. The relationship between the first end outer pad 424a and the second one end outer pad 444a and the relationship between the first other end outer pad 424b and the second other end outer pad 444b are the same, One outer pad 424 and the second outer pad 444 will be described together. Therefore, in the case where there is an opposite substrate or the case where the first one end outer pad 424a, the second one end outer pad 444a, the first other end outer pad 424b, the second other end outer pad 444b, The description of the first outer pad 424 and the second outer pad 444 will be given below with reference to the first one end outer pad 424a and the second one end outer pad 444a and the first other end outer pad 424b, And the second other-end outer pad 444b.

More specifically, in order to electrically connect two adjacent solar cells 150, the solar cell 150 or the wiring material 142 located on both sides of the semiconductor substrate 160 in the first direction should be located at the same position with respect to each other . Accordingly, the first and second outer pads 424 and 444, which are located on both sides of the semiconductor substrate 160, have center lines at the same positions in the first direction, for example, at the same position in the first direction . On the other hand, in the second direction, the outer edges OL11 and OL12 (OL21 and OL22) of the first and second outer pads 424 and 444 located on both sides of the semiconductor substrate 160 are located at different positions.

Here, in the present embodiment, the first and second outer pads 424 and 444 in the second direction may have non-overlapped portions NOP1 and NOP2 that do not overlap with each other. The positions of the first outer pads 424 attached to the wiring member 142 and the positions of the second outer pads 444 attached to the wiring members 142 are different from each other as they correspond to the non-overlapped portions NOP1 and NOP2 So that heat stress can be reduced and dispersed.

For example, in this embodiment, the first outer pad 424 and the second outer pad 444 are partially overlapped to form the overlapping portion OP in the second direction, and the first outer pad 424 and the second outer pad 444 are formed on one end side of the first outer pad 424 The first non-overlapping portion NOP1 is provided and the second non-overlapping portion NOP2 is provided on the other end portion of the second outer pad 444. [ Since the first outer pad 424 and the second outer pad 444 have substantially the same length in the second direction, the first non-overlapping portion NOP1 and the second non-overlapping portion NOP2 overlap the overlapping portion OP And can be positioned symmetrically with respect to each other. Here, the substantially same length means that the difference between the first length of the first outer pad 424 and the second length of the second outer pad 444 is greater than the difference between the first length of the first outer pad 424 and the second length of the second outer pad 444, 2 It can mean that it is within 10% of the length (L1, L2). If the first external pads 424 and the second external pads 444 have substantially the same length as the first external pads 424 and the second external pads 444 on both sides of the solar cell 150, It is possible to make the adhering characteristics of the adhesive layer uniform. However, the present invention is not limited thereto, and the first and second lengths described above may be different from each other.

At this time, the distances D1 and D2 between the outer edges OL11 and OL12 of the first outer pads 424 and the outer edges OL21 and OL22 of the second outer pads 444 are 0.5 mm to 15 mm . For example, the first distance D1 between the outer edge OL11 of the first one-end outer pad 424a and the outer edge OL21 of the second one-end outer pad 444a may be 0.5 mm to 15 mm, The second distance D2 between the outer edge OL12 of the first other end outer pad 424b and the outer edge OL22 of the second other end outer pad 444a may be 0.5 mm to 15 mm. If the above-described distances D1 and D2 are less than 0.5 mm, the effect of dispersing and reducing heat stress may not be sufficient. If the distance D1 or D2 exceeds 15 mm, the length of the wiring material 142 attached to one of the first and second bus bars 42b and 44b is reduced and the carrier smoothly reaches the wiring material 142 It can be difficult. Similarly, the distance between the inner edge of the first outer pad 424 and the inner edge of the second outer pad 444 corresponding to each other may be 0.5 mm to 15 mm. However, the present invention is not limited thereto.

The first outer pad 424 located on the front surface of the solar cell 150 is located inward of the second outer pad 444 located on the rear surface of the solar cell 150 in the second direction. Herein, the term " inside " means that the distance from the first or second edge 161 and 162 to the adjacent semiconductor substrate 160 is large. The end portion of the wiring material 142 is positioned near the first edge 161 and the wiring material 142 is extended to the other solar cell at the second edge 162 on the front surface of the semiconductor substrate 160. On the rear surface of the semiconductor substrate 160, the wiring material 142 extends from the first edge 161 to another solar cell and the end portion of the wiring material 142 is located in the vicinity of the second edge 162.

More specifically, the first one-end outer pads 424a are positioned inwardly of the second one-end outer pads 444a in the second direction and the first other-end outer pads 424b are positioned inwardly of the second other- As shown in Fig.

When the wiring material 142 is peeled off from the first one-end outer pad 424a where the end of the wiring material 142 is positioned on the front surface side of the semiconductor substrate 160 where the light is incident and the pn junction can be located, Can be increased. The first outer pad 424a is spaced apart from the first edge 161 of the semiconductor substrate 160 by a predetermined distance. If the second one-end outer pad 444a is positioned further inward than the first one-end outer pad 424a, the second one-end outer pad 444a may extend beyond the first edge 161 of the semiconductor substrate 160 The second one-end outer pads 444a are located outside the first one-end outer pads 424a. The first other-end outer pad 424b positioned on the side where the wiring member 142 is connected to the other solar cell 150 is connected to the second other end 424a of the second solar cell 150 in order to reduce the force applied to the wiring member 142 in a direction away from the solar cell 150. [ And is positioned inside the outer pad 444b.

For example, the first one-end outer pad 424a and the first other-end outer pad 424b are positioned symmetrically with respect to the center line (center line in the second direction) of the solar cell 150, and the second one- And the second other-end outer pads 444b may be positioned symmetrically with respect to the center line of the solar cell 150 (the center line in the second direction). As a result, the current flow can be stably realized, and the device used for the existing symmetric structure can be used as it is.

In this embodiment, the first inner pad 426 and the second inner pad 446 may be located at positions overlapping each other. For example, the center lines of the plurality of first inner pads 426 and the plurality of second inner pads 446 may coincide with each other in the first and second directions, and may include a plurality of first inner pads 426, And the plurality of second inner pads 446 may be positioned at the same position and with the same shape. Since the first and second inner pads 426 and 446 are not located at the boundary with the wiring material 142, thermal stress may not be a problem even if they are located at the same position. When the first and second inner pads 426 and 446 are positioned at the overlapping positions, the path of movement of the carrier can be made uniform. However, the first inner pad 426 and the second inner pad 446 may be located at positions where they do not overlap with each other in the second direction, and this is also within the scope of the present invention.

A pair of bus bars 440 (that is, a first bus bar 42b and a second bus bar 44b corresponding to each other) located on the opposite side of the semiconductor substrate 160 or the solar cell 150, A plurality of the bus bars 440 are arranged in the first direction, and the plurality of bus bars 440 have the same shape. Accordingly, the arrangement of the first outer pad 424 and the second outer pad 426 in all the pair of bus bars 440 is the same. Accordingly, the positions of all of the first outer pads 424 and the second outer pads 444 located in all the pair of bus bars 440 are made different from each other, so that the thermal stress can be effectively reduced and dispersed. However, the present invention is not limited thereto. Another example will be described later in more detail with reference to FIG.

In the solar cell 150 and the solar cell panel 100 including the solar cell 150 described above, light loss can be minimized by using a bus bar 42b and / or a wire-shaped wiring material 142 having a small width, 42b and / or the wiring material 142 can be increased to reduce the movement path of the carrier. Accordingly, the efficiency of the solar cell 150 and the output of the solar cell panel 100 can be improved.

At this time, the first and second outer pads 424 and 444 located at positions corresponding to or adjacent to each other on both sides of the solar cell 150 are made to be different from each other to disperse the boundary portion with the wiring material 142, Can be reduced and dispersed. Particularly, in the structure in which the wiring material 142 is widely used as in the present embodiment, the effect of reducing and dispersing thermal stress can be further enhanced. Thus, cracking of the solar cell 150 due to thermal stress can be prevented and reliability of the solar cell panel 100 can be improved.

Hereinafter, a solar cell according to another embodiment of the present invention will be described in detail. Detailed descriptions will be omitted for the same or extremely similar parts as those described above, and only different parts will be described in detail. It is also within the scope of the present invention to combine the above-described embodiments or variations thereof with the following embodiments or modifications thereof.

8 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention. For simplicity and clarity, only the semiconductor substrate, the pad portion, and the wiring material are shown in FIG.

8, in this embodiment, the first and second outer pads 424 and 444 are not overlapped with each other so that the first outer pad 424 is entirely composed of the first non-overlapped portion NOP1, And the pad 444 is entirely composed of the second non-overlapped portion NOP2. According to this, the first and second outer pads 424 and 444 are located at different positions which are not overlapped with each other at all, so that the thermal stress can be effectively reduced and dispersed.

9 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention. Only a semiconductor substrate, a pad portion and a wiring material are shown in FIG. 9 for the sake of simplicity and clarity.

9, the first one-end outer pad 424a is located inside the second one-end outer pad 444a and the first other-end outer pad 424b is positioned inside the second other- Can be located outward. The second one-end outer pad 444a and the first other-end outer pad 424b are located at a portion where the wiring material 142 is connected to the other solar cell 150, The second one-end outer pad 444a and the first other-end outer pad 424b are located inwardly of the first-end outer pad 424a and the second-end outer pad 444b, respectively, It minimizes the power loss. Accordingly, the first and second outer pads 424a and 424b may have a shape biased to the second and first outer pads 444a and 444b in the second direction, respectively.

9, the first outer pad 424 and the second outer pad 444 are spaced apart from each other. However, as shown in FIG. 7, a portion of the first outer pad 424 and the second outer pad 444 May overlap each other. Also, contrary to the drawing, the first one-end outer pad 424a may be positioned inward of the second one-end outer pad 444a and the first other-end outer pad 424b may be located outwardly of the second other-end outer pad 444b have.

10 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention. For simplicity and clarity, only the semiconductor substrate, the pad portion, and the wiring material are shown in FIG.

10, in this embodiment, the first one-end outer pad 424a and the second one-end outer pad 444a are located at different positions in the second direction, and the first other-end outer pad 424b and the second- The outer pads 444b may be positioned at the same position (e.g., with the same outer edge).

Although the first end outer pad 424a and the second end outer pad 444a are arranged as shown in FIG. 7 in the drawing, the present invention is not limited thereto. Accordingly, the first one-end outer pad 424a and the second one-end outer pad 444a may have the arrangement as shown in Figs. 8 and 9. Although the first and second outer pads 424a and 444a are located at different positions in the drawing, the present invention is not limited thereto. The first end outer pad 424a and the second end outer pad 444a may be located at the same position and the first end outer pad 424b and the second end outer pad 444b may be located at different positions .

11 is a schematic cross-sectional view illustrating a solar cell according to another embodiment of the present invention. Only the semiconductor substrate, the pad portion, and the wiring material are shown in FIG. 11 for the sake of simplicity and clarity.

11, the first end outer pad 424a and the second end outer pad 444a are located at different positions, and the first end outer pad 424b and the second end outer pad 444b are different from each other The first and second one-end outer pads 424a and 444a and the first and second other-end outer pads 424b and 444b are disposed in different positions. Here, the arrangement relationships are different from each other when the lengths of the first and second one-end outer pads 424a and 444a and the first and second other-end outer pads 424b and 444b are different from each other or the lengths of the overlapped portions and / Different lengths, and the like.

12 is a front plan view of a solar cell according to another embodiment of the present invention. Only the semiconductor substrate, the pad portion and the wiring material are shown in FIG. 12 for the sake of simplicity and clarity.

In this embodiment, when a plurality of bus bars (440 in FIG. 6, hereinafter the same) of the semiconductor substrate 160 or the solar cell 150 are provided, a pair of bus bars 440 and other The arrangement of the plurality of first pad portions 422 and the plurality of second pad portions 444 in the pair of bus bars 440 may be different from each other. That is, the arrangement of the first outer pad 424 and the second outer pad 444 in the pair of bus bars 440 and the other pair of bus bars 440 may be different, and / The arrangement of the first inner pad 426 and the second inner pad 446 in the bus bar 440 and the other pair of bus bars 440 may be different from each other.

In addition, the arrangement of the first outer pads 424 in the plurality of first bus bars 42b may be different from each other. And / or the arrangement of the first outer pads 444 in the plurality of second bus bars 44b may be different. 12, a first outer pad 424 of a portion of the first bus bar 42b is positioned inward and a first outer pad 424 of another portion of the first bus bar 42b is located outward . However, the present invention is not limited thereto. Similarly, the arrangement of the first inner pads 426 in the plurality of first bus bars 42b may be different from each other. And / or the placement of the second outer pads 446 in the plurality of second bus bars 44b may be different.

That is, the first and second outer pads 424 and 444 and / or the first and second inner pads 426 and 446 in the plurality of first bus bars 42b and the plurality of second bus bars 44b The arrangement of the first and second outer pads 424 and 444 and / or of the first and second inner pads 426 and 446 in the plurality of arranged bus bars 440 may be different, The layout may be different from each other.

Features, structures, effects and the like according to the above-described embodiments are included in at least one embodiment of the present invention, and the present invention is not limited to only one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified in other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

100: Solar panel
150: Solar cell
42: first electrode
44: Second electrode
42a: first finger line
44a: second finger line
42b: first bus bar
44b: second bus bar
421: first line portion
441: second line portion
422: first pad portion
442: second pad portion
424: first outer pad
444: second outside pad
426: first inner pad
446: second outside pad

Claims (20)

A semiconductor substrate;
A first conductive type region located on one side of the semiconductor substrate or on one side of the semiconductor substrate;
A second conductive type region located on the other surface of the semiconductor substrate or on the other surface of the semiconductor substrate;
A first electrode electrically connected to the first conductive type region on one side of the semiconductor substrate; And
And a second electrode electrically connected to the second conductivity type region on the other side of the semiconductor substrate
/ RTI >
Wherein the first electrode comprises a plurality of first finger lines located in a first direction and parallel to each other and a second outer pad located in a second direction that is electrically connected to the first finger line and intersects the first direction, And a first bus bar including a plurality of first pad portions including a first inner pad,
The second electrode includes a second bus bar including a plurality of second pad portions located in the second direction at a position corresponding to the first bus bar and including a second outer pad and a second inner pad,
Wherein the first and second outer pads located near the edge of the semiconductor substrate are located at different positions. The method according to claim 1,
And the outer edges of the first and second outer pads located near the edge of the semiconductor substrate in the second direction are located at different positions. The method according to claim 1,
Wherein the first and second outer pads do not overlap with each other in the second direction. The method of claim 3,
Wherein the first outer pad and the second outer pad partially overlap in the second direction,
Wherein the non-overlapped portion includes a first non-overlapped portion located at one end of the first outer pad and a second non-overlapped portion located at the other end of the second outer pad. The method of claim 3,
Wherein the first outer pad and the second outer pad are not overlapped with each other so that the first outer pad is entirely composed of the non-overlapped portion and the second outer pad is entirely composed of the non-overlapped portion. The method according to claim 1,
Wherein a distance between an outer edge of the first outer pad and an outer edge of the second outer pad is 0.5 mm to 15 mm near one edge of the solar cell. The method according to claim 1,
The first external pad is located on the front surface of the solar cell,
The second outer pad is located on the rear surface of the solar cell,
Wherein the first outer pads are located inside the second outer pads in the second direction. The method according to claim 1,
Wherein the first outer pad comprises a first one-end outer pad and a first other-end outer pad, one on each side of the first bus bar,
The second outer pad comprises a second one-end outer pad and a second other-end outer pad, each of which is positioned on either side of the second bus bar,
Wherein the first one-end outer pad is positioned inwardly of the second one-end outer pad in the second direction,
And the first other-end outer pad is located inside the second other-end outer pad in the second direction. 9. The method of claim 8,
The first external pad and the first external pad are formed symmetrically with respect to the center line of the solar cell,
Wherein the second outer pad and the second outer pad are formed symmetrically with respect to a center line of the solar cell. The method according to claim 1,
Wherein the first outer pad comprises a first one-end outer pad and a first other-end outer pad, one on each side of the first bus bar,
The second outer pad comprises a second one-end outer pad and a second other-end outer pad, each of which is positioned on either side of the second bus bar,
Wherein the first one-end outer pad is positioned inwardly of the second one-end outer pad in the second direction,
And the first other-end outer pad is located outside the other-end outer pad in the second direction. The method according to claim 1,
Wherein the first outer pad and the second outer pad are located at the same position in the first direction. The method according to claim 1,
Wherein the first inner pad and the second inner pad are located at positions where they overlap with each other. The method according to claim 1,
Wherein a difference between a length of the first outer pad and a length of the second outer pad is within 10% of a length of the first or second outer pad. The method according to claim 1,
The first and second bus bars are located at positions corresponding to each other on both sides of the solar cell to form a pair of bus bars,
Further comprising a second bus bar and another second bus bar spaced apart in the first direction, wherein the first bus bar and the second bus bar are spaced apart in the first direction,
Wherein the pair of bus bars and the first and second outer pads of the other pair of bus bars have the same arrangement. The method according to claim 1,
The first and second bus bars are located at positions corresponding to each other on both sides of the solar cell to form a pair of bus bars,
Further comprising a second bus bar and another second bus bar spaced apart in the first direction, wherein the first bus bar and the second bus bar are spaced apart in the first direction,
Wherein the pair of bus bars and the first and second outer pads of the other pair of bus bars have different arrangements. The method according to claim 1,
Wherein at least one of the first and second bus bars further comprises a line portion connecting at least a portion of the plurality of first or second pad bars in the second direction,
Wherein a width of the line portion is smaller than a width of the first or second plurality of pad portions. The method according to claim 1,
Wherein the number of the first or second bus bars is 6 to 33 in the first direction. A plurality of solar cells including first and second solar cells located at least adjacent to each other; And
And a plurality of wiring members connecting the first solar cell and the second solar cell,
Lt; / RTI >
Each of the plurality of solar cells includes a semiconductor substrate, a first conductive type region located on one side of the semiconductor substrate or on one side of the semiconductor substrate, a second conductive type region on the other side of the semiconductor substrate, Type region, a first electrode electrically connected to the first conductive type region on one side of the semiconductor substrate, and a second electrode electrically connected to the second conductive type region on the other side of the semiconductor substrate,
Wherein the first electrode comprises a plurality of first finger lines located in a first direction and parallel to each other and a second outer pad located in a second direction that is electrically connected to the first finger line and intersects the first direction, And a first bus bar including a plurality of first pad portions including a first inner pad,
The second electrode includes a second bus bar including a plurality of second pad portions located in the second direction at a position corresponding to the first bus bar and including a second outer pad and a second inner pad,
Wherein the first and second outer pads located near the edge of the semiconductor substrate are located at different positions. 19. The method of claim 18,
Wherein the number of the plurality of wiring materials in the first direction is 6 to 33 based on one surface of the solar cell,
And each of the plurality of wiring materials has a width of 250um to 500um. 19. The method of claim 18,
And the outer edges of the first and second outer pads located near the edge of the semiconductor substrate in the second direction are located at different positions.
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US15/711,530 US11462652B2 (en) 2016-09-27 2017-09-21 Solar cell and solar cell panel including the same
EP17192609.0A EP3300123B1 (en) 2016-09-27 2017-09-22 Solar cell and solar cell panel including the same
JP2017184404A JP6818670B2 (en) 2016-09-27 2017-09-26 Solar cells and solar panels containing them
CN201710880148.2A CN107871788B (en) 2016-09-27 2017-09-26 Solar cell and solar panel including the same

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