KR20180017035A - 50 나노초 스파이크 필터를 위한 테스트 - Google Patents

50 나노초 스파이크 필터를 위한 테스트 Download PDF

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Publication number
KR20180017035A
KR20180017035A KR1020177035693A KR20177035693A KR20180017035A KR 20180017035 A KR20180017035 A KR 20180017035A KR 1020177035693 A KR1020177035693 A KR 1020177035693A KR 20177035693 A KR20177035693 A KR 20177035693A KR 20180017035 A KR20180017035 A KR 20180017035A
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KR
South Korea
Prior art keywords
pulses
slave device
command
sequence
serial bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020177035693A
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English (en)
Korean (ko)
Inventor
라두 피티고이-아론
Original Assignee
퀄컴 인코포레이티드
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Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20180017035A publication Critical patent/KR20180017035A/ko
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08Clock generators with changeable or programmable clock frequency
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2289Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by configuration test
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26Functional testing
    • G06F11/263Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/404Coupling between buses using bus bridges with address mapping
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Dc Digital Transmission (AREA)
KR1020177035693A 2015-06-15 2016-06-13 50 나노초 스파이크 필터를 위한 테스트 Withdrawn KR20180017035A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562175723P 2015-06-15 2015-06-15
US62/175,723 2015-06-15
US15/179,470 US10108511B2 (en) 2015-06-15 2016-06-10 Test for 50 nanosecond spike filter
US15/179,470 2016-06-10
PCT/US2016/037282 WO2016205142A1 (en) 2015-06-15 2016-06-13 Test for 50 nanosecond spike filter

Publications (1)

Publication Number Publication Date
KR20180017035A true KR20180017035A (ko) 2018-02-20

Family

ID=57517150

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020177035693A Withdrawn KR20180017035A (ko) 2015-06-15 2016-06-13 50 나노초 스파이크 필터를 위한 테스트

Country Status (6)

Country Link
US (1) US10108511B2 (enExample)
EP (1) EP3308284A1 (enExample)
JP (1) JP2018517987A (enExample)
KR (1) KR20180017035A (enExample)
CN (1) CN107710183A (enExample)
WO (1) WO2016205142A1 (enExample)

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US10423551B2 (en) 2017-09-07 2019-09-24 Qualcomm Incorporated Ultra-short RFFE datagrams for latency sensitive radio frequency front-end
US10693674B2 (en) * 2018-01-29 2020-06-23 Qualcomm Incorporated In-datagram critical-signaling using pulse-count-modulation for I3C bus
CN110362524B (zh) * 2018-04-11 2021-04-09 杭州海康威视数字技术股份有限公司 时序信号生成方法、装置、逻辑电路板及存储介质
CN109101380B (zh) * 2018-07-27 2022-05-13 广东浪潮大数据研究有限公司 一种i2c信号质量的检测方法及设备
US11119966B2 (en) * 2018-09-07 2021-09-14 Qualcomm Incorporated Mixed-mode radio frequency front-end interface
KR20210087982A (ko) 2018-12-03 2021-07-13 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. 로직 회로
AU2018452006B2 (en) 2018-12-03 2022-12-01 Hewlett-Packard Development Company, L.P. Logic circuitry
US11338586B2 (en) 2018-12-03 2022-05-24 Hewlett-Packard Development Company, L.P. Logic circuitry
AU2018451721B2 (en) 2018-12-03 2023-05-18 Hewlett-Packard Development Company, L.P. Logic circuitry
CA3121418A1 (en) 2018-12-03 2020-06-11 Hewlett-Packard Development Company, L.P. Logic circuitry
US10894423B2 (en) 2018-12-03 2021-01-19 Hewlett-Packard Development Company, L.P. Logic circuitry
US20210216491A1 (en) 2018-12-03 2021-07-15 Hewlett-Packard Development Company, L.P. Logic Circuitry
MX2021005993A (es) 2018-12-03 2021-07-06 Hewlett Packard Development Co Conjunto de circuitos logicos.
HUE063370T2 (hu) * 2018-12-03 2024-01-28 Hewlett Packard Development Co Logikai áramkör
ES2902154T3 (es) 2018-12-03 2022-03-25 Hewlett Packard Development Co Circuitos lógicos
EP3688639B1 (en) 2018-12-03 2021-10-13 Hewlett-Packard Development Company, L.P. Logic circuitry package
US10606794B1 (en) * 2019-05-14 2020-03-31 Infineon Technologies Ag Clock signal monitor for slave device on a master-slave bus
US11327912B2 (en) * 2019-09-12 2022-05-10 Qualcomm Incorporated Controlling the application time of radio frequency front end triggers based on execution of sequences
US11407229B2 (en) 2019-10-25 2022-08-09 Hewlett-Packard Development Company, L.P. Logic circuitry package
CN113312217A (zh) * 2020-02-26 2021-08-27 瑞昱半导体股份有限公司 内部集成电路总线的从属装置的测试方法
WO2021221678A1 (en) 2020-04-30 2021-11-04 Hewlett-Packard Development Company, L.P. Logic circuitry package for print apparatus
JP2024537639A (ja) * 2021-09-08 2024-10-16 パッシブロジック,インコーポレイテッド 静止デバイス(quiescent device)の外部始動

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US5956372A (en) * 1994-03-17 1999-09-21 Digital Compression Technology, L.P. Coding system for digital transmission compression
US5469476A (en) * 1994-03-21 1995-11-21 Motorola, Inc. Circuit and method for filtering voltage spikes
US7313740B2 (en) * 2002-07-25 2007-12-25 Inapac Technology, Inc. Internally generating patterns for testing in an integrated circuit device
US7606955B1 (en) 2003-09-15 2009-10-20 National Semiconductor Corporation Single wire bus for connecting devices and methods of operating the same
US7514962B2 (en) * 2006-04-28 2009-04-07 Stmicroelectronics Pvt. Ltd. Configurable I2C interface
US7394260B2 (en) * 2006-05-24 2008-07-01 Sun Microsystems, Inc. Tuning a test trace configured for capacitive coupling to signal traces
US8010724B2 (en) * 2009-10-06 2011-08-30 Maxim Integrated Products, Inc. 12C/SMBus ladders and ladder enabled ICs
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JP6232733B2 (ja) * 2013-04-24 2017-11-22 セイコーエプソン株式会社 通信回路、物理量測定装置、電子機器、移動体、通信方法
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Also Published As

Publication number Publication date
CN107710183A (zh) 2018-02-16
JP2018517987A (ja) 2018-07-05
US10108511B2 (en) 2018-10-23
US20160364305A1 (en) 2016-12-15
EP3308284A1 (en) 2018-04-18
WO2016205142A1 (en) 2016-12-22

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Date Code Title Description
PA0105 International application

Patent event date: 20171211

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination