KR20170092014A - Semiconductor device and method for manufacturing the same - Google Patents
Semiconductor device and method for manufacturing the same Download PDFInfo
- Publication number
- KR20170092014A KR20170092014A KR1020160013017A KR20160013017A KR20170092014A KR 20170092014 A KR20170092014 A KR 20170092014A KR 1020160013017 A KR1020160013017 A KR 1020160013017A KR 20160013017 A KR20160013017 A KR 20160013017A KR 20170092014 A KR20170092014 A KR 20170092014A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- substrate
- mother board
- input
- conductive
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
Abstract
Description
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a filler structure and a method of manufacturing the same, which can exhibit a heat dissipation effect when mounted on a mother board of an electronic device.
2. Description of the Related Art Generally, a semiconductor device, that is, a semiconductor package mounted on a mother board of various electronic apparatuses, is manufactured in various forms according to its use. Basically, a substrate on which a semiconductor chip is mounted, And an input / output terminal attached to the substrate for inputting / outputting an electrical signal of the semiconductor chip to / from the mother board.
One of the common issues in semiconductor packages manufactured with various structures is that the high temperature heat generated from the semiconductor chip can be released more easily to maintain the chip performance.
However, the conventional semiconductor package has a problem in that the heat dissipation performance is poor.
Hereinafter, the structure of a conventional semiconductor package having a positive structure will be described.
4 is a schematic cross-sectional view showing a semiconductor package of a conventional positive structure.
In Fig. 4,
One or two or
Further, the
Further, the input /
At this time, the height of the input /
Thus, the input /
The electrical signal transmission path of the semiconductor package as described above is a path that is transmitted to the
The
The above-described conventional semiconductor package has the following problems.
Since the heat generated in the semiconductor chip is not separately provided, heat generated in the semiconductor chip is discharged to the mother board through the semiconductor chip, the conductive pattern of the substrate, and the input / output terminals. , And thus there is a problem that the heat radiation effect is greatly deteriorated.
Secondly, there is a problem that the mounted state of the semiconductor package on the motherboard is unstable and the board level reliability is poor.
In other words, when the semiconductor package is mounted on the motherboard, only the input / output terminals attached to the bottom surface of the substrate are electrically fused to the motherboard, and the central region of the substrate and the semiconductor chip are floating The semiconductor package may be detached from the mother board due to the external force, which may deteriorate board level reliability.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor package having a filler structure in which a semiconductor chip is embedded between a bottom surface of a substrate and a motherboard, So that when the substrate is mounted on the mother board of the electronic device by means of the input / output terminal, the heat releasing support is attached to the mother board so as to be thermally conductive together so as to maximize the heat releasing effect generated in the semiconductor chip A semiconductor device and a method of manufacturing the same.
According to an aspect of the present invention, there is provided a substrate comprising: a substrate; An input / output terminal electrically conductively attached to one surface of the substrate; A semiconductor chip electrically conductively attached to a central region of one surface of the substrate; And a semiconductor chip disposed between the substrate and the mother board when the input / output terminal is fused to the mother board, wherein the heat dissipation support body is attached to the surface of the semiconductor chip, And the semiconductor device is mounted on the board so as to be held in thermal contact with the semiconductor device.
Particularly, the substrate is used as a passive on glass or a general printed circuit board (PCB) in which a conductive circuit wiring layer is formed on a glass.
Preferably, the heat releasing support is adopted as a metal lid or a metal foil having a thickness equal to the distance between the semiconductor chip and the mother board.
Alternatively, the heat dissipation substrate is coated on the surface of the semiconductor chip by metal sputtering or metal spraying, and is attached to the surface of the semiconductor chip with a thickness equal to the distance between the semiconductor chip and the motherboard.
Also, when the input / output terminal is conductively connected to the mother board through the solder, the surface of the heat emitting support is also thermally conductive to the mother board through the solder.
Further, the semiconductor chip is attached to the substrate by conductive bumps in a conductive manner, and each of the conductive bumps is surrounded by an underfill material so as to be insulated.
The input / output terminal may be a copper post or a solder ball.
Further, the semiconductor chip is characterized in that at least two of the semiconductor chips are conductively attached to the substrate, and are electrically connected via conductive bumps or conductive wires.
In addition, when a molding compound resin is molded by sealing a semiconductor chip on one surface of the substrate, a heat releasing support is attached to the outer surface of the molding compound resin corresponding to the semiconductor chip.
Preferably, the molding compound resin is further provided with a through-mold via which conductively connects the substrate and the input / output terminal.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: i) attaching an input / output terminal to a four- Ii) electrically attaching the semiconductor chip to the central region of the one surface of the substrate; Iii) attaching a heat releasing support to the surface of the semiconductor chip; Iv) molding the molding compound resin on one surface of the substrate such that the input / output terminal, the semiconductor chip, and the heat emitting support are sealed; And (v) grinding the surface of the molding compound resin so that the surfaces of the input / output terminals and the heat release support become coplanar while being exposed to the outside; (Vi) electrically connecting the externally exposed input / output terminals to the motherboard in a conductive manner and attaching the surface of the heat emitting support to the mother board so as to be thermally conductive; The semiconductor device manufacturing method of the present invention includes the steps of:
Wherein the step (i) comprises the step of electrically fusing a copper post or a solder ball on one side of the substrate.
Particularly, the substrate is used as a passive on glass or a general printed circuit board (PCB) in which a conductive circuit wiring layer is formed on a glass.
In the step (ii), two or more semiconductor chips are laminated on a substrate, and the semiconductor chip and the substrate are connected by a conductive bump or a conductive wire.
In the step (ii), an underfill material is injected between the semiconductor chip and the substrate after connecting the semiconductor chip and the substrate with the conductive bump, so that each of the conductive bumps is insulatedly wrapped.
The step (iii) is characterized in that the step (iii) is performed by attaching a metal lid or a metal foil having the same thickness as the distance between the semiconductor chip and the mother board to the surface of the semiconductor chip.
Alternatively, the step iii) may be performed by coating a surface of the semiconductor chip with a metal sputter or a metal spray method to apply the heat dissipating substrate to the surface of the semiconductor chip with a distance equal to the distance between the semiconductor chip and the mother board.
In the step (vi), the input / output terminal is conductively connected to the mother board via solder, and the surface of the heat emitting support is also thermally conductive to the mother board through the solder.
Preferably, the step of forming a through-hole via further comprises electrically connecting the substrate and the input / output terminal to the molding compound resin after the molding step.
Through the above-mentioned means for solving the problems, the present invention provides the following effects.
First, since the heat generated in the semiconductor chip is directly discharged to the mother board through the heat releasing support, the heat releasing effect can be maximized.
Second, board-level reliability can be improved by stabilizing the mounting state of the semiconductor package on the motherboard.
That is, when the semiconductor package is mounted on the motherboard, the input / output terminals attached to the bottom surface of the substrate are electrically fused to the mother board, and at the same time, the semiconductor chip attached to the central region of the substrate is electrically connected to the mother board So that the mounted state of the semiconductor package with respect to the mother board can be stably maintained, thereby improving the board level reliability.
1A to 1E are sectional views showing a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention,
2A to 2C are sectional views showing a semiconductor device according to a second embodiment of the present invention,
3 is a sectional view showing a conventional semiconductor package.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
First Embodiment
1A to 1E are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention.
First, a
In the first embodiment of the present invention, the
Of course, the
The input /
The input /
Next, the
More specifically, the
At this time, a process of firstly filling an underfill material 15 (for example, non-conductive paste) between the
Subsequently, the
The
More specifically, when the input /
Next, the
The
Next, the surface of the
Next, the input /
The input /
The
The surface of the heat releasing supporting
In the related art, only the input /
Second Embodiment
2A to 2C are cross-sectional views illustrating a semiconductor device according to a second embodiment of the present invention.
The semiconductor device according to the second embodiment of the present invention is different from the semiconductor device according to the first embodiment in that the
2A, a metal lead lid or a copper foil is attached to the surface of the
2B, in order to maximize the heat dissipation effect of the
Therefore, the input /
In the related art, only the input /
On the other hand, when the distance from the surface of the
That is, a layer of the heat releasing supporting
Third Embodiment
3 is a cross-sectional view illustrating a semiconductor device according to a third embodiment of the present invention.
The semiconductor device according to the third embodiment of the present invention is characterized in that the
In the third embodiment of the present invention, the
In the third embodiment of the present invention, in consideration of the fact that the size of the input /
The through-mold via 17 is formed by machining a through-hole in the
One end of the
Particularly, like the second embodiment, the heat
Accordingly, in the third embodiment of the present invention, the input /
10: substrate
10a: Glass
10b: Conductive circuit wiring layer
12: Semiconductor chip
13: conductive wire
14: Conductive bump
15: underfill material
16: Molding compound resin
17: Through Mold Via
18: I / O terminal
19: Solder
20: Motherboard
30: heat release substrate
Claims (19)
Wherein a heat releasing support is attached to a surface of the semiconductor chip so that the surface of the heat releasing supporting body is supported by the mother board so as to be thermally conductive.
Wherein the substrate is one selected from a passive on glass having a conductive circuit wiring layer formed on the glass, silicon having a circuit layer, and a general printed circuit board (PCB).
Wherein the heat dissipation substrate is a metal lid or metal foil having a thickness equal to a distance between the semiconductor chip and the mother board.
Wherein the heat dissipation substrate is coated on the surface of the semiconductor chip by a metal sputter or metal spray method and is attached to the surface of the semiconductor chip with a thickness equal to the distance between the semiconductor chip and the motherboard.
Wherein when the input / output terminal is conductively connected to the mother board through the solder, the surface of the heat emitting support is also thermally conductive to the mother board through the solder.
Wherein the semiconductor chip is conductively attached to the substrate by conductive bumps, and each conductive bump is surrounded by the underfill material so as to be insulated.
And the input / output terminal is adopted as a copper post or a solder ball.
Wherein at least two of the semiconductor chips are conductively attached to the substrate, and are electrically connected via conductive bumps or conductive wires.
Wherein a heat dissipation support is attached to an outer surface of the molding compound resin corresponding to the semiconductor chip when the molding compound resin is molded by sealing the semiconductor chip on one surface of the substrate.
Wherein the molding compound resin is provided with a through-mold via which conductively connects the substrate and the input / output terminal.
Ii) electrically attaching the semiconductor chip to the central region of the one surface of the substrate;
Iii) attaching a heat releasing support to the surface of the semiconductor chip;
Iv) molding the molding compound resin on one surface of the substrate such that the input / output terminal, the semiconductor chip, and the heat emitting support are sealed;
And (v) grinding the surface of the molding compound resin so that the surfaces of the input / output terminals and the heat release support become coplanar while being exposed to the outside;
(Vi) electrically connecting the externally exposed input / output terminals to the motherboard in a conductive manner and attaching the surface of the heat emitting support to the mother board so as to be thermally conductive;
Wherein the semiconductor device is a semiconductor device.
Wherein the step (i) comprises the step of electrically fusing a copper post or a solder ball on one side of the substrate.
Wherein the substrate is a passive on glass or a general printed circuit board (PCB) having a conductive circuit wiring layer formed on a glass substrate.
Wherein, in the step (ii), two or more semiconductor chips are laminated on a substrate, and the semiconductor chip and the substrate are connected by a conductive bump or a conductive wire.
In the step (ii), an underfill material is injected between the semiconductor chip and the substrate after connecting the semiconductor chip and the substrate with the conductive bump, so that each of the conductive bumps is insulatedly wrapped .
Wherein step iii) comprises:
Wherein a metal lid or metal foil having a thickness equal to a distance between the semiconductor chip and the mother board is attached to the surface of the semiconductor chip.
Wherein step iii) comprises:
Wherein the heat dissipating substrate is coated on the surface of the semiconductor chip by a metal sputter or a metal spraying method and is coated with the same thickness as the distance between the semiconductor chip and the mother board.
The method of manufacturing a semiconductor device according to claim 1, wherein in the step (vi), the input / output terminal is conductively connected to the mother board via solder, and the surface of the heat releasing support is also thermally conductive to the mother board via solder .
Wherein the step of forming a via through which the substrate and the input / output terminal are conductively connected to the molding compound resin is further performed after the molding step.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020160013017A KR20170092014A (en) | 2016-02-02 | 2016-02-02 | Semiconductor device and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020160013017A KR20170092014A (en) | 2016-02-02 | 2016-02-02 | Semiconductor device and method for manufacturing the same |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20170092014A true KR20170092014A (en) | 2017-08-10 |
Family
ID=59652091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020160013017A KR20170092014A (en) | 2016-02-02 | 2016-02-02 | Semiconductor device and method for manufacturing the same |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20170092014A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210130020A (en) * | 2020-04-21 | 2021-10-29 | 삼성전기주식회사 | Electronic device module having radiating unit and manufacturing method thereof |
US11171096B2 (en) | 2019-07-29 | 2021-11-09 | Samsung Electro-Mechanics Co., Ltd. | Semiconductor package |
-
2016
- 2016-02-02 KR KR1020160013017A patent/KR20170092014A/en active Search and Examination
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11171096B2 (en) | 2019-07-29 | 2021-11-09 | Samsung Electro-Mechanics Co., Ltd. | Semiconductor package |
KR20210130020A (en) * | 2020-04-21 | 2021-10-29 | 삼성전기주식회사 | Electronic device module having radiating unit and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI685932B (en) | Wire bond wires for interference shielding | |
US10211190B2 (en) | Semiconductor packages having reduced stress | |
US8916958B2 (en) | Semiconductor package with multiple chips and substrate in metal cap | |
US8623753B1 (en) | Stackable protruding via package and method | |
US9496210B1 (en) | Stackable package and method | |
CN105742262B (en) | Semiconductor packages and its manufacturing method | |
KR20140057979A (en) | Semiconductor package and method of manufacturing the semiconductor package | |
KR20070010915A (en) | Substrate having heat spreading layer and semiconductor package using the same | |
KR101809521B1 (en) | Semiconductor package and method of manufacturing the same | |
CN111279474B (en) | Semiconductor device with layered protection mechanism and related systems, devices and methods | |
KR100475079B1 (en) | High power Ball Grid Array Package, Heat spreader used in the BGA package and method for manufacturing the same | |
CN111799230A (en) | Semiconductor package | |
US9633966B2 (en) | Stacked semiconductor package and manufacturing method thereof | |
US10515883B2 (en) | 3D system-level packaging methods and structures | |
KR20170092014A (en) | Semiconductor device and method for manufacturing the same | |
KR20150050189A (en) | Semiconductor Package | |
TW201803053A (en) | Fan-out muti-chip stacking assembly structure and manufacturing method | |
TW201926607A (en) | Electronic package and method of manufacture | |
KR101548801B1 (en) | Electric component module and manufacturing method threrof | |
CN115700906A (en) | Electronic package and manufacturing method thereof | |
JP2010287859A (en) | Semiconductor chip with through electrode and semiconductor device using the same | |
CN111883505A (en) | Electronic package, bearing substrate thereof and manufacturing method | |
US20120314377A1 (en) | Packaging structure embedded with electronic elements and method of fabricating the same | |
KR101659354B1 (en) | Semiconductor package and method for manufacturing the same | |
KR101540927B1 (en) | Semiconductor package and method for manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application | ||
AMND | Amendment | ||
J201 | Request for trial against refusal decision | ||
J301 | Trial decision |
Free format text: TRIAL NUMBER: 2018101000617; TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20180212 Effective date: 20190605 |