KR20170092014A - Semiconductor device and method for manufacturing the same - Google Patents

Semiconductor device and method for manufacturing the same Download PDF

Info

Publication number
KR20170092014A
KR20170092014A KR1020160013017A KR20160013017A KR20170092014A KR 20170092014 A KR20170092014 A KR 20170092014A KR 1020160013017 A KR1020160013017 A KR 1020160013017A KR 20160013017 A KR20160013017 A KR 20160013017A KR 20170092014 A KR20170092014 A KR 20170092014A
Authority
KR
South Korea
Prior art keywords
semiconductor chip
substrate
mother board
input
conductive
Prior art date
Application number
KR1020160013017A
Other languages
Korean (ko)
Inventor
박동주
강원준
오광석
김진영
안예슬
황진량
Original Assignee
앰코 테크놀로지 코리아 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 앰코 테크놀로지 코리아 주식회사 filed Critical 앰코 테크놀로지 코리아 주식회사
Priority to KR1020160013017A priority Critical patent/KR20170092014A/en
Publication of KR20170092014A publication Critical patent/KR20170092014A/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3675Cooling facilitated by shape of device characterised by the shape of the housing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3672Foil-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/40Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49517Additional leads
    • H01L23/4952Additional leads the additional leads being a bump or a wire

Abstract

The present invention relates to a semiconductor apparatus and a manufacturing method thereof, and more particularly, to a semiconductor apparatus having a foursome structure that exhibits a great heat dissipation effect when the semiconductor apparatus is mounted on a mother board of an electronic device, and a manufacturing method thereof. According to the present invention, in the semiconductor apparatus having a foursome structure in which a semiconductor chip is embedded between a lower surface of a substrate and a mother board, a heat dissipation support being in direct/indirect contact with the semiconductor chip is attached to a lower part of the semiconductor chip so as to attach the heat dissipation support to the mother board to be able to transfer heat when the substrate is mounted on the mother board of an electronic device by an input/output terminal, thereby maximizing an effect of dissipating heat generated in the semiconductor chip.

Description

TECHNICAL FIELD [0001] The present invention relates to a semiconductor device and a manufacturing method thereof,

The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device having a filler structure and a method of manufacturing the same, which can exhibit a heat dissipation effect when mounted on a mother board of an electronic device.

2. Description of the Related Art Generally, a semiconductor device, that is, a semiconductor package mounted on a mother board of various electronic apparatuses, is manufactured in various forms according to its use. Basically, a substrate on which a semiconductor chip is mounted, And an input / output terminal attached to the substrate for inputting / outputting an electrical signal of the semiconductor chip to / from the mother board.

One of the common issues in semiconductor packages manufactured with various structures is that the high temperature heat generated from the semiconductor chip can be released more easily to maintain the chip performance.

However, the conventional semiconductor package has a problem in that the heat dissipation performance is poor.

Hereinafter, the structure of a conventional semiconductor package having a positive structure will be described.

4 is a schematic cross-sectional view showing a semiconductor package of a conventional positive structure.

In Fig. 4, reference numeral 10 denotes a substrate (e.g., a PCB).

One or two or more semiconductor chips 12 are electroconductively attached to the central region of one side of the substrate 10 via conductive connecting means such as conductive bumps 14. [

Further, the semiconductor chip 12 is molded by the molding compound resin 16 and is protected from the outside.

Further, the input / output terminals 18 such as solder balls are electrically fused over the four-sided regions of the substrate 10, that is, the four-sided regions to which the semiconductor chips 12 are attached.

At this time, the height of the input / output terminal 18 is larger than the height of the molding compound resin 16 because the input / output terminal 18 can be easily attached to the mother board of the electronic device.

Thus, the input / output terminal 18 is fused to the mother board 20 of the electronic device so that the semiconductor chip 12 is embedded in and positioned between the bottom surface of the board 10 and the mother board .

The electrical signal transmission path of the semiconductor package as described above is a path that is transmitted to the mother board 20 through the semiconductor chip 12, the conductive pattern (not shown) of the substrate 10, and the input / output terminal 18 .

The semiconductor chip 12, the conductive pattern (not shown) of the substrate 10, and the input / output terminal 18 are provided in the same manner as the electrical signal transmission path, And is discharged to the mother board 20 through the through holes.

The above-described conventional semiconductor package has the following problems.

Since the heat generated in the semiconductor chip is not separately provided, heat generated in the semiconductor chip is discharged to the mother board through the semiconductor chip, the conductive pattern of the substrate, and the input / output terminals. , And thus there is a problem that the heat radiation effect is greatly deteriorated.

Secondly, there is a problem that the mounted state of the semiconductor package on the motherboard is unstable and the board level reliability is poor.

In other words, when the semiconductor package is mounted on the motherboard, only the input / output terminals attached to the bottom surface of the substrate are electrically fused to the motherboard, and the central region of the substrate and the semiconductor chip are floating The semiconductor package may be detached from the mother board due to the external force, which may deteriorate board level reliability.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor package having a filler structure in which a semiconductor chip is embedded between a bottom surface of a substrate and a motherboard, So that when the substrate is mounted on the mother board of the electronic device by means of the input / output terminal, the heat releasing support is attached to the mother board so as to be thermally conductive together so as to maximize the heat releasing effect generated in the semiconductor chip A semiconductor device and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a substrate comprising: a substrate; An input / output terminal electrically conductively attached to one surface of the substrate; A semiconductor chip electrically conductively attached to a central region of one surface of the substrate; And a semiconductor chip disposed between the substrate and the mother board when the input / output terminal is fused to the mother board, wherein the heat dissipation support body is attached to the surface of the semiconductor chip, And the semiconductor device is mounted on the board so as to be held in thermal contact with the semiconductor device.

Particularly, the substrate is used as a passive on glass or a general printed circuit board (PCB) in which a conductive circuit wiring layer is formed on a glass.

Preferably, the heat releasing support is adopted as a metal lid or a metal foil having a thickness equal to the distance between the semiconductor chip and the mother board.

Alternatively, the heat dissipation substrate is coated on the surface of the semiconductor chip by metal sputtering or metal spraying, and is attached to the surface of the semiconductor chip with a thickness equal to the distance between the semiconductor chip and the motherboard.

Also, when the input / output terminal is conductively connected to the mother board through the solder, the surface of the heat emitting support is also thermally conductive to the mother board through the solder.

Further, the semiconductor chip is attached to the substrate by conductive bumps in a conductive manner, and each of the conductive bumps is surrounded by an underfill material so as to be insulated.

The input / output terminal may be a copper post or a solder ball.

Further, the semiconductor chip is characterized in that at least two of the semiconductor chips are conductively attached to the substrate, and are electrically connected via conductive bumps or conductive wires.

In addition, when a molding compound resin is molded by sealing a semiconductor chip on one surface of the substrate, a heat releasing support is attached to the outer surface of the molding compound resin corresponding to the semiconductor chip.

Preferably, the molding compound resin is further provided with a through-mold via which conductively connects the substrate and the input / output terminal.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: i) attaching an input / output terminal to a four- Ii) electrically attaching the semiconductor chip to the central region of the one surface of the substrate; Iii) attaching a heat releasing support to the surface of the semiconductor chip; Iv) molding the molding compound resin on one surface of the substrate such that the input / output terminal, the semiconductor chip, and the heat emitting support are sealed; And (v) grinding the surface of the molding compound resin so that the surfaces of the input / output terminals and the heat release support become coplanar while being exposed to the outside; (Vi) electrically connecting the externally exposed input / output terminals to the motherboard in a conductive manner and attaching the surface of the heat emitting support to the mother board so as to be thermally conductive; The semiconductor device manufacturing method of the present invention includes the steps of:

Wherein the step (i) comprises the step of electrically fusing a copper post or a solder ball on one side of the substrate.

Particularly, the substrate is used as a passive on glass or a general printed circuit board (PCB) in which a conductive circuit wiring layer is formed on a glass.

In the step (ii), two or more semiconductor chips are laminated on a substrate, and the semiconductor chip and the substrate are connected by a conductive bump or a conductive wire.

In the step (ii), an underfill material is injected between the semiconductor chip and the substrate after connecting the semiconductor chip and the substrate with the conductive bump, so that each of the conductive bumps is insulatedly wrapped.

The step (iii) is characterized in that the step (iii) is performed by attaching a metal lid or a metal foil having the same thickness as the distance between the semiconductor chip and the mother board to the surface of the semiconductor chip.

Alternatively, the step iii) may be performed by coating a surface of the semiconductor chip with a metal sputter or a metal spray method to apply the heat dissipating substrate to the surface of the semiconductor chip with a distance equal to the distance between the semiconductor chip and the mother board.

In the step (vi), the input / output terminal is conductively connected to the mother board via solder, and the surface of the heat emitting support is also thermally conductive to the mother board through the solder.

Preferably, the step of forming a through-hole via further comprises electrically connecting the substrate and the input / output terminal to the molding compound resin after the molding step.

Through the above-mentioned means for solving the problems, the present invention provides the following effects.

First, since the heat generated in the semiconductor chip is directly discharged to the mother board through the heat releasing support, the heat releasing effect can be maximized.

Second, board-level reliability can be improved by stabilizing the mounting state of the semiconductor package on the motherboard.

That is, when the semiconductor package is mounted on the motherboard, the input / output terminals attached to the bottom surface of the substrate are electrically fused to the mother board, and at the same time, the semiconductor chip attached to the central region of the substrate is electrically connected to the mother board So that the mounted state of the semiconductor package with respect to the mother board can be stably maintained, thereby improving the board level reliability.

1A to 1E are sectional views showing a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention,
2A to 2C are sectional views showing a semiconductor device according to a second embodiment of the present invention,
3 is a sectional view showing a conventional semiconductor package.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First Embodiment

1A to 1E are cross-sectional views illustrating a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention.

First, a substrate 10 is provided.

In the first embodiment of the present invention, the substrate 10 is adopted as a passive on glass (POG) having a conductive circuit wiring layer 10b formed on a glass sheet 10a.

Of course, the substrate 10 may be a silicon or a general printed circuit board (PCB) having a circuit layer, and any other type of substrate may be used.

The input / output terminals 18 are electroconductively attached to the four-sided regions of the substrate 10 provided with the passive on glass (see FIG. 1A).

The input / output terminals 18 may be employed as other conductors including copper posts or solder balls.

Next, the semiconductor chip 12 is electroconductively attached to the central region of the surface of the substrate 10 (see FIG. 1B).

More specifically, the conductive bumps 14 formed on the bonding pads of the semiconductor chip 12 by a conventional bumping process are electrically fused to the conductive circuit interconnection layer 10b of the substrate 10, The attachment of the semiconductor chip 12 to the semiconductor chip 12 is performed.

At this time, a process of firstly filling an underfill material 15 (for example, non-conductive paste) between the semiconductor chip 12 and the substrate 10 is further performed so that the underfill material 15 is electrically connected to the conductive bumps 14 And at the same time, performs an insulation function for preventing electric short-circuiting between the conductive bumps 14.

Subsequently, the heat releasing support 30 is attached to the surface of the semiconductor chip 12 (see FIG. 1B).

The heat dissipation substrate 30 may be a metal lid or a copper foil and may have a thickness equal to or greater than that of the end of the input / 12.

More specifically, when the input / output terminal 18 attached to the substrate 10 is electrically fused to the motherboard 20, there is a gap between the semiconductor chip 12 and the motherboard 20 And a metal lead or metal foil having the same thickness as the separation distance is attached to the surface of the semiconductor chip 12.

Next, the molding compound resin 16 is overmolded to a predetermined thickness on one surface of the substrate 10 by using a conventional molding equipment, and the input / output terminal 18, the semiconductor chip 12, 30 are wrapped and sealed by the molding compound resin 16 (see Fig. 1C).

The semiconductor chip 12 and the input and output terminals 18 are enclosed by the molding compound resin 16 so that the semiconductor chip 12 is protected from the outside and each input / And is in a state in which it can be insulated by the resin 16.

Next, the surface of the molding compound resin 16 is ground by a conventional mechanical or chemical method, and the surfaces of the input / output terminal 18 and the heat release support 30 are ground to the same plane while being exposed to the outside (See FIG.

Next, the input / output terminal 18 exposed to the outside is electrically connected to the mother board 20 of the electronic device and the surface of the heat emitting support 30 is connected to the mother board 20 so as to be thermally conductive (See FIG. 1E).

The input / output terminal 18 is electrically connected to the mother board 20 through a solder 19 and the surface of the heat emitting support 30 is connected to the mother board 20 through the solder 19. [ As shown in FIG.

The underfill material 15 is further filled in the gap between the motherboard 20 and the molding compound resin 16 so that the underfill material 15 holds each solder 19, And an insulating function for preventing electrical short-circuiting between the electrodes 19 is performed.

The surface of the heat releasing supporting body 30 is adhered to the motherboard 20 so as to be thermally conductive so that the semiconductor chip 12 is adhered to the surface of the semiconductor chip 12 by attaching the heat releasing supporting body 30 to the surface of the semiconductor chip 12. [ Not only the heat generated in the semiconductor chip 12 is emitted to the mother board 20 through the semiconductor chip 12 and the conductive circuit layer of the substrate 10 and the input and output terminals 18, And is directly discharged to the mother board 20 through the heat releasing support 30, so that the heat releasing effect can be maximized.

In the related art, only the input / output terminals 18 attached to the bottom surface of the substrate 10 are electrically fused to the motherboard 30 so that the central region of the substrate 10 and the semiconductor chip 12 are electrically connected to the motherboard The heat release support 30 attached to the semiconductor chip 12 is brought into a state in which it is supported by the mother board 30 so as to be thermally conductive so as to stably support the mounting state of the semiconductor package with respect to the mother board 30. [ And thereby improve the board level reliability of the semiconductor package.

Second Embodiment

2A to 2C are cross-sectional views illustrating a semiconductor device according to a second embodiment of the present invention.

The semiconductor device according to the second embodiment of the present invention is different from the semiconductor device according to the first embodiment in that the semiconductor chip 12 is attached to the substrate 10 via the conductive bump 14 and the semiconductor chip 12 is bonded to the substrate 10 and the mother board The printed circuit board (PCB) is used as the substrate 10, the solder ball is used as the input / output terminal 18, and the semiconductor chip 12 is embedded between the semiconductor chip 12 and the semiconductor chip 12, Which is different from the above-mentioned first embodiment in that the molding compound resin 16 surrounding the molding compound resin 16 is limitedly molded.

2A, a metal lead lid or a copper foil is attached to the surface of the molding compound resin 16 surrounding the semiconductor chip 12 as a heat emitting support body 30. As shown in Fig.

2B, in order to maximize the heat dissipation effect of the semiconductor chip 12, the surface of the molding compound resin 16 that surrounds the semiconductor chip 12 is grinded so that the surface of the semiconductor chip 12 is exposed to the outside A metal lead lid or a copper foil is attached to the surface of the semiconductor chip 12 exposed to the outside as a heat emitting support 30. [

Therefore, the input / output terminal 18 is conductively connected to the mother board 20, and at the same time, the surface of the heat emitting support body 30 is thermally conductive so that heat generated in the semiconductor chip 12 is transmitted to the semiconductor chip 12. [ And the heat generated in the semiconductor chip 12 is discharged to the mother board 20 through the conductive circuit layer 12 of the substrate 10 and the input and output terminals 18, So that the heat radiation effect can be maximized.

In the related art, only the input / output terminals 18 attached to the bottom surface of the substrate 10 are electrically fused to the motherboard 30 so that the central region of the substrate 10 and the semiconductor chip 12 are electrically connected to the motherboard The heat release support 30 attached to the semiconductor chip 12 is brought into a state in which it is supported by the mother board 30 so as to be thermally conductive so as to stably support the mounting state of the semiconductor package with respect to the mother board 30. [ And thereby improve the board level reliability of the semiconductor package.

On the other hand, when the distance from the surface of the semiconductor chip 12 to the upper surface of the motherboard 20 is very narrow to such an extent that the metal lead can not be applied, the heat releasing supporting body 30 is formed by metal sputtering or metal spraying .

That is, a layer of the heat releasing supporting body 30 is coated on the surface of the semiconductor chip 12 by a metal sputtering or a metal spraying method, and the layer is coated with the same thickness as the distance between the semiconductor chip 12 and the mother board 20 Even when the distance from the surface of the semiconductor chip 12 to the upper surface of the mother board 20 is very narrow, the heat releasing support 30 can be easily formed.

Third Embodiment

3 is a cross-sectional view illustrating a semiconductor device according to a third embodiment of the present invention.

The semiconductor device according to the third embodiment of the present invention is characterized in that the semiconductor chip 12 is attached to the substrate 10 via the conductive bump 14 and that the semiconductor chip 12 is bonded to the substrate 10 and the motherboard The printed circuit board (PCB) is used as the substrate 10, the solder ball is used as the input / output terminal 18, and the semiconductor chip 12 is embedded between the semiconductor chip 12 and the semiconductor chip 12, The second embodiment is the same as the second embodiment in that the molding compound resin 16 enclosing the molding resin 16 is limitedly molded.

In the third embodiment of the present invention, the semiconductor chip 12 is stacked with a plurality of IC chips, memory chips, etc., and each semiconductor chip is electrically connected to the substrate 10 via the conductive wire 13 Which is different from the second embodiment.

In the third embodiment of the present invention, in consideration of the fact that the size of the input / output terminal 18 attached to the substrate may become excessively large according to the stacking thickness of the semiconductor chip, the molding compound via- ) Is further formed in the second embodiment.

The through-mold via 17 is formed by machining a through-hole in the molding compound resin 17 and filling the through-hole with a conductive material.

One end of the substrate 10 and the through-mold via 17 are conductively connected and the input / output terminal 18 is conductively fused to the other end of the through-mold via 17. Thus, the input / Can be attached to the mother board 20 in a conductive manner.

Particularly, like the second embodiment, the heat release support body 30 is formed on the surface of the molding compound resin 16 surrounding the semiconductor chip 12, that is, the surface of the molding compound resin 16 corresponding to the semiconductor chip 12, A surface of the molding compound resin 16 which surrounds the semiconductor chip 12 is grinded so as to adhere a metal lid or a copper foil or maximize a heat dissipation effect of the semiconductor chip 12 A metal lead lid or a copper foil is attached to the surface of the semiconductor chip 12 exposed to the outside after the surface of the semiconductor chip 12 is exposed to the outside .

Accordingly, in the third embodiment of the present invention, the input / output terminal 18 is conductively connected to the mother board 20, and the surface of the heat releasing supporting body 30 is supported so as to be thermally conductive, 12 are emitted to the mother board 20 through the semiconductor chip 12, the conductive circuit layer of the substrate 10, the through vias 17 and the input / output terminals 18, The heat generated in the chip 12 is directly discharged to the mother board 20 through the heat releasing supporter 30, so that the heat releasing effect can be maximized.

10: substrate
10a: Glass
10b: Conductive circuit wiring layer
12: Semiconductor chip
13: conductive wire
14: Conductive bump
15: underfill material
16: Molding compound resin
17: Through Mold Via
18: I / O terminal
19: Solder
20: Motherboard
30: heat release substrate

Claims (19)

Board; An input / output terminal electrically conductively attached to one surface of the substrate; A semiconductor chip electrically conductively attached to a central region of one surface of the substrate; And a semiconductor chip positioned between the substrate and the mother board when the input / output terminal is fused to the mother board,
Wherein a heat releasing support is attached to a surface of the semiconductor chip so that the surface of the heat releasing supporting body is supported by the mother board so as to be thermally conductive.
The method according to claim 1,
Wherein the substrate is one selected from a passive on glass having a conductive circuit wiring layer formed on the glass, silicon having a circuit layer, and a general printed circuit board (PCB).
The method according to claim 1,
Wherein the heat dissipation substrate is a metal lid or metal foil having a thickness equal to a distance between the semiconductor chip and the mother board.
The method according to claim 1,
Wherein the heat dissipation substrate is coated on the surface of the semiconductor chip by a metal sputter or metal spray method and is attached to the surface of the semiconductor chip with a thickness equal to the distance between the semiconductor chip and the motherboard.
The method according to claim 1,
Wherein when the input / output terminal is conductively connected to the mother board through the solder, the surface of the heat emitting support is also thermally conductive to the mother board through the solder.
The method according to claim 1,
Wherein the semiconductor chip is conductively attached to the substrate by conductive bumps, and each conductive bump is surrounded by the underfill material so as to be insulated.
The method according to claim 1,
And the input / output terminal is adopted as a copper post or a solder ball.
The method according to claim 1,
Wherein at least two of the semiconductor chips are conductively attached to the substrate, and are electrically connected via conductive bumps or conductive wires.
The method according to claim 1,
Wherein a heat dissipation support is attached to an outer surface of the molding compound resin corresponding to the semiconductor chip when the molding compound resin is molded by sealing the semiconductor chip on one surface of the substrate.
The method of claim 9,
Wherein the molding compound resin is provided with a through-mold via which conductively connects the substrate and the input / output terminal.
I) attaching the input / output terminals to the one-sided rectangular region of the substrate in a conductive manner;
Ii) electrically attaching the semiconductor chip to the central region of the one surface of the substrate;
Iii) attaching a heat releasing support to the surface of the semiconductor chip;
Iv) molding the molding compound resin on one surface of the substrate such that the input / output terminal, the semiconductor chip, and the heat emitting support are sealed;
And (v) grinding the surface of the molding compound resin so that the surfaces of the input / output terminals and the heat release support become coplanar while being exposed to the outside;
(Vi) electrically connecting the externally exposed input / output terminals to the motherboard in a conductive manner and attaching the surface of the heat emitting support to the mother board so as to be thermally conductive;
Wherein the semiconductor device is a semiconductor device.
The method of claim 11,
Wherein the step (i) comprises the step of electrically fusing a copper post or a solder ball on one side of the substrate.
The method of claim 11,
Wherein the substrate is a passive on glass or a general printed circuit board (PCB) having a conductive circuit wiring layer formed on a glass substrate.
The method of claim 11,
Wherein, in the step (ii), two or more semiconductor chips are laminated on a substrate, and the semiconductor chip and the substrate are connected by a conductive bump or a conductive wire.
The method of claim 11,
In the step (ii), an underfill material is injected between the semiconductor chip and the substrate after connecting the semiconductor chip and the substrate with the conductive bump, so that each of the conductive bumps is insulatedly wrapped .
The method of claim 11,
Wherein step iii) comprises:
Wherein a metal lid or metal foil having a thickness equal to a distance between the semiconductor chip and the mother board is attached to the surface of the semiconductor chip.
The method of claim 11,
Wherein step iii) comprises:
Wherein the heat dissipating substrate is coated on the surface of the semiconductor chip by a metal sputter or a metal spraying method and is coated with the same thickness as the distance between the semiconductor chip and the mother board.
The method of claim 11,
The method of manufacturing a semiconductor device according to claim 1, wherein in the step (vi), the input / output terminal is conductively connected to the mother board via solder, and the surface of the heat releasing support is also thermally conductive to the mother board via solder .
The method of claim 11,
Wherein the step of forming a via through which the substrate and the input / output terminal are conductively connected to the molding compound resin is further performed after the molding step.
KR1020160013017A 2016-02-02 2016-02-02 Semiconductor device and method for manufacturing the same KR20170092014A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020160013017A KR20170092014A (en) 2016-02-02 2016-02-02 Semiconductor device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020160013017A KR20170092014A (en) 2016-02-02 2016-02-02 Semiconductor device and method for manufacturing the same

Publications (1)

Publication Number Publication Date
KR20170092014A true KR20170092014A (en) 2017-08-10

Family

ID=59652091

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020160013017A KR20170092014A (en) 2016-02-02 2016-02-02 Semiconductor device and method for manufacturing the same

Country Status (1)

Country Link
KR (1) KR20170092014A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210130020A (en) * 2020-04-21 2021-10-29 삼성전기주식회사 Electronic device module having radiating unit and manufacturing method thereof
US11171096B2 (en) 2019-07-29 2021-11-09 Samsung Electro-Mechanics Co., Ltd. Semiconductor package

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11171096B2 (en) 2019-07-29 2021-11-09 Samsung Electro-Mechanics Co., Ltd. Semiconductor package
KR20210130020A (en) * 2020-04-21 2021-10-29 삼성전기주식회사 Electronic device module having radiating unit and manufacturing method thereof

Similar Documents

Publication Publication Date Title
TWI685932B (en) Wire bond wires for interference shielding
US10211190B2 (en) Semiconductor packages having reduced stress
US8916958B2 (en) Semiconductor package with multiple chips and substrate in metal cap
US8623753B1 (en) Stackable protruding via package and method
US9496210B1 (en) Stackable package and method
CN105742262B (en) Semiconductor packages and its manufacturing method
KR20140057979A (en) Semiconductor package and method of manufacturing the semiconductor package
KR20070010915A (en) Substrate having heat spreading layer and semiconductor package using the same
KR101809521B1 (en) Semiconductor package and method of manufacturing the same
CN111279474B (en) Semiconductor device with layered protection mechanism and related systems, devices and methods
KR100475079B1 (en) High power Ball Grid Array Package, Heat spreader used in the BGA package and method for manufacturing the same
CN111799230A (en) Semiconductor package
US9633966B2 (en) Stacked semiconductor package and manufacturing method thereof
US10515883B2 (en) 3D system-level packaging methods and structures
KR20170092014A (en) Semiconductor device and method for manufacturing the same
KR20150050189A (en) Semiconductor Package
TW201803053A (en) Fan-out muti-chip stacking assembly structure and manufacturing method
TW201926607A (en) Electronic package and method of manufacture
KR101548801B1 (en) Electric component module and manufacturing method threrof
CN115700906A (en) Electronic package and manufacturing method thereof
JP2010287859A (en) Semiconductor chip with through electrode and semiconductor device using the same
CN111883505A (en) Electronic package, bearing substrate thereof and manufacturing method
US20120314377A1 (en) Packaging structure embedded with electronic elements and method of fabricating the same
KR101659354B1 (en) Semiconductor package and method for manufacturing the same
KR101540927B1 (en) Semiconductor package and method for manufacturing the same

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application
AMND Amendment
J201 Request for trial against refusal decision
J301 Trial decision

Free format text: TRIAL NUMBER: 2018101000617; TRIAL DECISION FOR APPEAL AGAINST DECISION TO DECLINE REFUSAL REQUESTED 20180212

Effective date: 20190605