KR20170080506A - Thin Film Transistor and Preparation Method Thereof - Google Patents

Abstract

The present invention relates to a thin film transistor exhibiting excellent thin film transistor characteristics with high mobility and reliability, a manufacturing method thereof, and an electronic device including the thin film transistor, more particularly, to a channel layer formed of a semiconductor material; A source electrode and a drain electrode facing each other on the channel layer; A gate electrode for applying an electric field to the channel layer; And a gate insulating layer interposed between the gate electrode and the channel layer, wherein the channel layer is formed of a metal oxide thin film treated with a plasma including ammonia, and a method for manufacturing the same And an electronic device including the thin film transistor.

Description

[0001] The present invention relates to a thin film transistor,

The present invention relates to a thin film transistor exhibiting excellent thin film transistor characteristics with high mobility and reliability, a method of manufacturing the same, and an electronic device including the thin film transistor.

With the rapid progress of information technology in recent years, ubiquitous computing is entering the era where information can be accessed anytime and anywhere. As a result, the importance of new electronic devices such as information transmission media and storage media that transmit various information is increasing. In particular, consumer demand for displays exceeds the level of supply and technology in the market, so development is becoming increasingly important. Next-generation displays are expected to grow in a direction that is not spatially and temporally constrained, in addition to the direction of technology of light weight, thin thickness, high resolution, high screen switching speed, and large area flat display. Consumers are strongly demanding eco-friendly, low power consumption, ultra-high-resolution, low-cost large-screen, flexibility, design, transparency and 3-dimension.

In order to realize ultra-high resolution, high screen switching speed and large screen characteristics, which are core technologies of the next generation display, technology of a thin film transistor (TFT), which is a basic device for driving the TFT, must be developed. Conventional amorphous silicon based thin film transistors have a mobility of only 1 cm ² / Vs. In 2004, a Japanese university developed an amorphous InGaZnO semiconductor material, and applied a non-silicon material, which has a high mobility of 10 cm ² / Vs or more, as a channel layer material Semiconductor thin film transistor technology has been actively researched as an alternative thereto. However, when the non-silicon material is used as the channel layer material, there arises a problem that it is difficult to secure the stability and reliability of the channel layer.

In order to apply an oxide thin film resistor element to an actual display panel or the like, in addition to mobility characteristics, reliability characteristics in voltage and light conditions in an actual panel driving environment are very important. As the mobility of the oxide semiconductor increases, the reliability characteristics of the thin film transistor are known to be greatly reduced. This is because the oxygen defects which are essential in the semiconductor contribute to the increase of the mobility and the sub-gap state It also plays a role in lowering the reliability. Therefore, in order to develop ultra-high-mobility thin film transistor devices based on oxide semiconductors, technology for improving the reliability by blocking the sub-gap state created by oxygen defects must be preceded. In recent years, it has been reported that an oxide having a higher energy level than that of oxygen can be effectively passivated by applying a nitrile dissolved in an excess amount of nitrogen to a thin film transistor to create an oxygen defect. It is actively proceeding.

The present inventor has disclosed a method for improving the performance of a transistor by lowering the contact resistance between a channel layer and a source electrode or a drain electrode in a transistor including a channel layer made of a thin film of a nitride oxide in Patent Document 10-2014-0074742 . That is, in order to secure the contact characteristics between the channel layer and the source / drain electrode, the contact surface of the channel layer and the source / drain electrode is formed to have a higher carrier concentration than the remaining region of the channel layer, Plasma treatment. As an example of a hydrogen-containing plasma, a contact region is treated with a plasma containing ammonia, thereby confirming that the field effect mobility is greatly increased and the sub threshold swing is reduced to improve contact characteristics. The present invention has confirmed that a new effect can be obtained by the plasma treatment of the entire channel layer, unlike the above-mentioned patent, and the present invention has been completed.

Published Japanese Patent Application No. 10-2014-0074742

It is an object of the present invention to provide a thin film transistor containing a metal oxide and having excellent performance, stability and reliability, and a method of manufacturing the thin film transistor.

It is still another object of the present invention to provide an electronic device including the thin film transistor.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a channel layer formed of a semiconductor material; A source electrode and a drain electrode facing each other on the channel layer; A gate electrode for applying an electric field to the channel layer; And a gate insulating layer interposed between the gate electrode and the channel layer, wherein the channel layer is formed of a metal oxide thin film treated with a plasma containing ammonia.

The present invention also provides a method of manufacturing a semiconductor device, comprising: forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming a channel layer corresponding to the gate electrode on the gate insulating layer; And forming a source electrode and a drain electrode in contact with the gate electrode, the source electrode and the drain electrode being in contact with each other, the channel layer forming method comprising the steps of: (A) Forming a thin film of nitrogen oxide; (B) treating the thin metal oxide film with a plasma containing ammonia.

The present invention also relates to an electronic device comprising the thin film transistor.

As described above, according to the present invention, by treating a metal oxide, which is a non-silicon material, with a plasma containing ammonia, the off current, turn-on voltage, hysteresis value, subthreshold swing ) And the like can be realized while a stable and reliable thin film transistor can be realized.

It is also possible to provide an electronic device with improved performance by applying the thin film transistor of the present invention.

1 is a schematic cross-sectional view of a thin film transistor according to an embodiment of the present invention;
2 is a schematic diagram showing a structure of a thin film transistor fabricated in an embodiment of the present invention.
3 is a graph showing gate voltage (Vg) -drain current (Id) transfer characteristics of a thin film transistor fabricated according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail with reference to the accompanying drawings. However, these drawings are only for illustrating the contents and scope of the technical idea of the present invention, and the technical scope of the present invention is not limited or changed. It will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the technical idea of the present invention based on these examples. In the following drawings, the size, thickness, shape, etc. of each component may be exaggerated or simplified. Also, in this specification, the terms "upper" or " upper "may include not only being directly in direct contact with one another, but also being positioned non-contact via another layer.

1 is a cross-sectional view illustrating a thin film transistor 100 according to an embodiment of the present invention. The thin film transistor 100 of FIG. 1 is a bottom gate structure thin film transistor in which a gate electrode 120 is provided under the channel layer 140. A gate electrode 120 may be provided on the substrate 110. The substrate 110 may be a glass substrate, but may be any of various other substrates used in a general semiconductor device process such as a plastic substrate or a silicon substrate. The gate electrode 120 may be formed of a general electrode material (metal, conductive oxide, etc.). A gate insulating layer 130 covering the gate electrode 120 may be provided on the substrate 110. The gate insulating layer 130 may comprise a silicon oxide layer, a silicon oxynitride layer, or a silicon nitride layer, but may also include other material layers, for example, a layer of high dielectric constant material having a dielectric constant greater than that of the silicon nitride layer. The gate insulating layer 130 may have a structure in which at least two layers of a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, and a high-dielectric material layer are stacked.

A channel layer 140 may be provided on the gate insulating layer 130. The channel layer 140 may be located above the gate electrode 120. Although the width of the channel layer 140 is shown to be slightly larger than the width of the gate electrode 120 in FIG. 1, the width of the channel layer 140 may be similar to or less than the width of the gate electrode 120.

A source electrode 151 and a drain electrode 152, which are in contact with the first and second regions and are in contact with each other, may be provided on the channel layer 140. The source electrode 151 may be in contact with one end of the channel layer 140 and the drain electrode 152 may be in contact with the other end of the channel layer 140. The source electrode 151 and the drain electrode 152 may be the same material layer as the gate electrode 120, but may be another material layer. The source electrode 151 and the drain electrode 152 may be a single layer or a multilayer. The shape and position of the source electrode 151 and the drain electrode 152 may vary. For example, the source electrode 151 may have a structure extending over the region of the gate insulating layer 130 adjacent thereto at one end of the channel layer 140, and similarly, the drain electrode 152 may have a structure extending over the channel layer 140, And extend over the region of the gate insulating layer 130 adjacent to the other end of the gate insulating layer 130. [ The source electrode 151 and the drain electrode 152 may be provided so as to contact two regions other than both ends (that is, one end and the other end) of the channel layer 140.

Although not shown in FIG. 1, the thin film transistor may further include an etch stop layer covering the channel layer 140. The etch stop layer serves to prevent the channel layer 140 from being damaged by the etching in the etching process for forming the source electrode 151 and the drain electrode 152. The etch stop layer may include silicon oxide, silicon nitride, organic insulator, and the like. The etch stop layer may include first and second contact holes exposing the first and second regions of the channel layer 140. The first region of the channel layer 140 may be one end or an adjacent region of the channel layer 140 and the second region of the channel layer 140 may be the other end of the channel layer 140, Lt; / RTI > The source electrode 151 is electrically connected to the channel layer 140 in the first contact hole of the etch stop layer and the drain electrode 152 is electrically connected to the channel layer 140 in the second contact hole of the etch stop layer. And are electrically connected.

A passivation layer covering the channel layer 140, the source electrode 151, and the drain electrode 152 may be provided on the gate insulating layer 130. The protective layer may be a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer or an organic insulating layer, or a structure in which at least two or more of these layers are laminated.

The present invention is characterized in that the channel layer 140 is formed of a thin film of a metal oxide thin film treated with plasma containing ammonia. The metal oxides can be represented by a general formula of M _(1-xy) O _x N _y (0 <x <1, 0 <y <1), and the specific composition may vary depending on the production conditions of the oxides. The metal (M) may be zinc or indium. The energy band gap of the channel layer 140 made of metal oxides may be equal to or greater than the energy band gap of the metal nitride and may be equal to or less than the energy band gap of the metal oxide. When the content of oxygen (O) in the metal oxides is small, the energy bandgap of the metal oxides may be similar to the energy bandgap of the metal nitrides. When the content of nitrogen (N) is small, the energy bandgap of the metal oxides Energy bandgap.

The metal oxide thin film may be formed using reactive sputtering, metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), or evaporation. Those skilled in the art will be able to select and use the techniques appropriately based on the prior art.

The channel layer 140 may be doped with a predetermined metal element (a metal and a metal element other than the metal oxide) to the metal oxides. For example, the metal element may be Ga, Hf, Al, Zn, Sn, In, or the like. The thickness of the channel layer 140 is preferably 10 to 150 nm, but is not limited thereto. Metal oxides are highly passivated by nitrogen solubilization and have higher reliability than metal oxides.

However, when the metal oxide is used as the channel layer material, it may not be easy to secure the contact characteristics between the channel layer and the source / drain electrode. Particularly, an energy barrier due to a difference in work function is generated between the channel layer composed of the metal oxide thin film and the source / drain electrode, so that the contact resistance can be increased. Therefore, the carrier (electrons) flow from the source electrode to the channel layer becomes difficult, and the performance and operational characteristics of the thin film transistor may deteriorate. In addition, thermal, physical, and chemical stimulation during the manufacturing process of the thin film transistor including the patterning of the source / drain electrodes causes defects of the semiconductor thin film in the channel layer, thereby deteriorating the characteristics of the thin film transistor.

In the thin film transistor of the present invention, the channel layer composed of the metal oxide thin film is treated with a plasma containing ammonia. The treatment of the plasma by the ammonia in the channel layer serves to improve and stabilize the characteristics of the thin film transistor by removing the carrier amount in the thin film of the metal oxide semiconductor by removing contamination sources caused by carbon atoms other than defects in the semiconductor thin film. The plasma processing method may be a direct plasma method in which a plasma is instantly formed between a substrate and an electrode through which a precursor is introduced in a chamber, or a remote plasma method in which a plasma is generated outside the chamber to enter the chamber.

In order to evaluate the characteristics of the thin film transistor according to the present invention, a thin film transistor having the structure shown in FIG. 2 was fabricated. More specifically, a substrate having a SiO ₂ insulating layer of 100 nm thickness formed on high-doped p ⁺⁺ -Si was used. In order to pattern the channel layer, the active mask of the shadow mask was deposited on the SiO ₂ / p ⁺⁺ -Si substrate and the ZnON channel layer was deposited by RF sputtering to 30 nm. The deposition conditions of the channel layer are as follows; RF power: 37 W, process pressure: 6.8 mTorr, Ar: N ₂ : O ₂ = 5: 9: 0.1 sccm. The source / drain mask was precisely aligned on the patterned substrate with an optical microscope, and then a metal electrode, Mo, was deposited to a thickness of 100 nm by DC sputtering. The deposition conditions were as follows; DC power: 20 W, process pressure: 3 mTorr, Ar: 10 sccm. After fabricating the thin film transistors, contact heat treatment was performed using RTP (Rapid Thermal Process). The heat treatment conditions are as follows; Temperature: 250 캜, time: 5 min, N ₂ : 150 sccm, process pressure: 0.5 Torr.

In the manufacturing example, after the deposition of the channel layer made of ZnON, the plasma was processed in the ammonia atmosphere to fabricate the thin film transistor. In the control group, the thin film transistor was fabricated without any additional treatment of the channel layer. For comparison, the channel layer was plasma treated in a nitrogen or oxygen atmosphere instead of ammonia plasma, and thin film transistors were fabricated to evaluate the device characteristics together. The plasma treatment was carried out at 50 W for 30 seconds, the working temperature was 300 ° C., and the working pressure was 340 mTorr. During nitrogen plasma or ammonia plasma treatment, the flow rate of nitrogen or ammonia was 100 sccm, and the flow rate of oxygen during oxygen plasma treatment was 30 sccm.

The transfer characteristics of the gate voltage (Vg) -drain current (Id) were measured for the fabricated thin film transistor, and the results are shown in FIG. 3. Table 1 shows device characteristics of the fabricated thin film transistor. In FIG. 3 and Table 1, Ini represents a thin film transistor in which a channel layer is not treated with plasma, and O ₂ , N ₂ , and NH ₃ represent the atmosphere during plasma processing.

Referring to FIG. 3 and Table 1, the field effect mobility was somewhat reduced by treating the channel layer with ammonia plasma, but still showed excellent field effect mobility. Subthreshold swing (SS ), Threshold voltage and current on / off ratio (I _{on / off} ) characteristics of the ultra-high mobility thin film transistor. In contrast, in the case of a thin film transistor in which a channel layer is treated with an oxygen plasma or a nitrogen plasma, not only mobility characteristics but also sub-threshold swing, threshold voltage, and current flicker ratio are degraded.

The thin film transistor according to various embodiments of the present invention can be used as a switching element or a driving element in a pixel of a display, that is, an active matrix display, for example, a liquid crystal display or an organic light emitting display. In particular, the thin film transistor according to the embodiment of the present invention is applicable to a flat panel display such as a next generation high resolution AMLCD (active matrix liquid crystal display) or an AMOLED (active matrix organic light emitting diode) . It is natural that the present invention can be applied to various fields of other electronic devices such as memory devices and logic devices.

100 thin film transistor
110 substrate 120 gate electrode
130 gate insulating layer 140 channel layer
151 source electrode 152 drain electrode

Claims (6)

A channel layer formed of a semiconductor material; A source electrode and a drain electrode facing each other on the channel layer; A gate electrode for applying an electric field to the channel layer; And a gate insulating layer interposed between the gate electrode and the channel layer,
Wherein the channel layer is formed of a metal oxide thin film treated with a plasma containing ammonia.
The method according to claim 1,
Wherein the metal oxide is zinc oxide or indium oxide.
Forming a gate electrode on the substrate; forming a gate insulating layer on the gate electrode; forming a channel layer corresponding to the gate electrode on the gate insulating layer; A method of manufacturing a thin film transistor, comprising: forming a source electrode and a drain electrode,
Wherein forming the channel layer comprises:
(A) forming a thin metal-oxide film corresponding to a gate electrode on a gate insulating layer;
(B) treating the thin metal oxide film with a plasma containing ammonia;
Wherein the step of forming the thin film transistor comprises the steps of:
An electronic device comprising the thin film transistor of claim 1 or 2.
5. The method of claim 4,
Wherein the electronic device is a display device.
6. The method of claim 5,
Wherein the thin film transistor is used as a switching element or a driving element.

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