KR20170044840A - Circuit boards and fabrication method for circuit boards and electronics packages and fabrication method for electronics packages using the same circuit boards - Google Patents

Circuit boards and fabrication method for circuit boards and electronics packages and fabrication method for electronics packages using the same circuit boards Download PDF

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Publication number
KR20170044840A
KR20170044840A KR1020150144446A KR20150144446A KR20170044840A KR 20170044840 A KR20170044840 A KR 20170044840A KR 1020150144446 A KR1020150144446 A KR 1020150144446A KR 20150144446 A KR20150144446 A KR 20150144446A KR 20170044840 A KR20170044840 A KR 20170044840A
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KR
South Korea
Prior art keywords
circuit wiring
temporary substrate
layer
forming
circuit board
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KR1020150144446A
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Korean (ko)
Inventor
오태성
박대웅
박동현
Original Assignee
홍익대학교 산학협력단
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Priority to KR1020150144446A priority Critical patent/KR20170044840A/en
Publication of KR20170044840A publication Critical patent/KR20170044840A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/462—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0073—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces
    • H05K3/0079—Masks not provided for in groups H05K3/02 - H05K3/46, e.g. for photomechanical production of patterned surfaces characterised by the method of application or removal of the mask
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/146—By vapour deposition
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0162—Silicon containing polymer, e.g. silicone

Abstract

The present invention is applicable to elastic electronic devices such as skin patch type electronic devices, electronic skin, smart clothes, smart watches, wearable health monitors, etc. More particularly, the present invention relates to a circuit board, a manufacturing method thereof, and an electronic device package using the circuit board and a manufacturing method thereof. In the manufacturing method of a circuit board, a temporary substrate separation layer is formed on a hard and flat temporary substrate. After a circuit line is provided in the temporary substrate separation layer, a liquid-phase stretchable polymer is poured onto the substrate to be cured. A flexible polymer substrate layer embedded with the circuit line is formed, and then a circuit board is formed by separating the temporary substrate from them. So, a flexible and stretchable circuit board can be provided.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a circuit board, a manufacturing method thereof, and an electronic device package using the circuit board and a manufacturing method thereof,

The present invention relates to a circuit board having flexibility and stretchability for application to elastic electronic devices such as skin patch type electronic device, electronic skin, smart clothing, smart watch, wearable health monitor and the like, a manufacturing method thereof, and an electronic device More particularly, the present invention relates to a package and a method of manufacturing the same. More particularly, the present invention relates to a package and a method of manufacturing the package, and more particularly, to a method of forming a temporary substrate separating layer on a hard and flat temporary substrate and providing circuit wiring on the temporary substrate separating layer, A circuit substrate having a flexible polymer substrate layer in which a circuit wiring is embedded and then separating a temporary substrate therefrom, a manufacturing method thereof, and an electronic device package using the circuit substrate and a manufacturing method thereof.

Electronic devices are becoming increasingly smaller, lighter, faster, and more versatile. However, conventional electronic devices such as smart phones, cell phones, tablet PCs, and notebook computers have difficulty in flexing and stretching due to the mounting of silicon (Si) based semiconductor chips on a rigid substrate such as a PCB.

In recent years, a flexible substrate such as a PCB has been replaced with a flexible substrate such as an FPCB, and a thin semiconductor chip having a very thin thickness is mounted on the flexible substrate. However, in this case, It has been difficult to impart elasticity to the device.

Next-generation devices such as smartphone built-in smart clothing, skin patch-type electronic device, electronic skin, wearable health monitoring, etc., require flexible electronic devices that can maintain their electrical functions even if they are deformed by external stress, .

In order to realize a flexible and flexible electronic device package, a flexible and stretchable circuit board having flexible circuit wiring is required. To this end, a flexible circuit board 10 having a linear circuit wiring 12 on a flexible polymer substrate layer 11 as shown in FIG. 1 or a flexible circuit board 10 having a horseshoe shaped circuit wiring 10 on a flexible, A flexible circuit board 20 having a flexible circuit board 21 has been proposed by the prior art. However, in the conventional stretchable circuit substrates 10 and 20 according to the conventional technique, the mask pattern 31 is formed on the stretchable polymer substrate layer 11 as shown in the operation flowchart shown in Fig. 3, The wirings 12 and 21 should be provided. However, if the elastic polymer substrate layer 11 is soft and has a low strength, it is difficult to maintain the shape of the polymer substrate layer 11 as a whole because the polymer substrate layer 11 is softened, It is difficult to provide the circuit wiring 12 and 21 with a desired shape and accuracy.

In the above-described conventional techniques, the circuit wiring lines 12 and 21 are formed on the stretchable polymer substrate layer 11, which has been cured and is in a solid state, by a thin film formation method such as vacuum deposition or sputtering. However, since the elastic polymer such as PDMS (polydimethylsiloxane) has a weak adhesive force with the metal thin film due to a very low surface energy in the solid state in which the curing is completed, in the flexible circuit boards 10 and 20 according to the conventional technology, (12, 21) may peel off from the polymer substrate layer (11).

In another conventional technique, a metal-polymer paste in which a metal powder is mixed with a liquid stretchable polymer is screen printed on a stretchable polymer substrate layer 11 and then cured to form a stretchable circuit substrate 12 10,20) were proposed. In this conventional technique, the flexible polymer substrate layer 11, which is low in strength, soft in strength, slightly wicked in and out of the room, is difficult to keep its shape flat, and the thick film circuit wiring 12, 21 ) Pattern with a desired shape and accuracy.

The electrical conduction is carried out by the contact between the metallic powder in the circuit wiring and the bonding between the polymer substrate layer 11 and the circuit wiring 12 or 21 is carried out by the circuit wiring 12 , 21). However, when the metal-polymer paste for forming the thick film circuit interconnects 12 and 21 is formed, the viscosity of the liquid-phase stretchable polymer is high and it is difficult to perform homogeneous mixing. In addition, since the elastic polymer covers the metal powders in the thick film circuit interconnects 12 and 21 after the curing process is completed, the contact between the metal powders is interrupted, so that the resistance of the thick film circuit interconnects 12 and 21 becomes too high, have.

The present invention relates to an elastic polymer substrate layer 11 having a low strength, a soft strength, and a small amount of force to allow the flexible polymer substrate layer 11 to come in and out, The provisional substrate separation layer 42 is provided on the hard temporary substrate 41 and the circuit wiring 44 is formed on the temporary substrate separation layer 42 as means for solving the problems of the flexible substrate 10, The liquid-phase stretchable polymer is poured onto the substrate and cured to form the polymer substrate layer 45 having the circuit wiring 44 therein. Then, the temporary substrate 41 is separated and the temporary substrate separation layer 42 is formed And a flexible / stretch circuit board (40) made of the flexible circuit board (40).

According to the present invention, there is provided a method of manufacturing a semiconductor device, comprising: (a) forming a temporary substrate separation layer on a temporary substrate; (b) forming a circuit wiring on the temporary substrate separation layer; (c) forming a polymer substrate layer by pouring and curing the liquid polymer on the circuit wiring in the form of a substrate; (d) separating and removing the temporary substrate from the polymer substrate layer having the circuit wiring therein; And (e) removing the temporary substrate separation layer from the polymer substrate layer in which the circuit wiring is embedded. The method of manufacturing a circuit board according to the present invention includes the steps of:

Preferably, the step (b) includes: providing a mask pattern for circuit wiring formation on the temporary substrate separation layer; Forming a circuit wiring in the mask pattern; And removing the mask pattern. And a control unit.

Preferably, the step (c) includes the steps of: applying an adhesive layer treatment to the circuit wiring; And pouring and curing a liquid polymer on the adhesive layer of the circuit wiring to form a polymer substrate layer; And a control unit.

Preferably, the adhesive layer treatment of the circuit wiring is carried out by using an adhesive such as MPTMS (mercaptopropyltrimethoxysilane), silanes, pyrelene, epoxy, phenol, polyimide, polyester, polytetrafluoroethylene (PTFE), polycarbonate, Polyether sulfone, Teflon, FR4, silicone, PDMS (polydimethylsiloxane), and polyurethane.

Preferably, the adhesive layer treatment of the circuit wiring includes a composition containing at least one of chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tungsten (W) Is used.

Preferably, the temporary substrate separation layer is formed of a material selected from the group consisting of Ni, Cu, Ag, Sn, Al, Fe, Au, Pt, Is a metal of a composition containing any one or two or more of chromium (Cr), titanium (Ti), tantalum (Ta), and tungsten (W).

Preferably, the temporary substrate separation layer is made of pyrelene.

Preferably, the circuit wiring is formed of a material selected from the group consisting of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe), gold (Au), platinum (Cr), titanium (Ti), tantalum (Ta), and tungsten (W).

Preferably, the circuit wiring is formed by combining any one or two or more of metal powder, nano-metal powder, tin sonnototube, graphene, and conductive ceramic powder.

Preferably, the circuit wiring is formed of a material selected from the group consisting of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe), gold (Au), platinum A metal powder, a nano-metal powder, a carbon nanotube, a graphene, a conductive ceramic powder, or a conductive layer made of a composition containing one or more of Cr, Cr, Ti, Ta, Or a conductive layer composed of two or more of the above-mentioned layers.

Preferably, the circuit wiring is formed by any one of vacuum deposition, electroplating, electroless plating, sputtering, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Or a combination of two or more.

Preferably, the polymer substrate layer comprises at least one of polydimethylsiloxane (PDMS), silicone, polyurethane, epoxy, phenol, polyimide, polyester, polycarbonate, polyarylate, polyether sulfone, And the like.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: (a) forming a temporary substrate separation layer on an upper temporary substrate; (b) forming an upper circuit wiring on the temporary substrate separation layer of the upper temporary substrate; (c) forming a via in the upper circuit wiring; (d) forming a temporary substrate separation layer on the lower temporary substrate; (e) forming a lower circuit wiring on the temporary substrate separation layer of the lower temporary substrate; (f) forming a pad in the lower circuit wiring; (g) arranging and bonding the vias of the upper circuit wiring to the pads of the lower circuit wiring; (h) forming a polymer substrate layer by filling and curing a liquid polymer between an upper temporary substrate and a lower temporary substrate to which an upper circuit wiring and a lower circuit wiring are bonded; (i) peeling off the upper temporary substrate and the lower temporary substrate; And (j) removing the temporary substrate separation layer from the polymer substrate layer in which the circuit wiring is embedded. The method of manufacturing a circuit board according to the present invention includes the steps of:

Preferably, the step (b) includes: providing a mask pattern for circuit wiring on the temporary substrate separation layer of the upper temporary substrate; Forming an upper circuit wiring in the mask pattern; And removing the mask pattern. And a control unit.

Preferably, the step (c) includes: providing a mask pattern for via formation in the upper circuit wiring; Forming a via in the mask pattern; And removing the mask pattern. And a control unit.

Preferably, the step (e) includes: providing a mask pattern for circuit wiring on the temporary substrate separation layer of the lower temporary substrate; Forming a lower circuit wiring in the mask pattern; And removing the mask pattern. And a control unit.

Preferably, the step (f) includes the steps of: providing a pad formation mask pattern on the lower circuit wiring; Providing a pad in the mask pattern; And removing the mask pattern. And a control unit.

Preferably, in the step (g), bonding layers are individually provided on the pad surface of the lower circuit wiring or the via surface of the upper circuit wiring for bonding the vias of the upper circuit wiring to the pads of the lower circuit wiring, And a bonding layer is provided on the pad surface of the wiring and the via surface of the upper circuit wiring.

Preferably, the bonding layer is formed of a material selected from the group consisting of silver (Ag), copper (Cu), bismuth (Bi), indium (In), zinc (Zn), antimony (Sb) Au) is contained in the composition.

Preferably, the bonding layer is formed by any one of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) And is characterized by using two or more methods.

Preferably, the vias are made of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, ), Titanium (Ti), tantalum (Ta), tungsten (W), or a combination of two or more thereof.

Preferably, the via may be formed by any one or both of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) And the above-mentioned methods are combined.

Preferably, the pad is made of at least one of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe), gold (Au), platinum ), Titanium (Ti), tantalum (Ta), tungsten (W), or a combination of two or more thereof.

Preferably, the pad is formed of one or both of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) The method is characterized by using the above method.

Preferably, in the steps (b) and (h), the circuit wiring is subjected to an adhesive layer treatment.

Preferably, the adhesive layer treatment of the circuit wiring is carried out by using an adhesive such as MPTMS (mercaptopropyltrimethoxysilane), silanes, pyrelene, epoxy, phenol, polyimide, polyester, polytetrafluoroethylene (PTFE), polycarbonate, Polyether sulfone, Teflon, FR4, silicone, PDMS (polydimethylsiloxane), and polyurethane.

Preferably, the adhesive layer treatment of the circuit wiring includes a composition containing at least one of chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tungsten (W) Is used.

Preferably, the temporary substrate separation layer is formed of a material selected from the group consisting of Ni, Cu, Ag, Sn, Al, Fe, Au, Pt, Is a metal of a composition containing any one or two or more of chromium (Cr), titanium (Ti), tantalum (Ta), and tungsten (W).

Preferably, the temporary substrate separation layer is made of pyrelene.

Preferably, the circuit wiring is formed of a material selected from the group consisting of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe), gold (Au), platinum (Cr), titanium (Ti), tantalum (Ta), and tungsten (W).

Preferably, the circuit wiring is formed by combining any one or two or more of metal powder, nano-metal powder, tin sonnototube, graphene, and conductive ceramic powder.

Preferably, the circuit wiring is formed of a material selected from the group consisting of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe), gold (Au), platinum A metal powder, a nano-metal powder, a carbon nanotube, a graphene, a conductive ceramic powder, or a conductive layer made of a composition containing one or more of Cr, Cr, Ti, Ta, Or a conductive layer composed of two or more of the above-mentioned layers.

Preferably, the circuit wiring is formed by any one of vacuum deposition, electroplating, electroless plating, sputtering, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Or a combination of two or more.

Preferably, the polymer substrate layer comprises at least one of polydimethylsiloxane (PDMS), silicone, polyurethane, epoxy, phenol, polyimide, polyester, polycarbonate, polyarylate, polyether sulfone, And the like.

According to the present invention, there is also provided a circuit board manufactured by the manufacturing method according to any one of the above-described features.

According to another aspect of the present invention, there is provided a method of manufacturing a circuit board, comprising: mounting an electronic component on a circuit board manufactured by a manufacturing method according to any one of the preceding aspects; The method of manufacturing an electronic device package according to claim 1, further comprising:

According to the present invention, there is provided an electronic device package manufactured by a manufacturing method according to any one of the above-described features.

According to the present invention, by forming the circuit wiring 44 on the rigid and flat spare substrate 41, the process of forming the circuit wiring 44 is facilitated, and it becomes possible to manufacture the circuit with the desired shape and precision. According to the present invention, since the adhesive force between the circuit wiring 44 and the stretchable polymer substrate layer 45 is made by the reaction between the circuit wire 44 and the liquid polymer, There is an advantage that peeling of the circuit wiring 44 can be suppressed. Also, according to the present invention, it is possible to provide a flexible / stretchable double-sided circuit board 50 having circuit wirings 53 and 55 on both sides of the stretchable polymer substrate layer 58, unlike the existing technology.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of a circuit wiring portion in a flexible circuit board having a linear circuit wiring according to the prior art. Fig.
Fig. 2 is a schematic view of a circuit wiring portion in a flexible circuit board having a horseshoe shaped circuit wiring by an existing technique. Fig.
FIG. 3 is a flowchart showing a manufacturing process of a stretchable circuit substrate according to the prior art: (a) a schematic view of a stretchable polymer substrate layer; and (b) a schematic view showing a circuit pattern forming mask pattern in the stretchable polymer substrate layer. (c) a schematic view showing a circuit wiring formed in the mast pattern; (d) a schematic view of a flexible circuit board formed by removing the mask pattern.
FIG. 4 is a flowchart illustrating a manufacturing process of a flexible / stretchable circuit board using a temporary substrate separating process according to the present invention. FIG. 4A is a schematic diagram of a temporary substrate separating layer formed on a temporary substrate. (b) a schematic view of a circuit wiring formation mask pattern formed on the temporary substrate separation layer, (c) a schematic view showing a circuit wiring formed in the mast pattern; (d) a schematic view in which the mask pattern is removed; (e) a schematic view in which a polymeric substrate layer is formed by pouring and curing a liquid stretchable polymer on the circuit wiring in the form of a substrate; (f) a schematic view of the temporary substrate removed from the polymer substrate layer in which the circuit wiring is embedded; (g) a schematic diagram of removing the temporary substrate separation layer from the circuit wiring-embedded polymer substrate layer from which the temporary substrate is removed; (h) A schematic view of a flexible / stretch circuit board completed by reversing so that the surface on which the circuit wiring is embedded is turned upside.
FIG. 5 is a flow chart of a manufacturing process of a flexible / stretchable double-sided circuit board using a temporary substrate separating process according to the present invention: (a) a schematic view showing a temporary substrate separating layer formed on an upper temporary substrate; (b) a schematic view showing a circuit pattern forming mask pattern on a temporary substrate separating layer of the upper temporary substrate, (c) a schematic view showing a circuit pattern formed in the mast pattern; (d) a schematic view of removing the mask pattern, and (e) a mask pattern for forming a via for electrical connection with the lower circuit wiring on the upper circuit wiring of the upper temporary substrate. (g) forming a temporary substrate separation layer on the lower temporary substrate; (f) filling the via patterning mask pattern and removing the mask pattern to form vias in the upper circuit wiring; (h) a schematic diagram in which a lower circuit wiring is formed in a temporary substrate separation layer of the lower temporary substrate; (i) a schematic view showing a mask pattern for forming a pad for bonding to a via of an upper circuit wiring in the lower circuit wiring; (1) A method for manufacturing a semiconductor device, comprising the steps of: (a) forming a pad and a bonding layer sequentially in the pad formation mask pattern; A schematic view in which vias of the upper circuit wiring are arranged on pads of the lower circuit wiring and the upper circuit wiring vias are bonded to the lower circuit wiring pads using the bonding layer of the lower circuit wiring pad; (m) a schematic view showing a state in which an upper temporary substrate and a lower temporary substrate, which are joined via circuit wiring vias, are filled with a liquid stretchable polymer and cured to form a stretchable polymer substrate layer; (n) a schematic diagram in which an upper temporary substrate and a lower temporary substrate are separated and removed from a stretchable polymer substrate layer having circuit wiring on both surfaces thereof; And (o) a schematic view of a flexible / stretchable double-sided circuit board completed by removing the temporary substrate separation layer from the double-sided circuit wiring-embedded polymer substrate layer from which the upper temporary substrate and the lower temporary substrate have been removed.

≪ Example 1 >

First, nickel (Ni) having a thickness of 30 nm was vacuum-deposited on the silicon wafer to be used as the temporary substrate 41 with the temporary substrate separation layer 42 as shown in the sectional view of FIG. 4 (a). A metal mask pattern 43 having the shape of a circuit wiring 44 is provided on the nickel temporary substrate separation layer 42 as shown in FIG. 4 (b) A gold (Au) thin film is sputtered to a thickness of 150 nm on the circuit wiring 44 in the first and second wiring patterns 43 and 43 and the mask pattern 43 is removed. As shown in FIG. 4D, Circuit wiring 44 is provided.

A liquid phase obtained by mixing a base of PDMS (polydimethyl siloxane) and a curing agent at a ratio of 10: 1 was poured into a substrate form on a gold circuit wiring 44 formed in the temporary substrate separation layer 42, 60, the polymer substrate layer 45 was provided as shown in Fig. 4 (e). Then, this was put in distilled water to separate the silicon wafer used as the temporary substrate 41 from the nickel temporary substrate separation layer 42 as shown in FIG. 4 (f).

4 (g), the nickel temporary substrate separating layer 42 is formed as shown in FIG. 4 (g) by charging the nickel etching solution into the polymer substrate layer 45 having the circuit wiring 44 with the temporary substrate 41 removed therefrom, 4 (h), the flexible / stretch circuit board 40 according to the present invention is provided.

In this embodiment, since the thin film circuit wiring 44 is formed by using the hard and flat silicon wafer as the temporary substrate 41, unlike the existing technology, the shape accuracy of the circuit wiring 44 is remarkably improved It is possible. Unlike the existing technique, which relies on adhesion between the low-reactivity solid polymer substrate layer 11 and the circuit wiring lines 12 and 21, in the present invention, by the reaction between the circuit wiring line 44 and the liquid polymer, ) And the polymer substrate layer 45 are bonded to each other, the adhesive force between the circuit wiring 44 and the stretchable polymer substrate layer 45 can be greatly improved.

≪ Example 2 >

First, nickel (Ni) having a thickness of 30 nm was vacuum-deposited on the silicon wafer to be used as the temporary substrate 41 with the temporary substrate separation layer 42 as shown in the sectional view of FIG. 4 (a).

Then, as shown in FIG. 4 (b), a metal mesh screen mask pattern 43 in the form of a circuit wiring 44 is arranged on the nickel temporary substrate separation layer 42, and then a copper powder, Carbon nanotube composite paste prepared by mixing a carbon nanotube and a solvent and a binder is screen-printed in a mask pattern 43 as shown in FIG. 4 (c), and then the mask pattern 43 is removed to form a copper- As shown in FIG. 4 (d), the composite paste was sintered to provide the circuit wiring 44 made of the copper-carbon nanotube thick film on the nickel temporary substrate separation layer 42.

A liquid phase obtained by mixing a base of PDMS (polydimethyl siloxane) and a curing agent at a ratio of 10: 1 was poured into a substrate form on a circuit wiring 44 formed in the temporary substrate separation layer 42, The polymer substrate layer 45 was provided as shown in Fig. 4 (e). Then, this was put in distilled water to remove the silicon wafer used as the temporary substrate 41 from the nickel temporary substrate separation layer 42 as shown in FIG. 4 (f).

4 (g), the nickel temporary substrate separation layer 42 is formed by filling the nickel substrate etching solution in the polymer substrate layer 45 with the thick film circuit wiring 44 removed by peeling off the temporary substrate 41, And a flexible / stretch circuit board 40 in which the copper-carbon nanotube thick film circuit wiring 44 according to the present invention is embedded as shown in FIG. 4 (h).

In this embodiment, unlike the existing technology, since a thick and flat silicon wafer is used as the temporary substrate 41 to form the thick circuit wiring 44, the copper-carbon printed directly on the PDMS polymer substrate layer 11 It is possible to significantly improve the shape accuracy of the nanotube thick film circuit wiring paste. Further, in the PDMS polymer substrate 11 having a burning temperature of 300, the sintering temperature of the copper-carbon nanotube circuit wiring paste can not be raised to 300 or more, so that a large amount of solvent and binder remain after the paste is sintered, There is a problem in that the resistivity of the copper-carbon nanotube circuit wiring 44 is increased. On the other hand, in this embodiment, since the copper-carbon nanotube circuit wiring paste is provided on the silicon wafer temporary substrate 41 having the melting temperature of 141 ° C, The solvent and the binder can be completely removed by sintering the copper-carbon nanotube paste, so that the resistivity of the copper-carbon nanotube circuit wiring 44 can be remarkably lowered.

≪ Example 3 >

5 (a), nickel (Ni) having a thickness of 30 nm was vacuum-deposited on the silicon wafer to be used as the upper temporary substrate 51 with the temporary substrate separation layer 52. Next, as shown in FIG. 5 (b), a photoresist mask pattern 59 in the form of an upper circuit wiring 53 is provided on the nickel temporary substrate separation layer 42 as shown in FIG. 5 (b) A gold (Au) thin film is sputtered to a thickness of 150 nm in the photoresist mask pattern 59 and the photoresist mask pattern 59 is removed as shown in FIG. 5 (d) The upper circuit wiring layer 53 is provided on the temporary substrate separating layer 52 of the second substrate 51. A photoresist mask pattern 59 having holes for forming vias 54 is formed on the upper circuit wiring 53 as shown in FIG. The photoresist pattern 59 is removed to remove the photoresist pattern 59 and the upper circuit wiring 53 is formed on the upper circuit wiring 53 with a height of 50 m and a diameter of 100 m Copper vias 54 are formed.

Then, as shown in FIG. 5 (g), nickel (Ni) having a thickness of 30 nm was vacuum-deposited on the silicon wafer to be used as the lower temporary substrate 55 with the temporary substrate separation layer 52. A photoresist mask pattern 59 in the form of a lower circuit wiring 56 is formed on the nickel temporary substrate separation layer 52 and then a gold thin film 150 is formed in the lower photoresist mask pattern 59 the lower circuit wiring 56 is formed on the temporary substrate separation layer 52 of the lower temporary substrate 55 as shown in Figure 5 (h) by sputtering the photoresist mask pattern 59 by sputtering Respectively. 5 (i), a photoresist mask pattern 59 for forming a pad 57 is provided on the lower circuit wiring 56. Then, as shown in FIG. 5 (j) Copper (Sn-Ag-Cu) lead-free solder was electroplated to a height of 10 m on the copper pad 57 having a height of 10 m, and then a mask pattern 59 The copper pads 57 provided with the bonding layer 60 are bonded to the lower circuit wiring 56 by 170 m so that the upper circuit wiring vias 54 can be bonded to the lower circuit wiring 56 as shown in FIG. 5 (k) Diameter.

The upper temporary substrate 51 is then turned over and the copper vias 54 provided in the upper circuit wiring 53 are arranged in the pads 57 provided in the circuit wiring 56 of the lower temporary substrate 55 The solder joint layer 60 provided on the surface of the lower wiring pad 57 is reflowed to form the upper circuit wiring vias 54 into the lower circuit wiring pads 57 as shown in FIG. Respectively.

The upper temporary substrate 51 and the lower temporary substrate 55 bonded together via the upper circuit wiring vias 54 are filled with a liquid-phase stretchable polymer in which a PDMS base and a hardener are mixed at a ratio of 10: 1, A PDMS stretchable polymer substrate layer 58 is provided between the upper circuit wiring 53 and the lower circuit wiring 56 as shown in FIG. 5 (m). 5 (n), the silicon wafers used as the upper temporary substrate 51 and the lower temporary substrate 56 were peeled off from the nickel temporary substrate separation layers 52 .

Then, as shown in FIG. 5 (o), the upper surface temporary substrate 51 and the lower temporary substrate 55 are peeled off and the removed double-sided circuit wiring 53, 56 internal polymer substrate layer 58 is coated with nickel And the upper and lower nickel temporary substrate separating layers 52 are removed by charging the etching solution into the etching / flexing / stretching double sided circuit board 50 according to the present invention.

In the embodiment of the present invention, a gold (Au) thin film was used for the circuit wirings 44, 53 and 56. In addition, in the present invention, the circuit wirings 44, 53, and 56 may be formed of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe) , A metal of a composition containing at least one of platinum (Pt), chromium (Cr), titanium (Ti), tantalum (Ta), and tungsten (W).

In the present invention, the circuit wirings 44, 53, and 56 may be formed of any one or a combination of metal powder, nano metal powder, tin soda nanoweb, graphene, and conductive ceramic powder.

In the present invention, copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe) A metal powder, a nano metal powder, a carbon nanotube, a carbon nanotube, and a conductive layer made of a composition containing at least one of Pt, Cr, Ti, Ta, Fins, and conductive layers made of any one or more of the conductive ceramic powders may be combined to form two or more layers.

In the embodiment of the present invention, the flexible polymer substrate layers 45 and 58 for embedding the circuit wiring lines 44, 53, and 56 are provided using PDMS. In addition, in the present invention, the stretchable polymer substrate layers 45 and 58 may be formed of a material such as polydimethylsiloxane (PDMS), silicone, polyurethane, epoxy, phenol, polyimide, polyester, polycarbonate, polyarylate, Teflon, and FR4.

In the present invention, in order to improve the adhesive force between the circuit wiring lines 44, 53, and 56 and the stretchable polymer substrate layers 45 and 55, the circuit wiring lines 44, 53, and 56 provided in the temporary substrate separation layers 42 and 52 ), And then the liquid-phase stretchable polymer is poured and cured to provide the stretchable polymer substrate layers 45, 58. The adhesive layer between the circuit wirings 44, 53 and 56 and the stretchable polymer substrate layers 45 and 58 may be formed of an adhesive layer of MPTMS (mercaptopropyltrimethoxysilane), silanes, pyrelene, epoxy, phenol, polyimide, poly It is preferable to use at least one selected from the group consisting of polytetrafluoroethylene (PTFE), polycarbonate, polyarylate, polyether sulfone, Teflon, FR4, silicone, PDMS (polydimethylsiloxane) and polyurethane.

In the present invention, it is also possible to use chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tungsten (Si), or the like as an adhesive layer between the circuit wirings 44, 53, 56 and the stretchable polymer substrate layers 45, 58 W) and aluminum (Al) can be used as the metal layer.

In the present invention, the circuit wiring lines 44, 53, and 56 may be formed by a method such as vacuum deposition, electroplating, electroless plating, sputtering, electron beam deposition, chemical vapor deposition, MBE Beam Epitaxy, and MOCVD (Metal Organic Chemical Vapor Deposition). In the present invention, it is also possible to use a thick film paste screen printing method instead of the sputtering method for forming the circuit wirings (44, 53, 56).

In the embodiment of the present invention, copper (Cu) is used as the via 54 for connecting the upper circuit wiring 53 and the lower circuit wiring 56. In addition, in the present invention, the vias 54 may be formed of copper, silver, tin, aluminum, nickel, iron, gold, platinum, (Cr), titanium (Ti), tantalum (Ta), tungsten (W), or the like.

In the embodiment of the present invention, the electroplating method is used as a method of forming the vias 54 connecting the upper circuit wiring 53 and the lower circuit wiring 56. In addition, in the present invention, the vias 54 may be formed of any thin film including electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), and MOCVD (Metal Organic Chemical Vapor Deposition) It is also possible to use a forming method or a coating method. Further, in the present invention, it is also possible to use a screen printing method of a thick film paste as a method of forming the vias 54.

In the embodiment of the present invention, the Sn-Ag-Cu lead-free solder is used as the bonding layer 60 connecting the upper circuit wiring vias 54 to the lower circuit wiring pads 57. In the present invention, the bonding layer 60 may be formed of at least one selected from the group consisting of silver (Ag), copper (Cu), bismuth (Bi), indium (In), zinc (Zn), antimony (Sb) ), And gold (Au).

In the embodiment of the present invention, the electroplating method is used as a method of forming the bonding layer 60 connecting the upper circuit wiring vias 54 to the lower circuit wiring pads 57. In addition, in the present invention, the bonding layer 60 may be formed by a conventional method such as electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) It is possible to use any one or two or more of them.

In the embodiment of the present invention, copper (Cu) is used as the lower circuit wiring pad 57 to which the upper circuit wiring via 54 is to be connected. In addition, in the present invention, the lower circuit wiring pad 57 may be formed of at least one of copper (Cu), silver (Ag), tin (Sn), aluminum (Al), nickel (Ni), iron (Fe) It is preferable that the metal is a single layer or a multilayer of a metal having a composition containing at least one of Pt, Cr, Ti, Ta and W.

In the embodiment of the present invention, the lower circuit wiring pads 57 to which the upper circuit wiring vias 54 are to be joined are provided by electroplating. In addition, in the present invention, the lower circuit wiring pad 57 may be formed by a conventional method such as electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) It is possible to use any one or two or more of screen printing.

In the third embodiment of the present invention, copper vias 54 are formed in the upper circuit wiring 53 to connect the upper circuit wiring 53 and the lower circuit wiring 56 three-dimensionally, A pad 57 was formed. In addition, in the present invention, the pads 57 are provided in the upper circuit wiring 53, the vias 54 are provided in the lower circuit wiring 56, and the upper circuit wiring 53 and the lower circuit wiring 56 are connected It is also possible to connect. Further, in the present invention, it is also possible to provide vias 54 in the upper circuit wiring 53 and the lower circuit wiring 56, and to connect them by connecting them.

The lower circuit wiring pads 57 are provided with the bonding layer 60 for three-dimensionally connecting the upper circuit wiring 53 and the lower circuit wiring 56 in the third embodiment of the present invention. In addition, in the present invention, the bonding layer 60 may be provided on the surface of the upper circuit wiring vias 54 to bond the upper circuit wiring vias 54 and the lower circuit wiring pads 57. It is also possible to provide the bonding layer 60 on both the surface of the upper circuit wiring vias 54 and the surface of the lower circuit wiring pads 57 to bond them.

In the embodiment of the present invention, nickel (Ni) is used as the temporary substrate separation layers 42 and 52. In addition, in the present invention, nickel (Ni), copper (Cu), silver (Ag), tin (Sn), aluminum (Al), iron (Fe) , Or a metal having a composition containing at least one of platinum (Pt), chromium (Cr), titanium (Ti), tantalum (Ta), and tungsten (W). In the present invention, it is also possible to use pyrelene as the temporary substrate separation layers 42 and 52.

In the present invention, electronic parts are mounted on the flexible / stretch circuit boards 40 and 50 manufactured using the separation process in the temporary substrate 41, 51 and 55 as in the embodiment, The implementation of the package becomes possible.

As described above, an optimal embodiment has been disclosed in the drawings and specification. Although specific terms have been employed herein, they are used for purposes of illustration only and are not intended to limit the scope of the invention as defined in the claims or the claims. It will be understood by those skilled in the art that various modifications and equivalents may be made thereto without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

10. Circuit board having linear circuit wiring by the existing technology
11. Polymer substrate layer
12. Straight circuit wiring
20. A circuit board having horseshoe shaped circuit wiring by conventional techniques
21. Polymer substrate layer
22. Horseshoe shaped circuit wiring
31. Mask pattern
40. Circuit board
41. Temporary substrate
42. Temporary substrate separation layer
43. Mask pattern
44. Circuit Wiring
45. Polymer substrate layer
50. Double-sided circuit board
51. Upper temporary substrate
52. Temporary substrate separation layer
53. Top circuit wiring
54. Via
55. Lower temporary substrate
56. Lower circuit wiring
57. The pad
58. Polymer substrate layer
59. Mask pattern
60. Bonding layer

Claims (37)

(a) forming a temporary substrate separation layer on a temporary substrate;
(b) forming a circuit wiring on the temporary substrate separation layer;
(c) forming a polymer substrate layer by pouring and curing the liquid polymer on the circuit wiring in the form of a substrate;
(d) separating and removing the temporary substrate from the polymer substrate layer having the circuit wiring therein; And
(e) removing the temporary substrate separation layer from the polymer substrate layer having the circuit wiring therein; Wherein the step of forming the circuit board comprises the steps of:
The method according to claim 1,
The step (b)
Providing a mask pattern for circuit wiring on the temporary substrate separation layer;
Forming a circuit wiring in the mask pattern; And
Removing the mask pattern; Wherein the step of forming the circuit board comprises the steps of:
The method according to claim 1,
The step (c)
Subjecting the circuit wiring to an adhesive layer treatment; And
Pouring and curing a liquid polymer on the adhesive layer of the circuit wiring to form a polymer substrate layer; Wherein the step of forming the circuit board comprises the steps of:
The method of claim 3,
The adhesive layer treatment of the circuit wiring may be carried out by a known method such as MPTMS (mercaptopropyltrimethoxysilane), silanes, pyrelene, epoxy, phenol, polyimide, polyester, polytetrafluoroethylene (PTFE), polycarbonate, polyarylate, Wherein at least one selected from the group consisting of Teflon, FR4, silicone, polydimethylsiloxane (PDMS), and polyurethane is used.
The method of claim 3,
The adhesive layer of the circuit wiring may be formed by using a composition containing any one or more of chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tungsten (W) Wherein the circuit board is manufactured by a method of manufacturing a circuit board.
The method according to claim 1,
The temporary substrate separation layer may include at least one of Ni, Cu, Ag, Sn, Al, Fe, Au, Pt, , Tantalum (Ta), tungsten (W), titanium (Ti), tantalum (Ta), and tungsten (W).
The method according to claim 1,
Wherein the temporary substrate separation layer is made of pyrelene.
The method according to claim 1,
The circuit wiring may be formed of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, (Ti), tantalum (Ta), tungsten (W), or a combination of two or more thereof.
The method according to claim 1,
Wherein the circuit wiring is formed by combining any one of or two or more of metal powder, nano metal powder, tin sodium nitride, graphene, and conductive ceramic powder.
The method according to claim 1,
The circuit wiring may be formed of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, A metal powder, a nano metal powder, a carbon nanotube, a graphene, a conductive ceramic powder, or a conductive layer made of a composition containing at least one of tungsten (Ti), tantalum (Ta) And a conductive layer composed of two or more layers are combined to form a multilayer structure of two or more layers.
The method according to claim 1,
The circuit wiring may be formed by one or more of vacuum deposition, electroplating, electroless plating, sputtering, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Wherein the first and second circuit boards are connected to each other.
The method according to claim 1,
Wherein the polymer substrate layer comprises at least one of PDMS (polydimethylsiloxane), silicone, polyurethane, epoxy, phenol, polyimide, polyester, polycarbonate, polyarylate, polyether sulfone, Wherein the circuit board is manufactured by a method of manufacturing a circuit board.
(a) forming a temporary substrate separation layer on an upper temporary substrate;
(b) forming an upper circuit wiring on the temporary substrate separation layer of the upper temporary substrate;
(c) forming a via in the upper circuit wiring;
(d) forming a temporary substrate separation layer on the lower temporary substrate;
(e) forming a lower circuit wiring on the temporary substrate separation layer of the lower temporary substrate;
(f) forming a pad in the lower circuit wiring;
(g) arranging and bonding the vias of the upper circuit wiring to the pads of the lower circuit wiring;
(h) forming a polymer substrate layer by filling and curing a liquid polymer between an upper temporary substrate and a lower temporary substrate to which an upper circuit wiring and a lower circuit wiring are bonded;
(i) peeling off the upper temporary substrate and the lower temporary substrate; And
(j) removing the temporary substrate separation layer from the polymer substrate layer having the circuit wiring therein; Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
The step (b)
Providing a mask pattern for circuit wiring on the temporary substrate separation layer of the upper temporary substrate;
Forming an upper circuit wiring in the mask pattern; And
Removing the mask pattern; Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
The step (c)
Providing a mask pattern for via formation in the upper circuit wiring;
Forming a via in the mask pattern; And
Removing the mask pattern; Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
The step (e)
Providing a circuit pattern forming mask pattern on a temporary substrate separating layer of the lower temporary substrate;
Forming a lower circuit wiring in the mask pattern; And
Removing the mask pattern; Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
The step (f)
Providing a mask pattern for pad formation on the lower circuit wiring;
Providing a pad in the mask pattern; And
Removing the mask pattern; Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
In order to connect the vias of the upper circuit wiring to the pads of the lower circuit wiring in the step (g), a bonding layer may be individually formed on the pad surface of the lower circuit wiring or the via surface of the upper circuit wiring, And a bonding layer on the via surface of the upper circuit wiring, respectively.
19. The method of claim 18,
The bonding layer may be formed of any one of silver (Ag), copper (Cu), bismuth (Bi), indium (In), zinc (Zn), antimony (Sb), lead (Pb) And a composition containing one or two or more thereof.
19. The method of claim 18,
The bonding layer may be formed by any one or more of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Wherein said method comprises the steps of:
14. The method of claim 13,
The via may be formed of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, Ti, tantalum (Ta), tungsten (W), or a combination of two or more thereof.
14. The method of claim 13,
The via may be formed by a combination of any one or more of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
The pad may be made of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, Ti, tantalum (Ta), tungsten (W), or a combination of two or more thereof.
14. The method of claim 13,
The pad may be formed by one or more of electroplating, sputtering, vacuum deposition, electroless plating, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Wherein the step of forming the circuit board comprises the steps of:
14. The method of claim 13,
Wherein the circuit wiring is subjected to an adhesive layer treatment in the steps (b) and (h).
26. The method of claim 25,
The adhesive layer treatment of the circuit wiring may be carried out by a known method such as MPTMS (mercaptopropyltrimethoxysilane), silanes, pyrelene, epoxy, phenol, polyimide, polyester, polytetrafluoroethylene (PTFE), polycarbonate, polyarylate, Wherein at least one selected from the group consisting of Teflon, FR4, silicone, polydimethylsiloxane (PDMS), and polyurethane is used.
26. The method of claim 25,
The adhesive layer of the circuit wiring may be formed by using a composition containing any one or more of chromium (Cr), titanium (Ti), nickel (Ni), iron (Fe), tungsten (W) Wherein the circuit board is manufactured by a method of manufacturing a circuit board.
14. The method of claim 13,
The temporary substrate separation layer may include at least one of Ni, Cu, Ag, Sn, Al, Fe, Au, Pt, , Tantalum (Ta), tungsten (W), titanium (Ti), tantalum (Ta), and tungsten (W).
14. The method of claim 13,
Wherein the temporary substrate separation layer is made of pyrelene.
14. The method of claim 13,
The circuit wiring may be formed of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, (Ti), tantalum (Ta), tungsten (W), or a combination of two or more thereof.
14. The method of claim 13,
Wherein the circuit wiring is formed by combining any one of or two or more of metal powder, nano metal powder, tin sodium nitride, graphene, and conductive ceramic powder.
14. The method of claim 13,
The circuit wiring may be formed of at least one of copper, silver, tin, aluminum, nickel, iron, gold, platinum, chromium, titanium, A metal powder, a nano metal powder, a carbon nanotube, a graphene, a conductive ceramic powder, or a conductive layer made of a composition containing at least one of tungsten (Ti), tantalum (Ta) And a conductive layer composed of two or more layers are combined to form a multilayer structure of two or more layers.
14. The method of claim 13,
The circuit wiring may be formed by one or more of vacuum deposition, electroplating, electroless plating, sputtering, electron beam deposition, chemical vapor deposition, MBE (Molecular Beam Epitaxy), MOCVD (Metal Organic Chemical Vapor Deposition) Wherein the first and second circuit boards are connected to each other.
14. The method of claim 13,
Wherein the polymer substrate layer comprises at least one of PDMS (polydimethylsiloxane), silicone, polyurethane, epoxy, phenol, polyimide, polyester, polycarbonate, polyarylate, polyether sulfone, Wherein the circuit board is manufactured by a method of manufacturing a circuit board.
34. A circuit board produced by the method of any one of claims 1 to 34.
34. A method of manufacturing a circuit board, comprising: mounting an electronic component on a circuit board manufactured by the method of any one of claims 1 to 34; Further comprising the steps of:
36. An electronic device package manufactured by the manufacturing method of claim 36.
KR1020150144446A 2015-10-16 2015-10-16 Circuit boards and fabrication method for circuit boards and electronics packages and fabrication method for electronics packages using the same circuit boards KR20170044840A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113664807A (en) * 2021-08-31 2021-11-19 华中科技大学 Flexible electronic armor with protection function and manufacturing method and application thereof
KR20220043011A (en) * 2020-09-28 2022-04-05 한국전자통신연구원 stretchable-electric device and manufacturing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220043011A (en) * 2020-09-28 2022-04-05 한국전자통신연구원 stretchable-electric device and manufacturing method
CN113664807A (en) * 2021-08-31 2021-11-19 华中科技大学 Flexible electronic armor with protection function and manufacturing method and application thereof
CN113664807B (en) * 2021-08-31 2023-01-06 华中科技大学 Flexible electronic armor with protection function and manufacturing method and application thereof

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