KR20170029126A - Passive device and manufacturing method thereof - Google Patents
Passive device and manufacturing method thereof Download PDFInfo
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- KR20170029126A KR20170029126A KR1020150126058A KR20150126058A KR20170029126A KR 20170029126 A KR20170029126 A KR 20170029126A KR 1020150126058 A KR1020150126058 A KR 1020150126058A KR 20150126058 A KR20150126058 A KR 20150126058A KR 20170029126 A KR20170029126 A KR 20170029126A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 192
- 239000010409 thin film Substances 0.000 claims abstract description 186
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 53
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 53
- 239000010703 silicon Substances 0.000 claims abstract description 53
- 239000003990 capacitor Substances 0.000 claims description 108
- 238000000034 method Methods 0.000 claims description 52
- 238000005498 polishing Methods 0.000 claims description 19
- 239000004020 conductor Substances 0.000 claims description 13
- 238000005530 etching Methods 0.000 claims description 9
- 238000003475 lamination Methods 0.000 claims description 8
- 238000000465 moulding Methods 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 6
- 238000004528 spin coating Methods 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 description 17
- 239000002184 metal Substances 0.000 description 17
- 239000012212 insulator Substances 0.000 description 14
- 239000010408 film Substances 0.000 description 11
- 238000002955 isolation Methods 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 7
- 230000000903 blocking effect Effects 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 229910004298 SiO 2 Inorganic materials 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000007769 metal material Substances 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 238000010292 electrical insulation Methods 0.000 description 4
- 238000009413 insulation Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 239000012467 final product Substances 0.000 description 3
- 230000014509 gene expression Effects 0.000 description 3
- 239000003921 oil Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000007261 regionalization Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000009826 distribution Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/10—Inductors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The present invention relates to a passive element and a manufacturing method thereof.
The inductor according to the present invention includes an inductor thin film pattern formed on one surface of a substrate, a trench formed in the substrate so as to correspond to the inductor thin film pattern while surrounding the inductor thin film pattern, And the other surface of the substrate is polished to expose the insulating layer formed on the trench.
According to the present invention, in a passive element based on a lossy silicon substrate, a path for electrical leakage to an adjacent element is fundamentally cut off, thereby preventing electrical loss and greatly improving electrical characteristics in a high frequency region.
Description
The present invention relates to a passive element and a manufacturing method thereof. More particularly, the present invention relates to a passive element based on a lossy silicon substrate, which is a passive element that cuts off the electrical leakage path to the adjacent element and blocks the electrical loss and greatly improves the electrical characteristics in the high- And a manufacturing method thereof.
In general, silicon substrates have a lossy characteristic with a significantly low electrical insulation rate, but are commonly used because of their cost advantages. However, due to the oil-loss characteristics of the silicon substrate, there is a problem that the electrical performance of the passive element implemented on the silicon substrate is very low for implementing the integrated circuit.
Hereinafter, the problems of passive elements implemented in a silicon substrate having oil-loss characteristics will be described by dividing them into metal insulator metal (MIM) capacitors and spiral inductors commonly used for RFIC design and fabrication.
1 shows a conventional MIM capacitor.
Referring to FIG. 1, the MIM capacitor has a structure in which a substrate insulating layer such as a silicon oxide film (SiO 2 ) or a silicon nitride film (SiN x ) is formed on the surface of a substrate, that is, a passive element is formed And is formed in a thin film structure.
The thickness of the substrate insulating layer must be less than several micrometers in consideration of the process cost and the wafer warpage. Such thickness is insufficient to electrically insulate the passive element from the silicon substrate having the lower loss-of-loss characteristic.
Therefore, when a MIM capacitor having a relatively large capacitance is integrated in a high-frequency circuit, a large area of the lower electrode (the first metal layer in FIG. 1) constituting the MIM capacitor is formed on the silicon substrate having the oil- There is a problem that a lot of electrical loss occurs.
2 shows a conventional spiral inductor.
Referring to FIG. 2, the conventional spiral inductor has a structure including a silicon substrate having oil-loss characteristics, a spiral inductor thin film pattern formed on the silicon substrate, and an insulating layer formed on the substrate.
According to such a conventional helical inductor, there is a problem that a considerable level of electrical leakage occurs because the silicon substrate located under the inductor thin film pattern has oil-loss characteristics. For example, an inductor with inductance of a few nH, typically on a CMOS circuit, has a low Q factor of less than about 10, and a low Q factor of the inductor degrades the electrical performance of the circuit and increases power consumption ≪ / RTI >
According to the present invention, an insulator is filled in a trench formed in a substrate located under a passive element, and the opposite surface of the substrate on which the passive element is formed is polished to expose the insulating layer, a passive element having a full isolation structure and blocking an electrical leakage to an adjacent element to cut off an electrical loss and greatly improving electrical characteristics in a high frequency region and a method of manufacturing the passive element. do.
The present invention also relates to a method of fabricating a semiconductor device having an electrical performance including a Q factor of a passive device fabricated on a low cost lossy silicon substrate and a method of fabricating the same on an expensive semi-insulator substrate such as a gallium arsenide (GaAs) A passive element that can maintain a level similar to that of a passive element, and a manufacturing method thereof.
It is another object of the present invention to provide a passive element and a method of manufacturing the passive element which can greatly improve the electrical loss characteristics of the passive element in a silicon-based high-frequency circuit, thereby improving the performance of the entire system IC.
It is another object of the present invention to provide a passive element and a method of manufacturing the same that enable a SoC (System on a Chip) implementation that integrates all RF circuits.
It is another object of the present invention to provide a passive device capable of mass production of a large diameter IPD (Integrated Passive Device) and an interposer based on lossy silicon for high frequency package applications and a method for manufacturing the same. .
The inductor according to the present invention includes an inductor thin film pattern formed on one surface of a substrate, a trench formed in the substrate so as to correspond to the inductor thin film pattern while surrounding the inductor thin film pattern, And the other surface of the substrate is polished to expose the insulating layer formed on the trench.
In the inductor according to the present invention, the substrate is a silicon substrate having lossy characteristics.
In the inductor according to the present invention, the inductor thin film pattern has a spiral shape.
In the inductor according to the present invention, the trench is formed by etching the substrate using the inductor thin film pattern as a mask.
The inductor according to the present invention further includes an inductor electrode wiring connected to the inductor thin film pattern.
A method of manufacturing an inductor according to the present invention includes: forming a thin film pattern on a surface of a substrate; etching the substrate using the inductor thin film pattern as a mask to surround the inductor thin film pattern, Forming an insulating layer on the trench, the substrate, and the thin film pattern of the inductor; and forming an insulating layer on the other side of the substrate to expose the insulating layer formed on the trench, And a polishing step of polishing the substrate.
In the inductor manufacturing method according to the present invention, the substrate is a silicon substrate having lossy characteristics.
In the inductor manufacturing method according to the present invention, the inductor thin film pattern has a spiral shape.
In the method of manufacturing an inductor according to the present invention, the insulating layer may be formed by organic lamination, spin coating, molding, or screen printing. .
The method of manufacturing an inductor according to the present invention includes the steps of forming a wiring hole for forming inductor wiring holes so that the inductor thin film pattern is exposed on the insulating layer, forming an inductor electrode wiring by filling a conductive material in the wiring wiring holes for inductor, Further comprising a wiring forming step.
A passive element including a capacitor and an inductor according to the present invention includes a capacitor thin film pattern and an inductor thin film pattern formed on one surface of a substrate, a first trench formed on the substrate to surround the capacitor thin film pattern, And a second trench formed on the substrate so as to correspond to the inductor thin film pattern, and an insulating layer formed on the trench, the substrate, the capacitor thin film pattern, and the inductor thin film pattern, Is polished so as to expose an insulating layer formed on the trench.
In a passive element including a capacitor and an inductor according to the present invention, the substrate is a silicon substrate having lossy characteristics.
In the passive element including the capacitor and the inductor according to the present invention, the inductor thin film pattern has a spiral shape.
In the passive element including the capacitor and the inductor according to the present invention, the second trench is formed by etching the substrate using the inductor thin film pattern as a mask.
In the passive element including the capacitor and the inductor according to the present invention, the insulation layer is formed with capacitor wiring holes for exposing the capacitor thin film pattern and wiring holes for inductor for exposing the inductor thin film pattern, And a capacitor electrode wiring is formed in the wiring wiring holes for the inductor, and an inductor electrode wiring is formed in the wiring wiring for the inductor.
A passive device manufacturing method including a capacitor and an inductor according to the present invention includes a thin film pattern forming step of forming a capacitor thin film pattern and an inductor thin film pattern on one surface of a substrate, a first trench and forming a second trench corresponding to the inductor thin film pattern while surrounding the inductor thin film pattern using the inductor thin film pattern as a mask; and forming a second trench corresponding to the trench, And an insulating layer forming step of forming an insulating layer on the inductor thin film pattern, and a substrate polishing step of polishing the other surface of the substrate so that the insulating layer formed on the trench is exposed.
In the passive element manufacturing method including the capacitor and the inductor according to the present invention, the substrate is a silicon substrate having lossy characteristics.
In the passive element manufacturing method according to the present invention, the inductor thin film pattern has a spiral shape.
In the passive element manufacturing method including the capacitor and the inductor according to the present invention, in the insulating layer forming step, organic lamination, spin coating, molding, or screen printing And the insulating layer is formed using the insulating layer.
A passive element manufacturing method including a capacitor and an inductor according to the present invention includes forming capacitor wiring holes such that the capacitor thin film pattern is exposed to the insulating layer, and forming wiring holes for inductor to expose the inductor thin film pattern. And forming an inductor electrode wiring by filling a conductive material into the capacitor wiring wirings by filling a conductive material into the capacitor wiring wirings to form capacitor electrode wirings and filling conductive material into the wiring wirings for inductor. .
According to the present invention, the insulator is filled in the trench formed in the substrate located under the passive element, and the opposite surface opposite to the one surface of the substrate on which the passive element is formed is polished to expose the insulating layer, A passive element having a full isolation structure and blocking an electrical leakage by blocking a path of electrical leakage to adjacent elements and greatly improving electrical characteristics in a high frequency region and a manufacturing method thereof are provided have.
Further, the electrical performance including the Q factor of the passive device fabricated on the lossy silicon substrate is maintained at a level similar to that of the passive device fabricated on a semi-insulator substrate such as a gallium arsenide (GaAs) substrate And a manufacturing method thereof is provided.
In addition, there is an effect that a passive element and a manufacturing method thereof capable of greatly improving the electrical loss characteristic of a passive element in a silicon-based high-frequency circuit and improving the performance of the entire system IC are provided.
Further, there is an effect that a passive element and a manufacturing method thereof capable of implementing an SoC (System on a Chip) that integrates all RF circuits are provided.
Also, there is an effect that a passive device capable of mass production of a large-diameter IPD (Integrated Passive Device) and an interposer based on a lossy silicon for high frequency package application and a manufacturing method thereof are provided.
1 is a view showing a conventional MIM (Metal Insulator Metal) capacitor.
2 shows a conventional spiral inductor.
3 is a cross-sectional view of an inductor according to one embodiment of the present invention.
4 is a plan view of an inductor according to an embodiment of the present invention.
5 is a process flow diagram of a method of manufacturing an inductor according to an embodiment of the present invention.
6 to 11 are process sectional views of a method of manufacturing an inductor according to an embodiment of the present invention.
12 is a cross-sectional view of a passive device including a capacitor and an inductor in accordance with an embodiment of the present invention.
13 is a plan view of a passive element including a capacitor and an inductor according to an embodiment of the present invention.
14 is a flowchart of a passive device manufacturing method including a capacitor and an inductor according to an embodiment of the present invention.
15 to 20 are process sectional views of a passive device manufacturing method including a capacitor and an inductor according to an embodiment of the present invention.
21 is a graph showing a comparison between experimental values for S (Scattering) parameters in a passive element including a passive element and a capacitor and an inductor according to an embodiment of the present invention.
It is to be understood that the specific structural or functional description of embodiments of the present invention disclosed herein is for illustrative purposes only and is not intended to limit the scope of the inventive concept But may be embodied in many different forms and is not limited to the embodiments set forth herein.
The embodiments according to the concept of the present invention can make various changes and can take various forms, so that the embodiments are illustrated in the drawings and described in detail herein. It should be understood, however, that it is not intended to limit the embodiments according to the concepts of the present invention to the particular forms disclosed, but includes all modifications, equivalents, or alternatives falling within the spirit and scope of the invention.
The terms first, second, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms may be named for the purpose of distinguishing one element from another, for example, without departing from the scope of the right according to the concept of the present invention, the first element may be referred to as a second element, The component may also be referred to as a first component.
It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, the terms "comprises" or "having" and the like are used to specify that there are features, numbers, steps, operations, elements, parts or combinations thereof described herein, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.
Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the meaning of the context in the relevant art and, unless explicitly defined herein, are to be interpreted as ideal or overly formal Do not.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 3 is a cross-sectional view of an inductor according to an embodiment of the present invention, and FIG. 4 is a plan view of an inductor according to an embodiment of the present invention.
3 and 4, an inductor according to an embodiment of the present invention includes a
The
Although not shown in the drawings, for example, an inductor according to an embodiment of the present invention may further include a lower insulating layer formed between one surface of the
The inductor
For example, the inductor
The trenches are formed in the
For example, the trenches may be formed in such a manner that the
The insulating
The
The inductor according to the embodiment of the present invention is polished on the other surface of the
FIG. 5 is a process flow chart of a method of manufacturing an inductor according to an embodiment of the present invention, and FIGS. 6 to 11 are process sectional views of a method of manufacturing an inductor according to an embodiment of the present invention.
Referring to FIG. 5, an inductor manufacturing method according to an embodiment of the present invention includes forming a thin film pattern (S310), forming a trench (S320), forming an insulating layer (S330), forming a wiring hole (S340) A wiring formation step S350 and a substrate polishing step S360.
6, the process of forming the inductor
For example, the inductor
For example, the
Although not shown in the drawing, for example, before forming the inductor
7, in the trench forming step S320, the
For example, the trench may be formed by etching the
8, the insulating
For example, in the insulating layer forming step S330, an insulating
9, the process of forming the inductor wiring holes 507 and 508 so that the inductor
10, in the electrode wiring forming step S350, a process of filling inductor wiring holes 507 and 508 with a conductive material to form
11, in the substrate polishing step S360, a process of polishing the other surface of the
When the inductor manufacturing method according to an embodiment of the present invention is performed as described above, the opposite surface of the
FIG. 12 is a cross-sectional view of a passive element including a capacitor and an inductor according to an embodiment of the present invention, and FIG. 13 is a plan view of a passive element including a capacitor and an inductor according to an embodiment of the present invention.
12 and 13, a passive device including a capacitor and an inductor according to an embodiment of the present invention includes a
The
A passive element including a capacitor and an inductor according to an embodiment of the present invention may be disposed between one side of the
The capacitor
For example, the capacitor
The trench includes a first trench and a second trench.
A first trench is formed on one surface of the
The second trench is formed in the
For example, the first trench may be formed by etching the
The insulating
The
For example, the
A passive element including a capacitor and an inductor according to an embodiment of the present invention is disposed on the other side of the
FIG. 14 is a process flow diagram of a passive device manufacturing method including a capacitor and an inductor according to an embodiment of the present invention, and FIGS. 15 to 20 illustrate a passive device manufacturing method including a capacitor and an inductor according to an embodiment of the present invention Fig.
14, a passive device manufacturing method including a capacitor and an inductor according to an embodiment of the present invention includes forming a thin film pattern (S410), forming a trench (S420), forming an insulating layer (S430) Forming step S440, an electrode wiring forming step S450, and a substrate polishing step S460.
15, the process of forming the capacitor
For example, the inductor
For example, the
Although not shown in the drawing, a process of forming a lower insulating layer on one surface of the
The capacitor
For example, the capacitor
16, in the trench forming step S420, a first trench surrounding the capacitor
For example, a first trench surrounding the capacitor
For example, when the spiral inductor
For example, the second trenches may be formed by etching the
17, in the insulating layer forming step S430, a process of forming the insulating
For example, in the insulating layer forming step S430, an insulating
18, the
19,
20, in the substrate polishing step (S460), the other surface of the
In the passive element manufacturing method including the capacitor and the inductor according to the embodiment of the present invention described above, the capacitor
Hereinafter, with reference to FIG. 21, performance characteristics of a passive element including a capacitor and an inductor according to an embodiment of the present invention will be described in comparison with a conventional passive element.
21 is a graph showing a comparison between experimental values for S (Scattering) parameters in a passive element including a passive element and a capacitor and an inductor according to an embodiment of the present invention.
As is generally known, the S parameter is the most widely used circuit performance judgment value in RF, which means the ratio of the input signal to the output signal on the frequency distribution. For example, S (2,1) means the ratio of the signal input from
21, dB (S (1,1)) is a reflection value of a conventional passive element, dB (S (2,1)) is a conventional passive element transmission value, dB (S (3,3)) is a reflection value of a passive element including a capacitor and an inductor according to an embodiment of the present invention, and dB (S (4,3)) is a reflectance of a capacitor according to an embodiment of the present invention And the passive component including the inductor.
As shown in FIG. 21, when the frequency is 2.426 GHz, the transfer value dB (S (2,1)) of the conventional passive element is measured to -3.589 dB, and the capacitor according to the embodiment of the present invention The transmission value of the passive element including the inductor, dB (S (4,3)), was measured as -2.157dB. As can be seen from the experimental results, according to the passive element including the capacitor and the inductor according to the embodiment of the present invention, the loss characteristic of about 1.43 dB is improved as compared with the conventional passive element.
As described above in detail, according to the present invention, the insulator is filled in the trench formed in the substrate located under the passive element, and the opposite surface of the substrate opposite to the one surface of the substrate on which passive elements are formed is polished, A passive element in which the substrate has a full isolation structure and the electric leakage is blocked by originally blocking the path of electrical leakage to the adjacent element and the electric characteristic in the high frequency region is greatly improved and the manufacture thereof There is an effect that a method is provided.
Further, the electrical performance including the Q factor of the passive device fabricated on the lossy silicon substrate is maintained at a level similar to that of the passive device fabricated on a semi-insulator substrate such as a gallium arsenide (GaAs) substrate And a manufacturing method thereof is provided.
In addition, there is an effect that a passive element and a manufacturing method thereof capable of greatly improving the electrical loss characteristic of a passive element in a silicon-based high-frequency circuit and improving the performance of the entire system IC are provided.
Further, there is an effect that a passive element and a manufacturing method thereof capable of implementing an SoC (System on a Chip) that integrates all RF circuits are provided.
Also, there is an effect that a passive device capable of mass production of a large-diameter IPD (Integrated Passive Device) and an interposer based on a lossy silicon for high frequency package application and a manufacturing method thereof are provided.
10: substrate
30: capacitor thin film pattern
40: Inductor thin film pattern
310: first metal layer
324: Capacitor insulating layer
334: second metal layer
402, 404, 405, 406, 407, 408, 409:
50: insulating layer
502, 504: wiring hole for capacitor
507, 508: wiring hole for inductor
602, 604: Capacitor electrode wiring
607, 608: Inductor electrode wiring
S310 and S410: thin film pattern formation step
S320, S420: trench formation step
S330, S430: Insulating layer forming step
S340, S440: wiring hole forming step
S350, S450: Electrode wiring formation step
S360, S460: substrate polishing step
Claims (20)
A trench formed in the substrate so as to correspond to the inductor thin film pattern while surrounding the inductor thin film pattern; And
And an insulating layer formed on the trench, the substrate, and the inductor thin film pattern,
And the other surface of the substrate is polished to expose an insulating layer formed on the trench.
Wherein the substrate is a silicon substrate having lossy characteristics.
Wherein the inductor thin film pattern has a spiral shape.
Wherein the trench is formed by etching the substrate using the inductor thin film pattern as a mask.
And an inductor electrode wiring connected to the inductor thin film pattern.
A trench forming step of forming a trench corresponding to the inductor thin film pattern on the substrate while etching the substrate using the inductor thin film pattern as a mask to surround the inductor thin film pattern;
Forming an insulating layer on the trench, the substrate, and the inductor thin film pattern; And
And polishing the other surface of the substrate so that the insulating layer formed on the trench is exposed.
Wherein the substrate is a silicon substrate having lossy characteristics.
Wherein the inductor thin film pattern has a spiral shape.
Wherein the insulating layer is formed using organic lamination, spin coating, molding, or screen printing in the insulating layer forming step .
A wiring hole forming step of forming inductor wiring holes so that the inductor thin film pattern is exposed on the insulating layer; And
And forming an inductor electrode wiring by filling the inductor wiring holes with a conductive material.
A trench including a first trench formed in the substrate to surround the capacitor thin film pattern and a second trench formed in the substrate to surround the inductor thin film pattern and corresponding to the inductor thin film pattern; And
And an insulating layer formed on the trench, the substrate, the capacitor thin film pattern, and the inductor thin film pattern,
Wherein the other surface of the substrate is polished to expose an insulating layer formed on the trench.
Wherein the substrate is a silicon substrate having lossy characteristics. The passive element includes a capacitor and an inductor.
Wherein the inductor thin film pattern has a spiral shape. ≪ Desc / Clms Page number 20 >
And the second trench is formed by etching the substrate using the inductor thin film pattern as a mask.
Capacitor wiring holes for exposing the capacitor thin film pattern and inductor wiring holes for exposing the inductor thin film pattern are formed in the insulating layer,
Wherein a capacitor electrode wiring is formed in the capacitor wiring wirings and an inductor electrode wiring is formed in the wiring wirings for the inductor.
Forming a first trench surrounding the capacitor thin film pattern on the substrate and forming a second trench corresponding to the inductor thin film pattern while surrounding the inductor thin film pattern using the inductor thin film pattern as a mask, Forming step;
Forming an insulating layer on the trench, the substrate, the capacitor thin film pattern, and the inductor thin film pattern; And
And polishing the other surface of the substrate so that the insulating layer formed on the trench is exposed.
Wherein the substrate is a silicon substrate having lossy characteristics. ≪ RTI ID = 0.0 > 11. < / RTI >
Wherein the inductor thin film pattern has a spiral shape. ≪ RTI ID = 0.0 > 11. < / RTI >
Wherein the insulating layer is formed by organic lamination, spin coating, molding, or screen printing in the insulating layer forming step. ≪ / RTI >
A wiring hole forming step of forming capacitor wiring holes so that the capacitor thin film pattern is exposed in the insulating layer and forming inductor wiring holes to expose the inductor thin film pattern; And
Further comprising an electrode wiring forming step of forming a capacitor electrode wiring by filling the capacitor wiring wiring holes with a conductive material and filling inductor wiring wirings with a conductive material to form an inductor electrode wiring, A method of manufacturing a passive element comprising a capacitor and an inductor.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150126058A KR101764761B1 (en) | 2015-09-07 | 2015-09-07 | Passive device and manufacturing method thereof |
| US14/960,501 US20160181242A1 (en) | 2014-12-23 | 2015-12-07 | Passive device and manufacturing method thereof |
Applications Claiming Priority (1)
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990016810A (en) | 1997-08-20 | 1999-03-15 | 정선종 | Capacitor Manufacturing Method of Semiconductor Device |
| KR20020014225A (en) | 2000-08-17 | 2002-02-25 | 박종섭 | Integrated device having insulator layer in trench overlapped with fine inductor and method for foming the same |
| KR20040024121A (en) | 2002-09-13 | 2004-03-20 | 삼성전자주식회사 | Inductor using in Radio Frequency Integrated Circuit |
| KR20040086705A (en) | 2003-04-03 | 2004-10-12 | 주식회사 하이닉스반도체 | Method for manufacturing capacitor in a semiconductor device |
| KR20060008045A (en) | 2004-07-23 | 2006-01-26 | 매그나칩 반도체 유한회사 | Method for forming inductor of semiconductor device |
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| JP2007142109A (en) | 2005-11-17 | 2007-06-07 | Tdk Corp | Electronic part |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR19990016810A (en) | 1997-08-20 | 1999-03-15 | 정선종 | Capacitor Manufacturing Method of Semiconductor Device |
| KR20020014225A (en) | 2000-08-17 | 2002-02-25 | 박종섭 | Integrated device having insulator layer in trench overlapped with fine inductor and method for foming the same |
| KR20040024121A (en) | 2002-09-13 | 2004-03-20 | 삼성전자주식회사 | Inductor using in Radio Frequency Integrated Circuit |
| KR20040086705A (en) | 2003-04-03 | 2004-10-12 | 주식회사 하이닉스반도체 | Method for manufacturing capacitor in a semiconductor device |
| KR20060008045A (en) | 2004-07-23 | 2006-01-26 | 매그나칩 반도체 유한회사 | Method for forming inductor of semiconductor device |
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