KR20160110123A - Multilayer ceramic capacitor and method for manufacturing the same - Google Patents

Abstract

A multilayer ceramic condenser (50) includes a sintered metal layer wherein an internal electrode (2) containing nickel (Ni) and an external electrode (5) containing copper (Cu) are included. In a joint of the internal electrode (2) and the external electrode (5), a diffused layer (40) of copper and nickel is continued from the internal electrode (2) and the external electrode (5). A diffused layer (40a) of which a thickness (t1) between a first cross section or a second cross section to a longitudinal inner front end is 0.5 m or higher, but 5 m or lower exists in the internal electrode (2). A diffused layer (40b) of which a thickness (t2) between a first cross section and a second cross section to a longitudinal outer front end is 25% or higher of a thickness of a sintered metal layer (13a), but 33% or less thereof exists in the external electrode (3).

Description

TECHNICAL FIELD [0001] The present invention relates to a multilayer ceramic capacitor, and more particularly to a multilayer ceramic capacitor,

The present invention relates to a ceramic capacitor and a manufacturing method thereof, and more particularly, to a multilayer ceramic capacitor having a structure in which an external electrode is disposed so as to be electrically connected to a ceramic body including an internal electrode, and a method of manufacturing the same.

As one of typical ceramic electronic components, there is a multilayer ceramic capacitor as disclosed in, for example, Japanese Patent Application Laid-Open No. 2006-213946.

As shown in Fig. 4, this multilayer ceramic capacitor includes a ceramic laminate (ceramic body) 110 in which a plurality of internal electrodes 102 (102a and 102b) are laminated via a ceramic layer 101 which is a dielectric layer, And a pair of external electrodes 104 (104a and 104b) provided on a pair of end faces 103 (103a and 103b) of the layered body 110. The pair of external electrodes 104 (104a and 104b) 104b are arranged so as to be electrically connected to the internal electrodes 102 (102a, 102b).

The external electrodes 104 (104a and 104b) are formed, for example, by baking an electroconductive paste containing Cu powder as a conductive component. The external electrodes 104 (104a and 104b) And a plating film 106 (106a, 106b) formed to cover the surface of the sintered metal layer 105 (105a, 105b).

On the other hand, the plated films 106 (106a and 106b) are formed of Ni plating films 107 (107a and 107b) formed on the surfaces of the sintered metal layers 105 (105a and 105b), Ni plating films 107 (107a and 107b) And a Sn plating film 108 (108a, 108b) formed on the insulating film 108a.

In this publication, it is described that a multilayer ceramic capacitor including an external electrode having excellent solder wettability can be obtained without the Ni plating film or the like being grown on the surface of the ceramic multilayer body 110.

However, in the course of baking the conductive paste, the metal material constituting the conductive paste is diffused to the inner electrode side and the inner electrode expands. For example, from the both end portions of the uppermost and lowermost internal electrodes as viewed from the end face side, There is a problem that cracks are generated toward each corner. In addition, when the temperature for baking the conductive paste is lowered in order to suppress the diffusion, there is a problem that reliability of bonding between the internal electrode and the external electrode is lowered.

The present invention solves the above problems and provides a highly reliable multilayer ceramic capacitor capable of suppressing or preventing generation of cracks in a ceramic body due to diffusion of a metal constituting the external electrode into internal electrodes and a manufacturing method thereof The purpose is to provide.

A multilayer ceramic capacitor according to the present invention includes a ceramic body and a pair of external electrodes. The ceramic body includes a plurality of dielectric layers made of dielectric ceramics and a plurality of internal electrodes stacked through each of the plurality of dielectric layers. Wherein the ceramic body has a first main surface and a second main surface facing the first main surface, a first end surface perpendicular to the first main surface, and a second end surface opposed to the first end surface, And has a rectangular parallelepiped shape including a first side face perpendicular to one end face and a second side face opposite to the first side face. Wherein a direction from the first main surface to the second main surface is a thickness direction and a direction from the first side surface to the second side surface is a width direction The thickness direction coincides with the stacking direction of the dielectric layer and the internal electrode. And the plurality of internal electrodes are drawn out to the first end face and the second end face alternately in the thickness direction. And the pair of external electrodes are arranged on the ceramic body so as to be electrically connected to the internal electrode drawn out to the first end face and the second end face, respectively. The internal electrode contains Ni. The external electrode includes a sintered metal layer formed on the ceramic body and containing Cu which is in electrical continuity with the internal electrode. And an interdiffusion layer of Cu and Ni is present between the inner electrode and the outer electrode at the junction between the inner electrode and the outer electrode. The interdiffusion layer exists on the side of the internal electrode so that the thickness (depth), which is a dimension from the first end face or the second end face to the inner end in the longitudinal direction, is 0.5 占 퐉 or more and 5 占 퐉 or less. Wherein the interdiffusion layer has a thickness (depth) in a range from the first end face or the second end face to the outer end in the longitudinal direction of the interdiffusion layer at least 2.5% to 33.3% of the thickness of the sintered metal layer .

By employing the above-described structure, it is possible to suppress or prevent cracks from occurring in the ceramic body due to diffusion of the metal constituting the external electrode into the internal electrodes, and it becomes possible to provide a multilayer ceramic capacitor having high reliability.

In the multilayer ceramic capacitor according to the present invention, when the junction between the internal electrode and the external electrode is viewed from a cut surface including the longitudinal direction and the thickness direction, the internal electrode Of the number of the internal electrodes to the total number of the internal electrodes is 70% or more.

It is possible to provide a multilayer ceramic capacitor having high reliability of connection between the internal electrode and the external electrode by setting the above-mentioned bonding ratio between the internal electrode and the external electrode to 70% or more. On the other hand, the above-mentioned "bonding ratio of not less than 70%" on the predetermined cut surface means that not more than 30% of the internal electrodes which do not bond to the external electrodes on any of the cut surfaces are bonded to the external electrodes on the other cut surfaces And it can be assumed that the inner electrode and the outer electrode are bonded with a high probability of practically no problem.

In the multilayer ceramic capacitor according to the present invention, the ratio of Cu in the interdiffusion layer present on the external electrode side is preferably higher than that in the interdiffusion layer present on the internal electrode side, It is preferable that a ratio of Ni in the interdiffusion layer existing on the side of the internal electrode is higher than a ratio of Ni in the interdiffusion layer present on the side of the external electrode.

It is possible to provide a multilayer ceramic capacitor having high reliability of connection between the internal electrode and the external electrode by making the ratio of Cu and the ratio of Ni in the interdiffusion layer satisfy the above relationship.

In the multilayer ceramic capacitor according to the present invention, it is preferable that an oxide layer exists between the interdiffusion layer and the internal electrode.

The oxide layer existing between the interdiffusion layer and the internal electrode functions to prevent the constituent material of the external electrode (that is, Cu) from advancing from the end face of the ceramic body toward the inside of the internal electrode by more than 5 mu m. As a result, it is possible to suppress or prevent the interdiffusion layer from being excessively formed deep inside the internal electrode, and it becomes possible to provide a multilayer ceramic capacitor having good characteristics.

In the multilayer ceramic capacitor according to the present invention, it is preferable that the external electrode includes a Ni plating film formed on the sintered metal layer and a Sn plating film formed on the Ni plating film.

In the case where the external electrode includes the Ni plating film and the Sn plating film in the above-described configuration, the Ni plating film functions as a ground layer superior in heat resistance, and the Sn plating film functions as a surface layer improving the solder wettability. Therefore, for example, in the case of mounting on the land electrode on the circuit board by the soldering method, a multilayer ceramic capacitor having good solderability and high connection reliability can be obtained.

A manufacturing method of a multilayer ceramic capacitor based on the present invention is a manufacturing method of a multilayer ceramic capacitor including a ceramic body and a pair of external electrodes, and includes the following steps (A) to (F).

(A) A step of forming an internal electrode pattern to be an internal electrode after firing on a ceramic green sheet.

(B) A step of producing a mother laminate by laminating the ceramic green sheet on which the internal electrode pattern is printed and the ceramic green sheet on which the internal electrode pattern is not formed.

(C) a step of cutting the mother laminates to obtain an unfired ceramic laminate.

(D) A step of firing the uncured ceramic laminate at a temperature of 900 ° C or more and 1,300 ° C or less.

(E) subjecting the ceramic laminate after baking to a temperature of 1000 ° C or higher and 1200 ° C or lower at a maximum attainable temperature for 0.5 hour or more and 1.5 hours or less in a reducing atmosphere, followed by annealing under a nitrogen reducing atmosphere, Thereby forming an oxide layer in the internal electrode.

(F) A step of applying an electroconductive paste to both end faces of the ceramic laminate after firing, which is the ceramic body, and baking it to form an external electrode body to be a ground layer of the external electrode.

By employing the above-described manufacturing method, generation of cracks in the ceramic body due to diffusion of the metal constituting the external electrode into the internal electrodes can be suppressed or prevented, and it becomes possible to provide a multilayer ceramic capacitor having high reliability.

Further, according to the method for producing a multilayer ceramic capacitor according to the present invention, after maintaining at a maximum attained temperature of 1000 ° C or higher and 1200 ° C or lower for 0.5 hour or more and 1.5 hours or less in a reducing atmosphere, Therefore, it is possible to efficiently produce the multilayer ceramic capacitor based on the present invention.

That is, by performing the annealing process, a multilayer ceramic capacitor including an interdiffusion layer of Cu and Ni, such as the multilayer ceramic capacitor based on the present invention, and a multilayer ceramic capacitor including an oxide layer between the interdiffusion layer and the internal electrode It becomes possible to efficiently manufacture the ceramic capacitor.

These and other objects, features, aspects and advantages of the present invention will become apparent from the following detailed description of the invention, which is to be understood in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a front sectional view showing the structure of a multilayer ceramic capacitor according to one embodiment of the present invention. Fig.
2 is a perspective view showing the external structure of a multilayer ceramic capacitor according to one embodiment of the present invention.
3 is a cross-sectional view showing a configuration of main parts of a multilayer ceramic capacitor according to one embodiment of the present invention.
4 is a front sectional view showing the structure of an external electrode of a conventional multilayer ceramic capacitor.

Hereinafter, embodiments of the present invention will be described, and the features of the present invention will be described in more detail.

Fig. 1 is a front sectional view showing the configuration of a multilayer ceramic capacitor 50 according to an embodiment (Embodiment 1) of the present invention, and Fig. 2 is a perspective view showing the external configuration of the multilayer ceramic capacitor 50. Fig. 3 is a cross-sectional view showing the configuration of the main part of the multilayer ceramic capacitor 50. As shown in Fig.

1 and 2, the multilayer ceramic capacitor 50 includes a plurality of dielectric layers 1 made of dielectric ceramics and a plurality of internal electrodes (not shown) disposed at a plurality of interfaces between the plurality of dielectric layers 1, And a pair of external electrodes 5 (2a, 2b) disposed so as to be electrically connected to the external electrodes 2 (2a, 2b) on the external surface of the ceramic body 10, 5a, 5b).

The ceramic body 10 has a first major surface 11a and a second major surface 11b opposed to the first major surface 11a and a first major surface 11b perpendicular to the first major surface 11a and a first major surface 11b perpendicular to the first major surface 11a, And a second side face 31b opposed to the first side face 31a and a first side face 31a orthogonal to the first main face 11a and the first end face 21a, ) In a rectangular parallelepiped shape.

On the other hand, when the direction from the first main surface 11a to the second main surface 11b of the ceramic body 10 is the thickness direction T as the stacking direction of the dielectric layer 1 and the internal electrodes 2 (2a, 2b) And the direction from the first end face 21a to the second end face 21b of the ceramic body 10 is the direction of the length L and the direction from the first side face 31a to the second side face 21b of the ceramic body 10, 31b in the direction of the width W (see Fig. 2).

The internal electrodes 2 (2a and 2b) are formed so as to be alternately exposed to the first end face 21a and the second end face 21b of the ceramic body 10. [ As the conductive material constituting the internal electrodes 2 (2a, 2b), a material containing Ni as a main component is used.

The external electrodes 5a and 5b are respectively connected to the first main face 11a and the second main face 11b and the first main face 11a and the second main face 11b from the first end face 21a and the second end face 21b of the ceramic body 10, And is formed so as to surround the side surface 31a and the second side surface 31b and is electrically connected to the internal electrodes 2 (2a and 2b) exposed to the first end surface 21a and the second end surface 21b, respectively.

The outer electrodes 5 (5a and 5b) include a sintered metal layer (outer electrode body) 13a containing Cu formed on the ceramic body 10 and a plated film 13b formed on the outer electrode body 13a , 13c. The external electrode main body 13a is formed by applying a conductive paste containing metal powder and glass to the first end face 21a and the second end face 21b of the ceramic body 11 and firing it. As a material constituting the external electrode main body 13a, a metal containing Cu as a main component is used.

The plating film 13b is formed so as to cover the surface of the external electrode body 13a, and Ni is used as a material constituting the plating film 13b.

The plated film 13c is formed so as to cover the surface of the plated film 13b, and Sn is used as the material constituting the plated film 13c.

As the plating film 13c of the outermost layer, metals such as Pd, Cu, and Au can be used. The thickness of each of the plating films 13b and 13c can be set to, for example, not less than 0.1 mu m and not more than 20 mu m.

In this embodiment, the plating films 13b and 13c are formed by electrolytic plating.

On the other hand, in this embodiment, the plated film is formed from two types (two layers) of plated films of Ni plated film and Sn plated film, but the plated film may have a single layer structure, It is possible.

As shown in FIG. 3, at the junction between the internal electrodes 2 (2a and 2b) and the external electrodes 5 (5a and 5b) in the multilayer ceramic capacitor 50, a Cu and Ni interdiffusion layer 40 Are present over the inner and outer electrodes 2 and 5, respectively.

On the side of the internal electrode 2, an interdiffusion layer 40a having a thickness (depth) of not less than 0.5 mu m and not more than 5 mu m exists in the longitudinal direction from the first end face 21a or the second end face 21b.

On the external electrode 5 side, the thickness (depth) from the first end face 21a or the second end face 21b to the outer end in the longitudinal direction is set to 2.5 (thickness) of the sintered metal layer Or more and 33.3% or less of the interdiffusion layer 40b.

On the other hand, the presence of the interdiffusion layers 40 (40a, 40b), the thickness t1 of the interdiffusion layer 40a on the inner electrode 2 side and the thickness t2 of the interdiffusion layer 40b on the outer electrode 5 side ) Was confirmed by the following method.

The multilayer ceramic capacitor 50 is polished to a half of the chip dimension along the direction perpendicular to the first end face 21a and the first main face 11a of the ceramic body 10, (polishing sag) was milled to produce a sample. Then, the sample prepared as described above was analyzed by WDX under the following conditions, and the concentration of the element was measured.

Pre-observation treatment: Flat milling After 3 kV / 5 min / 60 ° treatment, C coating treatment

Acceleration voltage: 15.0 kV

Survey current: 5 × 10 ^-8 A

Magnification: 3000 times

Dwell Time (acquisition time in one pixel): 40 ms

Analysis depth (reference): 1 ㎛ to 2 ㎛

The interdiffusion layer 40a on the internal electrode side has a length L of the ceramic body 10 from the first end face 21a or the second end face 21b side toward the internal electrode 2 side of the ceramic body 10. [ ), And the distance to the point at which no element of Cu was detected was regarded as the thickness t1 of the interdiffusion layer 40a on the side of the internal electrode 2.

The interdiffusion layer 40b on the external electrode 5 side is electrically connected to the external electrode 5 from the first end face 21a or the second end face 21b side of the ceramic body 10 toward the external electrode 5 (The direction of the length L of the ceramic body 10), and the distance to the point at which the element of Ni is no longer detected is set to be the distance from the surface of the interdiffusion layer 40b on the external electrode 5 side And the thickness (t2).

Here, the analysis direction is normal to the section.

As described above, in the multilayer ceramic capacitor of the present invention, the thickness t1 of the interdiffusion layer 40a on the internal electrode side is 0.5 占 퐉 or more and 5 占 퐉 or less, and the thickness of the interdiffusion layer 40b on the external electrode side (t2) is 2.5% or more and 33.3% or less of the thickness t0 of the sintered metal layer (outer electrode body) 13a.

When the thickness t1 of the interdiffusion layer 40a on the side of the internal electrode 2 is less than 0.5 mu m or when the thickness t2 of the interdiffusion layer 40b on the external electrode 5 side is smaller than the thickness t2 of the sintered metal layer The connection reliability between the internal electrode 2 and the external electrode 5 deteriorates and the internal electrode 2 and the external electrode 5 are electrically connected to each other when the voltage application and the discharge are repeated, The connection of the electrode 5 is cut off, causing a decrease in capacitance (capacity failure).

When the thickness t1 of the interdiffusion layer 40a on the side of the internal electrode 2 exceeds 5 占 퐉, the thickness of the internal electrode 2 is increased by the interdiffusion layer 40a, The four corners of the ceramic body 10 from the both end portions of the uppermost and lowermost internal electrodes 2 in the stacking direction as viewed from the first end face 21a or the second end face 21b side of the exposed ceramic body 10. [ As shown in FIG.

In addition, hydrogen ions are generated by the chemical reaction in the plating process for forming the plating films 13b and 13c, the hydrogen ions are stored in the internal electrode 2, and the surrounding dielectric layer 1 is gradually There is a possibility of causing problems such as reduction in insulation resistance and reduction. The thickness t2 of the interdiffusion layer 40b on the side of the external electrode 5 is set to 33.3% or less of the thickness t0 of the sintered metal layer 13a while including the interdiffusion layer 40b on the external electrode 5 side It is possible to prevent hydrogen from intruding into the ceramic body 10. [0064]

On the other hand, when the thickness of the interdiffusion layer 40b on the side of the external electrode 5 exceeds 33.3% of the thickness t0 of the sintered metal layer 13a, the Ni contained in the interdiffusion layer 40 is transferred, Loses.

Further, the multilayer ceramic capacitor of this embodiment includes an oxide layer on the inner electrode side of the interdiffusion layer. However, the oxide layer does not necessarily exist adjacent to the interdiffusion layer, but may be spaced apart from the interdiffusion layer. This oxide layer exerts the function of preventing the diffusion of the constituent material of the external electrode from progressing beyond 5 mu m toward the inside of the internal electrode. On the other hand, the presence of the oxide layer can be confirmed by WDX in the same manner as the method of examining the existence and thickness of the interdiffusion layer.

In the multilayer ceramic capacitor of the present embodiment, the outermost layer of the plating layer 13c and the ceramic layer (ceramic layer) 13 constituting the ceramic body 10 are formed in the plating layer 13b, 13c (Except for the element which generates a hydride having a boiling point of less than 125 占 폚) and the hydrogen and the hydride in the boundary region are added to the outermost layer (2) It is preferable to contain at least one kind of element to be formed.

On the other hand, an element forming a covalent hydride with hydrogen (except for an element which generates a hydride having a boiling point of less than 125 ° C) is a boron group excluding In and Tl in the long- (C, Si, Ge, Sn, Pb), nitrogen (N, P, As, Sb, Bi), oxygen (O, S, Se, Te, Po) F, l, Br, I, At), and the like. The element forming hydrogen and the hydride in the boundary region is an element at the boundary between the covalent bond hydride and the metal-like hydride, and is a boron atom except for Al and Ga in the long period periodic table, Refers to an element capable of forming a compound with hydrogen such as Group (In, Tl), Group 11 (Cu, Ag, Au), Group 12 (Zn, Cd, Hg) These elements form stable compounds with hydrogen. That is, once combined with hydrogen, energy is required to release the hydrogen, and it is difficult to release hydrogen. By using this property, the hydrogen generated in the plating process can be kept from the external electrode in the path from the external electrode to the internal electrode via the interdiffusion layer, thereby preventing entry of hydrogen therefrom.

On the other hand, in order to contain a hydrogen-retaining element in the external electrode main body 13a constituting a part of the path, in this embodiment, the hydrogen in the metallic state in the conductive paste for forming the external electrode main body 13a And a powder of a retaining element (hydrogen-retaining metal powder) was blended. The proportion of the hydrogen-retaining metal powder to be blended in the conductive paste is preferably 1 vol% or more and 40 vol% or less in solid content ratio.

On the other hand, the hydrogen-retaining metal may be present in the outer electrode main body 13a as a single metal, or may be dispersed or alloyed with other metals in the outer electrode main body 13a, as the case may be.

<Manufacturing Method of Multilayer Ceramic Capacitor>

Next, a method of manufacturing the multilayer ceramic capacitor according to the embodiment of the present invention will be described.

(1) First, a ceramic green sheet, a conductive paste for an internal electrode, and a conductive paste for forming an external electrode body (sintered metal layer) are prepared.

The ceramic green sheet and various conductive pastes include a binder and a solvent. As the binder and the solvent, a known organic binder or an organic solvent can be used.

(2) A conductive paste is printed on the ceramic green sheet prepared in the above (1) in a predetermined pattern, for example, by screen printing to form an internal electrode pattern.

(3) A ceramic green sheet (ceramic green sheet for outer layer) on which the internal electrode pattern prepared in (1) above is not printed is laminated on a predetermined number of sheets, and ceramic green And a predetermined number of ceramic green sheets for an outer layer, on which an internal electrode pattern is not printed, are stacked in this order to prepare a mother laminate.

(4) The mother laminate is pressed in the lamination direction by means of an hydrostatic press or the like.

(5) The pressed mother laminates are cut into a predetermined size, and are divided into individual unbaked ceramic laminated bodies. At this time, chamfering may be performed by barrel polishing or the like to round each corner or corner of each unfired ceramic laminate.

(6) The uncured ceramic multilayer body is fired. The sintering temperature depends on the material of the ceramics or the internal electrode, but it is usually preferably 900 占 폚 or more and 1300 占 폚 or less.

(7) Each of the fired ceramic laminated bodies is annealed to form an oxide layer in the internal electrode.

Herein, the annealing was carried out under the condition that the ceramic laminated body after firing was maintained for at least 0.5 hour to less than 1.5 hour under a reducing atmosphere at a maximum attainable temperature of 1000 ° C or higher and 1200 ° C or lower, and then the temperature was lowered under a nitrogen atmosphere.

(8) A conductive paste for forming an external electrode body (sintered metal layer) is applied to both end surfaces of the fired ceramic laminate and baked to form an external electrode body (sintered metal layer) to be a ground layer of the external electrode. The baking temperature is usually 700 ° C or higher and 900 ° C or lower.

In this process, Cu contained in the outer electrode and an interdiffusion layer in which Ni contained in the inner electrode are mutually diffused are formed so as to span the inner electrode and the outer electrode at the junction between the inner electrode and the outer electrode.

(9) Then, Ni plating is performed on the external electrode body (sintered metal layer) to form a Ni plating film covering the external electrode body (sintered metal layer), and Sn plating is further performed to form a Sn plating film covering the Ni plating film.

As a result, a multilayer ceramic capacitor as shown in Figs. 1 and 2 is obtained.

<Experimental Example 1>

In order to confirm the significance of the multilayer ceramic capacitor of this embodiment, a conductive paste to which Sn was added was used as a conductive paste containing Cu powder as a conductive component, and a sample (multilayer ceramic capacitor) of Sample Nos. 1 to 10 .

On the other hand, detailed specifications of the conductive paste were as follows.

Solid content: 25 vol%

The ratio of Cu powder in the solid content: 70 vol%

Ratio of glass in solid content: 25 vol%

The ratio of Sn in the solid content: 5 vol%

Particle size of Cu powder: 3 탆

Glass particle size: 2 탆

Composition of glass: BaO-SrO-B ₂ O ₃ -SiO ₂ glass frit (glass frit containing 10% by weight to 50% by weight of BaO, 3% by weight to 30% by weight of B ₂ O ₃ , ₂ : 3% by weight to 30% by weight glass)

The samples of samples 1 to 10 of Table 1 were prepared by applying the conductive paste to the first end face 21a and the second end face 21b of the ceramic body 10 and then firing them to form an outer electrode body Metal layer) 13a (see Fig. 1).

Thereafter, a plated film 13b made of Ni was formed on the outside of the external electrode body 13a by electrolytic plating, and a plated film 13c made of Sn was formed on the outside by electrolytic plating.

As a result, Samples 1 to 10 of Table 1 were obtained.

The thickness of the plated film 13b was 3 占 퐉 and the thickness of the plated film 13c was 10 占 퐉, the rated voltage was 6.3 V, the length was 1.0 mm, the width was 0.5 mm, And a thickness of 3 mu m.

On the other hand, in this embodiment, a sample (samples of sample Nos. 1 to 6 of Table 1) and a sample of 5 占 퐉 (samples of sample Nos. 7 to 10 of Table 1) did.

The samples of sample Nos. 1 to 10 in Table 1 were made to satisfy the requirements of the present invention such that the thickness of the interdiffusion layer 40a on the inner electrode 2 side was approximately 3 m.

Each sample of the sample Nos. 1 to 10 of Table 1 produced as described above was subjected to a high-temperature load test and a 0? Discharge test by the method described below.

<High Temperature Load Test>

The temperature and voltage were set under the following conditions and left for 72 hours.

Temperature: 125 ° C

Applied voltage: 3.2V

From there, the insulation resistance LogIR was investigated. And samples with LogIIR lower than 0.5 were counted as defective. Meanwhile, the number of samples provided to the test was 20.

<0? Discharge Test>

Each sample was heat-treated at a temperature of 150 占 폚 for 1 hour and allowed to stand for 24 hours. Thereafter, the electrostatic capacity was measured for each sample.

Then, a voltage was applied to each sample under conditions of 20 V for 5 seconds, and the sample was dropped into a stainless steel dish to discharge (0? Discharge), and this was repeated five times.

Thereafter, the substrate was heat-treated at a temperature of 150 占 폚 for 1 hour, left for 24 hours, and then the capacitance was measured. A sample whose electrostatic capacity decreased by 5% or more was counted as defective. Meanwhile, the number of samples provided to the test was 20.

The results of the high temperature load test and the 0? Discharge test conducted as described above are shown in Table 1. On the other hand, in Table 1, the sample to which * is affixed to the sample number is a sample which does not include the requirement of the present invention.

<Evaluation>

As shown in Table 1, in the samples Nos. 2 to 5, 8 and 9 in which the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body is in the range of 2.5% to 33.3% In the test, the occurrence of defects was not recognized.

On the other hand, in the samples of Sample Nos. 1 and 7, in which the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body was 0.25% and 1%, respectively, Was recognized.

In the samples of Sample Nos. 6 and 10, in which the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body was 50% and 44.6%, which exceeded the range of the present invention, The occurrence of defects was recognized.

From the above results, it is understood that the thickness of the interdiffusion layer on the external electrode side is preferably set to a range of 2.5% or more and 33.3% or less of the thickness of the external electrode body.

The samples of samples Nos. 2 to 5, 8 and 9 having the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body in the range of 2.5% or more and 33.3% or less (satisfying the requirements of the present invention Sample) was examined for the bonding ratio between the internal electrode and the external electrode.

Here, the bonding ratio between the inner electrode and the outer electrode is defined as a ratio between the inner electrode and the outer electrode, which is a junction between the inner electrode and the outer electrode in the longitudinal direction and the thickness direction of the ceramic body, To the total number of internal electrodes.

Further, in the case where the junction is referred to as WDX, when the peak intensity of Cu exceeds 12.5%, it is judged that the external electrode and the internal electrode are bonded.

As a result of examining the bonding ratio between the internal electrode and the external electrode as described above, it was confirmed that the bonding ratio of the samples of Sample Nos. 2 to 5, 8 and 9 satisfying the requirements of the present invention was 70% or more.

The samples of samples Nos. 2 to 5, 8 and 9 having the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body in the range of 2.5% or more and 33.3% or less (satisfying the requirements of the present invention It is confirmed that the ratio of Cu in the interdiffusion layer existing on the side of the external electrode is higher than that of the interdiffusion layer existing on the side of the internal electrode in the interdiffusion layer on the side of the internal electrode, Of Ni is higher than the ratio of Ni in the interdiffusion layer existing on the external electrode side.

On the other hand, the thickness of the interdiffusion layer on the internal electrode side can be measured by drawing a line segment passing through the external electrode along the internal electrode and measuring the thickness of the interdiffusion layer on the line segment.

The thickness of the interdiffusion layer is an average value of values obtained by selecting 10 layers uniformly arranged among the internal electrodes arranged in the stacking direction and measuring the thickness of the interdiffusion layer with respect to each of the internal electrode layers of 10 layers.

The samples of samples Nos. 2 to 5, 8 and 9 having the ratio of the thickness of the interdiffusion layer on the external electrode side to the thickness of the external electrode body in the range of 2.5% or more and 33.3% or less (satisfying the requirements of the present invention It is confirmed that an oxide layer exists between the interdiffusion layer and the internal electrode.

<Experimental Example 2>

The thickness of the external electrode body is 40 占 퐉, the thickness of the interdiffusion layer on the external electrode side is 10% of the thickness of the external electrode body, and the thickness of the interdiffusion layer on the internal electrode side is in the range of 0.2 占 퐉 to 7 占 퐉 , The samples of Sample Nos. 11 to 15 of Table 2 were prepared in the same manner as the sample of Experimental Example 1 (the sample of Table 1).

Then, for each sample produced, a test for examining the number of cracks and a 0? Discharge test were carried out.

On the other hand, the number of cracks was measured by polishing the sample from the side of the surface including the thickness direction and the width direction of each sample (multilayer ceramic capacitor) (the end face of the ceramic body where external electrodes are formed) Depth), and observing each part of the sample with a microscope.

Specifically, with respect to five samples, the presence or absence of occurrence of cracks from the end portions of the uppermost and lowermost internal electrodes toward the four corners of the ceramic body was examined from the cross-sectional side.

On the other hand, in the case where the presence or absence of cracks directed to the four corners as described above is examined for five samples, the number of measurement target portions is 20 in total. In Table 2, the number of cracks in these 20 cracks is described as the number of cracks.

The number of defects in the 0 Ω discharge test in Table 2 was measured in the same manner as in the case of each sample in Table 1.

On the other hand, in Table 1, the sample to which * is affixed to the sample number is a sample which does not include the requirement of the present invention.

As shown in Table 2, in the samples of sample Nos. 12 to 14 in which the thickness of the interdiffusion layer on the internal electrode side was in the range of 0.5 占 퐉 to 5 占 퐉, cracks were not observed, It was confirmed that the occurrence of defects of the product can not be recognized.

On the other hand, in the sample of the sample No. 11 in which the thickness of the interdiffusion layer on the internal electrode side was 0.2 탆 and the range of the present invention was below the range of the present invention, defects were observed in the 0 Ω discharge test.

In addition, it was confirmed that the sample of Sample No. 15 exceeding the range of the present invention in which the thickness of the interdiffusion layer on the internal electrode side was 7 mu m was cracked.

From the above results, it is understood that it is preferable that the thickness of the interdiffusion layer on the internal electrode side is in the range of 0.5 占 퐉 to 5 占 퐉. It is also possible to measure the thickness of the interdiffusion layer on the internal electrode side by drawing a line segment passing through the external electrode along the internal electrode and measuring the thickness of the interdiffusion layer on the line segment. The thickness of the interdiffusion layer is an average value of values obtained by selecting 10 layers uniformly arranged among the internal electrodes arranged in the stacking direction and measuring the thickness of the interdiffusion layer with respect to each of the internal electrode layers of 10 layers.

Although the embodiments of the present invention have been described, it should be understood that the embodiments disclosed herein are by way of illustration and not by way of limitation in all respects. It is intended that the scope of the invention be represented by the claims and that all changes that come within the meaning and range of equivalency of the claims are intended to be embraced therein.

Claims (6)

1. A multilayer ceramic capacitor including a ceramic body and a pair of external electrodes,
Wherein the ceramic body includes a plurality of dielectric layers made of dielectric ceramics and a plurality of internal electrodes stacked through each of the plurality of dielectric layers,
Wherein the ceramic body has a first main surface and a second main surface facing the first main surface, a first end surface perpendicular to the first main surface, and a second end surface opposed to the first end surface, A rectangular parallelepiped shape including a first side face perpendicular to one end face and a second side face opposite to the first side face,
Wherein a direction from the first main surface to the second main surface is referred to as a thickness direction and a direction from the first end surface to the second end surface is defined as a longitudinal direction, , The thickness direction is aligned with the lamination direction of the dielectric layer and the internal electrode,
The plurality of internal electrodes are drawn out to the first end face and the second end face alternately in the thickness direction,
The pair of external electrodes are arranged on the ceramic body so as to be electrically connected to the internal electrodes drawn out to the first end face and the second end face, respectively,
Wherein the internal electrode comprises Ni,
Wherein the external electrode comprises a sintered metal layer formed on the ceramic body and containing Cu that is in electrical continuity with the internal electrode,
Wherein an interdiffusion layer of Cu and Ni exists over the inner electrode and the outer electrode at the junction between the inner electrode and the outer electrode,
The interdiffusion layer is present on the internal electrode side so that the thickness from the first end face or the second end face to the inner front end in the longitudinal direction is 0.5 占 퐉 or more and 5 占 퐉 or less,
The interdiffusion layer is present on the external electrode side such that the thickness from the first end face or the second end face to the outer end in the longitudinal direction is 2.5% or more and 33.3% or less of the thickness of the sintered metal layer Multilayer Ceramic Capacitors. The method according to claim 1,
Wherein when the junction between the internal electrode and the external electrode is viewed from a cut surface including the longitudinal direction and the thickness direction, the number of the internal electrodes connected to the external electrode, Layered ceramic capacitor having a ratio of at least 70%. 3. The method according to claim 1 or 2,
The ratio of Cu in the interdiffusion layer present on the side of the external electrode is higher than the proportion of Cu in the interdiffusion layer present on the side of the internal electrode,
Wherein a ratio of Ni in the interdiffusion layer existing on the side of the internal electrode is higher than a ratio of Ni in the interdiffusion layer existing on the side of the external electrode. 3. The method according to claim 1 or 2,
And an oxide layer is present between the interdiffusion layer and the internal electrode. 3. The method according to claim 1 or 2,
A Ni plating film having the external electrode formed on the sintered metal layer, and a Sn plating film formed on the Ni plating film. A manufacturing method of a multilayer ceramic capacitor including a ceramic body and a pair of external electrodes,
A step of forming an internal electrode pattern to be an internal electrode after firing on the ceramic green sheet,
Forming a ceramic green sheet on which the internal electrode pattern is printed and a ceramic green sheet on which the internal electrode pattern is not formed,
A step of cutting the mother laminates to obtain an unfired ceramic laminate,
Baking the uncured ceramic laminate at a temperature of 900 ° C or higher and 1300 ° C or lower;
The ceramic laminate after firing is subjected to annealing under the condition that the ceramic laminated body is held at a maximum attained temperature of 1000 ° C or higher and 1200 ° C or lower for 0.5 hour to 1.5 hour or less in a reducing atmosphere and then the temperature is lowered under a nitrogen atmosphere, A step of forming an oxide layer in the internal electrode,
And a step of applying an electroconductive paste to both end faces of the ceramic laminate after firing which is the ceramic body and baking the same to form an external electrode body to be a ground layer of the external electrode.

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