KR20160091803A

KR20160091803A - SNR and SFDR excellent excellent properties characteristic active phased array radar TRM and control method thereof

Info

Publication number: KR20160091803A
Application number: KR1020150059185A
Authority: KR
Inventors: 유명재; 전유석; 이승준; 유영근
Original assignee: 주식회사 브로던
Priority date: 2015-01-26
Filing date: 2015-04-27
Publication date: 2016-08-03

Abstract

An active phased array radar (TRM) that operates under the control of an external microcomputer is disclosed. The active phased array radar TRM includes a phase shifter and an attenuator. When the driving clock is received from the microcomputer, the FPGA initializes the internal initialization and internal clock, and controls the phase shifter and the attenuator to perform electronic beam steering. . The present invention can obtain excellent SNR and SFDR characteristics by blocking digital noise generated when FPGA and OSC are located in TRM.

Description

[0001] The present invention relates to an active phased array radar TRM having excellent SNR and SFDR characteristics, and a control method thereof,

The present invention relates to an active phased array radar TRM, and more particularly, to an active phased array radar TRM (Transmitter Receiver Module) having excellent SNR and SFDR characteristics and a control method thereof.

Recent multifunctional radars use an active phased array (RADAR) structure.

Active phased array radar, which has been applied since the 1990s, has a number of TRMs, an integrated low-power / distributed transceiver, low power loss characteristics, and electronic beam steering that enables simultaneous tracking of beam steering and multiple targets simultaneously.

The conventional TRM used in such an active phased array radar includes a limiter, an LNA (Low Noise Amplifier), an Atten (attenuator), a phase shifter, an FPGA 4 for controlling an electronic beam steering, , And an oscillator (OSC) 3 are located in a TRM (Transmitter Receiver Module).

In order to detect the target in a harsh environment, the TRM must have a large dynamic range of the radar receiver and good performance of Signal-to-Noise Radio (SNR) and Spurious Free Dynamic Range (SFDR).

In the case of the conventional TRM control method, as shown in FIG. 1, a frequency component is generated in the FPGA 4 during an operation for electron beam steering and a phase shifter / attenuator control. The frequency component is generated in the OSC 3 for driving the FPGA 4.

However, in the related art, a frequency component generated in the OSC 3 affects the received high frequency (RF) signal, resulting in deteriorating characteristics such as SNR and SFDR of the receiver.

An object of the present invention is to solve the problem caused by controlling the electronic beam steering in the conventional TRM, and it is possible to block the digital noise generated by the FPGA and the OSC located in the TRM, thereby obtaining excellent SNR and SFDR characteristics The present invention provides an active phased array radar TRM having excellent SNR and SFDR characteristics and a control method thereof.

According to one aspect of the present invention, there is provided an active phased array radar TRM having excellent SNR and SFDR characteristics,

An active phased array radar TRM having a low noise amplifier, an attenuator, and a phase shifter and operating under the control of an external microcomputer,

The microcomputer receives a clock signal from the microcomputer, and when the microcomputer receives a drive control signal, it converts the mode into a drive mode to activate the internal initialization and internal clock, and controls the phase shifter and the attenuator to control the electronic beam steering And if the drive control signal does not exist, converts the mode to the stop mode.

The microcomputer operates the operation of the FPGA in a stop mode when the calculation and control for the electronic beam steering of the active phased array radar are completed and the frequency components generated in the FPGA are blocked.

And the microcomputer supplies only the clock signal for FPGA driving at the time of electronic beam steering operation / control.

The microcomputer stops supplying the FPGA driving clock in the transmission / reception period of the TRM.

The FPGA, which has completed the electronic beam steering control, switches to the Stop mode and stops the internal clock and all operations to remove the frequency components generated in the FPGA.

According to one aspect of the present invention, there is provided a method of controlling an active phased array radar TRM having superior characteristics of SNR and SFDR,

A control method of an active phased array radar (TRM) having a low noise amplifier, an attenuator, and a phase shifter and operating under the control of an external microcomputer,

The FPGA receiving a clock signal (Clock) from the microcomputer;

When the microcomputer receives the drive control signal, activating internal initialization and internal clock by converting the FPGA into a drive mode;

The FPGA controlling the phase shifter and the attenuator to electronically steer the beam;

And if the drive control signal is not present, converting the FPGA to a stop mode.

In the embodiment of the present invention, the active phased array radar TRM excellent in characteristics of SNR and SFDR that can obtain excellent SNR and SFDR characteristics by blocking digital noise generated when the FPGA and the OSC are located in the TRM, and a control method thereof .

1 is a view showing a conventional TRM.
FIG. 2 is a diagram illustrating a configuration of an active phased array radar TRM according to an embodiment of the present invention. Referring to FIG.
3 is a diagram illustrating a driving signal of the active phased array radar TRM according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Throughout the specification, when an element is referred to as "comprising ", it means that it can include other elements as well, without excluding other elements unless specifically stated otherwise.

FIG. 2 is a diagram illustrating a configuration of an active phased array radar TRM according to an embodiment of the present invention, and FIG. 3 is a diagram illustrating a driving signal of an active phased array radar TRM according to an embodiment of the present invention.

2 or 3, an active phased array radar TRM according to an embodiment of the present invention includes:

An active phased array radar TRM (100) having a low noise amplifier, an attenuator, and a phase shifter and operating under the control of an external microcomputer,

And receives a clock signal from the microcomputer 200. When the microcomputer 200 receives a drive control signal, the microcomputer 200 converts the clock signal into a drive mode to activate the internal initialization and internal clock, And an attenuator (130) to perform an electronic beam steering, and to switch to a stop mode when there is no drive control signal.

The microcomputer 200 receives the clock frequency from the oscillator 300.

A low noise amplifier 140 and a limiter 150 may be connected to the attenuator 300.

The microcomputer 200 operates the operation of the FPGA 110 in a stop mode when the calculation and control for the electronic beam steering of the active phased array radar are completed and the frequency component generated in the FPGA 110 .

The microcomputer 200 supplies a clock signal for driving the FPGA 110 only when an electronic beam steering operation / control is performed.

The microcomputer 200 stops supplying the clock for driving the FPGA 110 in the transmission / reception interval of the TRM 100. [

Upon completion of the electronic beam steering control, the FPGA 110 switches to the Stop mode to stop the internal clock and all operations, thereby removing the frequency component generated in the FPGA 110.

An active phased array radar TRM control method having excellent SNR and SFDR characteristics according to an embodiment of the present invention having such a configuration will now be described.

First, the FPGA 110 receives a clock signal (Clock) from the microcomputer 200.

When the microcomputer 200 receives the drive control signal Control, the FPGA 110 is switched to the drive mode to activate the internal initialization and the internal clock.

Next, the FPGA 110 controls the phase shifter 120 and the attenuator 130 to perform electronic beam steering. That is, in the drive mode (FPGA Run Mode), the FPGA 110 receiving the drive control signal performs internal initialization and activates the internal clock to control the operation and phase shifter 120 / attenuator 130, Steer.

On the other hand, when there is no drive control signal (Control), the FPGA 110 switches to the stop mode.

In the idle mode, the FPGA 110 switches to the idle mode to stop the internal clock and all operations, thereby removing frequency components generated in the FPGA 110, and in the electronic beam steering control of the active phased array radar , The OSC for the clock driven by the FPGA 110 may be removed to block frequency components generated in the OSC.

Therefore, in the embodiment of the present invention, the "SNR, SFDR" performance of the TRM 100 can be improved by removing spurious due to frequency components generated in the OSC for FPGA 110 driving.

In the embodiment of the present invention, when the electronic beam steering control is completed, the FPGA 110 immediately switches to the stop mode and stops the internal clock and all operations, thereby removing the frequency component generated in the FPGA 110 In the electronic beam steering control of the active phased array radar, the OSC for the clock driven by the FPGA 110 may be removed to block frequency components generated in the OSC.

As described above, in the embodiment of the present invention, when the operation and control for the electronic beam steering of the active phased array radar is completed, the operation of the FPGA 110 is operated in the Stop mode to block the frequency component generated in the FPGA 110 .

Also, in the embodiment of the present invention, superior "SNR, SFDR" characteristics of the TRM 100 can be obtained by removing the spurious due to the frequency components generated in the operation of the FPGA 110.

According to the embodiment of the present invention, the clock for driving the FPGA 110 can be supplied only in the " electronic beam steering operation / control ", and the clock supply is stopped in the transmission / reception period of the TRM 100 according to the necessity.

Therefore, when there is no clock in the transmission / reception interval, the spurious due to the clock is removed.

As described above, according to the embodiment of the present invention, the FPGA 110 and the OSC are placed in the TRM 100 to block the digital noise generated, thereby obtaining excellent SNR and SFDR characteristics.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, And all changes to the scope that are deemed to be valid.

Claims

An active phased array radar TRM having a low noise amplifier, an attenuator, and a phase shifter and operating under the control of an external microcomputer,
The microcomputer receives a clock signal from the microcomputer, and when the microcomputer receives a drive control signal, it converts the mode into a drive mode to activate the internal initialization and internal clock, and controls the phase shifter and the attenuator to control the electronic beam steering And if the drive control signal is not present, converts to a stop mode.

The method according to claim 1,
Wherein the microcomputer operates the operation of the FPGA in a stop mode when the computation and control for the electronic beam steering of the active phased array radar is completed and blocks the frequency components generated in the FPGA. .

The method according to claim 1,
Wherein the microcomputer supplies the FPGA driving clock signal only when an electronic beam steering operation / control is performed.

The method of claim 3,
The microcomputer is an active phased array radar TRM that stops supply of the FPGA driving clock in the transmission / reception section of the TRM.

5. The method of claim 4,
The FPGA, which has completed the electronic beam steering control, switches to the stop mode, and stops the internal clock and all operations, thereby removing frequency components generated in the FPGA.

A control method of an active phased array radar (TRM) having a low noise amplifier, an attenuator, and a phase shifter and operating under the control of an external microcomputer,
The FPGA receiving a clock signal (Clock) from the microcomputer;
When the microcomputer receives the drive control signal, activating internal initialization and internal clock by converting the FPGA into a drive mode;
The FPGA controlling the phase shifter and the attenuator to electronically steer the beam;
And converting the FPGA to a stop mode when the drive control signal is not present.