KR20160050927A - Method and Apparatus for Generating Short Pulse with High Frequency Using Energy Storage Device - Google Patents

Abstract

An apparatus and method for generating a high-frequency short pulse using an energy storage element are disclosed.
According to an aspect of the present invention, there is provided a device and method for generating a short pulse having a desired width without a further process while having a high frequency.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an apparatus and a method for generating a high-frequency short pulse using an energy storage device,

This embodiment relates to an apparatus and method for generating a high frequency end pulse using an energy storage element.

The contents described in this section merely provide background information on the present embodiment and do not constitute the prior art.

FIG. 1A is a block diagram showing a system for generating an existing short pulse, and FIG. 1B is a timing diagram showing a signal generated in each apparatus of a system for generating a conventional short pulse.

Referring to FIG. 1A, a conventional system 110 for generating short pulses includes a right angle signal generator 120, 130 and an AND gate 140.

Right angle signal generators 120 and 130 generate a right angle signal having a predetermined period, wherein each right angle signal generator generates a right angle signal having the same period but different phases.

An AND gate 140 is a logic gate for specifying a logical product in a logic operation and means an element or a circuit that outputs '1' only when '1' is input to all input terminals. And outputs '1' only when each right angle signal generated in the right angle signal generator is inputted to the input terminal and all of the right angle signals have '1'.

Referring to FIG. 1B, each of the orthogonal signal generators 120 and 130 generates orthogonal signals having different phases. The AND gate 140 outputs '1' at a time point 150 where each of the generated right angle signals is '1'. Since each right angle signal input to the AND gate has a predetermined period, the AND gate outputs '1' periodically according to a predetermined period of the input signal. In this way, a short pulse is obtained. However, such a method inconveniently requires two signals. In addition, due to the limitation of the constant speed due to the characteristics of the logic gate, there is a certain limit in obtaining a high-frequency short pulse, and there is a certain limit in obtaining a short pulse having a narrow width.

FIG. 2 is a timing diagram showing signals generated in respective apparatuses of a system for generating short pulses according to another conventional example.

The high-frequency clock generator 210 generates a clock signal having a high frequency. In FIG. 2, the high-frequency clock generator 210 generates a clock signal having a frequency of 2 GHz.

The short pulse generator 220 generates a short pulse having a predetermined frequency and width. The short pulse generator 220 generates a pulse pattern having a desired frequency and width by adjusting a period and a width of an input signal by forming a specific pattern in a digital circuit . In FIG. 2, as an example, the frequency and width of a clock signal having 2 GHz are adjusted to generate a short pulse having 500 MHz.

However, in this method, there is an inconvenience that an additional process is required to form a specific pattern in a separate digital circuit in order to generate a pulse waveform having a desired frequency and width, and the clock of the clock generator into which the width of the generated pulse waveform is input There is a problem that the width can not be reduced.

The main object of the present embodiment is to provide an apparatus and a method for generating a short pulse having a desired width without a further process while having a high frequency.

According to an aspect of the present invention, there is provided a clock generating apparatus comprising: a clock generating unit for generating a clock signal having a predetermined frequency; and a controller for generating a pulse by charging the clock signal at the rising or falling edge of the clock signal, And a comparator for outputting a constant output value only when the pulse generated by the pulse generator has a value equal to or greater than a preset reference value.

According to another aspect of the present invention, a clock signal having a predetermined frequency is generated, a clock signal is charged at the rising or falling edge of the clock signal, and a pulse is generated by discharging the charged clock signal again And outputting a constant output value only when the generated pulse has a value equal to or greater than a preset reference value.

As described above, according to the present embodiment, a short pulse having a desired width can be generated while having a high frequency by using a single signal and using a simple circuit configuration.

1A is a block diagram illustrating a system for generating conventional short pulses.
1B is a timing diagram showing signals generated in each device of a system for generating a conventional short pulse.
FIG. 2 is a timing diagram showing signals generated in respective apparatuses of a system for generating short pulses according to another conventional example.
3A is a block diagram illustrating a system for generating a short pulse in accordance with an embodiment of the present invention.
3B is a timing diagram illustrating signals generated in each device of the system for generating a short pulse in accordance with an embodiment of the present invention.
4 is a flowchart illustrating a method of generating a short pulse according to an embodiment of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. It should be noted that, in adding reference numerals to the constituent elements of the drawings, the same constituent elements are denoted by the same reference symbols as possible even if they are shown in different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

Throughout the specification, when an element is referred to as being "comprising" or "comprising", it means that it can include other elements as well, without excluding other elements unless specifically stated otherwise . In addition, '... Quot ;, " module ", and " module " refer to a unit that processes at least one function or operation, and may be implemented by hardware or software or a combination of hardware and software.

3A is a block diagram illustrating a system for generating a short pulse in accordance with an embodiment of the present invention.

3A, a system for generating a short pulse according to an embodiment of the present invention includes a clock generator 310, a pulse generator 320, a comparator 330, and an amplifier 340.

The clock generator 310 generates a clock having a preset frequency. In order to generate a short pulse having a high frequency, the clock generator 310 according to an embodiment of the present invention also generates a clock signal having a high frequency .

The pulse generator 320 receives the clock signal generated from the clock generator and generates a predetermined pulse. The pulse generator 320 is connected in series or in parallel with the clock generator to remove DC components from the clock signal and to pass RF (Radio Frequency) signals. Pass the RF signal, and generate a pulse waveform from the passing RF signal. A capacitor, a high-frequency filter, or the like may be used as the pulse generator 320.

A capacitor is a passive element capable of storing energy, and receives a clock signal generated by a clock generator. The capacitor is connected to the clock generator. The capacitor removes the DC component from the clock signal generated by the clock generator and passes the RF (Radio Frequency) signal. However, the capacitor passes the RF signal, and the rate at which it is charged and discharged depends on the capacitance of the capacitor. The smaller the capacity of the capacitor, the faster the charging and discharging speed, and the larger the capacity, the slower the charging and discharging rate. Accordingly, the shape of the pulse generated depending on the capacitance of the capacitor is changed. When a capacitor with a small capacity receives a clock signal, it is charged at a high rate and discharges at a high rate when charging is completed. As a result, when a clock signal passes through a capacitor having a small capacity, charging and discharging are performed rapidly, and a pulse having a narrow width is generated. Conversely, when a capacitor having a large capacity receives a clock signal, charging and discharging are performed at a slow rate, so that a pulse having a wide width is generated.

The high-frequency filter is a filter using at least one of a passive element such as a resistor, a coil, a capacitor, and an operational amplifier (OP-AMP) as an active element. In the same way as the above-described capacitor, the DC component is removed from a clock signal generated in the clock generator , And passes only a part of an RF (Radio Frequency) signal to generate a pulse waveform. The width of the generated waveform can be controlled by adjusting the value of each element used in the high-frequency filter.

The comparator 330 is an apparatus or circuit for determining whether or not an input signal is equal to or higher than a reference value. Receives a signal to be compared with a value corresponding to a reference value as an input, outputs '1' only when the input signal is equal to or higher than the reference value, and outputs '0' when the input signal is equal to or lower than the reference value. If the signal input to the comparator is equal to or greater than the reference value, the comparator outputs '1' even if a signal larger than the reference value is input.

The amplifier 340 amplifies the pulse output by the comparator. According to the characteristics of the comparator described above, even if a signal as large as possible is input, a short pulse having a predetermined amplitude is generated. The amplifier is used to change the amplitude of the short pulse. If it is necessary to generate a short pulse having an amplitude greater than a predetermined amplitude, an amplifier is connected to the comparator to amplify the amplitude of the short pulse output from the comparator.

3B is a timing diagram illustrating signals generated in each device of the system for generating a short pulse in accordance with an embodiment of the present invention.

A clock signal having a preset frequency is generated from the clock generator.

The generated clock signal passes through the pulse generator, and a pulse is generated from the capacitor. When the pulse generator is a capacitor, when the clock signal is at the rising edge (350), since the capacitor charges and discharges a positive value, a convex pulse in the positive direction is generated, and the clock signal 360 ), Since the capacitor charges and discharges the negative value, a convex pulse is generated in the negative direction. As described above, since the charging and discharging speed is changed according to the capacity of the capacitor, the width of the pulse can be controlled by controlling the capacitance of the capacitor.

The pulse generated from the pulse generator is input to the input signal of the comparator, and the comparator determines whether the input signal has a value larger than the reference value 370. [ When the pulse (input signal) generated from the pulse generator has a value larger than the reference value (380), the comparator outputs '1'. Since the comparator outputs '1' regardless of the value of the input signal when the input signal has a value larger than the reference value, the comparator generates the short pulse as the output. The reference value of the comparator can be controlled to adjust the width of the short pulse generated in the comparator. As the reference value increases, the width of the short pulse generated becomes narrower, and as the reference value becomes lower, the width of the short pulse generated becomes wider.

By amplifying the generated short pulse using an amplifier, a short pulse having an amplitude larger than the amplitude of the generated short pulse can be generated.

4 is a flowchart illustrating a method of generating a short pulse according to an embodiment of the present invention.

And generates a clock signal (S410). And generates a clock signal having a predetermined frequency. Unlike the conventional short pulse generating method, the short pulse generating method according to an embodiment of the present invention can generate a short pulse with only one clock signal.

The generated clock signal is passed through a pulse generator to obtain a predetermined pulse (S420). The clock signal generated from the clock generator passes through a pulse generator connected to the clock generator. As the clock signal passes through the pulse generator, the DC component of the clock signal is removed by the capacitor and the component of the RF signal is passed through the pulse generator. A predetermined pulse is generated through the pulse generator. When the pulse generator is a capacitor, the capacitor is charged at the time when the clock signal passing through the capacitor changes, that is, on the rising edge or the falling edge. The discharging is started again from the point of time when the charging is completed. Thus, the clock signal passes through the capacitor, and by charging and discharging the capacitor, a pulse having a convex shape can be obtained. At this time, the width of the obtained pulse depends on the capacitance of the capacitor. When the capacity of the capacitor is small, the speed at which the capacitor is charged and the rate at which the capacitor is discharged are fast, so that the charging time and discharging time do not take long, so that the width of the acquired pulse becomes narrow. On the contrary, when the capacity of the capacitor is large, since the charging speed of the capacitor and the discharging speed are slow, the charging time and discharging time are long, so that the width of the acquired pulse is widened. Therefore, the width of the short pulse to be obtained can be controlled by controlling the width of the pulse obtained by adjusting the capacitance of the capacitor.

A short pulse is generated from the pulse obtained by using the comparator (S430). And determines whether the value of the acquired pulse is greater than a preset reference value by using the acquired pulse and the preset reference value as input signals. If the value of the obtained pulse is larger than the reference value, the comparator outputs '1' constantly regardless of the difference between the acquired pulse value and the reference value. If the value of the obtained pulse is smaller than the reference value, the comparator outputs '0' constantly. When the value of the obtained pulse is greater than the reference value, '1' is output. Therefore, '1' can be output from the acquired pulse at the rising edge of the clock signal among the acquired pulses. However, And outputs '0' from one pulse. The reference value of the comparator can be controlled to adjust the width of the short pulse generated in the comparator. As the reference value increases, the width of the short pulse generated becomes narrower, and as the reference value becomes lower, the width of the short pulse generated becomes wider.

The generated short pulse is amplified (S440). If it is necessary to generate a short pulse having an amplitude larger than a predetermined amplitude of the generated short pulse, the amplifier is connected to amplify the amplitude of the short pulse generated.

Although it is described in FIG. 4 that steps S410 to S440 are sequentially executed, this is merely illustrative of the technical idea of an embodiment of the present invention. In other words, those skilled in the art will appreciate that the present invention can be implemented by changing the order described in FIG. 4 without departing from the essential characteristics of an embodiment of the present invention, or by executing one of steps S410 to S440 It should be noted that FIG. 4 is not limited to the time-series order, since it can be variously modified and modified by being executed in parallel.

Meanwhile, the processes shown in FIG. 4 can be implemented as computer-readable codes on a computer-readable recording medium. A computer-readable recording medium includes all kinds of recording apparatuses in which data that can be read by a computer system is stored. That is, a computer-readable recording medium includes a magnetic storage medium (e.g., ROM, floppy disk, hard disk, etc.), an optical reading medium (e.g., CD ROM, And the like). The computer-readable recording medium may also be distributed over a networked computer system so that computer readable code can be stored and executed in a distributed manner.

The foregoing description is merely illustrative of the technical idea of the present embodiment, and various modifications and changes may be made to those skilled in the art without departing from the essential characteristics of the embodiments. Therefore, the present embodiments are to be construed as illustrative rather than restrictive, and the scope of the technical idea of the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment should be construed according to the following claims, and all technical ideas within the scope of equivalents thereof should be construed as being included in the scope of the present invention.

110: short pulse generation system 120, 130: rectangular pulse generator
140: AND gate 210: High frequency clock generator
220: short pulse generator 310: clock generator
320: capacitor 330: comparator
340: Amplifier

Claims (6)

A clock generator for generating a clock signal having a preset frequency;
A pulse generator for generating a pulse by charging the clock signal at the rising or falling edge of the clock signal and discharging the charged clock signal again; And
And outputting a constant output value only when the pulse generated by the pulse generator has a value equal to or greater than a predetermined reference value.
And a second pulse generator for generating a short pulse. The method according to claim 1,
Wherein the pulse generator comprises:
And a capacitor (Capacitor). 3. The method of claim 2,
Wherein the pulse generator comprises:
Wherein a width of a pulse generated by adjusting the capacitance of the capacitor is controlled. 3. The method of claim 2,
Wherein the pulse generator comprises:
Wherein the first and second clock signals are connected in series or in parallel with the clock generator to remove the DC component of the clock signal. The method according to claim 1,
Further comprising an amplifier for amplifying the constant output value and outputting an output value greater than the constant output value. Generating a clock signal having a predetermined frequency;
Generating a pulse by charging the clock signal at the rising or falling edge of the clock signal and discharging the charged clock signal again; And
Outputting a constant output value only when the generated pulse has a value equal to or greater than a preset reference value
And generating a short pulse.

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