KR20160047083A - Organic Light Emitting Display And Driving Method Thereof - Google Patents

Abstract

According to the present invention for reducing consumption power, an organic light emitting display device comprises a display panel, a first consumption power control unit, and a power supply circuit. Here, a plurality of pixels emitting light by a driving current are installed in the display panel wherein the driving current is determined by a high potential driving voltage and a low potential driving voltage. And a first consumption power control unit partitions the display panel into a plurality of regions, calculates a high potential driving voltage per a region by using an IR drop per a region and an element feature voltage per a region, and determines the maximum value of the high potential driving voltage per a region as a final high potential driving voltage. And, a power supply circuit generates the determined final high potential driving voltage and supplies the final high potential driving voltage to the display panel.

Description

[0001] The present invention relates to an organic light emitting display,

BACKGROUND OF THE INVENTION 1. Field of the Invention [0002] The present invention relates to an organic light emitting display, and more particularly, to an organic light emitting display capable of reducing power consumption and a driving method thereof.

The active matrix type organic light emitting display device includes an organic light emitting diode (OLED) which emits light by itself, has a high response speed, and has a high luminous efficiency, luminance, and viewing angle.

The organic light emitting diode (OLED) includes an anode electrode, a cathode electrode, and organic compound layers (HIL, HTL, EML, ETL, EIL) formed therebetween. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The organic light emitting display device arranges the pixels each including the OLED in a matrix form and adjusts the brightness of the pixels according to the gradation of the video data. Each of the pixels may further include a driving TFT (Thin Film Transistor) for controlling a current flowing in the OLED, a switch TFT connected to the driving TFT, and a storage capacitor. The switch TFT applies a data voltage from the data line to the gate electrode of the drive TFT by turning on in response to a gate signal (scan signal), and the storage capacitor holds the gate-source voltage of the drive TFT for one frame. The driving TFT controls the driving current supplied to the OLED according to the gate-source voltage held by the storage capacitor, thereby controlling the amount of light emitted from the OLED.

In order to reduce power consumption in an organic light emitting diode display, a technique for controlling a high potential driving voltage applied to a driving TFT in accordance with a maximum luminance of an input image is known. There is an extra that can reduce the high potential driving voltage applied to the driving TFT at the low maximum luminance of the input image. Therefore, this technique reduces power consumption by decreasing the high-potential driving voltage by the redundancy.

In the prior art, in order to reduce the power consumption, the high-potential driving voltage is determined only considering the maximum luminance of the image. However, in an actual display panel, an IR drop occurs due to wiring resistance, so that a high-level driving voltage required varies depending on the spatial position. Since the IR drop is larger in the region far from the lead-in portion of the high-potential driving voltage than in the close region, the high-potential driving voltage applied to the distant region becomes smaller than the high-potential driving voltage required for the actual pixel. As a result, local luminance degradation may occur in the prior art.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide an organic light emitting display device and a method of driving the same that can achieve an optimum power consumption reduction without a reduction in local luminance.

In order to achieve the above object, an organic light emitting diode display according to the present invention includes a display panel, a first power consumption control unit, and a power supply circuit. Here, the display panel is provided with a plurality of pixels that emit light by a driving current determined by a high-potential driving voltage and a low-potential driving voltage. Then, the first power consumption control section divides the display panel into a plurality of regions, calculates a high-potential driving voltage for each region using the IR drop for each region and the device characteristic voltage for each region, The maximum value is determined as the final high potential driving voltage. Then, the power supply circuit generates the determined final high potential driving voltage and supplies it to the display panel.

The organic light emitting display according to the present invention further includes a second power consumption control unit, a gamma reference voltage generation circuit, and a data driving circuit. Here, the second power consumption control unit outputs the gamma reference voltage correction value based on the current reduction amount according to the final high potential driving voltage. The gamma reference voltage generating circuit adjusts the maximum gamma reference voltage according to the gamma reference voltage correction value, and divides the adjusted maximum gamma reference voltage to generate a gamma voltage set. The data driving circuit converts the input image data into an analog data voltage with reference to the gamma voltage set, and supplies the analog data voltage to the display panel.

The first power consumption control section includes a maximum luminance calculation section for calculating the maximum luminance per area from the maximum gradation based on the analysis result of the input image and the peak luminance according to the average image level of the input image, An IR drop calculating unit for calculating an IR drop for each region from an average current per region and an equivalent wiring resistance for each region; An ELVDD calculation unit for calculating a high-potential driving voltage for each area by using an IR drop for each area and the device characteristic voltage for each area, and an ELVDD determination unit for determining a maximum value among the high- Respectively.

The second consumption power control unit includes a compensation amount calculation unit for calculating a compensation amount for compensating for a current reduction amount according to the final high potential driving voltage, a gamma reference voltage control unit for calculating a gamma reference voltage correction value by multiplying the peak luminance by the compensation amount, Respectively.

The maximum luminance calculation unit analyzes the histogram of the input image and selects the maximum gradation at a level that is not recognized in the sensed image by reflecting a predetermined clipping value in the histogram analysis result.

According to another aspect of the present invention, there is provided a method of driving an organic light emitting display having a display panel including a plurality of pixels that emit light by a driving current determined by a high potential driving voltage and a low potential driving voltage, The high voltage driving voltage for each area is calculated by using the IR drop of each area and the device characteristic voltage for each area and then the maximum value among the high potential driving voltages for each area is determined as the final high potential driving voltage And a second step of generating and supplying the determined final high potential driving voltage to the display panel.

The present invention optimizes the power consumption reduction by determining the optimal high-potential driving voltage by reflecting the spatial position of the representative image that exhibits the maximum luminance when controlling the high-potential driving voltage for power consumption reduction, It is possible to effectively prevent degradation.

FIG. 1 is a view illustrating an organic light emitting display according to an embodiment of the present invention. FIG.
Fig. 2 is a diagram showing an equivalent circuit of an IR drop per region in consideration of power supply wiring resistance. Fig.
3 is a view showing a current-voltage characteristic curve of a driving TFT;
4 is a diagram showing one equivalent circuit of a pixel.
5 is a view showing an example in which a display panel is divided into four regions;
Fig. 6 is a diagram showing that the power consumption can be further reduced according to the spatial position of the representative image in the display panel. Fig.
7 is a diagram showing an internal configuration of a power consumption control circuit according to the present invention.
8 shows a PLC function for controlling the peak luminance according to the APL.
Fig. 9 is a diagram showing the determination of the maximum gradation to clip through histogram analysis; Fig.
10 is a view showing an example of calculating an average current per region;
11 is a view showing a current reduction amount according to an ELVDD change.

Hereinafter, embodiments of the present invention will be described with reference to Figs. 1 to 11. Fig.

FIG. 1 shows an organic light emitting display according to an embodiment of the present invention. Fig. 2 shows an equivalent circuit of the IR drop for each region in consideration of the power wiring resistance. 3 shows the current-voltage characteristic curve of the driving TFT.

1, an organic light emitting display according to an embodiment of the present invention includes a display panel 10, a timing controller 11, a data driving circuit 12, a gate driving circuit 13, a power consumption control circuit 11A ), A gamma reference voltage generating circuit 16, and a power supply circuit 18.

In the display panel 10, a plurality of data lines 14 and a plurality of gate lines 15 cross each other, and the pixels P are arranged in a matrix form for each of the intersection regions. Each pixel P is connected to the data line 14, the gate line 15, the ELVDD power supply line, and the ELVSS power supply line. Each pixel P includes an OLED and a pixel circuit for driving the OLED. The pixel circuit may include a drive TFT for controlling a current flowing in the OLED, a switch TFT connected to the drive TFT, and a storage capacitor. The switch TFT applies a data voltage from the data line to the gate electrode of the drive TFT by turning on in response to a gate signal (scan signal), and the storage capacitor holds the gate-source voltage of the drive TFT for one frame. The driving TFT controls the driving current supplied to the OLED according to the gate-source voltage held by the storage capacitor, thereby adjusting the amount of light emitted from the OLED.

The data driving circuit 12 may include at least one data driver IC (Integrated Circuit) (SDIC). The data driving circuit 12 receives the gamma voltage set GMA from the gamma reference voltage generating circuit 16 and receives the input image data RGB from the timing controller 11. [ The data driving circuit 12 converts the input image data RGB into an analog data voltage with reference to the gamma voltage set GMA under the control of the timing controller 11 and outputs the analog data voltage to the data lines 14 of the display panel 10 Supply.

The gate drive circuit 13 generates a gate signal synchronized with the data voltage and supplies the gate signal to the gate lines 15 in a line sequential manner. The gate drive circuit 13 can be formed directly on the non-display area of the display panel 10. [

The timing controller 11 receives timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a dot clock signal DCLK, and a data enable signal DE input from an external host system (not shown) A data control signal DDC for controlling the operation timing of the data driving circuit 12 and a gate control signal GDC for controlling the operation timing of the gate driving circuit 13 are generated based on the data control signal DDC. The timing controller 11 aligns input image data (RGB) input from an external host system to the display panel 10 and supplies the same to the data driving circuit 12.

On the other hand, assuming that the display panel 10 is divided into the first to fourth regions AR1 to AR4 with reference to the lead-in portion of the high-potential driving voltage ELVDD as shown in FIG. 2, V4, which is the high potential driving voltage ELVDD applied to the pixels of the pixels, is reduced by the IR drop 1, 2, 3, 4 than the voltage of the lead portion. Therefore, the driving current in the fourth region AR4 is present in the linear section, not in the saturation region of the driving TFT, due to the decrease of Vds (drain-source voltage), resulting in a luminance drop.

That is, when the high potential driving voltage ELVDD is reduced, the driving current Id in the fourth region AR4 as shown in FIG. 3 is changed from the first value I4 to the second value I4 ' ). ≪ / RTI > In the absence of the IR drop, the drive current Id in the fourth region AR4 continues to exist in the saturation region, and thus becomes the first value I4 corresponding to the A state. However, when there is an IR drop, the driving current Id in the fourth region AR4 becomes the B state and becomes the second value I4 'which is smaller than the required value, so that the luminance drop occurs.

According to the present invention, a method of preventing local brightness degradation and further reducing power consumption according to the spatial position of a representative image is presented. To this end, the power consumption control circuit 11A of the present invention divides the display panel 10 into a plurality of regions, and generates a high-potential driving voltage ELVDD for each region using an IR drop and a device- And then determines a maximum value among the high potential driving voltages for each area as the final high potential driving voltage.

The first power consumption control section calculates the IR drop for the plurality of areas AR1 to AR4 of the display panel 10 and derives the high potential driving voltage ELVDD required in each area from the IR drop, Determines the maximum value among the voltages as the final high potential driving voltage, and outputs a high potential driving voltage correction value (CDx) for controlling the generation of the final high potential driving voltage. The reason why the maximum value is determined as the final high potential driving voltage is that the driving current Id in all the regions AR1 to AR4 exists in the saturation region.

Meanwhile, the power consumption control circuit 11A may further include a second power consumption control unit that can control the gamma reference voltage based on the current reduction amount according to the final high potential driving voltage. The second power consumption control section outputs a gamma reference voltage correction value CDy capable of adjusting the maximum gamma reference voltage based on the final high potential driving voltage so that the luminance reduction due to the change in the ELVDD, that is, the change in Vds, is further compensated .

The power supply circuit 18 generates the final high potential driving voltage in accordance with the high potential driving voltage correction value CDx input from the power consumption control circuit 11A and supplies it to the pixels P of the display panel 10 .

The gamma reference voltage generating circuit 16 adjusts the maximum gamma reference voltage in accordance with the gamma reference voltage correction value CDy input from the power consumption control circuit 11A and divides the adjusted maximum gamma reference voltage to obtain a gamma voltage set . This set of gamma voltages includes a plurality of gamma reference voltages having a maximum gamma reference voltage as a maximum value. The gamma reference voltages are used to generate gamma compensation voltages by being redistributed through the resistor string of the digital to analog converter of the data drive circuit. Gamma compensation voltages are mapped to input image data and output as analog data voltages.

FIG. 4 shows one equivalent circuit of a pixel for explaining a calculation process of a minimum high high driving voltage at which a driving current can flow. 5 shows an example in which the display panel is divided into four regions. 6 shows that the power consumption can be further reduced according to the spatial position of the representative image in the display panel.

When the pixel P is implemented as shown in FIG. 4, the minimum high potential driving voltage ELVDD to which the driving current Id can flow can be calculated as shown in Equation (1).

Here, ELVSS denotes a low-potential driving voltage, Id denotes a driving current, Rd denotes a wiring resistance of the ELVDD power supply wiring, Rs denotes a wiring resistance of the ELVSS power supply wiring, and Vmargin denotes a saturation margin of the driving TFT (DT) . Vg represents the gate-source voltage of the driving TFT DT, and Voled represents the voltage between the anode and the cathode of the OLED. Vg represents the data voltage applied to the gate electrode of the driving TFT DT for the gradation representation of the input image, Respectively. Vgs and Voled are device characteristic voltages, which can be calculated from the design characteristics of the drive TFT and the OLED and the magnitude of the data voltage, respectively.

The average currents I1 to I4 of the respective regions AR1 to AR4 are obtained by dividing the display panel 10 into the regions AR1 to AR4 as shown in Fig. (ELVDD1 to ELVDD4) for each region to be present in the region is calculated as shown in Equation (2).

Here, Itotal denotes the total current flowing through the ELVDD power supply wiring and the ELVSS power supply wiring, I1 to I4 denotes the average current in each of the regions AR1 to AR4, and Vm denotes the saturation margin of the driving TFT DT.

The final high potential driving voltage ELVDD_final is determined to be the maximum value among the high potential driving voltages ELVDD1 to ELVDD4 for each region as shown in Equation 3. Since the driving current must exist in the all regions AR1 to AR4 in the saturation region, do.

On the other hand, when the low potential driving voltage ELVSS is input through the common electrode of the planar shape, the VSS rising component can be ignored, and the IR drop of the pixel P is dominantly influenced by the high potential driving voltage ELVDD . In this case, the high-potential driving voltages ELVDD1 to ELVDD4 for each region in which the average currents I1 to I4 of the respective regions AR1 to AR4 exist in the saturation region are as shown in Equation (4).

In this case as well, the final high potential driving voltage ELVDD_final is determined to be the maximum value among the high potential driving voltages ELVDD1 to ELVDD4 for each region in the equation (4).

It can be seen from these equations that the high potential driving voltage ELVDD can be further reduced compared to the prior art when there is a representative image which exhibits the maximum luminance in a region close to the lead-in portion of the high potential driving voltage ELVDD have.

That is, in the prior art, since the high-potential driving voltage ELVDD is adjusted in consideration of only the maximum luminance regardless of the position of the representative image that exhibits the maximum luminance, the representative image of FIG. ), (B), (C) and (D), the high-potential driving voltage (ELVDD) was all determined equally.

On the other hand, in the present invention, compared with the case (A) in which the representative image is located in the region AR4 farthest from the lead-in portion of the high-potential driving voltage ELVDD, the region AR1 (D) in FIG. 6A, the IR drop is relatively small, and the high-potential driving voltage ELVDD is adjusted in consideration of the IR drop with the maximum luminance size, The reduction in the high-potential driving voltage ELVDD can be reduced without harming the user's eyesight. The present invention adjusts the magnitude of the high potential driving voltage ELVDD as the representative image is displayed far away from the lead portion of the high potential driving voltage ELVDD and conversely, The closer to the part, the lower the magnitude of the high-potential driving voltage (ELVDD). As a result, the present invention can effectively prevent local luminance degradation and achieve optimal power consumption reduction.

FIG. 7 shows the internal configuration of the power consumption control circuit 11A according to the present invention. FIG. 8 shows a PLC function for controlling the peak luminance according to the APL. Figure 9 shows the determination of the maximum gradation to clip through histogram analysis. FIG. 10 shows an example of calculating an average current per region. 11 shows a current reduction amount according to ELVDD change.

Referring to FIG. 7, the power consumption control circuit 11A according to the present invention includes a first power consumption control unit and a second power consumption control unit.

The first power consumption control unit includes an average current calculation unit 111, a maximum luminance calculation unit 114, a characteristic voltage calculation unit 115, an IR drop calculation unit 116, an ELVDD calculation unit 117, (118).

The maximum luminance calculation unit 114 calculates the maximum luminance per area from the peak gradation based on the maximum gradation based on the analysis result of the input image and the average picture level (APL) of the input image. Here, the maximum luminance includes not only the maximum gradation of the input image but also the peak luminance. To this end, the maximum luminance calculator 114 may include a histogram analyzer 112 and a peak luminance calculator 113.

The peak luminance calculating section 113 detects the APL indicating the number of pixels having the peak luminance in one frame, that is, the area occupied by the white pixels in one screen from the input image data (RGB), and determines the peak luminance according to the detected APL And outputs it. The peak luminance calculator 113 determines the peak luminance corresponding to the APL using the APL curve of the APL function set in advance or the look-up table (hereinafter referred to as LUT) in which the peak luminance for the APL is preset can do. For power consumption control, the peak luminance may be determined to have an inverse relationship with APL as shown in FIG. That is, the larger the APL is (the bright image), the smaller the peak luminance is determined, and the larger the APL (the darker the image), the larger the peak luminance is determined.

The histogram analyzer 112 analyzes the input image data (RGB) to count the frequency of the tone values, and obtains a histogram as shown in FIG. The histogram analyzer 112 reflects the clipping value previously set in the histogram analysis result as shown in FIG. 9, thereby reducing the maximum gradation at a level that is not known to the user's sight, thereby increasing the reduction amount of the high potential driving voltage ELVDD Effectively reducing power consumption.

The characteristic voltage calculating unit 115 receives the maximum luminance for each region from the maximum luminance calculating unit 114 and calculates the device characteristic voltage for each region from the maximum luminance for each region. Here, the device characteristic voltage refers to the gate-source voltage (Vgs) and the voltage across the OLED (Voled) of the driving TFT described in FIG. The device characteristic voltage reflects the device characteristics of the driving TFT and the OLED. Accordingly, the characteristic voltage calculating unit 115 can calculate the device characteristic voltage for each region for expressing the maximum luminance value calculated in each region through a look-up table or an equation.

The average current calculation unit 111 calculates an average current for each region based on the input image. To this end, the average current calculation unit 111 includes a current conversion unit 1111 and a current averaging unit 1113. The current converting unit 1111 refers to the lookup table 1112 for gradation-to-current conversion and converts the current according to the gradation of each pixel of the input image. The current averaging unit 1113 calculates the average current for each area by summing the current values of all the pixels in the corresponding area and dividing the sum value by the number of pixels in the corresponding area.

The IR drop calculating unit 116 receives the average current for each region from the average current calculating unit 111 and multiplies the wiring resistance of the physically predetermined high potential driving voltage ELVDD by the average current for each region, .

The ELVDD calculation unit 117 receives the IR drop for each region from the IR drop calculation unit 116 and receives the device characteristic voltage for each region from the characteristic voltage calculation unit 115. [ The ELVDD calculation unit 117 calculates the high potential driving voltage for each region by applying the IR drop and the device characteristic voltage for each region to Equation (4).

The ELVDD determination unit 118 receives the high-potential driving voltage for each region from the ELVDD calculation unit 117, and sets the maximum value among the high-potential driving voltages for each region to the final high-potential driving voltage .

7 also includes a compensation amount calculating unit 119 and a gamma reference voltage control unit 120. [

The Id does not change in accordance with the variation of Vds in the settling period of the driving TFT in theory. However, the actual driving TFT characteristic is larger than the slope of Vds-Id as shown in FIG. 11 in the settling time period, not to be zero. Therefore, when the final high potential driving voltage ELVDD changes, that is, when Vds changes, a slight luminance decrease occurs.

For example, when the driving TFT characteristic is as shown in Fig. 11, a current decrease is generated as much as I when the high potential driving voltage ELVDD changes from point A to point B. When the gamma reference voltage is increased to compensate for such a current decrease, since Vgs moves from point B to point C, the compensated current becomes equal to the current at the initial point A, and luminance compensation becomes possible.

The compensation amount calculating unit 119 receives the final high potential driving voltage from the ELVDD determining unit 118 and calculates a compensation amount for compensating for the current reduction caused by the change of the final high potential driving voltage.

The gamma reference voltage control unit 120 receives the peak luminance from the peak luminance calculation unit 113 and receives the compensation amount from the compensation amount calculation unit 119. Since the gamma reference voltage is determined according to the peak luminance value, the gamma reference voltage control unit 120 can calculate the gamma reference voltage correction value by multiplying the peak luminance by the compensation amount.

As described above, according to the present invention, when controlling the high-potential driving voltage to reduce the power consumption, the optimal high-potential driving voltage is determined by reflecting the spatial position of the representative image that exhibits the maximum luminance, It is possible to optimize and effectively prevent a local luminance drop.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: Display panel 11: Timing controller
11A: Power consumption control circuit 12: Data driving circuit
13: Gate driving circuit 16: Gamma reference voltage generating circuit
18: Power supply circuit

Claims (10)

A display panel having a plurality of pixels emitting light by a driving current determined by a high potential driving voltage and a low potential driving voltage;
The display panel is divided into a plurality of regions, and a high-potential driving voltage for each region is calculated using an IR drop and an element characteristic voltage for each region, and then a maximum value among the high- A first power consumption control unit for determining the driving voltage as a driving voltage; And
And a power supply circuit for generating and supplying the determined final high potential driving voltage to the display panel. The method according to claim 1,
A second power consumption controller for outputting a gamma reference voltage correction value based on the current reduction according to the final high potential driving voltage;
A gamma reference voltage generating circuit for adjusting a maximum gamma reference voltage according to the gamma reference voltage correction value and dividing the adjusted maximum gamma reference voltage to generate a gamma voltage set; And
Further comprising a data driving circuit for converting input image data into an analog data voltage with reference to the gamma voltage set and supplying the analog data voltage to the display panel. The method according to claim 1,
Wherein the first power consumption control unit comprises:
A maximum luminance calculation unit for calculating a maximum luminance per area from a maximum gradation based on an analysis result of the input image and a peak luminance according to an average image level of the input image;
A characteristic voltage calculation unit for calculating the device characteristic voltage for each region from the maximum luminance for each region;
An average current calculating unit for calculating an average current for each region based on the input image;
An IR drop calculating unit for calculating an IR drop for each region from the average current for each region and equivalent wiring resistance for each region;
An ELVDD calculation unit for calculating a high potential driving voltage for each region using the IR drop for each region and the device characteristic voltage for each region; And
And an ELVDD determination unit for determining a maximum value among the high-potential driving voltages for each region as a final high-potential driving voltage. 3. The method of claim 2,
Wherein the second power consumption control unit comprises:
A compensation amount calculation unit for calculating a compensation amount to compensate for a current reduction according to the final high potential driving voltage; And
And a gamma reference voltage controller for calculating the gamma reference voltage correction value by multiplying the peak luminance by the compensation amount. The method of claim 3,
The maximum luminance calculator
Wherein the histogram analyzing unit analyzes the histogram of the input image and selects the maximum gradation at a level that is not recognized in the sensed image by reflecting a preset clipping value in the histogram analysis result. A method of driving an OLED display device having a display panel including a plurality of pixels emitting light by a driving current determined by a high potential driving voltage and a low potential driving voltage,
The display panel is divided into a plurality of regions, and a high-potential driving voltage for each region is calculated using an IR drop and an element characteristic voltage for each region, and then a maximum value among the high- A driving voltage; And
And a second step of generating and supplying the determined final high potential driving voltage to the display panel. The method according to claim 6,
A third step of outputting a gamma reference voltage correction value based on the current reduction according to the final high potential driving voltage;
A fourth step of adjusting a maximum gamma reference voltage according to the gamma reference voltage correction value and dividing the adjusted maximum gamma reference voltage to generate a gamma voltage set; And
And a fifth step of converting the input image data into an analog data voltage with reference to the gamma voltage set and supplying the analog data voltage to the display panel. The method according to claim 6,
In the first step,
Calculating a maximum luminance per area from a maximum gradation based on an analysis result of the input image and a peak luminance according to an average image level of the input image;
Calculating an element characteristic voltage for each region from the maximum luminance for each region;
Calculating an average current for each region based on the input image;
Calculating an IR drop for each region from the average current for each region and equivalent wiring resistance for each region;
Calculating a high potential driving voltage for each region using the IR drop for each region and the device characteristic voltage for each region; And
And determining a maximum value among the high-potential driving voltages for each region as a final high-potential driving voltage. 8. The method of claim 7,
In the third step,
Calculating a compensation amount for compensating for a current reduction according to the final high potential driving voltage; And
And calculating the gamma reference voltage correction value by multiplying the peak luminance by the compensation amount. 9. The method of claim 8,
Wherein the step of calculating the maximum luminance per area from the maximum gradation based on the analysis result of the input image and the peak luminance according to the average image level of the input image,
Wherein the histogram analyzing unit analyzes the histogram of the input image and selects the maximum gradation at a level that is not recognized in the sensed image by reflecting a preset clipping value in the histogram analysis result.

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