KR20160030007A - Organic Light Emitting Display For Sensing Electrical Characteristics Of Driving Element - Google Patents

Abstract

An organic light emitting display device according to the present invention comprises a first data driver IC which has a first multiplexer which successively outputs the current information of the first pixels inputted by the sensing channels of a first group; a second driver IC which has a second multiplexer which successively outputs the current information of second pixels inputted by the sensing channel of a second group and the current information of the first pixels inputted from the first multiplexer; and a controller PCB which has a current integrator which is connected to the output terminal of the second multiplexer and successively integrates the current information of the first pixels inputted by the second multiplexer and the current information of the second pixels and output integration values, and an ADC which is connected to the output terminal of the current integrator and digitally processes the integration values.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting display, and more particularly to an organic light emitting display capable of sensing electrical characteristics of a driving element.

The active matrix type organic light emitting display device includes an organic light emitting diode (OLED) which emits light by itself, has a high response speed, and has a high luminous efficiency, luminance, and viewing angle.

The organic light emitting diode (OLED) includes an anode electrode, a cathode electrode, and organic compound layers (HIL, HTL, EML, ETL, EIL) formed therebetween. The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The OLED display arranges pixels each including an OLED in a matrix form and adjusts the brightness of the pixels according to the gradation of the video data. Each of the pixels includes a driving TFT (Thin Film Transistor) that controls a driving current flowing in the OLED according to a voltage (Vgs) applied between the gate electrode and the source electrode of the pixel. The electrical characteristics of the driving TFT, such as threshold voltage, mobility, etc., deteriorate as the driving time elapses, and a deviation may occur for each pixel. If the electrical characteristics of the driving TFT are different for each pixel, the luminance between the pixels for the same video data is different, so that the desired image is difficult to implement.

An external compensation method for compensating for the electrical characteristic deviation of the driving TFT is known. The external compensation method senses a change in the electrical characteristics of the driving TFT through the sensing unit, and modulates the digital video data in the external circuit by the amount of change. This external compensation scheme has an advantage that it is not necessary to configure the pixel circuit in a complicated manner. In the sensing unit of the external compensation method, there are a voltage sensing method and a current sensing method as a method of sensing a change in electrical characteristics of the driving TFT.

In the voltage sensing method, the current flowing through the driving TFT is stored as a voltage in the line capacitor of the sensing line, and this voltage is sensed by the sensing unit. However, since the line capacitance of the sensing line is very large, it takes much time to draw the current to a voltage level that can be sensed. Further, since the magnitude of the line capacitance varies according to the display load of the display panel, Acquisition is difficult.

On the other hand, since the current sensing scheme constitutes the sensing unit to include the current integrator and directly senses the current flowing in the driving TFT, low current and high-speed sensing are possible, and the influence of the display load is small.

However, in the case of adopting the current sensing method, a current integrator, a multiplexer (hereinafter referred to as MUX), and an analog-to-digital converter (hereinafter referred to as ADC) must be integrally provided in the data driver IC. Here, the current integrators are connected to each other one for each sensing channel, and the MUX sequentially outputs the analog sensing values input from the current integrators to the ADC. Then, the ADC digitally processes the analog sensing values output from the MUX.

However, when both the current integrator and the ADC are integrated in the data driver IC, the chip size of the IC becomes large and the manufacturing cost becomes high. Particularly, when a plurality of data driver ICs are used, since there is a separate ADC for each IC, a sensing deviation may occur between the ICs.

Accordingly, an object of the present invention is to provide an organic light emitting diode display device capable of reducing chip size and manufacturing cost of a data driver IC in an organic light emitting display device that senses a change in electrical characteristics of a driving TFT through a current sensing method have.

According to an aspect of the present invention, there is provided an OLED display device including a first multiplexer for sequentially outputting current information of first pixels input through a first group of sensing channels, Driver IC; A second data driver IC having a second multiplexer for sequentially outputting current information of first pixels input from the first multiplexer and current information of second pixels input through a second group of sensing channels; And a current integrator connected to an output terminal of the second multiplexer for sequentially integrating the current information of the first pixels input from the second multiplexer and the current information of the second pixels and outputting integral values, And a control PCB mounted on the ADC for digitally processing the integrated values.

The OLED display according to another embodiment of the present invention includes a first group of current integrators for integrating current information of first pixels input through sensing channels of a first group and outputting first integrals, A first data driver IC having a first multiplexer for sequentially outputting the first integrating values input from the first group of current integrators; A second group of current integrators for integrating the current information of the second pixels input through the sensing channels of the second group to output second integrals; A second data driver IC having a second multiplexer for sequentially outputting the second integration values input from the second group of current integrators; And a control PCB connected to an output terminal of the second multiplexer and having an ADC for digitally processing integrated values input from the second multiplexer.

The output of the first multiplexer is coupled to the input of the second multiplexer.

The organic light emitting display according to another embodiment of the present invention includes a first data driver IC having a first multiplexer for sequentially outputting current information of first pixels input through sensing channels of a first group; A second data driver IC having a second multiplexer for sequentially outputting current information of second pixels input through the sensing channels of the second group; A first multiplexer for sequentially integrating the current information of the first pixels input from the first multiplexer and outputting first integrals; and a second integrator for sequentially outputting current information of the second pixels input from the second multiplexer, A second current integrator for integrating the first current integrator and the second current integrator and outputting second integrals; and a third current integrator for sequentially outputting the first integrating values input from the first current integrator and the second integrating values input from the second current integrator, And a control PCB mounted on the ADC for digitally processing integrated values input from the third multiplexer, the control PCB being connected to an output terminal of the third multiplexer.

The organic light emitting display according to another embodiment of the present invention includes a first data driver IC having a first multiplexer for sequentially outputting current information of first pixels input through sensing channels of a first group; A second data driver IC having a second multiplexer for sequentially outputting current information of second pixels input through the sensing channels of the second group; A first current integrator for sequentially integrating current information of the first pixels input from the first multiplexer and outputting first integrals; and a second current integrator connected to an output terminal of the first current integrator, A second current integrator for sequentially integrating the current information of the second pixels input from the second multiplexer and outputting second integrals; and a second current integrator connected to an output terminal of the second current integrator, And a control PCB on which a second ADC for digitally processing the second integrals is mounted.

The present invention does not implement the configuration means necessary for sensing, that is, the current integrator, the MUX, and the ADC integrally in the data driver IC, but only a part of the configuration means is mounted on each data driver IC and the rest is mounted on the control PCB . Accordingly, the present invention can effectively reduce the chip size and manufacturing cost of the data driver IC.

1 is a block diagram showing an organic light emitting display according to an embodiment of the present invention.
FIG. 2 is a schematic diagram showing a pixel array formed in the display panel of FIG. 1 and a data driver IC for implementing a current sensing method; FIG.
FIG. 3 is a diagram showing a detailed configuration of a pixel configuration to which the current sensing method of the present invention is applied, and a current integrator for integrating current information of pixels. FIG.
4 is a view showing a configuration of a data driver ICs and a control PCB according to a first embodiment of the present invention.
5 is a view showing a configuration of a data driver ICs and a control PCB according to a second embodiment of the present invention.
Fig. 6 shows the output timing of the cascade-connected multiplexers in Fig. 4 and Fig. 5; Fig.
7 is a view showing a configuration of a data driver ICs and a control PCB according to a third embodiment of the present invention.
8 is a view showing a configuration of a data driver ICs and a control PCB according to a fourth embodiment of the present invention.

Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram illustrating an organic light emitting display according to an embodiment of the present invention. Fig. 2 shows a schematic configuration of a pixel array formed on the display panel of Fig. 1 and a data driver IC for implementing a current sensing method.

1 and 2, an OLED display according to an exemplary embodiment of the present invention includes a display panel 10, a timing controller 11, a data driving circuit 12, a gate driving circuit 13, a memory 16 And a control PCB 20 as shown in Fig.

A plurality of data lines and sensing lines 14A and 14B and a plurality of gate lines 15 are intersected with each other in the display panel 10 and pixels P are arranged in a matrix form in each of the intersection areas.

Each pixel P is connected to any one of the data lines 14A, to one of the sensing lines 14B, and to one of the gate lines 15. Each pixel P receives a data voltage from the data line 14A and outputs a pixel current (pixel current information) through the sensing line 14B in response to a gate pulse input through the gate line 15 do.

Each of the pixels P is supplied with a high potential drive voltage EVDD and a low potential drive voltage EVSS from a power supply not shown. The pixel P of the present invention may include an OLED and a plurality of TFTs for external compensation. The TFTs included in the pixel P may be implemented as a p-type or an n-type. In addition, the semiconductor layer of the TFTs included in the pixel P may include amorphous silicon, polysilicon, or an oxide.

Each of the pixels P may operate differently at the time of normal driving for image implementation and at the time of sensing for acquiring the sensing value (corresponding to the pixel current). The sensing drive may be performed during the power-on process prior to the normal drive, or during the power-off process after the normal drive. Also, the sensing drive may be performed in vertical blank periods during normal driving.

The normal driving can be performed by one operation of the data driving circuit 12 and the gate driving circuit 13 under the control of the timing controller 11. [ The sensing operation may be performed by different operations of the data driving circuit 12 and the gate driving circuit 13 under the control of the timing controller 11. [ The timing controller 11 derives a compensation value for compensating for a change in the electrical characteristics of the driving TFT based on the sensing value, modulates the first digital video data RGB for image display based on the compensation value, And may modulate the second digital video data RGB for sensing based on the compensation value.

The timing controller 11 controls the operation of the data driving circuit 12 based on timing signals such as a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a dot clock signal DCLK and a data enable signal DE A data control signal DDC for controlling the timing and a gate control signal GDC for controlling the operation timing of the gate drive circuit 13 are generated. The timing controller 11 distinguishes between normal driving and sensing driving based on a predetermined reference signal (driving power enable signal, vertical synchronizing signal, data enable signal, etc.), and generates a data control signal DDC and a gate The control signal GDC can be generated differently. In addition, the timing controller 11 may generate additional control signals (such as the output timing control signals of the cascade-connected MUXs in Fig. 6) necessary for sensing driving.

The timing controller 11 can transmit the second digital video data (RGB) corresponding to the sensing data voltage to the data driving circuit 12 during sensing driving. Here, the compensation value derived in the previous sensing period is reflected in the second digital video data RGB. The sensing data voltage is generated in the data driving circuit 12 and then supplied to the pixel P via the data line 14A. The timing controller 11 applies the digital sensing value SD transmitted from the ADC of the control PCB 20 to the pre-stored compensation algorithm at the time of sensing driving to derive the threshold voltage deviation and the mobility variation of the driving TFT, The compensation value stored in the memory 16 can be updated with a compensation value that can compensate for the compensation value.

The timing controller 11 modulates the first digital video data RGB by adding or multiplying the compensation value stored in the memory 16 in the normal driving mode to the first digital video data RGB for image display, .

The gate drive circuit 13 generates an image display gate pulse on the basis of the gate control signal GDC during normal driving and then outputs the image display gate pulse to the gate lines (L # 1, L # 2, 15). The gate driving circuit 13 generates sensing gate pulses based on the gate control signal GDC during the sensing operation and then outputs the gate lines 15 (L # 1, L # 2, ...) ). The sensing gate pulse may have a larger on-pulse interval than the gate pulse for image display. The on-pulse section of the sensing gate pulse corresponds to the one-line sensing on-time. Here, the one-line sensing on-time is a period in which pixels of the one-row pixel line (L # 1, L # 2, This means scan time to be devoted to.

The data driving circuit 12 includes a plurality of data driver integrated circuits (SIC # 1 to SIC # N). The data driver IC SIC includes a plurality of digital-to-analog converters (DACs) connected to the respective data lines 14A and a group of sensing channels CH1 to CHk connected to the sensing lines 14B, .

The DAC of the data driver IC SIC receives first digital video data RGB modulated from the timing controller 11 during normal driving and outputs the first digital video data RGB to the data timing control signal DDC And then supplies the image data to the data lines 14A. On the other hand, the DAC of the data driver IC (SIC) receives the second digital video data (RGB) modulated from the timing controller 11 at the time of sensing driving and supplies the second digital video data RGB to the data timing control signal DDC And supplies the data voltages to the data lines 14A.

In particular, each data driver IC (SIC) of the present invention does not have the integrated components necessary for sensing, i.e., the current integrator, the MUX, and the ADC, so that the chip size and the manufacturing cost of the IC are reduced. Only a part is implemented. (S) which are not mounted on the data driver IC (SIC) of the constituent means are mounted on the control PCB 20. Various embodiments in which the current sensing method can be implemented while reducing the chip size and manufacturing cost of the IC will be described later with reference to FIGS. 4 to 8. FIG.

FIG. 3 shows a detailed configuration of a pixel configuration to which the current sensing method of the present invention is applied, and a current integrator that integrates current information of a pixel.

3 is merely an example for facilitating understanding of the driving of the current sensing scheme. Since the pixel structure to which the current sensing of the present invention is applied can be variously modified, the technical idea of the present invention is not limited to this embodiment.

3, the pixel PIX of the present invention includes an OLED, a driving TFT (Thin Film Transistor) DT, a storage capacitor Cst, a first switch TFT ST1, and a second switch TFT ST2 .

The OLED includes an anode electrode connected to the second node N2, a cathode electrode connected to the input terminal of the low potential driving voltage (EVSS), and an organic compound layer positioned between the anode electrode and the cathode electrode. The driving TFT DT controls the amount of current input to the OLED according to the gate-source voltage Vgs. The driving TFT DT has a gate electrode connected to the first node N1, a drain electrode connected to the input terminal of the high potential driving voltage EVDD, and a source electrode connected to the second node N2. The storage capacitor Cst is connected between the first node N1 and the second node N2. The first switch TFT (ST1) applies the data voltage (Vdata) from the data line (14A) to the first node (N1) in response to the gate pulse (SCAN). The first switch TFT ST1 has a gate electrode connected to the gate line 15, a drain electrode connected to the data line 14A, and a source electrode connected to the first node N1. The second switch TFT (ST2) switches the current flow between the second node (N2) and the sensing line (14B) in response to the gate pulse (SCAN). The second switch TFT ST2 has a gate electrode connected to the second gate line 15D, a drain electrode connected to the sensing line 14B, and a source electrode connected to the second node N2.

The current integrator CI of the present invention inputs the pixel current from the sensing line 14B, that is, the inverting input terminal (-) receiving the source-drain current Ids of the driving TFT DT, and the reference voltage Vpre An amplifier AMP including an output terminal for outputting a non-inverting input terminal (+) and an integration value (Vout) to be received; an integrating capacitor Cfb connected between an inverting input terminal (-) and an output terminal of the amplifier AMP; And a first switch SW1 connected to both ends of the integrating capacitor Cfb. 3, the current integrator CI is directly connected to the sensing line 14B through the sensing channel CHa, but the technical idea of the present invention is not limited thereto. 5, the current integrator (CI) of the present invention may be mounted on the data driver IC (SIC) to receive a pixel current directly from the sensing line 14B, And may be mounted on the PCB 20 to receive the pixel current through the MUX.

The sensing operation using the current integrator (CI) may include an initialization step, a sensing step, and a sampling step.

In the initialization step, the amplifier AMP operates as a unit gain buffer having a gain of 1 due to the turn-on of the first switch SW1. In the initialization step, the input terminals (+, -) and the output terminal of the amplifier AMP, the sensing line 14B, and the second node N2 are all initialized to the reference voltage Vpre. During the initialization step, the data voltage for sensing is applied to the first node N1 through the DAC of the data driver IC (SIC). Thus, the source-drain current Ids corresponding to the potential difference between the first node N1 and the second node N2 flows and is stabilized in the driving TFT DT. However, during the initialization step, the amplifier AMP continues to operate as a unit gain buffer, so that the potential of the output terminal is maintained at the reference voltage Vpre.

The amplifier AMP operates as a current integrator CI due to the turn-off of the first switch SW1 in the sensing step and integrates the source-drain current Ids flowing in the driving TFT DT. The potential difference between the both ends of the integral capacitor Cfb is increased by the current Ids flowing into the inverting input terminal (-) of the amplifier AMP in the sensing step as the sensing time elapses, that is, the accumulated current value Ids increases . However, due to the characteristics of the amplifier AMP, the inverting input terminal (-) and the non-inverting input terminal (+) are short-circuited through the virtual ground and the potential difference between them is zero. The potential is maintained at the reference voltage Vpre irrespective of the increase in the potential difference of the integrating capacitor Cfb. Instead, the output terminal potential of the amplifier AMP is lowered corresponding to the potential difference between both ends of the integral capacitor Cfb. With this principle, the current Ids flowing through the sensing line 14B in the sensing step is changed to the integral value Vout through the integral capacitor Cfb. The decreasing slope of the integral value Vout increases as the amount of current Ids flowing through the sensing line 14B increases, so that the integral value Vout decreases as the amount of current Ids increases. In the sensing step, the integral value Vout is stored in a sample-and-hold circuit (not shown).

In the sampling step, the integral value (Vout) stored in the sample and hold circuit is input to the ADC. The integral value Vout is converted from the ADC to the digital sensing value SD and then transmitted to the timing controller 11. [ The digital sensing value SD is used by the timing controller 11 to derive the threshold voltage deviation (Vth) and the mobility deviation (K) of the driving TFT. In the timing controller 11, the capacitance of the integral capacitor Cfb, the reference voltage value Vpre, and the sensing time value Tsen are stored in advance in a digital code. Therefore, the timing controller 11 calculates the source-drain current (Ids = Cfb * V / t), which flows from the digital sensing value SD, which is a digital code to the integral value Vout, ㅿ V = Vpre-Vsen, ㅿ t = Tsen) can be calculated. The timing controller 11 applies the source-to-drain current Ids flowing in the driving TFT DT to the compensation algorithm to calculate deviation values (threshold voltage deviation (Vth) and mobility deviation (K)) and deviation compensation (Vth + [Delta] Vth, K + [Delta] K). The compensation algorithm may be implemented as a look-up table or computational logic.

FIG. 4 shows a first embodiment in which the current sensing method can be implemented while reducing the chip size and manufacturing cost of the IC as one configuration of the data driver ICs and the control PCB of the present invention.

4, in the present invention, only the MUX is incorporated in each of the data driver ICs (SIC # 1 to N) to sequentially switch the pixel currents from the display panel 10, and the data driver ICs SIC # 1 to N ) (Where N is a positive integer of 2 or more) are connected to each other in a cascade manner, the current integrator CI can be reduced to one, and the ADC can be reduced to one.

When the first and second data driver ICs having the first and second MUXs respectively neighbor to each other, the output terminal of the first MUX is connected to the input terminal of the second MUX by the cascade connection method. So that the outputs of the first MUX of the first data driver IC are supplied as one input to the second MUX of the second data driver IC.

One configuration of the data driver ICs and the control PCB will be described as an example in the case where the data driver ICs are composed of two (N = 2). The same method applies even when there are three or more data driver ICs.

The present invention implements a sensing operation using the data driving circuit 12 having the first and second data driver ICs SIC # 1 and SIC # 2 and the control PCB 20 during the sensing operation.

The first data driver IC (SIC # 1) implements a first MUX that sequentially outputs current information of first pixels input through the sensing channels CH1 to CHk of the first group.

The second data driver IC (SIC # 2) receives the current information of the first pixels input from the first MUX and the current information of the second pixels input through the second group of sensing channels (CHk + 1 ~ CH2k) And sequentially implements a second MUX for outputting. To this end, the output of the first MUX is connected to the input of the second MUX.

The control PCB 20 implements one current integrator (CI) and one ADC. One current integrator CI is connected to the output terminal of the second MUX to sequentially integrate the current information of the first pixels input from the second MUX and the current information of the second pixels in the order of the timing shown in FIG. 6, Lt; / RTI > One ADC is connected to the output terminal of the current integrator (CI) and digitally processes the integral values sequentially.

4, the number of current integrators can be reduced to 1 / the number of sensing channels in the related art, and the number of ADCs can be reduced to 1 / N So that it is effective to reduce the side effect (sensing deviation) due to the characteristic deviation between the current integrators and the characteristic deviation between the ADCs. Furthermore, since the present invention does not include the current integrator and the ADC in the data driver IC, it is advantageous to reduce the IC chip size.

FIG. 5 shows a second embodiment in which the current sensing method can be implemented while reducing the chip size and manufacturing cost of the IC as one configuration of the data driver ICs and the control PCB of the present invention.

5, the present invention integrates only the current integrator (CI) and the MUX in each of the data driver ICs (SIC # 1 to N) to integrate the pixel currents from the display panel 10 and sequentially switch the integrated values However, by connecting the MUXs of the data driver ICs SIC # 1 to N (N is a positive integer of 2 or more) in a cascade manner, it is possible to reduce the number of ADCs to one.

When the first and second data driver ICs having the first and second MUXs respectively neighbor to each other, the output terminal of the first MUX is connected to the input terminal of the second MUX by the cascade connection method. So that the outputs of the first MUX of the first data driver IC are supplied as one input to the second MUX of the second data driver IC.

One configuration of the data driver ICs and the control PCB will be described as an example in the case where the data driver ICs are composed of two (N = 2). The same method applies even when there are three or more data driver ICs.

The present invention implements a sensing operation using the data driving circuit 12 having the first and second data driver ICs SIC # 1 and SIC # 2 and the control PCB 20 during the sensing operation.

The first data driver IC SIC # 1 includes a first group of current integrators for integrating the current information of the first pixels input through the sensing channels CH1 to CHk of the first group and outputting first integrating values, And a first MUX for sequentially outputting the first integrating values input from the first group of current integrators CI.

The second data driver IC (SIC # 2) outputs a second group of electric currents for integrating the current information of the second pixels input through the sensing channels (CHk + 1 to CH2k) of the second group and outputting second integrated values And a second MUX for sequentially outputting the first integrated values input from the first MUX and the second integrated values input from the second group of current integrators (CI). To this end, the output of the first MUX is connected to the input of the second MUX.

The control PCB 20 mounts one ADC. One ADC is connected to the output terminal of the second MUX and sequentially digitally processes the integrating values input from the second MUX in the order of the timing shown in FIG.

5, the number of ADCs can be reduced to 1 / N as compared with conventional ADCs mounted on each data driver IC, and it is effective to reduce the side effect (sensing deviation) due to the characteristic deviation between the ADCs to be. Furthermore, since the ADC is not mounted in the data driver IC, the present invention is advantageous in reducing the IC chip size.

FIG. 7 shows a third embodiment in which the current sensing method can be implemented while reducing the chip size and manufacturing cost of the IC as one configuration of the data driver ICs and the control PCB of the present invention.

7, in the present invention, only the MUX is incorporated in each of the data driver ICs (SIC # 1 to N) to sequentially switch the pixel currents from the display panel 10, and the number of the current integrators (CI) and one ADC are mounted on the control PCB 20 and the outputs of the current integrators (CI) are sequentially supplied to the ADC by using the MUXa of the PCB 20, the current integrator (CI) The number of ADCs can be reduced to N, and the number of ADCs can be reduced to one.

One configuration of the data driver ICs and the control PCB will be described as an example in the case where the data driver ICs are composed of two (N = 2). The same method applies even when there are three or more data driver ICs.

The present invention implements a sensing operation using the data driving circuit 12 having the first and second data driver ICs SIC # 1 and SIC # 2 and the control PCB 20 during the sensing operation.

The first data driver IC (SIC # 1) implements a first MUX that sequentially outputs current information of first pixels input through the sensing channels CH1 to CHk of the first group.

The second data driver IC (SIC # 2) implements a second MUX that sequentially outputs the current information of the second pixels input through the sensing channels (CHk + 1 to CH2k) of the second group.

The control PCB 20 implements two current integrators (CI), one ADC and a third MUX (MUXa). The first current integrator (CI) sequentially integrates the current information of the first pixels input from the first MUX and outputs first integrated values. The second current integrator (CI) sequentially integrates the current information of the second pixels input from the second MUX and outputs second integrated values. The third MUX (MUXa) sequentially outputs first integrating values input from the first current integrator (CI) and second integrating values input from the second current integrator (CI). One ADC is connected to the output terminal of the third MUX (MUXa) and digitally processes the integral values input from the third MUX (MUXa).

7, the number of current integrators can be reduced to the number of conventional N / sensing channels, and the number of ADCs can be reduced to a conventional 1 / N , Which is effective in reducing the side effect (sensing deviation) due to the characteristic deviation between the ADCs. Furthermore, since the present invention does not include the current integrator and the ADC in the data driver IC, it is advantageous to reduce the IC chip size.

FIG. 8 shows a fourth embodiment in which the current sensing method can be implemented while reducing the chip size and manufacturing cost of the IC as one configuration of the data driver ICs and the control PCB of the present invention.

8, in the present invention, only the MUX is incorporated in each of the data driver ICs (SIC # 1 to N) to sequentially switch pixel currents from the display panel 10, and the number of current integrators It is possible to reduce the number of the current integrators CI to N by adopting a structure in which the CI and the ADC are mounted on the control PCB 20. [

One configuration of the data driver ICs and the control PCB will be described as an example in the case where the data driver ICs are composed of two (N = 2). The same method applies even when there are three or more data driver ICs.

The present invention implements a sensing operation using the data driving circuit 12 having the first and second data driver ICs SIC # 1 and SIC # 2 and the control PCB 20 during the sensing operation.

The first data driver IC (SIC # 1) implements a first MUX that sequentially outputs current information of first pixels input through the sensing channels CH1 to CHk of the first group.

The second data driver IC (SIC # 2) implements a second MUX that sequentially outputs the current information of the second pixels input through the sensing channels (CHk + 1 to CH2k) of the second group.

The control PCB 20 implements two current integrators (CI) and two ADCs. The first current integrator (CI) sequentially integrates the current information of the first pixels input from the first MUX and outputs first integrated values. The first ADC is connected to the output terminal of the first current integrator (CI) and digitally processes the first integral values sequentially. The second current integrator (CI) sequentially integrates the current information of the second pixels input from the second MUX and outputs second integrated values. The second ADC is connected to the output terminal of the second current integrator (CI) to digitally process the second integral values sequentially.

According to FIG. 8, the number of current integrators can be reduced to the number of conventional N / sensing channels, compared to the case where a current integrator and an ADC are mounted for each data driver IC. The present invention is advantageous in reducing the IC chip size because the current integrator and the ADC are not mounted in the data driver IC.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: Display panel 11: Timing controller
12: data driving circuit 13: gate driving circuit
16: memory 20: control PCB

Claims (5)

A first data driver IC having a first multiplexer for sequentially outputting current information of first pixels input through sensing channels of the first group;
A second data driver IC having a second multiplexer for sequentially outputting current information of first pixels input from the first multiplexer and current information of second pixels input through a second group of sensing channels; And
A current integrator connected to an output terminal of the second multiplexer for sequentially integrating the current information of the first pixels input from the second multiplexer and the current information of the second pixels and outputting integral values; And a control PCB connected to an output terminal and having an ADC mounted thereon for digitally processing the integrated values. A first group of current integrators for integrating the current information of the first pixels input through the sensing channels of the first group to output first integrated values; A first data driver IC having a first multiplexer for sequentially outputting values;
A second group of current integrators for integrating the current information of the second pixels input through the sensing channels of the second group to output second integrals; A second data driver IC having a second multiplexer for sequentially outputting the second integration values input from the second group of current integrators; And
And a control PCB connected to an output terminal of the second multiplexer and having an ADC for digitally processing integrated values input from the second multiplexer. 3. The method according to claim 1 or 2,
And an output terminal of the first multiplexer is connected to an input terminal of the second multiplexer. A first data driver IC having a first multiplexer for sequentially outputting current information of first pixels input through sensing channels of the first group;
A second data driver IC having a second multiplexer for sequentially outputting current information of second pixels input through the sensing channels of the second group; And
A first current integrator for sequentially integrating current information of the first pixels input from the first multiplexer and outputting first integrals; and a second current integrator for sequentially integrating current information of the second pixels input from the second multiplexer And a third multiplexer for sequentially outputting the first integrated values input from the first current integrator and the second integrated values input from the second current integrator, And a control PCB connected to an output terminal of the third multiplexer and having an ADC for digitally processing integrated values input from the third multiplexer. A first data driver IC having a first multiplexer for sequentially outputting current information of first pixels input through sensing channels of the first group;
A second data driver IC having a second multiplexer for sequentially outputting current information of second pixels input through the sensing channels of the second group; And
A first current integrator for sequentially integrating current information of the first pixels input from the first multiplexer and outputting first integrals; a second current integrator connected to an output terminal of the first current integrator for digitally processing the first integrals; A second current integrator for sequentially integrating the current information of the second pixels input from the second multiplexer and outputting second integrated values; and a second current integrator connected to an output terminal of the second current integrator, And a control PCB on which a second ADC for digitally processing two integrating values is mounted.

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