KR20150142911A - Semiconductor package and method for manufacturing the same - Google Patents

Semiconductor package and method for manufacturing the same Download PDF

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Publication number
KR20150142911A
KR20150142911A KR1020140071514A KR20140071514A KR20150142911A KR 20150142911 A KR20150142911 A KR 20150142911A KR 1020140071514 A KR1020140071514 A KR 1020140071514A KR 20140071514 A KR20140071514 A KR 20140071514A KR 20150142911 A KR20150142911 A KR 20150142911A
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KR
South Korea
Prior art keywords
substrate
semiconductor die
vent hole
adhesive
semiconductor package
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Application number
KR1020140071514A
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Korean (ko)
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KR101613114B1 (en
Inventor
유재복
문주형
김남호
Original Assignee
에스티에스반도체통신 주식회사
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Priority to KR1020140071514A priority Critical patent/KR101613114B1/en
Publication of KR20150142911A publication Critical patent/KR20150142911A/en
Application granted granted Critical
Publication of KR101613114B1 publication Critical patent/KR101613114B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

The present invention relates to a semiconductor package, and a manufacturing method thereof. More specifically the present invention relates to a semiconductor package, and a manufacturing method thereof which can increase heat radiation performance by discharging a part of heat generated in a semiconductor die to the bottom of a substrate through a vent hole formed on the substrate, can effectively remove epoxy void since a part of the bottom of the semiconductor die is exposed to the outside through the vent hole, and can increase quality of a product by discharging moisture to the outside through the vent hole.

Description

[0001] Semiconductor package and method for manufacturing same [0002]

The present invention relates to a semiconductor package and a method of manufacturing the same. More particularly, the present invention relates to a semiconductor package and a method of manufacturing the same. More particularly, The present invention relates to a semiconductor package capable of efficiently removing an epoxy void because it is exposed to the outside through a vent hole and capable of improving the quality of a product by discharging moisture to the outside through a vent hole and a manufacturing method thereof.

In general, one of the most important characteristics of a semiconductor package is thermal dissipation.

Conventional semiconductor packages include a substrate, a main semiconductor die, and a heat slug. The main semiconductor die is mounted on the upper surface of the substrate and electrically connected thereto. The semiconductor package thus constructed is provided with a heat slug for effectively discharging heat generated when an electronic device formed in the main semiconductor die operates to the outside of the semiconductor package. After arranging the heat slug, the main semiconductor die and the heat slug disposed on the substrate are sealed with an insulating sealing material. A solder bump is formed on the lower surface of the substrate on which the main semiconductor die is mounted.

5 is a cross-sectional view showing a state where a heat slug is installed in a conventional semiconductor package.

Referring to FIG. 5, a main semiconductor die is mounted on a substrate and connected to the substrate by wires. Then, the heat slug is mounted on the substrate, and the epoxy molding (EMC) molding is performed. However, since most of the heat generated in the main semiconductor die is discharged through EMC, there is a problem that the heat dissipation efficiency is low.

In addition, since the main semiconductor die and the heat slug are separated from each other and the thermal conductivity is lower than that of the metal, EMC molding is performed.

In addition, due to the small chip size compared to the semiconductor package, warpage occurs due to different thermal expansion coefficients of die, adhesive, PCB, and EMC components. Thermal stress between the chip and PCB affects the electrical signal. There is a problem of diminishing.

Published Japanese Patent Application No. 10-2005-0077866 Thermal Discharge Semiconductor Package and Manufacturing Method Thereof (Published: 2005. 08. 04.)

It is an object of the present invention to provide a semiconductor package capable of improving heat dissipation performance by discharging part of heat generated in a semiconductor die through a vent hole formed in the substrate to a lower portion of the substrate, And a method for producing the same.

It is another object of the present invention to provide a method of manufacturing a semiconductor device, which is capable of effectively removing an epoxy void since a part of a bottom surface of a semiconductor die is exposed to the outside through a vent hole, A semiconductor package and a method of manufacturing the same.

Another object of the present invention is to provide a semiconductor package and a method of manufacturing the same, in which a process cycle is shortened because void control is not required in a die attach process.

To this end, a semiconductor package according to the present invention includes a substrate on which at least one vent hole is formed to be vertically penetrated; An adhesive applied on the substrate; And a semiconductor die attached to the adhesive, wherein a part of the lower surface of the semiconductor die is exposed to the outside through the vent hole, thereby releasing heat of the semiconductor die by convection.

Also, a plurality of vent holes are formed in the semiconductor package according to the present invention.

Further, the vent hole of the semiconductor package according to the present invention is characterized in that a groove portion formed in the outer peripheral direction from the upper end portion is formed.

The semiconductor package according to the present invention is characterized in that an annular adhesive shielding film is formed in a groove portion of the semiconductor package.

In addition, the adhesive of the semiconductor package according to the present invention is characterized by being an epoxy.

In addition, the semiconductor package according to the present invention further includes a molding part sealing the substrate and the semiconductor die.

According to another aspect of the present invention, there is provided a semiconductor package comprising: a substrate on which at least one vent hole is formed; A semiconductor die mounted on the substrate; And a DAF (die attach film) sandwiched between the substrate and the semiconductor die and coupling the substrate and the semiconductor die, wherein a part of the lower surface of the semiconductor die is exposed to the outside through the vent hole, And the heat of the die is released.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package, comprising: providing a substrate having at least one vent hole vertically formed therein; Applying an adhesive to one surface of the substrate except for the vent hole; And attaching a semiconductor die on the adhesive.

Further, in the method of manufacturing a semiconductor package according to the present invention, when a vent hole is formed in each corner area of the substrate, the adhesive is applied to the inside of the plurality of vent holes.

In the method of manufacturing a semiconductor package according to the present invention, when a plurality of vent holes are formed in a linear pattern, the adhesive is applied to the left and right of the linear pattern, respectively.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package, the method including forming a molding part sealing the substrate and the semiconductor die.

Further, in the method of manufacturing a semiconductor package according to the present invention, the vent hole is formed with a groove portion recessed from the upper end portion in the outer peripheral direction,

And an annular adhesive shielding film is formed on the groove portion so that the applied adhesive is prevented from flowing into the vent hole by the adhesive shielding film.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor package, comprising: providing a substrate having at least one vent hole vertically formed therein; Providing a semiconductor die to which a DAF (die attach film) is attached; And mounting a semiconductor die on the substrate.

The semiconductor package and the method of manufacturing the same according to the present invention have the effect of improving the heat radiation performance by discharging part of the heat generated in the semiconductor die through the vent hole formed in the substrate to the lower portion of the substrate.

In the semiconductor package and the method of manufacturing the same according to the present invention, since a part of the lower surface of the semiconductor die is exposed to the outside through the vent hole, the epoxy void can be efficiently removed and moisture is discharged to the outside through the vent hole, There is an effect that quality can be improved.

In addition, since the semiconductor package and the manufacturing method thereof according to the present invention do not require void control in the die attach process, the process cycle can be shortened.

1A and 1B are sectional views showing a first embodiment of a semiconductor package according to the present invention.
2 is a cross-sectional view showing a second embodiment of the semiconductor package according to the present invention.
FIG. 3A is a cross-sectional view showing a substrate on which a vent hole of the present invention is formed, FIGS. 3B and 3C are a cross-sectional view and a plan view showing a state in which an adhesive is applied onto the substrate of the present invention, FIG. 3E is a cross-sectional view showing a state in which a molding part is formed on the substrate of the present invention. FIG.
4A to 4C are cross-sectional views illustrating respective steps of the method of manufacturing the semiconductor package of the present invention.
5 is a cross-sectional view showing a conventional semiconductor package.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In addition, the terms described below are defined in consideration of the functions of the present invention, and these may vary depending on the intention of the user, the operator, or the precedent. Therefore, the definition should be based on the contents throughout this specification.

1A and 1B are sectional views showing a first embodiment of a semiconductor package according to the present invention.

1A, a semiconductor package 100 according to the present invention includes a substrate 110 on which a vent hole 111 is formed, an adhesive 120, a semiconductor die 130, and a molding part 150 can do.

The semiconductor package 100 according to the present invention includes a substrate 110 on which at least one vent hole 111 is formed so as to pass through the substrate 110 and an adhesive 120 and a semiconductor die 130 attached onto the adhesive 120.

In the semiconductor package 100 according to the present invention, a part of the lower surface of the semiconductor die 130 is exposed to the outside through the vent hole 111 so that the heat of the semiconductor die 130 is discharged downward by convection .

The substrate 110 has a circuit pattern similar to a general substrate 110, and a solder ball 117 is formed on the bottom surface.

1B, the vent hole 111 is formed with an annular groove 113 which is recessed in the outer circumferential direction from the upper end, and an annular adhesive blocking film 115 is formed on the inner end of the groove 113 .

The adhesive blocking layer 115 prevents the flowable adhesive 120 from flowing into the vent hole 111 when the adhesive is applied. At this time, the groove 113 serves to provide a predetermined space between the upper surface of the substrate 110 to which the adhesive 120 is applied and the adhesive barrier 115.

The adhesive layer 115 may have a height corresponding to the upper surface of the substrate 110.

The adhesive 120 may be formed of a resin such as epoxy or polyamide, and may be applied to a region of the upper surface of the substrate other than the vent hole.

At this time, the adhesive 120 may be applied to the entire surface of the substrate 110, and the adhesive shielding film 115 prevents the adhesive 120 from flowing into the vent hole 111.

And the adhesive 120 may be applied only to a part of the substrate 110. [ That is, when a plurality of the vent holes 111 are arranged in a predetermined pattern, the adhesive 120 may be applied so as to be spaced apart from the vent hole 111 according to the pattern. (c)

For example, when the vent hole 111 is formed in each corner region of the substrate as shown in FIG. 3C, the adhesive 120 is applied to the inside of the plurality of vent holes 111, (b), when the plurality of vent holes 111 are formed in a straight line, the adhesive 120 can be applied to the left and right of the linear pattern, respectively.

At this time, the adhesive may be applied while the nozzle for spraying the adhesive moves in the direction of the arrows shown in (a), (b) and (c) of FIG. 3C, or may be applied by a screen printing method.

The semiconductor package 100 according to the present invention may further include a molding part 150 sealing the substrate 110 and the semiconductor die 130.

The molding part 150 may be an epoxy molding compound (EMC).

Consequently, the semiconductor package according to the present invention has an advantage that heat dissipation performance can be improved by discharging part of the heat generated in the semiconductor die through the vent hole formed in the substrate to the lower part of the substrate.

2 is a cross-sectional view showing a second embodiment of the semiconductor package according to the present invention.

In this embodiment, the semiconductor die 130 is attached through the DAF 125 (die attach film), unlike the adhesive used in the embodiment described above.

Since the DAF 125 is a film adhered to the lower surface of the semiconductor die 130, the vent hole 111 can be closed, but the thickness of the DAF 125 is very thin. However, in some cases, holes corresponding to the vent holes may be formed in the DAF to expose the semiconductor die to the outside.

Hereinafter, a method of manufacturing a semiconductor package according to the present invention will be described with reference to the accompanying drawings. However, the same or similar components as those described in the above-described embodiments will not be described in detail.

The manufacturing method of the semiconductor package according to the present embodiment can be roughly divided into steps S1 to S4.

3A is a cross-sectional view illustrating a substrate having a vent hole formed therein according to an embodiment of the present invention. Referring to FIG. 3A, the substrate 110 having at least one vent hole formed therein .

The vent hole 111 may be formed with an annular groove 113 which is recessed in the outer circumferential direction from the upper end.

3B and 3C are a cross-sectional view and a plan view showing a state in which the adhesive is applied onto the substrate of the present invention. In step S2, the adhesive is applied to the surface of the substrate 110 excluding the vent hole 111, (120).

At this time, the adhesive 120 may be an epoxy, and it may form a predetermined pattern while moving in the direction of the arrow in the nozzle.

FIG. 3D is a cross-sectional view showing a state in which the semiconductor die of the present invention is attached to a substrate, and the step S3 is a step of attaching the semiconductor die 130 on the adhesive 120.

In this embodiment, since a part of the bottom surface of the semiconductor die 130 is exposed to the outside through the vent hole 111, there is an advantage that the quality of the product can be improved by effectively removing the epoxy void.

FIG. 3E is a cross-sectional view showing a state where the molding part is formed on the substrate of the present invention. In step S4, the molding part 150 for sealing the substrate 110 and the semiconductor die 130 is formed.

The manufacturing method of the semiconductor package according to the present embodiment can be largely composed of steps S11 to S14.

4A to 4C are cross-sectional views illustrating respective steps of the method of manufacturing the semiconductor package of the present invention.

Specifically, the method of manufacturing a semiconductor package according to the present embodiment includes a step S11 of providing a substrate on which at least one vent hole is formed, the DAF 125 (die attach) a step S13 of mounting the semiconductor die 130 on the substrate 110 and a step S13 of mounting the semiconductor die 130 on the substrate 110, And forming the molding part 150. [

However, in this embodiment, the semiconductor die is bonded to the substrate in a state in which the DAF is attached to the bottom surface of the semiconductor die, without directly applying an adhesive to the surface of the substrate, unlike the above-described embodiments.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and similarities. Accordingly, the scope of the present invention should be construed as being limited to the embodiments described, and it is intended that the scope of the present invention encompasses not only the following claims, but also equivalents thereto.

100: semiconductor package 110: substrate
111: vent hole 113:
115: adhesive barrier film 117: solder ball
120: Adhesive 125: DAF
130: semiconductor die 150: molding part

Claims (16)

A substrate on which at least one vent hole is vertically formed;
An adhesive applied on the substrate;
And a semiconductor die attached to the adhesive,
And a portion of the lower surface of the semiconductor die is exposed to the outside through the vent hole to discharge heat of the semiconductor die by convection. The method according to claim 1,
Wherein a plurality of the vent holes are formed. The method according to claim 1,
Wherein the vent hole is formed with a recessed portion formed in an outer circumferential direction at an upper end portion thereof. The method of claim 3,
And an annular adhesive shielding film is formed in the groove portion. The method according to claim 1,
Wherein the adhesive is an epoxy. The method according to claim 1,
And a molding part sealing the substrate and the semiconductor die. A substrate on which at least one vent hole is vertically formed;
A semiconductor die mounted on the substrate;
And a die attach film (DAF) interposed between the substrate and the semiconductor die to couple the substrate and the semiconductor die,
And a portion of the lower surface of the semiconductor die is exposed to the outside through the vent hole to discharge heat of the semiconductor die by convection. 8. The method of claim 7,
Wherein a plurality of the vent holes are formed. 8. The method of claim 7,
And a molding part sealing the substrate and the semiconductor die. Providing a substrate on which at least one vent hole is formed so as to be vertically penetrated;
Applying an adhesive to one surface of the substrate except for the vent hole;
And attaching a semiconductor die on the adhesive. ≪ Desc / Clms Page number 20 > 11. The method of claim 10,
When the vent hole is formed in each corner area of the substrate,
Wherein the adhesive is applied to the inside of the plurality of vent holes. 11. The method of claim 10,
When a plurality of the vent holes are formed in a linear pattern,
Wherein the adhesive is applied to the left and right sides of the linear pattern, respectively. 11. The method of claim 10,
And forming a molding part for sealing the substrate and the semiconductor die. The method according to claim 1,
Wherein the vent hole is formed with a groove portion recessed in an outer peripheral direction from an upper end portion,
Wherein an annular adhesive shielding film is formed in the groove portion so that the applied adhesive is prevented from flowing into the vent hole by the adhesive shielding film. Providing a substrate on which at least one vent hole is formed so as to be vertically penetrated;
Providing a semiconductor die to which a DAF (die attach film) is attached;
Mounting a semiconductor die on the substrate;
Wherein the semiconductor package is formed of a semiconductor material. 16. The method of claim 15,
And forming a molding part for sealing the substrate and the semiconductor die.
KR1020140071514A 2014-06-12 2014-06-12 Semiconductor package and method for manufacturing the same KR101613114B1 (en)

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KR1020140071514A KR101613114B1 (en) 2014-06-12 2014-06-12 Semiconductor package and method for manufacturing the same

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KR20150142911A true KR20150142911A (en) 2015-12-23
KR101613114B1 KR101613114B1 (en) 2016-04-19

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050077866A (en) 2004-01-28 2005-08-04 삼성전자주식회사 Semiconductor package with heat-dissipating structure and method for fabricating the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050077866A (en) 2004-01-28 2005-08-04 삼성전자주식회사 Semiconductor package with heat-dissipating structure and method for fabricating the same

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