KR20150078818A - Organic light emitting display and driving method thereof - Google Patents

Abstract

The present invention relates to a display device comprising: a display panel arranged on each cross domain of data lines and gate lines, including pixels having organic light emitting diodes; a data driving unit supplying data voltage through the data lines; a gate driving unit supplying a gate signal formed by gate-on and gate-off voltages through the gate lines; and a power supply unit generating high potential voltage and supplying one of the first gate-on voltages generated by the input voltage and the second gate-on voltage by using the high potential voltage as the gate-on voltage for the gate driving unit.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting display, and a method of driving the organic light emitting display.

The present invention relates to an organic light emitting display for displaying an image.

2. Description of the Related Art In recent years, an organic light emitting diode (OLED) display device that has been spotlighted as a display device has advantages of high response speed, high luminous efficiency, high luminance and wide viewing angle by using an organic light emitting diode (OLED)

However, since the OLED display includes a plurality of transistors, it is necessary to activate the transistors during the initial operation. However, in the process of activating the transistors included in the organic light emitting diode display, a current flows into the organic light emitting diode included in the organic light emitting diode display, causing flickering.

Also, the high-potential voltage for driving the driving transistor for applying the current to the organic light-emitting diode is kept constant regardless of the temperature. However, when the driving voltage of the organic light emitting diode changes according to the temperature change and the high voltage is kept constant, the driving reliability at low temperature or high temperature is lowered.

In view of the foregoing, an object of the present invention is to provide an organic light emitting display device and a driving method thereof, in which flicker does not occur in the process of activating a transistor during initial driving.

Another object of the present invention is to provide an organic light emitting display device and driving method thereof that maintains driving reliability irrespective of a temperature change.

In order to achieve the above object, in one aspect, the present invention provides a display panel including a plurality of pixels arranged at intersecting regions of a data line and a gate line, each pixel including an organic light emitting diode, A gate driver configured to supply a gate signal composed of a gate-on voltage and a gate-off voltage through a gate line, a gate driver configured to generate a high potential voltage used to drive the display panel, And a power supply for supplying one of the second gate-on voltages generated using the high voltage and the high potential voltage to the gate driver with the gate-on voltage.

In another aspect, the present invention provides a method of driving a display panel, comprising: outputting a first gate-on voltage of a second gate-on voltage generated using a first gate-on voltage generated using an input voltage and a high- Supplying a gate signal constituted by a first gate-on voltage and a gate-off voltage outputted in a state in which the current of the organic light emitting diode of the pixel of the display panel is cut off to the display panel when the power source of the display panel is turned on, And supplying a second gate-on voltage to the display panel in a state where a current of the organic light emitting diode can flow.

As described above, according to the present invention, the organic light emitting display device has the effect of preventing flicker in the process of activating the transistor during the initial driving.

In addition, according to the present invention, the organic light emitting display has the effect of maintaining the driving reliability irrespective of the temperature change.

1 is a system configuration diagram schematically showing a display device according to an embodiment.
2 is a circuit diagram showing an example of one pixel in the display device of FIG.
3 is a driving timing diagram of the display device of Fig.
4 is a conceptual diagram of the power supply unit of FIG.
5A is a circuit diagram of a high-potential voltage generating section for generating the variable high-potential voltage VDD of FIG.
5B is a diagram showing a variable high-potential voltage varying with temperature.
5C is a circuit diagram of a gate voltage generator included in the power supply unit of FIG.
6 is a circuit diagram showing another example of one pixel in which flicker is improved in the display device of FIG.
7 is a driving timing chart of the display device of Fig.
8 is a circuit diagram showing another example of one pixel in which flicker is improved in the display device of FIG.
Fig. 9 is a driving timing diagram of the display device of Fig. 8. Fig.
10 is a circuit diagram showing another example of one pixel in which flickering is improved in the display device of FIG.
11 is a driving timing chart of the display device of Fig.
12 is a flowchart of a method of driving a display device according to another embodiment.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In the drawings, like reference numerals are used to denote like elements throughout the drawings, even if they are shown on different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are intended to distinguish the components from other components, and the terms do not limit the nature, order, order, or number of the components. When a component is described as being "connected", "coupled", or "connected" to another component, the component may be directly connected or connected to the other component, Quot; intervening "or that each component may be" connected, "" coupled, "or " connected" through other components.

1 is a system configuration diagram schematically showing a display device according to an embodiment.

Referring to FIG. 1, a display device according to an exemplary embodiment includes a display panel 10, a timing controller 11, a data driver 12, a gate driver 14, a power supply unit 16, and the like.

The display panel 10 is formed so that the data lines DL and the gate lines GL intersect with each other. The display panel 10 includes pixels in which pixels are arranged in a matrix in cell regions defined by data lines DL and gate lines GL. Each pixel may include an organic light emitting diode including two electrodes and a light emitting layer positioned between the electrodes, a driving transistor for driving the organic light emitting diode, and a switching transistor for scanning the driving transistor.

The data driver 12 may be implemented with a plurality of source drive integrated circuits. The data driver 12 receives the digital video data RGB from the timing controller 11. The data driver 12 converts the digital video data RGB into a gamma compensation voltage in response to a source timing control signal from the timing controller 11 to generate a data voltage and displays the data voltage in synchronization with the gate signal To the data lines (DL) of the panel (10). The data driver 12 may be connected to the data lines DL of the display panel 10 by a COG (Chip On Glass) process or a TAB (Tape Automated Bonding) process.

The gate driver 14 is connected to the gate lines GL of the display panel 10 and sequentially outputs gate signals to the gate lines GL. The gate driver 14 may be connected to the light emitting lines EL to output the light emitting signal EM for controlling the light emission of the organic light emitting diode OLED. However, the present invention is not limited thereto. In this case, each pixel P of the display panel 10 further includes an enable transistor controlled by the emission signal EM. An example of each pixel P of the display panel 10 further including an enable transistor controlled by the emission signal EM will be described in more detail below with reference to FIG.

The gate driver 14 may be formed directly on the substrate of the display panel 10 using a GIP (Gate Drive-IC In Panel) method. Also, the gate driver 14 may be connected between the display panel 10 and the timing controller 11 in a TAB manner.

The timing controller 11 receives digital video data RGB from an external host system through an interface such as a Low Voltage Differential Signaling (LVDS) interface, a Transition Minimized Differential Signaling (TMDS) interface, and a Mobile Industrial Processor Interface (MIPI) . The timing controller 11 transmits digital video data (RGB) input from the host system to the data driver 12.

The timing controller 11 receives timing signals such as a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a data enable signal DE and a main clock MCLK from the host system through an LVDS or TMDS interface receiving circuit And receives a signal. The timing controller 11 generates timing control signals for controlling the operation timing of the data driver 12 and the gate driver 14 based on the timing signal from the host system. The timing control signals include a gate timing control signal (GCS) for controlling the operation timing of the gate driver 14, a data timing control signal for controlling the operation timing of the data driver 12 and the polarity of the data voltage, a power control signal (PCS) for controlling power generation and supply of the power supply unit 16, and a power control signal (PCS)

The power supply unit 16 supplies power, voltage, and current to the data driver 12, the gate driver 14, and the display panel 16.

The display device includes a driving transistor DT for supplying a current to the organic light emitting diode OLED and a compensation circuit for internally compensating the threshold voltage Vth of the driving transistor DT, Can be compensated within the circuit.

One example of a pixel in a display device including an internal compensation circuit for internally compensating a threshold voltage Vth of the driving transistor DT will be described with reference to FIGS. 2 and 3. However, the present invention is not limited to this, The threshold voltage Vth of the driving transistor DT can be compensated for by including various internal compensation circuits.

2 is a circuit diagram showing an example of one pixel in the display device of FIG. 2 shows an example of one pixel of all the pixels of the display device.

2, the display device includes a plurality of gate lines 102, GL, an EM line 104, a data line 106, DL, a high potential voltage line 108, VDD, a reference power source line 109, Transistors ST1 to ST5 and DT1, a plurality of capacitors Cst1 and Cst2, an organic light emitting diode OLED and a low potential voltage VSS.

The gate line 102 is a wiring to which a gate signal is applied and drives the first transistor 110, the third transistor 130 and the fifth transistor 130 through a gate signal applied to the gate line 102.

The data line 106 is a wiring to which a data voltage Vdata for driving the driving transistor 160 is applied to a first node and the data line 106 is a wiring to be applied to the gate line 102 and the EM Line 104. In this embodiment,

The first node a is formed between the drain of the first switching transistor 110 and the drain of the second switching transistor 120 and is connected to one terminal of the storage capacitor 170.

The EM line 104 drives the second transistor 120 and the fourth transistor 102 through the emission signal EM as a wiring to which the emission signal EM is applied.

The reference power supply line 109 and the high potential voltage lines 108 and VDD are wirings to which the reference voltage Vref and the high potential voltage VDD are applied and are arranged in parallel with the data line 106 in the pixel.

The plurality of transistors ST1 to ST5 and D1 are formed of first to sixth transistors 110 to 160. Hereinafter the first to fifth transistors 110 to 150 are referred to as a switching transistor and the sixth transistor 160 is referred to as a &Quot; driving transistor " Here, the plurality of transistors 110 to 160 may be formed of PMOSFETs, but may be formed of NMOSFETs.

The first switching transistor 110 is switched according to a gate signal applied from the gate line 102 to supply a data voltage Vdata to a first node.

The second switching transistor 120 is switched according to the emission signal EM applied from the EM line 104 to supply the reference voltage Vref applied to the reference power source line 109 to the first node a do. That is, the reference voltage Vref is supplied to one terminal of the storage capacitor 170.

The third switching transistor 130 is switched according to a gate signal applied from the gate line 102 to diode-connect the driving transistor 160, which will be described later. At this time, the driving transistor 160 supplies the high potential voltage VDD from the high potential voltage line 108 to the third node (mdtd node).

That is, the third switching transistor 130 is turned on when the driving transistor 160 is diode-connected and the fourth switching transistor 140 is turned off, the high-potential voltage VDD from the high- (b node). The fourth switching transistor 140 is an enable transistor and controls whether the organic light emitting diode OLED is enabled.

At this time, the high potential voltage VDD supplied to the third node (mdtd node) is supplied to the second node (b node) via the third switching transistor 130 to drive the voltage of the second node The threshold voltage Vth of the transistor 160 is increased.

The source of the third switching transistor 130 and the drain of the driving transistor 160 are connected to the third node mdtd node and the drain of the third switching transistor 130 is connected to the second node b node do.

The fourth switching transistor 140 is switched according to the emission signal EM applied to the EM line 104 to supply the driving current to the organic light emitting diode OLED.

Here, the source of the fourth switching transistor 140 is connected to the third node (mdtd node), and the drain thereof is connected to the organic light emitting diode 190 (OLED).

The fifth switching transistor 150 is switched in accordance with the gate signal from the gate line 102 so that the reference voltage Vref from the reference power source line 109 is supplied to the drain of the fourth switching transistor 140 and the drain of the organic light emitting diode OLED) to the fourth node (c node).

Here, the fifth switching transistor 150 functions to initialize the organic light emitting diode OLED in the initialization period of one frame period.

The storage capacitor 170 and the variable capacitor 180 maintain the gate voltage of the driving transistor 160, that is, the threshold voltage Vth of the driving transistor 160, for a predetermined period of time.

The storage capacitor 170 is formed between a first node (node) and a second node (b node). One terminal of the storage capacitor 170 is connected to a node and the other terminal is connected to a second node (b node).

The storage capacitor 170 supplies a data voltage Vdata compensated for the threshold voltage Vth to the second node b node, that is, the gate of the driving transistor 160, by coupling with the variable capacitor 180.

The variable capacitor 180 is formed between the second node (b node) and the high-potential voltage (VDD), that is, between the gate and the source of the driving transistor 160. One terminal of the variable capacitor 180 is connected to the high potential voltage line 108 and the other terminal of the variable capacitor 180 is connected to the second node formed between the other terminal of the storage capacitor 170 and the gate of the driving transistor 160 .

The variable capacitor 180 prevents the voltage of the second node bnode from rapidly rising or falling when the gate signal is turned off after the initialization period, ).

The variable capacitor 180 has a cap formed when a voltage Vgs formed between a gate and a source of a driving transistor 160 to be described later is equal to or higher than a high potential (VDD) + a threshold voltage (Vth). On the other hand, if the voltage is less than the high potential (VDD) + the threshold voltage (Vth), the cap of the variable capacitor 180 is not formed. That is, the variable capacitor 180 has a variable capacitance according to a voltage applied thereto.

The organic light emitting diode 190 emits light through the driving current supplied by the turn-on of the fourth switching transistor 140, and the organic light emitting diode emits light of the organic light emitting diode 190 (OLED) So that an image is realized.

Fig. 3 is a diagram showing drive timings of the display device of Fig. 2;

As shown in FIG. 3, the labeling device 10 divides one frame period into a plurality of sections to control the light emission of the organic light emitting diode 190 (OLED).

The first period (1) is an initializing period in which the emission signal EM of the EM line 104 is supplied (On) so that the second switching transistor 120 and the fourth switching transistor 140 are turned on do.

At this time, the gate signal of the gate line 120 is not supplied for an initial predetermined period, and then the gate signal is supplied (On) in the initialization period, so that the first switching transistor 110, the third switching transistor 130, The switching transistor 150 is turned on.

The reference voltage Vref from the reference power supply line 109 is supplied to the fourth switching transistor 140 when the first to fifth switching transistors 110 to 150 are turned on by the emission signal EM and the gate signal, And a fourth node (c node) formed between the drain of the organic light emitting diode OLED and the drain of the organic light emitting diode OLED. Thus, the voltage that was formed in the organic light emitting diode OLED in the previous frame period is reset.

The second period (2) is a programming and sensing period in which a high potential voltage for light emission of the organic light emitting diode 190 is programmed into the pixel and a threshold voltage Vth of the driving transistor 160 is set to Sensing.

The third period (3) is a floating period in which the data voltage (Vdata) is held and the threshold voltage (Vth) is compensated. The emission signal EM and the scan signal SCAN are turned off so that the voltage of the second node b is maintained by the storage capacitor 170 and the variable capacitor 180 and the threshold voltage Vth is maintained at Is compensated.

The fourth period (4) is a light emission period, and the emission signal EM is applied to the EM line 104 to turn on the second switching TFT 120 and the fourth switching TFT 140 .

Here, the compensation of the threshold voltage Vth of the driving TFT 160 is increased by the current i flowing from the third node (mdtd node) to the second node (b node) in the third period (3) The luminous efficiency of the organic light emitting diode 190 is improved.

4 is a conceptual diagram of the power supply unit of FIG.

The power supply unit 16 uses a voltage supplied from the system to supply a high voltage VDD, a low voltage VSS or Vcom, a gate on (or high) voltage VGH, a gate off (or low) voltage VGL And so on.

The power supply unit 16 supplies the generated high potential voltage VDD, low potential voltage VSS, gate on voltage VGH and gate off voltage VGL to the data driver 12, the gate driver 14, To the panel (10).

The power supply unit 16 includes an input voltage generation unit 410, a control unit 420, and a voltage generation unit 430.

The input voltage generating unit 410 generates two or more input voltages (for example, Vin1 to Vin3) used in the voltage generating unit 430 using the voltage (Vin or VCI) supplied from the system. The input voltage generating unit 410 may generate two or more input voltages used in the voltage generating unit 430 as a resistor divider.

The control unit 420 is a circuit for controlling the operation of the power supply unit 16 in a deep standby mode (unused state) and generating a clock necessary for the voltage generation unit 430.

The voltage generating unit 430 mainly includes a gradation generating voltage generating unit 432, a high potential generating unit 434, and a gate voltage generating unit 436. Each generator includes a buck converter or a step-down circuit in which the output voltage is lower than the input voltage, a boost converter or a step-up circuit in which the output voltage is higher than the input voltage, up converter, and a mix-up buck-boost converter thereof.

The gradation generating voltage generating unit 432 generates a gradation generating voltage (e.g., DDVDH = 4.5V to 6V) so that the data driver 12 can generate a stable gradation voltage. The grayscale generation voltage generation section 432 supplies the generated grayscale generation voltage DDVDH to the data driving section 12 or the separately configured grayscale voltage generation section. The gradation generation voltage generation section 432 may also supply the generated gradation generation voltage DDVDH to other components. For example, the gradation generation voltage generation section 432 can supply the generated gradation generation voltage DDVDH to the gate voltage generation section 436. [

The high-potential-voltage generating unit 434 generates a high-potential voltage (VDD) used for driving the driving transistor of the pixels formed in the display panel 10. [ At this time, the high-potential voltage generating unit 434 generates a high-potential voltage VDD which varies according to the temperature as described later with reference to FIG. 5A.

The high potential voltage generating unit 434 supplies the generated high potential voltage VDD to the driving transistors of the pixels formed on the display panel 10. [ The high-potential voltage generating unit 434 may also supply the generated high-potential voltage VDD to other components. For example, the high-potential-voltage generating unit 434 can supply the generated high-potential voltage VDD to the gate-voltage generating unit 436.

The gate voltage generator 436 generates a gate-on voltage (for example, VGH = 10 V to 15 V) used in the gate driver 14. At this time, the gate voltage generator 436 generates the gate-on voltage VGH using the gradation generation voltage DDVDH generated by the gradation generation voltage generator 432 as described with reference to FIGS. 5C and 5D The gate-on voltage VGH can be generated using the high-potential voltage VDD that varies according to the temperature generated by the high-potential voltage generator 434, as described with reference to FIGS. 5C and 5E. The gate voltage generator 436 supplies the generated gate-on voltage VGH to the gate driver 14.

5A is a circuit diagram of a high potential voltage generating section 424 for generating the variable high potential voltage VDD of FIG.

5A, the high-potential voltage generating unit 424 includes a switch IC 510, an inductor L, a diode D, a thermistor resistor 512, and an output resistor 514. The high potential voltage generator 424 may be implemented as a booster converter having a thermistor.

The switch IC 510 includes an input terminal IN connected to the input node ni, a switch terminal SW connected to the first node n1, a feedback terminal FB connected to the second node n2, And an output terminal Out connected to the output terminal no.

And is turned on in response to a control signal applied to the switch terminal SW to form a current path between the first node n1 and the low potential voltage VSS to flow from the input node ni to the first node n1 Current energy is stored in the inductor L while the current path between the first node n1 and the low potential voltage VSS is blocked by being turned off in response to the control signal applied to the switch terminal SW, And supplies the stored energy of the inductor L applied to the node n1 to the diode D. [

The thermistor 512 may be implemented with a negative temperature coefficient (RTC) resistor whose resistance value Rth decreases in proportion to an increase in temperature. The resistance value of the output resistor 514 may be Ro. A thermistor 512 connected between the second node n2 and the output node no and an output resistor 514 connected between the second node n2 and the low potential voltage VSS are expressed by the following Equation 1 The voltage of the inductor L output to the output node no is changed by referring to the positive reference voltage PVref applied to the second node n2 according to the voltage Vref, (VDD) and supplies it to the high potential voltage line 108 of the display panel 10.

[Equation 1]

 VDD = PVref * {1 + (Rth / Ro)}

As shown in FIG. 5B, since the total resistance value of the thermistor resistance Rth decreases as the temperature rises above room temperature, the variable high-potential voltage VDD output becomes lower than that at room temperature . On the other hand, since the total resistance value of the thermistor resistance Rth increases with the room temperature as the temperature decreases from room temperature, the output variable high-potential voltage VDD becomes higher than that at room temperature.

5C is a circuit diagram of a gate voltage generator included in the power supply unit of FIG.

5C, the gate voltage generating unit 436 generates a gate voltage (first VGH) generated by using the gradation generating voltage DDVDH generated by the gradation generating voltage generating unit 432 and a first gate- On voltage (second VGH) generated using the high-potential voltage VDD varying according to the temperature generated by the gate driver 434.

5D, the gate voltage generating unit 436 generates a first gate-on voltage (first VGH) by using the gradation generating voltage DDVDH generated by the gradation generating voltage generating unit 432, And a step-up circuit 516. The first step-up circuit 516 controls the first transistor between the input node and the P node and the second transistor between the N node and the low potential voltage VSS to be in the ON state, so that the input voltage Vin2 is supplied to the P node and the N node Charge in between. Next, the first step-up circuit 516 changes the first and second transistors T1 and T2 to the off state and turns off the third transistor and the N-node and the gray-level generating voltage (VGH) between the gate- DDVDH) input node to the ON state, so that the output voltage of the output terminal is output to DDVDH + DDVDH.

5E, the gate voltage generating unit 436 generates a second gate-on voltage (Vdd) using the high-potential voltage VDD varied according to the temperature supplied from the high-potential voltage generating unit 434 as an input voltage And a second step-up circuit 518 for generating a second voltage VGH. The second step-up circuit 518 has the same circuit structure as that of the first step-up circuit 516 except that it is constituted by a high-potential voltage (VDD) input terminal at the input terminal corresponding to the gradation generation voltage DDVDH input terminal And outputs the output voltage of the output terminal to Vin2 + VDD by the operation.

The gate voltage generator 436 generates the second gate-on voltage VGH using the second step-up circuit with the high-potential voltage VDD as the input voltage. This is because the high gate voltage (e.g., VDD = 8.5V) is large and can only be stepped up to generate a second gate on voltage (e.g., second VGH = 10.5V). Also, as described above, the high-potential voltage VDD is designed to be changed according to the temperature by using the thermistor of the high-potential voltage generator 426, and the gate-on voltage VGH is also changed when the high- Can be changed as well. On the other hand, if the high-potential voltage VDD rises but the gate-on voltage VGH is equal to or higher than the high-potential voltage VDD but the gate-on voltage VGH remains the same, The off-stress is increased in the fifth switching transistor ST5, and a leakage current is generated, so that the gate voltage of the driving transistor (e.g., DT1 in Fig. 2) can be lowered. In this case, when the gradation value of the image data is black with 0 gradation, the brightness gradually becomes bright and the contrast ratio may decrease.

The gate voltage generating unit 436 controls the switch unit 518 so that the first gate on voltage (first VGH) and the second gate on voltage (second gate on voltage) generated separately by the first and second step-up circuits 516 and 518 2VGH) to the outside, for example, to the gate driver 14. The switch portion 518 may include, for example, an inverter or an internal register, in which a P-type transistor and an N-type transistor are connected in series and the gates of the two transistors are connected to a common control line. Therefore, the gate voltage generator 436 is separately generated by the first and second step-up circuits 516 and 518 through the control signal GPO applied to the gate of the inverter included in the switch unit 518 For example, to the gate driver 14 in one of the first gate-on voltage (first VGH) and the second gate-on voltage (second VGH).

As described above, the high-potential-voltage generating unit 434 generates a high-potential voltage VDD that varies according to the temperature, and supplies the variable high-potential voltage VDD to the gate-voltage generating unit 436. Therefore, the high-level voltage VDD varies depending on the temperature, and the gate-on voltage VGH generated by the second step-up circuit 518 of the gate voltage generator 436 also varies. Therefore, The black brightness according to the high-potential voltage VDD and the gate-on voltage VGH can be set stably low.

6 is a circuit diagram showing another example of one pixel in which flicker is improved in the display device of FIG. 7 is a driving timing chart of the display device of Fig.

The circuit structure of another example of the pixel described with reference to FIG. 6 is the same as the circuit structure showing one example of the pixel described with reference to FIG. 2, but the circuit structure of another example of the pixel described with reference to FIG. 2 < / RTI >

Referring to FIG. 6, another example of one pixel includes a control circuit 610 between a common electrode of the organic light emitting diode OLED and a low potential voltage VSS, for example, ground (GND). This control circuit 610 can be realized by adding an NMOSFET to the PCB on which the timing controller 11 is mounted between the common electrode of the organic light emitting diode OLED and the low potential voltage VSS, for example, the ground GND have.

This control circuit 610 turns off the control circuit 610 added between the organic light emitting diode OLDED and the low potential voltage VSS on the PCB, so that the pixel can be kept off until the display-on time.

6 and 7, when the power supply of the display device is turned on, the gate voltage generating unit 436 generates the gray voltage generating unit 432 (see FIG. 5D) using the first step-up circuit 516, On voltage (first VGH) by using the gradation generation voltage DDVDH generated in the first gate-on voltage generating circuit (not shown). At this time, the gate voltage generator 436 controls the switch unit 518 to output the first gate-on voltage (first VGH) generated by the first step-up circuit 516 to the gate driver 14. The first gate-on voltage (first VGH) generated by the first step-up circuit 516 is output to the gate driver 14 via the control signal GPO applied to the gate of the inverter included in the switch unit 518 can do.

Then, a gate signal composed of the first gate-on voltage (first VGH) and the gate-off voltage VGL is supplied to the display panel 10 through the gate driver 14 to activate the internal transistor of the pixel in the display panel 10 (Unknown) state to a known state. After a certain number of frames in which the internal transistor activation of the pixel ends, the high potential voltage generating unit 424 shown in FIG. 5A generates a high potential voltage and supplies it to the display panel 10. At this time, the control circuit 610 maintains the off state. At this time, the data voltage of each pixel is maintained at the black voltage.

Next, after a certain number of frames, the gate voltage generator 436 generates the high-potential voltage VDD supplied from the high-potential voltage generator 434 using the second step-up circuit 518 shown in FIG. To generate a second gate-on voltage (second VGH). At this time, the gate voltage generator 436 generates a second gate-on voltage (second VGH) generated by the second step-up circuit 518 through the control signal GPO applied to the gate of the inverter 518, And outputs it to the driving unit 14.

Finally, the control circuit 610 is turned on to emit the organic light emitting diode (OLED), thereby changing the display device to the on state.

In other words, when the power supply of the display device is turned on, a gate signal composed of the first gate-on voltage (first VGH) and the gate-off voltage VGL independently generated in the off state of the control circuit 610 is applied to the display panel 10 To activate the transistors of the display panel, and then supply the high-potential voltage to the display panel. Then, the control circuit 610 is turned on by supplying a gate signal composed of the second gate-on voltage (second VGH) and the gate-off voltage VGL to the display panel by using the high-potential voltage VDD which varies according to the temperature Turn on the device.

When the display device is turned on, the current of the organic light emitting diode is completely cut off in the off state of the control circuit 610 between the organic light emitting diode OLED and the low potential voltage VSS, It is possible to improve the flicker and at the same time supply the display panel 10 with a high potential voltage and a variable gate-on voltage VGH which vary according to the temperature, so that the black luminance can be set stably low regardless of the temperature change.

8 is a circuit diagram showing another example of one pixel in which flicker is improved in the display device of FIG. Fig. 9 is a driving timing diagram of the display device of Fig. 8. Fig.

The circuit structure of another example of the pixel described with reference to Fig. 8 is the same as the circuit structure showing an example of the pixel described with reference to Fig.

Referring to FIGS. 8 and 9, when the display device is powered on, the gate voltage generating unit 436 generates a gray level voltage by using the first step-up circuit 516 as shown in FIG. On voltage (first VGH) by using the gradation generation voltage DDVDH generated in the first gate-on voltage generating circuit (not shown). The gate voltage generator 436 generates a first gate-on voltage (first VGH) generated by the first step-up circuit 516 through a control signal GPO applied to the gate of the inverter 518, And outputs it to the driving unit 14.

Then, a gate signal composed of the first gate-on voltage (first VGH) and the gate-off voltage VGL is supplied to the display panel 10 through the gate driver 14 to activate the internal transistor of the pixel in the display panel 10 (Unknown) state to a known state. After a certain number of frames in which the internal transistor activation of the pixel ends, the high potential voltage generating unit 424 shown in FIG. 5A generates a high potential voltage and supplies it to the display panel 10.

At this time, the enable transistor is forcibly kept off using the gate-on voltage VGH. The switches are added to the gate driver 14 to forcibly turn off the fourth switching transistors SW4 and 140 as the enable transistors to forcibly turn off the enable transistors during the period in which the current of the organic light emitting diode is to be cut off State. At this time, the data voltage of each pixel is maintained at the black voltage.

Next, after a certain number of frames, the gate voltage generator 436 generates the high-potential voltage VDD supplied from the high-potential voltage generator 434 using the second step-up circuit 518 shown in FIG. To generate a second gate-on voltage (second VGH). At this time, the gate voltage generator 436 generates a second gate-on voltage (second VGH) generated by the second step-up circuit 518 through the control signal GPO applied to the gate of the inverter 518, And outputs it to the driving unit 14.

Finally, the enable transistor is turned on to emit the organic light emitting diode (OLED), so that the display device can be turned on.

10 is a circuit diagram showing another example of one pixel in which flickering is improved in the display device of FIG. 11 is a driving timing chart of the display device of Fig.

The circuit structure of another example of the pixel described with reference to FIG. 10 is the same as the circuit structure showing one example of the pixel described with reference to FIG.

The operation of the pixel shown in Fig. 10 is also the same as the operation of the pixel described with reference to Fig.

However, when two transistors are added to the gate driver 14 to input the gate-on voltage VGH to the gate of the enable transistor to forcibly turn off the enable transistor during a period in which the current of the organic light emitting diode is to be cut off do. At this time, the two transistors added to the gate driver 14 can be kept off by using the control signal SOC.

As described with reference to FIGS. 8 to 10, after the transistors of the display panel are activated while blocking the current of the organic light emitting diode in the OFF state of the enable transistor, the high-potential voltage varying according to the temperature and the variable gate- Is supplied to the display panel, the current of the organic light emitting diode is completely cut off, thereby improving the flicker when turning on the power of the display device and setting the black luminance to be low stably regardless of the temperature change.

12 is a flowchart of a method of driving a display device according to another embodiment.

A method 1200 of driving a display according to another embodiment of the present invention includes a first gate-on voltage of a second gate-on voltage generated by using a first gate-on voltage generated using an input voltage and a high- (S1210). When the display device is powered on, a gate signal composed of the first gate-on voltage and the gate-off voltage outputted is displayed in a state in which the current of the organic light emitting diode of the pixel of the display panel is shut off (S1220); supplying a high-potential voltage to the display panel (S1230); displaying a gate signal composed of a second gate-on voltage and a gate-off voltage in a state where a current of the organic light emitting diode can flow To the panel (S1240).

In steps S1210 and S1220, the display device displays the first gate-on voltage generated in the first step-up circuit using the input voltage, for example, the gradation generation voltage DDVDH, and the first gate- One of the second gate-on voltages generated in the second step-up circuit using the high-potential voltage as described above with reference to Figs. 5C and 5E is output to the gate-on voltage constituting the gate signal by selection of the switch section .

On the other hand, the high-potential voltage can vary depending on the temperature. As described with reference to FIG. 5A, the display device, for example, the power supply unit 16 can generate a high-potential voltage that varies with temperature using a resistance portion whose resistance value decreases in proportion to an increase in temperature.

Further, the current of the organic light emitting diode (OLED) of the pixel can be cut off or flowed by using a control circuit located between the organic light emitting diode (OLED) of the pixel and the low potential supply portion. For example, as described with reference to FIGS. 6 and 7, the display device includes a control circuit 610 located between the organic light emitting diode OLED of the pixel and the low potential supply part, The current of the current source can be blocked or flowed.

The driving transistor for supplying a current to the organic light emitting diode included in the pixel and the enable transistor located between the driving transistor and the organic light emitting diode may be controlled to block or flow the current of the organic light emitting diode of the pixel. For example, the gate-on voltage VGH may be used to turn off the enable transistor, as described above with reference to FIGS. 8 and 9, or the gate driver, for example, GIP The enable transistor can be turned off by using the control signal SOC for the two transistors added to the control signal SOC.

According to the above-described embodiments, when the power is turned on, the display device completely blocks the current of the organic light emitting diode while activating the transistors of the display panel to improve the flicker, and at the same time, Since the on-voltage (VGH) is supplied to the display panel, the black luminance can be stably set lower regardless of the temperature.

In other words, the organic light emitting diode display according to the above-described embodiments has an effect of preventing flicker in the process of activating the transistor in the initial driving.

In addition, the organic light emitting display according to the above-described embodiment has the effect of maintaining the driving reliability irrespective of the temperature change.

Although the present invention has been described with reference to the drawings, the present invention is not limited thereto.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventions. , Separation, substitution, and alteration of the invention will be apparent to those skilled in the art. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

Claims (10)

A display panel disposed at every intersection of the data line and the gate line, the display panel including a plurality of pixels each including an organic light emitting diode;
A data driver for supplying a data voltage through the data line;
A gate driver for supplying a gate signal configured by a gate-on voltage and a gate-off voltage through the gate line; And
On voltage generated by using the input voltage and the second gate-on voltage generated by using the high-potential voltage to the gate-on voltage And a power supply unit supplying the gate driving unit. The method according to claim 1,
Wherein the power supply unit generates the high potential voltage varying with temperature using a resistance part whose resistance value decreases in proportion to an increase in temperature. 3. The method of claim 2,
The power supply unit,
A first step-up circuit for generating the first gate-on voltage using the input voltage and a second step-up circuit for generating the second gate-on voltage using the high-potential voltage, And a switch section for outputting one of the generated first gate-on voltage and the second gate-on voltage generated by the second step-up circuit as the gate-on voltage. 3. The method of claim 2,
The gate driver supplies a gate signal constituted by a first gate-on voltage and a gate-off voltage to the display panel in a state in which the current of the organic light emitting diode of the pixel is cut off when the display device is powered on, Wherein the display panel supplies the high-potential voltage to the display panel,
Wherein the gate driver supplies a gate signal composed of the second gate-on voltage and a gate-off voltage to the display panel in a state in which a current of the organic light emitting diode of the pixel can flow. The method of claim 3,
Further comprising a control circuit located between a common electrode of the organic light emitting diode of the pixel and a low potential voltage supply,
Wherein the control circuit is used to cut off or flow the current of the organic light emitting diode of the pixel. The method of claim 3,
The pixel further comprises a driving transistor for supplying a current to the organic light emitting diode and an enable transistor located between the driving transistor and the organic light emitting diode,
And controls the enable transistor to cut off or flow the current of the organic light emitting diode of the pixel. 3. The method of claim 2,
Wherein the pixel includes a driving transistor for supplying a current to the organic light emitting diode and an internal compensation circuit for internally compensating a threshold voltage of the driving transistor. The method comprising: outputting the first gate-on voltage among a second gate-on voltage generated using a first gate-on voltage generated using an input voltage and a high-voltage voltage used to drive a display panel;
Supplying a gate signal composed of the first gate-on voltage and the gate-off voltage to the display panel in a state in which the current of the organic light emitting diode of the pixel of the display panel is shut off when the display device is powered on;
Supplying the high potential voltage to the display panel;
And supplying the second gate-on voltage to the display panel in a state where a current of the organic light emitting diode can flow. 9. The method of claim 8,
Wherein the high-potential voltage is variable depending on the temperature. 9. The method of claim 8,
A driving transistor for supplying a current to the organic light emitting diode included in the pixel and a driving transistor for supplying a current to the organic light emitting diode, the driving transistor being located between the common electrode of the organic light emitting diode of the pixel and the low potential voltage supplying unit, And controlling an enable transistor to cut off or flow a current of the organic light emitting diode of the pixel.

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