KR20140006574A - Voltage supply device - Google Patents

Voltage supply device Download PDF

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Publication number
KR20140006574A
KR20140006574A KR1020120073904A KR20120073904A KR20140006574A KR 20140006574 A KR20140006574 A KR 20140006574A KR 1020120073904 A KR1020120073904 A KR 1020120073904A KR 20120073904 A KR20120073904 A KR 20120073904A KR 20140006574 A KR20140006574 A KR 20140006574A
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South Korea
Prior art keywords
voltage
output
pumping
charge pump
regulator
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KR1020120073904A
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Korean (ko)
Inventor
박지만
백규하
도이미
강진영
박건식
김동표
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한국전자통신연구원
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Priority to KR1020120073904A priority Critical patent/KR20140006574A/en
Publication of KR20140006574A publication Critical patent/KR20140006574A/en

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Dc-Dc Converters (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

The present invention relates to a voltage supply device for outputting a stable output voltage using a regulator. A voltage supply device according to an embodiment of the present invention includes a non-redundant clock generator for generating clock signals, a charge pump for receiving clock signals and outputting a pumping voltage in response to the received clock signals, and receiving and receiving the pumping voltage. A regulator for adjusting the pumping voltage and outputting an output voltage, the regulator including a reference voltage circuit for generating a reference voltage based on the pumping voltage, a sampling device for distributing the output voltage and outputting a divided voltage, a distribution voltage and a reference voltage. An error amplifier for amplifying the difference and outputting the difference, and a passing element for receiving the pumping voltage and controlling the passing current based on the output of the error amplifier to maintain a constant output voltage.

Description

Voltage supply unit {VOLTAGE SUPPLY DEVICE}

The present invention relates to a voltage supply device, and more particularly to a voltage supply device for controlling the output voltage of the charge pump using a regulator.

As a device for supplying a high voltage to a low power system, a charge pump is used. Charge pumps are a type of DC-DC converter. The charge pump performs charging and discharging operations of the capacitor through a switching operation. The charge pump may perform voltage conversion based on charge and discharge operations to supply voltage to the system.

However, when an instantaneous overcurrent or load fluctuation occurs, the output voltage of the charge pump is greatly shaken, thereby causing an error in the system supplied with the voltage from the voltage pump.

SUMMARY OF THE INVENTION An object of the present invention is to provide a voltage supply device for maintaining a constant output voltage of a voltage supply device using a regulator.

A voltage supply device according to an embodiment of the present invention includes a non-redundant clock generator for generating clock signals; A charge pump that receives the clock signals and outputs a pumping voltage in response to the received clock signals; And a regulator configured to receive the pumping voltage and to adjust the received pumping voltage to output an output voltage, wherein the regulator generates a reference voltage based on the pumping voltage; A sampling device for dividing the output voltage to output a divided voltage; An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And a passing element receiving the pumping voltage and controlling the passing current based on the output of the error amplifier to maintain the output voltage constant.

In example embodiments, the output voltage is higher than a driving voltage input to the charge pump and lower than the pumping voltage.

In an embodiment, the output voltage and the pumping voltage are negative voltages of different levels, and an absolute value of the output voltage is higher than a driving voltage input to the charge pump and lower than an absolute value of the pumping voltage.

In example embodiments, the sampling device includes capacitor elements or MOS elements connected to the pass element and the error amplifier to output the divided voltage.

In an embodiment, the level of the output voltage is converted and output.

The embodiment further includes a voltage-controlled oscillator for generating an input signal of the non-redundant clock generator.

The embodiment may further include a ring oscillator for generating an input signal of the non-redundant clock generator.

In an embodiment, the ring oscillator generates an input signal having a 50% duty cycle.

In exemplary embodiments, the voltage detector may further include a voltage detector configured to detect a level of the pumping voltage, and an input signal of the non-redundant clock generator output from the voltage-controlled oscillator is controlled in response to the detection result.

According to an embodiment, the apparatus may further include a plurality of regulators connected to the charge pump to receive the pumping voltage, wherein the plurality of regulators generate a plurality of different output voltages, and each of the plurality of regulators is the same as the regulator. Has a configuration.

In example embodiments, the charge pump may include first to n th charge pump units, the first to n th clock-control buffers connected to the first to n th charge pump units, respectively; A comparison voltage generator for outputting a comparison voltage; And first to n th comparators for comparing the pumping voltages of the first to n th charge pump units and the comparison voltage, respectively, and transmitting a comparison result to the first to n th clock-control buffers. Based on the comparison result of the first to n th comparators, each of the first to n th clock-control buffers independently activates or deactivates each of the first to n th charge pump units.

In an embodiment, the apparatus may further include a plurality of regulators connected to the first to nth charge pump units, wherein the plurality of regulators generate a plurality of different output voltages, and the plurality of regulators have the same configuration as the regulator. .

According to another embodiment of the present invention, a voltage supply device includes a non-redundant clock generator for generating clock signals; A charge pump that receives the clock signals and outputs a pumping voltage in response to the received clock signals; A reference voltage charge pump that receives the clock signals and outputs a pumping reference voltage in response to the received clock signals; And a regulator configured to receive the pumping voltage and the pumping reference voltage and to adjust the received pumping voltage to output an output voltage, wherein the regulator generates a reference voltage based on the pumping reference voltage. ; A sampling device for dividing the output voltage to output a divided voltage; An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And a passing element receiving the pumping voltage and controlling the passing current based on the output of the error amplifier to maintain the output voltage constant.

According to another embodiment of the present invention, a voltage supply device includes a non-redundant clock generator for outputting clock signals; Positive charge pumps and negative charge pumps which receive the clock signals and output pumping voltages in response to the received clock signals, respectively; A positive voltage regulator and a negative voltage regulator configured to receive the pumping voltages respectively and adjust the received pumping voltage to output output voltages, each of the positive voltage regulator and the negative voltage regulator based on the pumping voltage; A reference voltage circuit for generating a voltage; A sampling device for dividing the output voltage to output a divided voltage; An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And a passing element receiving the pumping voltage and controlling the passing current based on the output of the error amplifier to maintain the output voltage constant.

According to an embodiment of the present invention, it is possible to reduce the fluctuation of the output voltage due to the fluctuation of the load. Thus, a voltage supply device having improved reliability and stability is provided.

1A and 1B are views illustrating a positive voltage supply device according to a first embodiment of the present invention.
2A and 2B are views illustrating a negative voltage supply device according to a second embodiment of the present invention.
3 is a block diagram illustrating a voltage supply device according to a third exemplary embodiment of the present invention.
4 is a view showing in detail the internal configuration of the voltage supply device of FIG.
5 shows a voltage supply device constructed using a MOS device.
6 is a block diagram illustrating a voltage supply device according to a fourth embodiment of the present invention.
7 and 8 are views showing in detail the internal configuration of the voltage supply device of FIG.
9 is a block diagram illustrating a voltage supply device according to a fifth embodiment of the present invention.
10 is a block diagram illustrating a voltage supply device according to a sixth embodiment of the present invention.
11A is a block diagram illustrating a voltage supply device according to a seventh embodiment of the present invention.
11B is a block diagram illustrating a voltage supply device according to an eighth embodiment of the present invention.
12A is a block diagram illustrating a voltage supply device according to a ninth embodiment of the present invention.
12B is a block diagram illustrating a voltage supply device according to a tenth embodiment of the present invention.
13A is a block diagram illustrating a voltage supply device according to an eleventh embodiment of the present invention.
13B is a block diagram illustrating a voltage supply device according to a twelfth embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, in order to explain the present invention in detail so that those skilled in the art can easily carry out the technical idea of the present invention. .

1A is a block diagram illustrating a positive voltage supply device 100 according to a first embodiment of the present invention. FIG. 1B is a detailed view illustrating an internal configuration of the positive voltage supply device 100 of FIG. 1A.

1A and 1B, a positive voltage supply device 100 includes a non-overlapping clock generator 110, a positive charge pump 120, and a positive voltage regulator. (130, Positive Regulator) may be included. The non-redundant clock generator 110 may receive the input signal CLKin and output the clock signals CLK and CLKb. The clock signals CLK and CLKb do not overlap each other. For example, clock signals CLK and CLKb may not be logic high at the same time.

The positive charge pump 120 may receive the clock signals CLK and CLKb. The positive charge pump 120 may operate switches included in the positive charge pump 120 in response to the received clock signals CLK and CLKb. Positive charge pump 120 is based on switching operations of the positive charge pump output voltage (in V pp, hereinafter referred to as the pumping voltage) can be output.

The positive voltage regulator 130 may include a reference voltage circuit 131, an error amplifier 132, a pass device 133, and a sampling device 134. The reference voltage circuit 131 may generate a reference voltage V pref . The sampling device 134 may distribute the output voltage to output the divided voltage V pdvd . In exemplary embodiments, the distribution voltage V pdvd may be lower than the output voltage V pout . The error amplifier 132 amplifies and outputs a difference between the reference voltage V pref and the distribution voltage V pdvd .

The pass element 133 may receive the amplified difference and control the pass current I Ppass flowing through the pass element 133 based on the received difference. In response to the controlled pass current I ppass , the output voltage V pout can remain constant. For example, when the load increases, the output voltage V pout may decrease. In order to prevent the output voltage V pout from decreasing, the pass element 135 may increase the amount of pass current I ppass .

For a stable output voltage, the pumping voltage V pp may be higher than the output voltage V pout . In exemplary embodiments, the level of the output voltage V pout may be adjusted by adjusting elements (shown in FIG. 5) included in the sampling device 134. A method of adjusting the level of the output voltage V pout by adjusting the elements included in the sampling device 134 will be described in detail with reference to FIG. 5.

2A is a block diagram illustrating a negative voltage supply device 200 according to a second embodiment of the present invention. 2B is a diagram illustrating an internal configuration of the negative voltage supply device 200 in detail.

2A and 2B, a negative voltage supply device 200 includes a non-overlapping clock generator 210, a negative charge pump 250, and a negative voltage regulator. (260, Negative Regulator). The non-redundant clock generator 210 may receive the input signal CLKin and output the clock signals CLK and CLKb. The clock signals CLK and CLKb do not overlap each other. For example, clock signals CLK and CLKb may not be logic high at the same time.

The negative charge pump 250 may receive the clock signals CLK and CLKb. The negative charge pump 250 may operate switches included in the negative charge pump 250 in response to the received clock signals CLK and CLKb. The negative charge pump 250 may output an output voltage (V np , hereinafter referred to as a pumping voltage) of the negative charge pump based on the switching operation.

The negative voltage regulator 260 may include a reference voltage circuit 261, an error amplifier 262, a pass element 263, and a sampling device 264. The reference voltage circuit 261 may generate the reference voltage V nref . Sampling device 264 may output a distribution voltage (V ndvd) to distribute an output voltage (V nout). Illustratively, the distribution voltage (V ndvd) may be lower than the output voltage (V nout). The error amplifier 262 amplifies and outputs a difference between the reference voltage V nref and the divided voltage V ndvd . The pass element 263 may receive the amplified difference and control the pass current I npass based on the received difference. In response to a control current (I npass), output voltage (V nout) can be kept constant. For example, the output voltage (V nout) is passed through element 265, if changes can stabilize the output voltage (V nout) to control the current passing through (I npass).

For a stable output, the pumping voltage V np may be lower than the output voltage V nout . For example, the level of the output voltage V nout may be adjusted by adjusting elements (shown in FIG. 5) included in the sampling device 264. A method of adjusting the level of the output voltage V nout by adjusting the elements included in the sampling device 134 will be described in detail with reference to FIG. 5.

3 is a block diagram illustrating a voltage supply device 300 according to an exemplary embodiment of the present invention. For example, the voltage supply device 300 may have a configuration in which the positive voltage supply device 100 and the negative voltage supply device 200 of FIGS. 1A and 2A are combined.

Referring to FIG. 3, the voltage supply device 300 may include a non-redundant clock generator 310, a positive charge pump 320, a positive voltage regulator 330, a negative charge pump 350, and a negative voltage regulator 360. Can be. The non-redundant clock generator 310, the positive charge pump 320, the positive voltage regulator 330, the negative charge pump 350, and the negative voltage regulator 360 of the voltage supply device 300 are described with reference to FIGS. 1A and 2A. As it has been described, the description thereof is omitted.

In comparison with the positive voltage supply device 100 of FIG. 1A and the negative voltage supply device 200 of FIG. 2A, the voltage supply device 300 may generate the output voltages V pout and V nout together. In exemplary embodiments, the output voltage V pout may be a positive high voltage, and the output voltage V nout may be a negative high voltage.

4 shows the voltage supply device 300 in more detail. FIG. 5 is a diagram illustrating a voltage supply device 300 configured using a metal oxide semiconductor (MOS) device.

4 and 5, the voltage supply device 300 includes a non-redundant clock generator 310, a positive charge pump 320, a positive voltage regulator 330, a negative charge pump 350, and a negative voltage regulator 360. It may include. The positive voltage regulator 330 may include a reference voltage circuit 331, an error amplifier 332, a pass element 333, and a sampling element 334. The negative voltage regulator 360 may include a reference voltage circuit 361, an error amplifier 362, a pass element 363, and a sampling element 364. Since the non-redundant clock generator 310, the positive voltage charge pump 320, and the negative voltage charge pump 350 of the voltage supply device 300 have been described with reference to FIGS. 1A to 2B, description thereof will be omitted.

Each of the reference voltage circuits 331 and 361 may receive the pumping voltages V pp and V np to generate the reference voltages V pref and V nref . In exemplary embodiments , each of the reference voltages V pref and V nref may be lower than the pumping voltages V pp and V np . The reference voltage circuits 331 and 361 may include resistors R3 p and R3 n , respectively. When a large current flows in the reference voltage circuits 331 and 361, power loss of the voltage supply device 300 may increase. Therefore, the resistors R3 p and R3 n may have a large resistance value so that the current flowing in the reference voltage circuits 331 and 361 is formed at a low current.

Sampling device 334 may include resistors R1 p and R2 p , and sampling device 364 may include resistors R1 n and R2 n . The output voltages V pout and V nout may be adjusted by adjusting the resistance values of the resistors R1 p , R2 p , R1 n , and R2 n included in the sampling devices 334 and 364. The relationship between the resistors R1 p , R2 p , R1 n , R2 n and the output voltages V pout and V nout may be expressed by Equation 1 below.

Figure pat00001

Referring to Equation 1, V pref and V nref are outputs of the reference voltage circuits 331 and 361, respectively. By way of example, the removal of the sampling element in the resistance of the resistors (R1 p, R1 n) of the (R1 p, R2 p, R1 n, R2 n) contained in the (334, 364), and the resistance (R2 p, When the resistance value of R2 n ) is 0?, The current flowing through the sampling elements 334 and 364 becomes 0A. In this case, the output voltages V pout and V nout may be represented by Equation 2 below.

Figure pat00002

The sampling devices 331 and 361 may include MOS devices having a high resistance value to form a low current. In exemplary embodiments, the sampling devices 334 and 364 may include capacitors C1 p , C2 p , C1 n , C2 n , not shown, respectively, instead of resistors. In this case, almost no current flowing through the sampling devices 334 and 364 may be present. The relationship between the capacitors C1 p , C2 p , C1 n , C2 n , not shown, and the output voltages V pout , V nout may be as shown in Equation 3 below.

Figure pat00003

6 is a block diagram illustrating a voltage supply device 400 according to a fourth embodiment of the present invention. 7 is a view illustrating in detail the internal configuration of the voltage supply device 400 of FIG.

6 and 7, the voltage supply device 400 includes a non-redundant clock generator 410, a positive charge pump 420, a positive voltage regulator 430, a reference voltage positive charge pump 440, and a negative charge pump 450. , A negative voltage regulator 460, and a reference voltage negative charge pump 470. The positive voltage regulator 430 may include a reference voltage circuit 431, an error amplifier 432, a pass element 433, and a sampling device 434. The negative voltage regulator 460 may include a reference voltage circuit 461, an error amplifier 462, a pass element 463, and a sampling device 464. The non-redundant clock generator 410, the positive charge pump 420, the positive voltage regulator 430, the negative charge pump 450, and the negative voltage regulator 460 of the voltage supply device 400 are described with reference to FIGS. 1A through 2B. As it has been described, the description thereof is omitted.

The voltage supply device 400 of FIG. 4 may further include a reference voltage positive charge pump 440 and a reference voltage negative charge pump 470 as compared with the voltage supply device 300 of FIG. 3.

The reference voltage positive charge pump and the reference voltage negative charge pumps 440 and 470 may refer to a voltage (V pp _ ref , V np _ ref , hereinafter referred to as a reference pumping voltage) for generating the reference voltages V pref and V nref . You can print The output reference pumping voltages V pp _ ref and V np _ ref may be supplied to the reference voltage circuits 431 and 461 included in the positive and negative voltage regulators 430 and 460. The reference voltage circuits 431 and 461 may output the reference voltages V pref and V nref based on the received reference pumping voltages V pp_ref and V np_ref , respectively. In exemplary embodiments, the reference pumping voltage V pp _ ref may be at a level lower than the pumping voltage V pp . The reference pumping voltage V np _ ref may be at a level higher than the pumping voltage V np .

8 is a view illustrating in detail the internal configuration of the voltage supply device 400 of FIG. For example, the reference voltage circuits 431 and 461 of the voltage supply device 400 illustrated in FIG. 8 may be voltage dividers. The reference voltage circuits 431 and 461 may receive the reference pumping voltages V pp _ ref and V np _ ref from the reference voltage charge pumps 440 and 470, respectively. The reference voltage circuits 431 and 461 may generate the reference voltages V pref and V nref based on the received reference pumping voltages V pp _ ref and V np _ ref , respectively. In exemplary embodiments, a MOS device may be used in the reference voltage circuits 431 and 461. The current flowing in the reference voltage circuits 431 and 432 in which the MOS device is used may be a low current.

9 is a block diagram illustrating a voltage supply apparatus 500 according to a fifth embodiment of the present invention. 9, the voltage supply device 500 includes a non-redundant clock generator 510, a positive charge pump 520, a positive voltage regulator 530, a negative charge pump 550, a negative voltage regulator 560, and a positive voltage level. The shifter 580 and the negative voltage level shifter 590 may be included. The non-redundant clock generator 510, the positive charge pump 520, the positive voltage regulator 530, the negative charge pump 550, and the negative voltage regulator 560 of the voltage supply device 500 are described with reference to FIGS. 1A through 2B. As it has been described, the description thereof is omitted.

The voltage supply device 500 may further include a positive voltage level shifter and a negative voltage level shifter 580 and 590 as compared to the voltage supply device 300 of FIG. 3.

The positive voltage and negative voltage level shifters 580 and 590 may receive output voltages V pout and V nout of the positive voltage regulator 530 and the negative voltage regulator 560, respectively. The level shifter (580, 590) may control the receive control signal (W_en) and, based on the received control signal (W_en), the output voltage (V pout, V nout). For example, the control signal W_en may be a digital signal formed of "1" and "0". The level shifters 580 and 590 may output controlled output voltages V pout 'and V nout ' based on the control signal W_en.

10 is a block diagram illustrating a voltage supply device 600 according to a sixth embodiment of the present invention. Referring to FIG. 10, the voltage supply device 600 includes a non-redundant clock generator 610, a positive voltage charge pump 620, a positive voltage regulator 630, a reference voltage charge pump 640, and a negative voltage charge pump 650. ), A negative voltage regulator 660, a reference voltage charge pump 670, a positive voltage level shifter 680, and a negative voltage level shifter 690. The non-redundant clock generator 610, the positive voltage charge pump 620, the positive voltage regulator 630, the negative voltage charge pump 650, the negative voltage regulator 660, and the positive voltage level shifter of the voltage supply device 600 ( 680 and the negative voltage level shifter 690 have been described with reference to FIG. 9, and thus description thereof is omitted. Compared with the voltage supply device 500 of FIG. 9, the voltage supply device 600 of FIG. 10 may further include reference voltage charge pumps 640 and 670.

As described with reference to FIG. 6, the reference voltage charge pumps 640, 670 are connected to the reference pumping voltages V pp _ ref , V np _ ref with the positive voltage and negative voltage regulators 630, 660, respectively. Can be supplied. Based on the supplied reference pumping voltages V pp _ ref , V np _ ref , the positive and negative voltage regulators 630, 660 are reference voltages for generating output voltages V pout , V nout . Can create them.

11A is a block diagram illustrating a voltage supply apparatus 1000 according to a seventh embodiment of the present invention. Referring to FIG. 11A, the voltage supply device 1000 may include a voltage-controlled oscillator 1100, a voltage controlled oscillator (VCO), and a voltage power supply 1200. The oscillator 1100 may receive an input signal CLK_en. The oscillator 110 may generate an input signal CLKin and transmit the input signal CLKin to the voltage power source 1200 in response to the received input signal.

Voltage power source 1200 can output a drive voltage (V dd), the clock signal receiving the (CLK, CLKb) and a control signal (W_en), the output voltage (V pout, V nout). In exemplary embodiments, the voltage power supply 1200 may be any one of the voltage supply devices 500 and 600 described with reference to FIGS. 9 to 10.

11B is a view illustrating a voltage supply device 1000 ′ according to an eighth embodiment of the present invention. Referring to FIG. 11B, the voltage supply device 1000 ′ may include a ring oscillator 1100 ′ and a voltage power source 1200. Since the voltage power supply 1200 has been described with reference to FIG. 11A, a description thereof will be omitted.

The ring oscillator 1100 ′ may operate in response to the signal CLK_en. In exemplary embodiments, the ring oscillator 1100 ′ may generate an input signal CLKin having a 50% duty cycle.

12A is a block diagram illustrating a voltage supply device 2000 according to a ninth embodiment of the present invention.

Referring to FIG. 12A, the voltage supply device 2000 may include an oscillator 2100, a voltage power supply 2200, and a voltage detector 2300. The voltage power supply 2200 may include a non-redundant clock generator 2210, a positive charge pump 2220, and a positive voltage regulator 2230. The oscillator 2100, the non-redundant clock generator 2210, the positive charge pump 2220, and the positive voltage regulator 2230 have been described with reference to FIGS. 1A and 11A, and thus description thereof is omitted.

The voltage detector 2300 may detect the pumping voltage V pp of the positive charge pump 2220. The voltage detector 2300 may control the oscillator 2100 based on the detected pumping voltage V pp . For example, when the load supplied with the voltage from the voltage supply device 2000 is large, the pumping voltage V pp of the positive charge pump 2220 may be lowered. When the pumping voltage V pp is out of the input range of the positive voltage regulator 2230, the positive voltage regulator 2230 may not keep the output voltage V pout constant. In this case, the voltage detector 2300 may increase the frequency of the input signal CLKin output from the oscillator 2100. In response to the high frequency input signal CLKin, the pumping voltage V pp of the positive charge pump 2220 may be increased.

12B is a block diagram illustrating a voltage supply device 2000 ′ according to a tenth embodiment of the present invention. 12B, the voltage supply device 2000 ′ may include an oscillator 2100, a voltage power supply 2200 ′, and a voltage detector 2300. The voltage power supply 2200 ′ may include a non-redundant clock generator 2210, a positive charge pump 2220, and first to nth positive voltage regulators 2231 to 223n. Since the oscillator 2100, the voltage detector 2300, the silver non-redundant clock generator 2210, and the positive charge pump 2220 have been described with reference to FIG. 12A, a description thereof will be omitted.

The voltage supply device 2000 ′ may further include a plurality of regulators 2231 to 223n as compared with the voltage supply device 2000 of FIG. 12A. Each of the first to nth regulators 2231 to 223n may generate different output voltages V pout _1 to V pout _n based on the pumping voltage V pp of the positive charge pump 2220.

13A is a view illustrating a voltage supply device 3000 according to an eleventh embodiment of the present invention. Referring to FIG. 13A, the voltage supply device 3000 includes an oscillator 3100, a non-redundant clock generator 3210, first to nth positive charge pumps 3321 to 322n, a positive voltage regulator 3230, and first to fifth voltages. The n th comparators 3410 to 34n0, the first to n th clock control buffers 3510 to 35n0, and the comparison voltage generator 3600 may be included.

The oscillator 3100 may generate an input signal CLKin in response to the signal CLK_en. The non-redundant clock generator 3210 may generate clock signals CLK and CLKb in response to the input signal CLKin.

The comparison voltage generator 3600 may generate reference voltages for comparing with the output voltage Vpout. The first to n th comparators 3410 to 34n0 compare the generated reference voltages with the pumping voltages of the first to n th positive charge pumps 3321 to 322 n, and compare the comparison result with the first to n th clock-controlled results. It may be transmitted to the buffers 3510 to 35n0.

The first to n th clock-control buffers may include first to n th positive charge pumps in response to the clock signals CLK and CLKb and the outputs CLKin1 to CLKinN of the first to n th comparators 3410 to 34n0. 3221-322n can be controlled. For example, when the load is large, the output voltage of the charge pumps may drop. Accordingly, the first to n th comparators 3410 to 34n0 compare the reference voltages and the pumping voltages of the first to n th positive charge pumps, and compare the comparison results with the first to n th clock control buffers 3510 to n, respectively. 35n0). The first to nth clock control buffers 3510 to 35n0 may control operations of the first to nth positive charge pumps 3321 to 322n based on a comparison result. In exemplary embodiments, each of the first to nth clock control buffers 3510 to 35n0 may independently activate or deactivate each of the first to nth positive charge pumps 3321 to 322n.

The positive voltage regulator 3230 may receive the pumping voltages of the first to nth positive charge pumps 3321 to 322n to supply a stable output voltage V pout to the load.

13B is a view illustrating a voltage supply device 3000 ′ according to a twelfth embodiment of the present invention. Referring to FIG. 13B, the voltage supply device 3000 includes an oscillator 3100, a non-redundant clock generator 3210, first to nth positive charge pumps 3321 to 322n, and first to nth positive voltage regulators ( 3231 to 322n, first to n th comparators 3410 to 34n0, first to n th clock control buffers 3510 to 35n0, and a comparison voltage generator 3600. Oscillator 3100, non-redundant clock generator 3210 of voltage supply device 3000 ', first to nth positive charge pumps 3321 to 322n, first to nth comparators 3410 to 34n0, and first Since the n th to n th clock control buffers 3510 to 35n0 and the comparison voltage generator 3600 have been described with reference to FIG. 13A, a description thereof will be omitted.

In exemplary embodiments, the voltage supply device 3000 ′ may further include first to nth positive voltage regulators 3231 to 323n as compared to the voltage supply device 3000 of FIG. 13A. The first to nth positive voltage regulators 3231 to 323n may generate a plurality of different output voltages Vpout_1 to Vpout_n based on the pumping voltages of the first to nth positive charge pumps.

An embodiment of voltage supply devices for generating a positive voltage is described with reference to FIGS. 11A through 13B, but the scope of the present invention is not limited thereto. As an example, the voltage supplies can generate a negative high voltage. A plurality of voltage supply devices may be combined to generate a positive voltage and a negative voltage together.

As described above, according to an embodiment of the present invention, it is possible to reduce the shaking (ripple) of the output of the charge pump by using a regulator. Thus, a voltage supply device with improved reliability is provided.

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should not be limited to the above-described embodiment, but should be defined by the equivalents of the claims of the present invention as well as the claims to be described later.

300: voltage supply
310: non-redundant clock generator
320: positive charge pump
330 positive voltage regulator
331: reference voltage circuit
332: error amplifier
333: pass-through element
334: sampling device
350: negative charge pump
360: negative voltage regulator

Claims (14)

A non-redundant clock generator for generating clock signals;
A charge pump that receives the clock signals and outputs a pumping voltage in response to the received clock signals; And
A regulator for receiving the pumping voltage and adjusting the received pumping voltage to output an output voltage,
The regulator includes:
A reference voltage circuit for generating a reference voltage based on the pumping voltage;
A sampling device for dividing the output voltage to output a divided voltage;
An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And
And a pass element that receives the pumping voltage and controls a pass current based on the output of the error amplifier to maintain the output voltage constant. The method of claim 1,
And the output voltage is higher than a driving voltage input to the charge pump and lower than the pumping voltage. The method of claim 1,
The output voltage and the pumping voltage are negative voltages of different levels,
And an absolute value of the output voltage is higher than a driving voltage input to the charge pump and lower than an absolute value of the pumping voltage. The method of claim 1,
The sampling device
A first element connected between said passing element and a distribution node; And
A second element connected between the distribution node and a ground terminal;
And the first and second elements are capacitors or MOS transistors. The method of claim 1,
And a level shifter for converting and outputting the level of the output voltage. The method of claim 1,
And a voltage-controlled oscillator for generating an input signal of the non-redundant clock generator. The method according to claim 6,
A voltage detector for detecting the level of the pumping voltage;
And an input signal of the non-redundant clock generator output from the voltage-controlled oscillator is controlled in response to the detection result. The method of claim 1,
And a ring oscillator for generating an input signal of the non-redundant clock generator. The method of claim 8,
The ring oscillator generates an input signal with a 50% duty cycle. The method of claim 1,
A plurality of regulators connected with the charge pump to receive the pumping voltage;
And the plurality of regulators each generate a plurality of different output voltages, each of the plurality of regulators having the same configuration as the regulator. The method of claim 1,
The charge pump comprises first to nth charge pump units,
First to nth clock-control buffers connected to the first to nth charge pump units, respectively;
A comparison voltage generator for outputting a comparison voltage; And
And first to nth comparators for comparing the pumping voltages of the first to nth charge pump units with the comparison voltage, respectively, and transmitting a comparison result to the first to nth clock-control buffers.
Based on a comparison result of the first to n th comparators, each of the first to n th clock-control buffers independently activates or deactivates each of the first to n th charge pump units. The method of claim 11,
A plurality of regulators connected with the first to nth charge pump units,
The plurality of regulators generate a plurality of different output voltages,
And the plurality of regulators have the same configuration as the regulator. A non-redundant clock generator for generating clock signals;
A charge pump that receives the clock signals and outputs a pumping voltage in response to the received clock signals;
A reference voltage charge pump that receives the clock signals and outputs a pumping reference voltage in response to the received clock signals; And
And a regulator configured to receive the pumping voltage and the pumping reference voltage and to adjust the received pumping voltage to output an output voltage.
The regulator includes:
A reference voltage circuit for generating a reference voltage based on the pumping reference voltage;
A sampling device for dividing the output voltage to output a divided voltage;
An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And
And a pass element that receives the pumping voltage and controls a pass current based on the output of the error amplifier to maintain the output voltage constant. A non-redundant clock generator for outputting clock signals;
Positive charge pumps and negative charge pumps which receive the clock signals and output pumping voltages in response to the received clock signals, respectively;
A positive voltage regulator and a negative voltage regulator for receiving the pumping voltages respectively and adjusting the received pumping voltages to output output voltages,
Each of the positive voltage regulator and the negative voltage regulator,
A reference voltage circuit for generating a reference voltage based on the pumping voltage;
A sampling device for distributing an output voltage and outputting a divided voltage;
An error amplifier for amplifying and outputting a difference between the divided voltage and the reference voltage; And
And a pass element that receives the pumping voltage and controls a pass current based on the output of the error amplifier to maintain the output voltage constant.
KR1020120073904A 2012-07-06 2012-07-06 Voltage supply device KR20140006574A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108346440A (en) * 2017-01-25 2018-07-31 中芯国际集成电路制造(上海)有限公司 The control circuit of bias generating circuit and memory
KR20190095871A (en) * 2018-02-07 2019-08-16 상하이 어위닉 테크놀러지 컴퍼니., 리미티드 Detection circuit and electronic device using the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108346440A (en) * 2017-01-25 2018-07-31 中芯国际集成电路制造(上海)有限公司 The control circuit of bias generating circuit and memory
CN108346440B (en) * 2017-01-25 2020-11-03 中芯国际集成电路制造(上海)有限公司 Bias generating circuit and control circuit of memory
KR20190095871A (en) * 2018-02-07 2019-08-16 상하이 어위닉 테크놀러지 컴퍼니., 리미티드 Detection circuit and electronic device using the same

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