KR20130135384A - Cmp polishing liquid and method of polishing semiconductor substrate - Google Patents

Abstract

The CMP polishing liquid according to one embodiment of the present invention comprises abrasive grains containing ceria particles and silica particles, a compound having a first acid dissociation constant of 7 or less (except azoles), a basic compound, and a persulfate salt. It contains and the pH of the said CMP polishing liquid is 9.0-12.0. The polishing method of the semiconductor substrate which concerns on one Embodiment of this invention is TSV arrange | positioned in the board | substrate main body 1 in which the hollow part 3a, 3b opened only in the surface 1a, and the hollow part 3a, 3b. A semiconductor having a conductive member 7 which is likely to be 7a, 7b and insulating layers 5a, 5b disposed between the substrate main body 1 and the conductive member 7 in the hollow portions 3a, 3b. The substrate 300 is polished from the back surface 1b side using the CMP polishing liquid to expose the conductive member 7 to the back surface 1b side to form a through electrode structure having TSVs 7a and 7b. A polishing process is provided.

Description

CMP polishing liquid and polishing method of semiconductor substrate {CMP POLISHING LIQUID AND METHOD OF POLISHING SEMICONDUCTOR SUBSTRATE}

The present invention relates to a polishing method for a CMP polishing liquid and a semiconductor substrate, and more particularly to a polishing method for a CMP polishing liquid and a semiconductor substrate suitable for processing a main surface of a semiconductor substrate.

For many years, high performance of semiconductor devices has been achieved by miniaturization and high integration based on the scaling principle (see, for example, Non-Patent Document 1 below). However, in recent years, such an approach has reached a limit, and the direction is changing to high performance in the whole system including the design and the mounting.

Various techniques for high performance in such a system have been studied. For example, a three-dimensional mounting technique in which a large-scale integrated circuit (LSI) chip is stacked in a vertical direction (height direction) at a high density is also used. One of them (see, for example, Non-Patent Document 2). Among the three-dimensional mounting technologies, in particular, a technique of connecting LSI chips arranged above and below through wirings (through electrodes) passing through LSI chips, called TSV (Through-silicon Via), is attracting attention.

Many methods of forming TSV have been proposed, and a method of forming TSV in the wiring step, or a method of forming TSV from the surface of the substrate after completion of the preliminary step has been studied. For example, a semiconductor substrate having a TSV structure is manufactured as follows. First, the insulating layer (for example, silicon oxide film (silicon dioxide film)) for insulating TSV is hollowed out on the surface of the semiconductor substrate (for example, silicon substrate) in which the hollow portion is opened only on the surface (one main surface). It is formed along the negative shape. Next, the conductive member (for example, conductor layers, such as a copper layer) which is TSV material, is arrange | positioned in a hollow part. Subsequently, the semiconductor substrate was ground using a grinder from the back surface (the other main surface) side, and the semiconductor substrate was thinned until immediately before the insulating layer was exposed, and then the grinding scratches (grinding marks) generated on the back surface of the semiconductor substrate by the grinder. ) Is eliminated by polishing. In this case, the insulating layer appears on the back surface side of the semiconductor substrate by polishing the semiconductor substrate from the back surface side and removing the surface layer portion on the back surface side of the semiconductor substrate. The semiconductor substrate is further polished from the back surface side to remove the insulating layer, whereby the conductive member is exposed on the back surface side of the semiconductor substrate to form TSV. Thus, in order to obtain TSV, it is necessary to grind away the surface layer part and the insulating layer of the back surface side of the semiconductor substrate exposed to the to-be-polished surface in grinding | polishing for eliminating grinding flaws.

U.S. Patent No. 4169337 Japanese Patent Publication No. 57-58775

 IEEE J. Solid-State Circuits, vol. SC-9, pp. 256-268 (1974).  Technical Digest of International Electron Devices Meeting (IEEE, Piscataway, NJ, 2001), p. 23.1.1.

By the way, the grinding | polishing liquid for semiconductor substrate manufacture which used as a grinding | polishing object the structural material of semiconductor substrates, such as silicon, may be used for grinding | polishing to remove grinding | wound scratch. As a polishing liquid for semiconductor substrate manufacture, any of colloidal silica and a silica gel in which the particle diameter of a primary particle exists in the range of 4-200 nm (preferably 4-100 nm), and a water-soluble amine are contained, for example. A polishing liquid to be mentioned (for example, refer to the said patent document 1).

However, such a polishing liquid for semiconductor substrate manufacturing mainly uses constituent materials of semiconductor substrates such as silicon, and therefore the polishing rate of the insulating layer in the case of using the polishing liquid is very low. Therefore, even if the insulating layer covering the conductive member is polished using such a polishing liquid for semiconductor substrate production, the insulating layer remains and the conductive member is hardly exposed. In this case, in order to expose the conductive member, a step of polishing the insulating layer using the polishing liquid for insulating layer polishing or a step of removing the insulating layer by a method such as wet etching or dry etching is necessary separately. The process for obtaining an electrode becomes complicated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a CMP polishing liquid capable of polishing a semiconductor substrate, an insulating layer and a conductive member at an excellent polishing rate, and a method of polishing a semiconductor substrate using the CMP polishing liquid. do.

In the case where a plurality of conductive members are formed inside the semiconductor substrate, the depth of the conductive member from the surface to be polished of the substrate may be different from each other depending on the position and arrangement of the conductive member in the semiconductor substrate. In this case, in order to expose all the conductive members in a semiconductor substrate to a to-be-polished surface, grinding | polishing is continued until the electrically-conductive member formed in the deepest position from the to-be-polished surface is exposed, and the already exposed electrically-conductive member is made into an insulating layer or a semiconductor substrate. Should be polished together. Therefore, the present inventors came to the idea that it is necessary to polish a semiconductor substrate, an insulating layer, and an electrically-conductive member with the outstanding polishing rate with respect to a CMP polishing liquid.

The CMP polishing liquid according to the present invention includes abrasive grains containing ceria particles and silica particles, a compound having a first acid dissociation constant of 7 or less (except for azoles), a basic compound, and a persulfate salt. It contains and the pH of the said CMP polishing liquid is 9.0-12.0.

In addition, the acid dissociation constant (pKa) is the negative common logarithm (the logarithm of the reciprocal number) of the equilibrium constant Ka in the dissociation reaction in which hydrogen ions are released from an acid, and in the case of using a compound having a plurality of pKa And the 1st stage acid dissociation constant are called "1st acid dissociation constant (pKa1)." In addition, in this invention, the compound which has a single pKa may be sufficient as the compound whose 1st acid dissociation constant is 7 or less, In this case, the said single pKa is called "pKa1". As a value of said pKa1, a chemical handbook and basic edition II (5th edition, Maruzen Co., Ltd.) can be referred, for example.

According to the CMP polishing liquid which concerns on this invention, a semiconductor substrate, an insulating layer, and a conductive member can be made into the outstanding polishing rate. According to the present invention as described above, a through electrode structure can be easily formed without separately forming a step for exposing the conductive member and making the step complicated.

According to the present invention, in the case where a plurality of conductive members serving as through electrodes are formed inside the semiconductor substrate, even if the depths of the conductive members from the surface to be polished of the substrate are different from each other, the plurality of through electrodes The through-electrode structure having the structure can be easily formed. For example, according to the present invention, a through-hole having a plurality of through electrodes is provided by using a semiconductor substrate having a first conductive member formed at a shallow position from the surface to be polished and a second conductive member formed at a position deep from the surface to be polished. The electrode structure can be easily formed. That is, first, using the CMP polishing liquid according to the present invention, by simultaneously polishing the insulating layer covering the first conductive member or the surface layer portion of the semiconductor substrate, the first conductive member is exposed to the surface to be polished to expose the first through electrode. Get Further, by using the CMP polishing liquid according to the present invention, the surface layer portion, the insulating layer, and the first conductive member of the semiconductor substrate exposed to the surface to be polished are simultaneously polished, thereby exposing the second conductive member to the surface to be polished to obtain the second surface. A through electrode is obtained. Thereby, the through electrode structure which has a some through electrode can be formed easily.

It is preferable that the compound whose 1st acid dissociation constant is 7 or less contains an amino acid. It is preferable that an amino acid is (alpha)-amino acid. In these cases, the semiconductor substrate, the insulating layer, and the conductive member can be polished at an excellent polishing rate.

The compound whose 1st acid dissociation constant is 7 or less may contain the organic acid which has a carboxyl group. Also in this case, the semiconductor substrate, the insulating layer, and the conductive member can be polished at a more excellent polishing rate.

It is preferable that a basic compound contains at least 1 sort (s) chosen from a nitrogen-containing basic compound and an inorganic basic compound, and it is more preferable to contain at least 1 sort (s) chosen from potassium hydroxide, sodium hydroxide, tetramethylammonium hydroxide, and ammonium hydroxide. Do. In these cases, the semiconductor substrate, the insulating layer, and the conductive member can be polished at an excellent polishing rate.

It is preferable that content of a basic compound is 0.10 mass% or more. In this case, the semiconductor substrate, the insulating layer and the conductive member can be polished at an even higher polishing rate.

It is preferable that a persulfate contains at least 1 sort (s) chosen from potassium persulfate and ammonium persulfate. In this case, the semiconductor substrate, the insulating layer and the conductive member can be polished at an even higher polishing rate.

In the CMP polishing liquid of the present invention, a substrate body of a semiconductor substrate having a substrate body having a hollow portion opened only on one main surface, and a conductive member that is likely to be a through electrode disposed in the hollow portion is polished from the other main surface side. The conductive member may be used to form the through electrode structure by exposing the conductive member to the other main surface side. Moreover, the CMP polishing liquid which concerns on this invention is a main body side of the board | substrate main body of the semiconductor substrate provided with the board | substrate main body in which the through-hole penetrated from one main surface to the other main surface, and the through-electrode arrange | positioned in a through-hole. Or you may use in order to grind from the said other principal surface side.

The polishing method of the semiconductor substrate which concerns on this invention is a CMP polishing of the board | substrate main body of the semiconductor substrate provided with the board | substrate main body in which the hollow part opened only one main surface, and the electrically-conductive member which becomes a through electrode arrange | positioned in the hollow part is said CMP polishing. The liquid may be used to polish from the other main surface side to expose the conductive member to the other main surface side to form a through electrode structure. According to such a polishing method, a through electrode structure having a plurality of through electrodes can be easily formed.

Moreover, the grinding | polishing method of the semiconductor substrate which concerns on this invention is the CMP of the board | substrate main body of the semiconductor substrate provided with the board | substrate main body in which the through-hole penetrated from one main surface to the other main surface, and the through-electrode arrange | positioned in a through-hole, said CMP You may be equipped with the grinding | polishing process of grind | polishing from the said one main surface side or the said other main surface side using polishing liquid. In such a polishing method, by using a CMP polishing liquid capable of polishing a semiconductor substrate, an insulating layer, and a conductive member at an excellent polishing rate, the state in which the semiconductor substrate, the insulating layer, and the penetrating electrode are exposed to the surface to be polished is well maintained. In doing so, the length of the through electrode can be adjusted. Thereby, in the case where the first through electrode and the conductive member serving as the second through electrode are formed in the semiconductor substrate, the second through electrode may be formed while adjusting the length of the first through electrode.

The grinding | polishing method of the semiconductor substrate which concerns on this invention may further include the process of grinding a board | substrate main body from the main surface side polished by a grinding | polishing process before a grinding | polishing process.

In the polishing method of the semiconductor substrate which concerns on this invention, it is preferable to polish a board | substrate main body using the polishing cloth (polishing pad) whose Shore D hardness is 30-90 in a polishing process. In this case, excessive grinding of the through electrode exposed to the surface to be polished can be suppressed, and the step (high level difference) between the semiconductor substrate and the through electrode on the surface to be polished can be easily reduced.

According to the present invention, there is provided a CMP polishing liquid capable of polishing a semiconductor substrate, an insulating layer, and a conductive member at an excellent polishing rate, and a method of polishing a semiconductor substrate using the CMP polishing liquid. According to the present invention as described above, a through electrode structure can be easily formed without separately forming a step for exposing the conductive member and making the step complicated. According to the present invention, in the case where a plurality of conductive members serving as through electrodes are formed in a semiconductor substrate, even if the depths of the conductive members from the surface to be polished of the substrate are different from each other, the plurality of through electrodes have a plurality of through electrodes. The through electrode structure can be easily formed.

1: is a schematic cross section which shows the process of the grinding | polishing method which concerns on one Embodiment of this invention.
FIG. 2: is a schematic cross section which shows the process of the grinding | polishing method concerning one Embodiment of this invention.
3: is a schematic cross section which shows the process of the grinding | polishing method which concerns on one Embodiment of this invention.
4: is a schematic cross section which shows the process of the grinding | polishing method concerning another embodiment of this invention.
5 is a view showing an SEM photograph of the surface to be polished after polishing.
It is a figure which shows the measurement result of the shape of TSV in the to-be-polished surface after grinding | polishing.

EMBODIMENT OF THE INVENTION Hereinafter, the CMP polishing liquid which concerns on one Embodiment of this invention, and the grinding | polishing method of the semiconductor substrate using this CMP polishing liquid are demonstrated in detail.

<CMP polishing liquid>

The CMP polishing liquid according to the present embodiment contains abrasive grains (polishing particles), a compound having a first acid dissociation constant (pKa1) of 7 or less (except azoles), a basic compound, and an oxidizing agent.

(Grip)

The CMP polishing liquid according to the present embodiment contains at least ceria particles (cerium oxide particles) and silica particles (silicon dioxide particles) as abrasive grains. When polishing the surface to be polished exposed to the semiconductor substrate (e.g. silicon substrate) and insulating layer (e.g. silicon oxide film) using such a polishing liquid, the semiconductor substrate is mainly polished by silica particles, and ceria Although it is thought that an insulating layer is mainly grind | pulverized by particle | grains, a favorable grinding | polishing rate is obtained by the synergistic effect of both as a whole. As silica particle, colloidal silica particle is preferable.

Moreover, you may use another abrasive grain together as needed. As another abrasive grain which can be used together, Specifically, For example, abrasive grains which consist of inorganic materials, such as alumina, titania, or zirconia; Abrasive grains made of organic materials such as organic polymers; The composite abrasive grain which consists of an organic material and an inorganic material, etc. are mentioned.

500 nm or less is preferable and 400 nm or less of the average particle diameter (secondary particle diameter) of ceria particle | grains is favorable in that dispersion stability in polishing liquid is favorable, and the number of generation | occurrence | production of the scratches (scratches) generate | occur | produced by CMP is small, More preferred. 10 nm or more is preferable, as for the average particle diameter of a ceria particle, a practical polishing rate becomes easy to obtain, 30 nm or more is more preferable, 50 nm or more is more preferable.

Since content of ceria particle | grains becomes easy to fully improve the polishing rate of an insulating layer (for example, a silicon oxide film), 0.01 mass% or more is preferable on the basis of the total mass of polishing liquid, 0.05 mass% or more is more preferable, 0.10 mass% or more is more preferable, and 0.20 mass% or more is especially preferable. The content of the ceria particles can be easily suppressed from aggregation of the particles in the polishing liquid, preferably 2.00% by mass or less, more preferably 1.00% by mass or less, even more preferably 0.80% by mass or less on the basis of the total mass of the polishing liquid. desirable.

The average particle diameter (secondary particle size) of the silica particles is preferably 200 nm or less, preferably 100 nm or less, in that the dispersion stability in the polishing liquid is good and the number of polishing scratches (scratches) generated by CMP is small. More preferred. Especially as a silica particle, the colloidal silica whose average particle diameter is 200 nm or less is preferable, and the colloidal silica whose average particle diameter is 100 nm or less is more preferable. Since the average particle diameter of a silica particle becomes easy to obtain a practical grinding | polishing rate, 5 nm or more is preferable, 7 nm or more is more preferable, 9 nm or more is more preferable.

Since content of a silica particle becomes easy to fully improve the polishing rate of a semiconductor substrate (for example, a silicon substrate), 0.01 mass% or more is preferable on the basis of the whole mass of polishing liquid, More preferably, 0.05 mass% or more, 0.10 mass% or more is more preferable. The content of the silica particles is preferably 5.00% by mass or less, based on the total mass of the polishing liquid, in that the effect of improving the polishing rate suitable for the content is easily obtained while suppressing the occurrence of defects such as polishing scratches. More preferably, 0.50 mass% or less is still more preferable.

In addition, the average particle diameter of the ceria particle can be measured with a laser diffraction type particle size distribution analyzer (for example, LA-920 by Horiba Corporation). Specifically, it can measure as follows using LA-920 (light source: He-Ne laser and W laser) by Horiba Corporation. First, a ceria particle dispersion liquid such that the transmittance | permeability (H) becomes 65 to 75% at the time of the measurement with a He-Ne laser is obtained, and it is set as a measurement sample. And this measurement sample was put into LA-920, and it measured by making the relative refractive index into 1.60 (theoretical refractive index of 2.128 / refractive index of water 1.33 of cerium oxide), and the average particle diameter of ceria particle as arithmetic mean diameter (mean size) (secondary) Particle diameter) is obtained.

In addition, the average particle diameter of the said silica particle can be measured with a dynamic light scattering system particle size distribution meter (for example, brand name COULTER N4 SD by a COULTER Electronics company). Specifically, the dispersion liquid of the silica particles is measured, and the dispersion liquid is diluted with water as needed so as to fall into the scattered light intensity range required by the dynamic light scattering system particle size distribution meter to prepare a measurement sample. Next, this measurement sample is thrown into a dynamic light scattering system particle size distribution meter and measured in the scattered light reference mode to obtain an average particle diameter (secondary particle diameter) of silica particles as D50.

(Compound whose first acid dissociation constant is 7 or less)

The CMP polishing liquid according to the present embodiment contains a compound having a first acid dissociation constant of 7 or less (except for azoles). The azoles which do not correspond to the said compound mean the compound which has a hetero 5-membered ring containing 1 or more nitrogen atoms in a ring, For example, 1H-1,2,4-triazole, 3-amino-1H. Triazole and derivatives thereof, such as -1,2,4-triazole, are mentioned.

The polishing liquid contains a compound having a first acid dissociation constant of 7 or less, so that the pH of the CMP polishing liquid is excessively increased, and the solubilizing agent of the constituent material (silicon, etc.) of the semiconductor substrate at a desired pH (for example, 9.0 to 12.0). The content of the basic compound functioning as can be increased. As a result, the polishing rate of the constituent material (silicon or the like) of the semiconductor substrate can be significantly increased as compared with the polishing liquid containing no compound having a first acid dissociation constant of 7 or less. 5 or less are preferable and, as for the 1st acid dissociation constant of the said compound, 4 or less are more preferable.

As a compound whose 1st acid dissociation constant is 7 or less, at least 1 sort (s) chosen from an amino acid and the organic acid (except an amino acid) which has a carboxyl group is preferable at the point which can further increase content of a basic compound. "Amino acid" is defined here as an organic compound which has a functional group of both an amino group and a carboxyl group. Among the amino acids, α-amino acid is more preferable.

Examples of amino acids having a first acid dissociation constant of 7 or less include glycine, histidine (for example, L-histidine), aspartic acid, glutamic acid, leucine, serine, proline, valine, and the like, and are selected from glycine and histidine. At least one species is preferred. As an organic acid having a carboxyl group and having a first acid dissociation constant of 7 or less, for example, malic acid, picolinic acid, maleic acid, malonic acid, citric acid, gluconic acid, glycolic acid, succinic acid, lactic acid, adipic acid, glutaric acid, benzoic acid Phthalic acid, fumaric acid, oxalic acid, tartaric acid, nicotinic acid, mandelic acid, acetic acid, quinalic acid, butyric acid, valeric acid, salicylic acid, glycerin acid, pimeline acid, and the like, and among these, malic acid, picolinic acid and maleic acid are preferred. And malic acid are more preferred. The compound whose 1st acid dissociation constant is 7 or less can be used individually by 1 type or in combination of 2 or more type. As a combination of the compound whose 1st acid dissociation constant is 7 or less, the combination of glycine and malic acid can be used, for example.

The content of the compound having a first acid dissociation constant of 7 or less is preferably 0.10% by mass or more, more preferably 0.20% by mass or more, and 0.30 on the basis of the total mass of the polishing liquid, in that the effect of improving the polishing rate is easily obtained. Mass% or more is more preferable. The content of the compound having a first acid dissociation constant of 7 or less is a polishing liquid in that it is easy to suppress occurrence of a problem of agglomeration of abrasive grains in a storage liquid for polishing liquid which is diluted and used with a liquid medium such as water at the time of use. 3.00 mass% or less is preferable on a total mass basis, 1.00 mass% or less is more preferable, 0.70 mass% or less is further more preferable. When using a some compound as a compound whose 1st acid dissociation constant is 7 or less, it is preferable that the sum total of content of each compound satisfy | fills the said range.

(Basic compound)

The CMP polishing liquid according to the present embodiment contains a basic compound that functions as a dissolving agent for constituent materials (silicon and the like) of the semiconductor substrate. It is preferable that a basic compound contains at least 1 sort (s) chosen from a nitrogen-containing basic compound and an inorganic basic compound. Although there is no restriction | limiting in particular as a nitrogen-containing basic compound, At least 1 sort (s) chosen from tetramethylammonium hydroxide and ammonium hydroxide is preferable. As an inorganic basic compound, potassium hydroxide, sodium hydroxide, etc. are mentioned, for example, potassium hydroxide is preferable.

As a basic compound, ammonium hydroxide is preferable from a viewpoint of further improving the polishing rate of a conductive member. Since ammonium hydroxide forms the ammine complex with the metal component (for example, copper) of a conductive member, and since melt | dissolution of a metal component is accelerated, it is guessed that the polishing rate of a conductive member further improves.

A basic compound can be used individually by 1 type or in combination of 2 or more type. As a combination of a basic compound, the combination of potassium hydroxide and ammonium hydroxide is preferable at the point which can grind a semiconductor substrate, an insulating layer, and an electrically-conductive member at the further outstanding polishing rate.

The content of the basic compound is preferably 0.10% by mass or more, more preferably 0.20% by mass or more, and even more preferably 0.30% by mass or more on the basis of the total mass of the polishing liquid, since the polishing rate of the practical semiconductor substrate is easily obtained. . The content of the basic compound is preferably 5.00% by mass or less on the basis of the total mass of the polishing liquid, because the content of the basic compound can easily suppress occurrence of problems such as depolymerization of the silica particles that are abrasive grains and aggregation due to an increase in the ionic strength. 3.00 mass% or less is more preferable, and 1.00 mass% or less is further more preferable. When using a some compound as a basic compound, it is preferable that the sum total of content of each compound satisfy | fills the said range.

As for content of the basic compound (such as ammonium hydroxide) which complexes with a metal component (for example, copper), 0.50 mass% or less is preferable from a viewpoint of suppressing excessive melt | dissolution of a conductive member. However, even if the content of the basic compound complexed with a metal component and the basic compound which is hard to complex with a metal component is used even if content of the basic compound complexed with a metal component exceeds 0.50 mass%, an electrically-conductive member excesses. A semiconductor substrate and an insulating layer can be polished favorably, suppressing melt | dissolving easily.

(Oxidizing agent)

The CMP polishing liquid according to the present embodiment contains a persulfate as an oxidant from the viewpoint of improving the polishing rate of the conductive member while maintaining the polishing rate of the semiconductor substrate and the insulating layer. Examples of the persulfate include potassium persulfate, ammonium persulfate and oxone (registered trademark), and at least one selected from potassium persulfate and ammonium persulfate is preferable. If the oxidant is other than persulfate (for example hydrogen peroxide), the principle is not clear at this point, but problems such as yellowing of ceria particles and flocculation sedimentation occur.

The content of the oxidizing agent is preferably 0.05% by mass or more, more preferably 0.07% by mass or more, even more preferably 0.10% by mass or more on the basis of the total mass of the polishing liquid, in that the polishing rate of the conductive member can be sufficiently improved. 0.20 mass% or more is especially preferable, 0.25 mass% or more is very preferable, 0.30 mass% or more is more preferable, and 0.50 mass% or more is more preferable. Since content of an oxidizing agent can easily suppress generation | occurrence | production of problems, such as agglomeration of an abrasive grain and corrosion of an electrically conductive member, 5.00 mass% or less is preferable on the basis of the total mass of polishing liquid, and 3.00 mass% or less is more preferable. 1.00 mass% or less is more preferable.

(Other components)

In the CMP polishing liquid according to the present embodiment, in addition to the above-described components, the components generally added to the polishing liquid, such as water, a solvent other than water, a water-soluble polymer, an anticorrosive agent, and the like, inhibit the effect of the polishing liquid described above. It may contain further in the range which does not.

(pH)

The pH of the CMP polishing liquid according to the present embodiment is 9.0 or more, preferably 9.5 or more, and more preferably 10.0 or more from the viewpoint of sufficiently improving the polishing rate of the constituent material (silicon or the like) of the semiconductor substrate. While the pH of the CMP polishing liquid sufficiently improves the polishing rate of the constituent material (silicon, etc.) of the semiconductor substrate, the abrasive particles generate depolymerization and the liquid phase stability of the CMP polishing liquid is lowered (see, for example, Patent Document 2 above). ) Is 12.0 or less, preferably 11.5 or less, and more preferably 11.0 or less. PH of a CMP polishing liquid can be adjusted with content in the CMP polishing liquid of the compound and basic compound whose pKa1 is 7 or less, for example.

The pH of a CMP polishing liquid can be measured with a pH meter (for example, Yokogawa Electric Co., Model pH81). In this embodiment, two-point calibration is performed using neutral phosphate pH buffer (pH 6.86 (25 ° C)) and borate pH standard solution (pH 9.18 (25 ° C)), and then the electrode is placed in a CMP polishing liquid for at least 2 minutes. The value after passing and stabilizing can be employ | adopted as pH of CMP polishing liquid (25 degreeC).

(Preservation form)

The CMP polishing liquid according to the present embodiment can be stored as a stock solution for polishing liquid in which the content of the contained component is raised in advance. In this case, when the CMP polishing liquid is used, the CMP polishing liquid of the stock solution for polishing liquid may be diluted and used to the content of the original contained component with water or the like. In addition, the CMP polishing liquid which concerns on this embodiment can be preserve | saved as the liquid-separated form which divided the component into several liquid, and can also mix and use them at the time of use.

<Polishing Method of Semiconductor Substrate>

The CMP polishing liquid according to the present embodiment forms a through-electrode structure by exposing a conductive member, which is likely to be a through-electrode, to a to-be-polished surface by simultaneous polishing of the substrate main body and the insulating layer exposed on the to-be-polished surface of the semiconductor substrate. However, by polishing the substrate surface, the insulating layer, and the to-be-polished surface of the semiconductor substrate to which the first through-electrode is exposed, a conductive member that is likely to be a through-electrode is exposed to the to-be-polished surface to form a second through-electrode. It is a polishing liquid which can be used for forming the through-electrode structure which has an electrode. In addition, the CMP polishing liquid according to the present embodiment is particularly suitable for an application for polishing the main surface after grinding (grinding) the main surface of the semiconductor substrate having the conductive member which is likely to be a through electrode in the grinding step.

The 1st aspect of the grinding | polishing method of the semiconductor substrate which concerns on this embodiment is

(1) a substrate body having a hollow portion open to only one main surface, a conductive member that is likely to be a through electrode disposed in the hollow portion, and an insulating layer at least disposed between the other main surface and the hollow portion of the substrate body; A preparatory process for preparing a semiconductor substrate,

(2) a grinding step (thinning step) of grinding the substrate main body from the other main surface side to thin the substrate main body so that the conductive member is not exposed after the preparation step;

(3) After the grinding step, using the CMP polishing liquid, the substrate main body and the insulating layer are polished from the other main surface side, and the conductive member is exposed to the other main surface side to form a through electrode structure. do. In a 1st aspect of a grinding | polishing method, in a grinding | polishing process, the insulating layer which coat | covers a conductive member or the surface layer part of a board | substrate main body is polished and removed on the said other main surface side, and a conductive member is exposed to the said other main surface side, and penetrated Form an electrode.

In the preparation step, for example, first, a substrate main body 1 such as a silicon substrate having a surface (one main surface, a first main surface) 1a and a back surface (the other main surface, a second main surface) 1b facing each other. ), The element 2 is formed on the surface 1a (see Fig. 1 (a)). Next, a plurality of hollow portions 3a and 3b for arranging TSVs (through electrodes) are formed on the surface 1a of the substrate main body 1 by a method such as plasma etching (see FIG. 1 (b)). . For example, the depths of the hollow portions 3a and 3b are different from each other, and the bottom surfaces of the hollow portions 3a and 3b are located deeper from the rear surface 1b than the hollow portion 3a. have. Subsequently, an insulating layer (for example, a silicon oxide film or a silicon nitride film) 5 for insulating the TSV is formed on the surface 1a so as to follow the shapes of the hollow portions 3a and 3b and the semiconductor substrate 100. (See FIG. 1 (c)).

Next, the conductive member (for example, copper layer) 7 is insulated by a method such as sputtering or electrolytic plating so as to fill the hollow portions 3a and 3b and cover the entire surface of the insulating layer 5. Laminate on layer 5 (see FIG. 2 (a)). Subsequently, the conductive member 7 and the insulating layer 5 are polished from the surface 1a side until the element 2 is exposed, thereby obtaining a semiconductor substrate 200 (see FIG. 2B).

In the grinding step, the substrate main body 1 is ground from the back surface 1b side by a grinder until the insulating layer 5a disposed on the bottom surface of the hollow portion 3a is exposed to thin the substrate main body 1. Thus, the semiconductor substrate 300 is obtained (see FIG. 3A).

In the polishing step, the substrate main body 1 is polished from the back surface 1b side using the CMP polishing liquid, and a plurality of TSVs are formed while removing the grinding scratches generated on the back surface 1b by the grinder in the grinding process. . For example, the grinding | polishing process is the 1st grinding | polishing process which exposes the electrically-conductive member 7 in the hollow part 3a to the back surface 1b of the board | substrate main body 1, and forms TSV 7a, and the hollow part 3b. Has a second polishing step of forming the TSV 7b by exposing the conductive member 7 in the substrate to the back surface 1b of the substrate main body 1. In addition, a 1st grinding | polishing process and a 2nd grinding | polishing process may be performed continuously as a single process, and may be performed as a separate process.

The semiconductor substrate 300 to be polished in the first polishing step is a semiconductor substrate for forming a TSV structure (through electrode structure), and a substrate main body having hollow portions 3a and 3b opened only in the surface 1a. 1) and the substrate body 1 and the conductive member along the inner walls of the hollow members 3a and 3b and the conductive member 7 which may be the TSVs 7a and 7b disposed in the hollow portions 3a and 3b. The insulating layers 5a and 5b arrange | positioned between 7 are provided. The edge part of the back surface 1b side of the electrically-conductive member 7 is coat | covered by the insulating layer 5a, 5b and the surface layer part of the back surface 1b side of the board | substrate main body 1, and the surface 1a of the electrically-conductive member 7 The edge part of the side) is exposed to the surface 1a. The conductive member 7 becomes TSV when the substrate main body 1 is polished from the back surface 1b side and the conductive member 7 is exposed to the back surface 1b.

In the first polishing step, as polishing progresses, the surface layer portion on the back surface 1b side of the substrate main body 1 is removed, and the insulating layer 5a is exposed on the back surface 1b. As the polishing proceeds further, the insulating layer 5a exposed to the rear surface 1b is removed, and the conductive member 7 is exposed to the rear surface 1b, so that the through hole 13a is formed in the substrate main body 1. It is formed (see Fig. 3 (b)). Thereby, the semiconductor substrate 400 which has the TSV 7a which penetrates the board | substrate main body 1 in the thickness direction from the surface 1a to the back surface 1b is obtained.

The semiconductor substrate 400 to be polished in the second polishing step is a semiconductor substrate for further forming the TSV 7b, and the substrate main body 1 on which the hollow portion 3b opened only in the surface 1a is formed; , The conductive member 7, which may be a TSV, disposed in the hollow portion 3b, and the insulating layer 5b disposed between the substrate main body 1 and the conductive member 7 along the inner wall of the hollow portion 3b. Equipped with.

In the second polishing step, as the polishing proceeds, the surface layer portion on the back surface 1b side of the substrate main body 1 is removed, and the insulating layer 5b is exposed on the back surface 1b. In this second polishing step, the insulating layer 5a and TSV 7a in the through hole 13a exposed to the back surface 1b are also removed along with the surface layer portion on the back surface 1b side of the substrate main body 1. have. As the polishing proceeds further, the insulating layer 5b exposed on the back surface 1b is removed, and the conductive member 7 is exposed on the back surface 1b, so that the through hole 13b is formed in the substrate main body 1. Formed (see FIG. 3 (c)). Thereby, the semiconductor substrate which has several TSVs 7a and 7b which penetrate the board | substrate main body 1 in the thickness direction from the surface 1a to the back surface 1b, and electrically connect the surface 1a and the back surface 1b. 500 is obtained.

The 2nd aspect of the grinding | polishing method of the semiconductor substrate which concerns on this embodiment is

(1) the preparation process of preparing a semiconductor substrate similarly to the preparation process of the 1st aspect of the said grinding | polishing method,

(2) After the preparation step, by grinding the substrate main body from the other main surface side so that the conductive member is exposed, a substrate main body having a through hole penetrating from the one main surface to the other main surface, and a through hole disposed in the through hole. A grinding step of obtaining a semiconductor substrate having an electrode,

(3) After the grinding step, a polishing step of polishing the substrate main body, the insulating layer, and the through electrode from the one main surface side or the other main surface side using the CMP polishing liquid is provided. In the second aspect of the polishing method, in the grinding step, the conductive member is exposed on the other main surface side to form a through electrode, and in the polishing step, the semiconductor substrate, the insulating layer, and the through electrode exposed on the other main surface. By grinding | polishing, the grinding | polishing flaw which generate | occur | produced on the said other main surface in a grinding process is eliminated.

In a 2nd aspect of the grinding | polishing method of a semiconductor substrate, in the preparation process, the semiconductor substrate 100 is prepared similarly to a 1st aspect. Next, in the grinding step, the substrate main body 1 is ground from the back surface 1b side by a grinder until the conductive portion 7 in the hollow portion 3a and the hollow portion 3b is exposed, and the substrate main body ( 1) is thinned and the semiconductor substrate which has TSV7a, 7b is obtained similarly to the semiconductor substrate 500 (refer FIG.3 (c)). The obtained semiconductor substrate is the grinding | polishing object of the grinding | polishing process in a 2nd aspect, The board | substrate main body 1 in which the through-holes 13a and 13b which penetrate from the surface 1a to the back surface 1b were formed, and the through-hole ( TSVs 7a and 7b disposed in 13a and 13b are provided.

In the polishing step, the substrate main body 1 is polished from the back surface 1b side using the CMP polishing liquid similarly to the polishing step of the first embodiment. Thereby, the grinding flaw which generate | occur | produced in the back surface 1b in a grinding process can be eliminated.

In the polishing process in the polishing method of the semiconductor substrate which concerns on this embodiment, in the state which pressed the back surface 1b of the board | substrate main body 1 to the polishing cloth, supplying a CMP polishing liquid on the polishing cloth of a polishing platen, It is preferable to polish the substrate main body 1 from the back surface 1b side by moving the polishing platen and the substrate main body 1 relatively. When such a polishing method is used, the polishing characteristics of the CMP polishing liquid can be significantly improved.

As a polishing apparatus used in the polishing process, a general polishing apparatus having a polishing table that can be attached to a motor and a rotating cloth that can change the rotation speed, and which can adhere the polishing cloth, and a holder that can hold the substrate to be polished can be used. Can be. There is no restriction | limiting in particular as abrasive cloth, A general nonwoven fabric, foamed polyurethane, a porous fluororesin etc. can be used.

As for the rotational speed of a polishing plate, low rotation of 200 rpm (200 min <^-1> ) or less is preferable so that a board | substrate may not protrude. As for the crimping pressure (polishing pressure) with respect to the polishing cloth of a board | substrate, 70-350 hPa (7-35 kPa) is preferable. While polishing, it is preferable to continuously supply the polishing liquid to the polishing cloth by a pump or the like. The supply amount is not limited, but it is preferable that the surface of the polishing cloth is always covered with the polishing liquid.

A grinding | polishing process is a roughening process which roughly polishes the board | substrate main body 1 which is a rough wafer which has a grinding flaw on the back surface 1b from the back surface 1b side, and a board | substrate after a rough polishing process, You may have the precision grinding | polishing process of precision-polishing the main body 1 from the back surface 1b side. For example, in a 1st aspect of the said grinding | polishing method, after performing the said 1st grinding | polishing process as a rough polishing process, the said 2nd grinding | polishing process can be performed as a precision grinding | polishing process.

In the said precision grinding | polishing process, it is preferable to grind the board | substrate main body 1 from the back surface 1b side using the polishing cloth which has predetermined Shore D hardness. 30 or more are preferable and, as for the minimum of the Shore D hardness of an abrasive cloth, 40 or more are more preferable. If the Shore D hardness is 30 or more, it is possible to sufficiently suppress that the polishing cloth excessively enters the TSV portion at the time of polishing, so that TSV is largely recessed from the surface to be polished (so-called dishing is large). Thereby, the LSI chips stacked up and down can be connected better. Moreover, 90 or less are preferable and, as for the upper limit of the Shore D hardness of an abrasive cloth, 80 or less are more preferable. If the Shore D hardness is 90 or less, defects such as scratches resulting from polishing can be suppressed.

Shore D hardness is frequently used when measuring hardness of hard rubber and the like and is a standard corresponding to JIS K 6253. Shore D hardness is the value measured with the Shore D hardness tester, For example, "Asker rubber hardness tester D type" by a polymer instrument company can be used for the measurement of Shore D hardness. Since the measurement error of Shore D hardness generally produces a measurement error of about ± 1, the same measurement is made five times. In addition, the upper limit of the Shore D hardness becomes 100 from the definition.

The polishing method of the semiconductor substrate which concerns on this invention is not limited to embodiment mentioned above, A various deformation | transformation aspect is possible. For example, in the above-mentioned embodiment, although the grinding process and the grinding | polishing process are performed using the semiconductor substrate 100, instead of the semiconductor substrate 100, the semiconductor substrate 100a shown in FIG. You may use it. In the semiconductor substrate 100a, the elements 2 and the hollow portions 3a and 3b are formed similarly to the semiconductor substrate 100, and an insulating layer (for example, a silicon oxide film or a silicon nitride film) for insulating the TSV ( 15) It is formed on the surface 1a so as to follow the shapes of the hollow portions 3a and 3b, and a barrier metal layer (for example tantalum) on the insulation layer 15 so as to follow the shape of the insulation layer 15. Layer, tantalum nitride layer, titanium layer, titanium nitride layer, tungsten layer, tungsten nitride layer) 25 are formed.

Even when such a semiconductor substrate 100a is used, the substrate main body 1 in the semiconductor substrate 100a is ground and polished from the back surface 1b side, and the back surface 1b side of the substrate main body 1 By removing the surface layer portion, the insulating layer 15 and the barrier metal layer 25, a semiconductor substrate 500a (see Fig. 4 (b)) in which the TSVs 7a and 7b are exposed on the back surface 1b side is obtained. In the semiconductor substrate 500a, since the barrier metal layer 25 is disposed between the TSVs 7a and 7b and the insulating layer 15, Cu, which is a constituent component of the TSVs 7a and 7b, is used as the substrate main body 1. While suppressing the diffusion into the A), the adhesion between the TSVs 7a and 7b and the insulating layer 15 can be improved.

In addition, in the 1st aspect of the grinding | polishing method mentioned above, although the board | substrate main body 1 is grind | pulverized from the back surface 1b side by the grinder until just before the insulating layer 5 is exposed in a grinding process, the conductive member 7 The substrate main body 1 may be ground from the back surface 1b side by using a grinder until the surface of the substrate 1 is exposed, and the substrate main body 1 may be thinned. In this case, in the polishing process subsequent to the grinding process, the substrate main body 1 is polished from the back surface 1b side to remove the insulating layer 5a, and the conductive member 7 is exposed to the back surface 1b, thereby providing TSV ( 7a) can be obtained.

Moreover, in the 2nd aspect of the grinding | polishing method mentioned above, in the grinding process, the board | substrate main body 1 is the back surface 1b until the electrically-conductive member 7 in the hollow part 3a and the hollow part 3b is exposed. Although the grinding is performed from the side, the substrate main body 1 is ground from the back surface 1b side until the conductive member 7 in the hollow portion 3b is exposed after the conductive member 7 in the hollow portion 3a is exposed. You may also

In addition, in embodiment mentioned above, although the depth of some hollow part differs from each other, the depth of some hollow part may mutually be the same. In addition, although the TSV structure which has several TSV is formed in embodiment mentioned above, you may form the TSV structure which has a single TSV.

Example

Hereinafter, the present invention will be described in more detail by way of examples, but the present invention is not limited to these examples.

[Preparation of CMP Polishing Liquid]

Each CMP polishing liquid of Examples 1-10 and Comparative Examples 1-7 was adjusted so that content of each component might become the quantity shown in Tables 1-3, and it prepared according to the following procedures. In addition, potassium hydroxide and ammonia hydroxide which are basic compounds were added using the aqueous solution in consideration of the concentration of the aqueous solution so as to be a predetermined amount in the polishing liquid. In addition, the silica particles (colloidal silica particles) and the ceria particles which are abrasive grains were added using the water dispersion in consideration of the abrasive grain content of the water dispersion to be a predetermined amount in the polishing liquid. In addition, the persulfate which is an oxidizing agent produced the 10 mass% aqueous solution, and added in consideration of the density | concentration of aqueous solution so that it may become a predetermined amount in polishing liquid.

(Examples 1 to 10)

After dissolving the compound A (compound whose first acid dissociation constant is 7 or less) of Table 1 or Table 2 in the pure water corresponded to 50 mass% of the whole polishing liquid, the predetermined amount was added to the basic compound.

Next, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content was the value shown in Table 1 or Table 2. In addition, ceria particles (ceria abrasive dispersion, secondary particle size: 350 nm, manufactured by Hitachi Chemical Industry Co., Ltd., GPX series (trade name), pH 8-9) were added so that the abrasive grain content was the value shown in Table 1 or Table 2. . After stirring the mixture sufficiently, 10 mass% aqueous solution of the oxidizing agent (ammonium persulfate or potassium persulfate) in Table 1 or Table 2 was added, and the mixture was stirred sufficiently. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 1)

Potassium hydroxide was added after dissolving the compound A (glycine and malic acid) of Table 3 in the pure water corresponded to 50 mass% of the whole polishing liquid.

After the mixture was sufficiently stirred, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content was the value shown in Table 3. In addition, ceria particles (ceria grain dispersion, secondary particle diameter: 350 nm, manufactured by Hitachi Chemical Co., Ltd., GPX series (trade name), pH 8-9) were added so that the abrasive grain content would be the value shown in Table 3. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 2)

Potassium hydroxide was added after dissolving the compound A (glycine and malic acid) of Table 3 in the pure water corresponded to 50 mass% of the whole polishing liquid.

In addition, silica particle (colloidal silica particle whose secondary particle diameter is about 25 nm) was added so that abrasive grain content might be the value shown in Table 3. After stirring the mixture sufficiently, 10 mass% aqueous solution of the oxidizing agent (ammonium persulfate) in Table 3 was added, and the mixture was fully stirred. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 3)

Potassium hydroxide was added after dissolving malic acid in the pure water corresponded to 50 mass% of the whole polishing liquid.

After the mixture was sufficiently stirred, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content was the value shown in Table 3. In addition, ceria particles (ceria grain dispersion, secondary particle diameter: 350 nm, manufactured by Hitachi Chemical Industry Co., Ltd., GPX series (product name), pH 8-9) were added so that the abrasive grain content would be the value shown in Table 3. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 4)

Potassium hydroxide was added to the pure water corresponded to 50 mass% of the whole polishing liquid.

After the mixture was sufficiently stirred, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content was the value shown in Table 3. In addition, ceria particles (ceria grain dispersion, secondary particle diameter: 350 nm, manufactured by Hitachi Chemical Co., Ltd., GPX series (trade name), pH 8-9) were added so that the abrasive grain content would be the value shown in Table 3. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 5)

Potassium hydroxide was added after dissolving the compound A (1,2,4-triazole) in Table 3 in the pure water corresponded to 50 mass% of the whole polishing liquid.

Subsequently, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content would be the values shown in Table 3. In addition, ceria particles (ceria grain dispersion, secondary particle diameter: 350 nm, manufactured by Hitachi Chemical Industry Co., Ltd., GPX series (product name), pH 8-9) were added so that the abrasive grain content would be the value shown in Table 3. After stirring the mixture sufficiently, 10 mass% aqueous solution of the oxidizing agent (ammonium persulfate) in Table 3 was added, and the mixture was fully stirred. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 6)

Potassium hydroxide was added after dissolving the compound A (glycine) of Table 3 in the pure water corresponded to 50 mass% of the whole polishing liquid.

Subsequently, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content would be the values shown in Table 3. Subsequently, 10 mass% aqueous solution of the oxidizing agent (ammonium persulfate) in Table 3 was added, and the mixture was fully stirred. Pure water was added as remainder and it adjusted to 100 mass% in total.

(Comparative Example 7)

Potassium hydroxide was added after dissolving malic acid in the pure water corresponded to 50 mass% of the whole polishing liquid.

After the mixture was sufficiently stirred, silica particles (colloidal silica particles having a secondary particle diameter of about 25 nm) were added so that the abrasive grain content was the value shown in Table 3. In addition, ceria particles (ceria grain dispersion, secondary particle diameter: 350 nm, manufactured by Hitachi Chemical Industry Co., Ltd., GPX series (product name), pH 8-9) were added so that the abrasive grain content would be the value shown in Table 3. After stirring the mixture sufficiently, 10 mass% aqueous solution of the oxidizing agent (ammonium persulfate) in Table 3 was added, and the mixture was fully stirred. Pure water was added as remainder and it adjusted to 100 mass% in total.

[Measurement of particle size of abrasive grains]

The average particle diameter of ceria particle | grains was measured with the laser diffraction type particle size distribution analyzer (LA-920 by Horiba Corporation). In addition, the average particle diameter of the silica particle was measured with the dynamic light scattering system particle size distribution meter (The brand name COULTER N4 SD by a COULTER Electronics company).

[pH measurement]

The pH of each CMP polishing liquid (25 degreeC) prepared above was measured using "Model pH81" by the Yokogawa Electric Corporation. The measurement result of pH of CMP polishing liquid is shown to Tables 1-3.

[1 Polishing of Semiconductor Substrate]

Polishing of the semiconductor substrate (polishing wafer) while supplying the CMP polishing liquids of Examples 1 to 10 and Comparative Examples 1 to 7 immediately after blending (the same applies below) to the polishing cloth of the polishing platen. In the state where the surface was pressed by the polishing cloth, the polished surface of the semiconductor substrate was polished by relatively rotating the polishing surface with respect to the semiconductor substrate. The detail of grinding | polishing conditions is as follows.

(Polishing condition 1)

Polishing wafer: 300 mm silicon wafer, wafer with a silicon oxide film (film thickness of 1 μm) formed on a 300 mm silicon wafer, a wafer with a copper film (film thickness of 1.4 μm) formed on a 300 mm silicon wafer, a 300 mm silicon wafer Wafer on which a tantalum nitride film (film thickness of 0.25 μm) is formed on the wafer

Polishing Machine: F-REX (manufactured by Ebara Corporation, product name)

Polishing surface rotation speed: 123 min ^-1

Holder Speed: 117 min ^-1

Polishing pressure: 21 ㎪

Polishing liquid supply amount: 250 ml / min

Abrasive cloth: IC1000 (made by Nitta Haas)

Polishing time: 5 minutes (300 mm silicon wafer), 30 seconds (wafer with silicon oxide film, wafer with copper film, wafer with tantalum nitride)

The thickness of the silicon wafer and the thickness of each film formed on the silicon wafer were measured using C8125-11 (manufactured by Hamamatsu Photonics, product name) to determine the polishing rate from the thickness difference and polishing time before and after polishing. Obtained. The polishing rate with respect to each board | substrate is shown in Tables 1-3, respectively. In addition, in the table, each symbol of the polishing rate column shows the following.

Si: Polishing speed of 300 mm silicon wafer

SiO ₂ : Polishing rate of silicon oxide film deposited on 300 mm silicon wafer

Cu: Polishing speed of copper film deposited on 300 mm silicon wafer

TaN: Polishing speed of tantalum nitride film deposited on 300 mm silicon wafer

In the CMP polishing liquids of Examples 1 to 10, it can be seen that the polishing rate of the silicon wafer is all 800 nm / min or more, for example, a polishing rate sufficient to provide for elimination of grinding marks after grinding is obtained. Further, it can be seen that the polishing rate of the silicon oxide film is all 250 nm / min or more, for example, a polishing rate sufficient to expose the electrode coated with the silicon oxide film is obtained.

In addition, it is understood from the evaluation results of Examples 1 to 3 that the polishing rate of the silicon oxide film can be controlled by increasing or decreasing the content of the ceria particles. Thereby, for example, the electrode coated with the silicon oxide film can be exposed by backside polishing of a semiconductor substrate having various types of TSV structures having different sizes, pattern densities, thicknesses of silicon oxide films, and the like.

In the CMP polishing liquids of Examples 1 to 10, it can be seen that polishing at a sufficient polishing rate is possible because the polishing rates of the copper films are all 120 nm / minute or more. In addition, it is understood from the evaluation results of Examples 2, 4 and 5 that the polishing rate of the copper film can be controlled by increasing or decreasing the content of the oxidizing agent. Thereby, for example, the step | step difference of the through electrode and the board | substrate main body in the back surface of a semiconductor substrate can be controlled to desired magnitude | size.

From the evaluation result of Example 7, when histidine was used as a compound whose 1st acid dissociation constant is 7 or less, it turns out that a tantalum nitride film can be polished at high speed in the point whose polishing rate of a tantalum nitride film is 350 nm / min. Thereby, for example, even when a barrier metal layer such as a tantalum nitride film is used for the purpose of suppressing diffusion of copper or improving the adhesion between the copper and the silicon oxide film, the tantalum nitride film can be removed to expose copper.

From the evaluation result of Example 8, it can be seen that even when malic acid is used as the compound having the first acid dissociation constant of 7 or less, the silicon wafer and the silicon oxide film can be polished similarly to the amino acid. In addition, it can be seen that the tantalum nitride film can be polished at high speed, because the polishing rate of the tantalum nitride film is 400 nm / minute. Thereby, for example, even when a barrier metal layer such as a tantalum nitride film is used for the purpose of suppressing diffusion of copper or improving the adhesion between the copper and the silicon oxide film, the tantalum nitride film can be removed to expose copper.

From the evaluation results of Example 9, the CMP polishing liquid containing ammonium hydroxide as the basic compound can significantly improve the polishing rate of the copper film as compared to the CMP polishing liquid containing only potassium hydroxide (KOH) as the basic compound. It can be seen.

From the evaluation results of Example 10, the CMP polishing liquid containing malic acid as an organic acid having a carboxyl group was capable of polishing the tantalum nitride film at high speed as compared with the CMP polishing liquids of Examples 1 to 6 and 9 containing no organic acid. It can be seen that. Thus, even when a barrier metal layer such as a tantalum nitride film is used, the tantalum nitride film can be removed to expose copper.

In Comparative Example 1, the polishing rate of the silicon wafer is high while the polishing rate of the copper film is low. This is considered to be because polishing of the copper film does not proceed well because the oxidizing agent is not contained in the CMP polishing liquid.

In Comparative Example 2, the polishing rate of the silicon wafer was high, while the polishing rate of the silicon oxide film was slow to 18 nm / minute. This is considered to be because the CMP polishing liquid does not contain ceria particles, so that polishing of the silicon oxide film does not proceed well.

In Comparative Example 3, the polishing rate of the silicon oxide film was good, but similarly to Comparative Example 1, the polishing rate of the copper film was slow because no oxidizing agent was contained in the CMP polishing liquid.

In Comparative Example 4, since the CMP polishing liquid contained 0.37% by mass of potassium hydroxide, the polishing rate of the silicon wafer was good, but the pH of the CMP polishing liquid was very high at 13.2. In such a strong alkali region, depolymerization of silica occurs and the pH and polishing rate of the CMP polishing liquid tend to fluctuate, which is undesirable. Moreover, in the comparative example 4, since the oxidizing agent is not contained in the CMP polishing liquid, the polishing rate of a copper film is slow.

In the comparative example 5, although the polishing rate of a silicon wafer and the polishing rate of a silicon oxide film are high speed, the polishing rate of a copper film is slow compared with Examples 1-10 although CMP polishing liquid contains an oxidizing agent. It is considered that the factor is that the copper film is excessively corroded by 1,2,4-triazole which is an azole known to be a good anticorrosive agent of the copper film, and the polishing does not proceed well.

In Comparative Example 6, the polishing rate of the silicon wafer is high at 970 nm / minute, but the polishing rate of the silicon oxide film is slow at 11 nm / minute, and the polishing rate of the tantalum nitride film is slow at 18 nm / minute.

In Comparative Example 7, the CMP polishing liquid contained 0.37 mass% of potassium hydroxide, but the pH of the CMP polishing liquid was low at 5.2 and deviated from the dissolution region of silicon, so that the polishing rate of the silicon wafer was low at 340 nm / min.

[Polishing Semiconductor Substrates 2]

While polishing the polishing surface of the semiconductor substrate (polishing wafer) on the polishing cloth while supplying the CMP polishing liquid of Example 2 immediately after the mixing to the polishing cloth of the polishing plate, the polishing plate is relatively rotated with respect to the semiconductor substrate. By doing so, the surface to be polished of the semiconductor substrate was polished. The detail of grinding | polishing conditions is as follows.

(Polishing condition 2)

Abrasive wafer: A silicon wafer PT-007 (manufactured by Philtech Co., Ltd.) having completed TSV formation is fixed to a support plate, thinned to approximately 60 µm by backside grinding, and then diced to 2 cm in width and length.

Polishing device: FACT-200 type made of nanofactor

Abrasive cloth: IC1000 (made by Nitta Haas) (Shore D hardness: 59)

Polishing surface rotation speed: 80 rpm

Holder rotation speed: no drive (free rotation)

Polishing pressure: 33.83 ㎪

Polishing liquid supply amount: 16 ml / min

Polishing time: 50 minutes

Fig. 5 shows the surface to be polished after polishing by FE-SEM. It turns out that the silicon oxide film which is an insulating layer is removed by grinding | polishing, and the copper used as an electrode is exposed. Since copper is exposed to the electrode surface, it is thought that it can be used for the connection of the LSI chip laminated | stacked up and down.

6 is a result of measuring the shape of TSV present on the polished surface after polishing by a contact type step meter. TSV of 40 micrometers in diameter was the shape which protruded from the main surface of the semiconductor substrate about 0.08 micrometer, and it was confirmed that the height difference of a semiconductor substrate and TSV is small.

The above-mentioned shape is obtained by polishing using a CMP polishing liquid is considered to have a great effect by the combination of a CMP polishing liquid containing a predetermined component and a relatively hard polishing cloth having a Shore D hardness of 30 to 90.

1: substrate body
1a: surface (one main surface)
1b: back side (other side)
3a, 3b: hollow part
13a, 13b: through hole
7: conductive member
7a, 7b: TSV (through electrode)
300, 400: semiconductor substrate

Claims (14)

An abrasive grain containing ceria particles and silica particles, a compound having a first acid dissociation constant of 7 or less (except for azoles), a basic compound, and a persulfate salt,
CMP polishing liquid whose pH is 9.0-12.0. The method of claim 1,
The CMP polishing liquid according to claim 1, wherein the compound having a first acid dissociation constant of 7 or less contains amino acids. 3. The method of claim 2,
CMP polishing liquid, wherein the amino acid is α-amino acid. The method according to any one of claims 1 to 3,
The CMP polishing liquid in which the compound whose said 1st acid dissociation constant is 7 or less contains the organic acid which has a carboxyl group. The method according to any one of claims 1 to 4,
The CMP polishing liquid wherein the said basic compound contains at least 1 sort (s) chosen from a nitrogen-containing basic compound and an inorganic basic compound. The method of claim 5, wherein
The CMP polishing liquid, wherein the basic compound contains at least one selected from potassium hydroxide, sodium hydroxide, tetramethylammonium hydroxide and ammonium hydroxide. 7. The method according to any one of claims 1 to 6,
CMP polishing liquid whose content of the said basic compound is 0.10 mass% or more. The method according to any one of claims 1 to 7,
CMP polishing liquid, wherein the persulfate contains at least one selected from potassium persulfate and ammonium persulfate. The method according to any one of claims 1 to 8,
The substrate main body of the semiconductor substrate having a substrate body having a hollow portion open to only one main surface and a conductive member to be a through electrode disposed in the hollow portion is polished from the other main surface side, so that the conductive member is the other side. A CMP polishing liquid, which is used to form a penetrating electrode structure by exposing to a main surface side of the same. The method according to any one of claims 1 to 8,
Grinding the substrate body of the semiconductor substrate having a substrate body having a through hole penetrating from one main surface to the other main surface and a through electrode disposed in the through hole from the one main surface side or the other main surface side. Used for, CMP polishing liquid. The said board | substrate main body of the semiconductor substrate provided with the board | substrate main body in which the hollow part opened only one main surface, and the electrically-conductive member which becomes a through electrode arrange | positioned in the said hollow part is described in any one of Claims 1-8. And a polishing step of polishing from the other main surface side using a CMP polishing liquid to expose the conductive member to the other main surface side to form a through electrode structure. The said board | substrate main body of the semiconductor substrate provided with the board | substrate main body in which the through-hole penetrated from one main surface to the other main surface, and the through-electrode arrange | positioned in the said through-hole is described in any one of Claims 1-8. A polishing method of a semiconductor substrate, comprising a polishing step of polishing from the one main surface side or the other main surface side using a CMP polishing liquid. 13. The method according to claim 11 or 12,
And a step of grinding the substrate main body from the main surface side polished in the polishing step before the polishing step. 14. The method according to any one of claims 11 to 13,
In the polishing step, the substrate main body is polished using a polishing cloth having a Shore D hardness of 30 to 90.

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