KR20130124766A - Manufacturing method of semiconductor substrate having defect-free nitride semiconductor for high quality semiconductor device - Google Patents

Abstract

The present invention relates to a manufacturing method of a substrate for a high-quality semiconductor device capable of manufacturing a high-quality semiconductor device with improved inner quantum efficiency and light extraction efficiency by reforming the surface to be have pores and using a template layer to regrow a nitride semiconductor layer having low defect density on the surface in a dry-etching method at HVPE, MOCVD, or CVD device which forms the nitride semiconductor layer on a substrate such as sapphire, injects HCL gas, and makes the same react at high temperatures. [Reference numerals] (S10) Forming template layer;(S20) Porous etching;(S30) Regrowth

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of manufacturing a substrate for a high-quality semiconductor device having a low-defect nitride semiconductor layer,

The present invention relates to a method of manufacturing a substrate for a high-quality semiconductor device, and more particularly, to a method of manufacturing a substrate for a high-quality semiconductor device in which a nitride semiconductor layer is formed on a substrate such as sapphire and then HCL gas is injected thereinto to perform HVPE, MOCVD, quality semiconductor device improved in internal quantum efficiency and light extraction efficiency can be manufactured by using a template layer in which a surface of a nitride semiconductor layer having a low defect density is regrown and a nitride semiconductor layer having a low defect density is re- And a method of manufacturing a substrate.

Recently, group III-V nitride semiconductors such as GaN have been spotlighted as core materials of semiconductor optical devices such as light emitting diodes (LEDs), laser diodes (LDs), and solar cells due to their excellent physical and chemical properties. Ⅲ-Ⅴ nitride semiconductor is made of a semiconductor material having a composition formula of the conventional _{Al x In y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1). The nitride semiconductor optical device is applied as a light source of various products such as a backlight of a mobile phone, a keypad, an electronic signboard, an illumination device, and the like.

In particular, as digital products using LEDs and LDs evolve, there is an increasing demand for nitride semiconductor optical devices having greater brightness and higher reliability. For example, in side view LEDs, which are used as backlights of mobile phones, brighter and thinner LEDs are required due to the slimming trend of mobile phones.

However, a nitride semiconductor template layer such as GaN grown on a sapphire substrate typically has crystal defects such as line defects and surface defects due to lattice mismatch and difference in thermal expansion coefficient between constituent elements, and such crystal defects are nitrides regrown thereon. It also affects the semiconductor layer, which may lower the internal quantum efficiency due to the piezoelectric effect due to the formation of a polarization field, or adversely affect the reliability of the optical device, for example, resistance to electrostatic discharge (ESD). It may also cause current leakage in the device, reducing quantum efficiency and consequently degrading the performance of the optical device.

In order to reduce the effects of such defects, a technique of surface modification of the substrate with a porous wet etching method is known, but such a method does not have a large defect removal effect because the etching depth is not deep or uniformly formed in many etching parts. In addition, the removal process in the crystal growth reactor is processed using a wet etching equipment, there is a problem that the process is complicated and time-consuming.

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above problems and it is an object of the present invention to provide a method of forming a nitride semiconductor layer on a substrate such as a sapphire substrate by using HVPE, MOCVD, (For example, light emitting diodes (LEDs), which are improved in internal quantum efficiency and light extraction efficiency, by using a template layer that is porous and has a low defect density and is regrown on the surface of the nitride semiconductor layer, ), A laser diode (LD), a solar cell, and the like) can be fabricated.

According to another aspect of the present invention, there is provided a method of manufacturing a substrate for forming a semiconductor device on a template layer, comprising: forming a nitride semiconductor layer on a substrate; Forming a nitride semiconductor layer on the surface of the nitride semiconductor layer, forming a template layer on the nitride semiconductor layer by surface-modifying the nitride semiconductor layer, growing the nitride semiconductor layer on the surface of the nitride semiconductor layer, And a dry etching method using an etching gas containing HCl supplied into the reactor.

The nitride semiconductor layer or the regrown nitride semiconductor layer before the surface modification with a porous structure may be formed of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + ) Layer, a non-doped GaN layer, an n-type doped GaN layer, or a p-type doped GaN layer.

The substrate includes a sapphire substrate, an SiC substrate, or an Si substrate.

When the substrate is a sapphire substrate, the nitride semiconductor layer may be formed on the crystal plane C-plane, A-plane, M-plane, or R-plane of the substrate.

The carrier gas may include H ₂ , Ar, N ₂ , or another inert gas, and the gas supply ratio of HCl and NH ₃ contained in the etching gas may be 3000: 1 to 1: 1.

The temperature range for the surface modification may be 600 to 1200 ° C, the time may be 1 to 60 minutes, or the gas pressure in the reactor may be 0.1 to 1.1 (atm).

By the surface modification, an etching pattern having a depth of 10 nm to 10 μm and a diameter of 10 to 1000 nm can be distributed at 10 ⁵ to 10 ¹⁰ (/ cm ² ).

The nitride semiconductor layer regrown on the surface-modified nitride semiconductor layer may be formed to a thickness of 1 to 10 mm.

The semiconductor device includes an electronic device including a light emitting diode, a laser diode, a photodetecting device, or an optical device or a transistor including a solar cell.

The surface modification step and the step of forming the nitride semiconductor layer before and after the surface modification may be performed in an in-situ manner in HVPE, MOCVD, CVD equipment, etc. in which HCL gas is injected and reacted at a high temperature. Only the surface modification step is performed in the HVPE equipment, and the step of forming the nitride semiconductor layer before or after the surface modification may be performed in a metal-organic chemical vapor deposition (MOCVD) or a chemical vapor deposition (CVD) equipment.

According to the method of manufacturing a substrate for a high-quality semiconductor device according to the present invention, a nitride semiconductor layer is formed on a substrate such as sapphire and then HCL gas is injected thereinto to perform HVPE, MOCVD, CVD, ) And a nitride semiconductor layer having a low defect density on the nitride semiconductor layer are grown thereon to improve internal quantum efficiency and light extraction efficiency such as a light emitting diode (LED), a laser diode (LD), and a solar cell Quality semiconductor devices can be manufactured, reliability of semiconductor devices can be enhanced, and performance such as brightness can be improved.

1 is a process diagram for explaining a process of forming a template layer on a substrate according to an embodiment of the present invention.
Figs. 2A and 2B are SEM (Scanning Electron Microscope) photographs of a cross section and a plane of the substrate after the porous etching of Fig.
3 is an atomic force microscopy (AFM) photograph of the plane of the substrate after regrowth in FIG.
FIG. 4 is a view for explaining X-ray diffraction (XRD) measurement results after re-growth in FIG.
5 is a graph for explaining the light emission intensity of the template layer formed using the process of FIG.
6 is a cross-sectional view illustrating a structure of a semiconductor optical device according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout.

1 is a process diagram illustrating a process of forming a template layer on a substrate according to an embodiment of the present invention.

First, a nitride semiconductor (e.g., In _x Al _y Ga _{1 -xy} N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) such as a sapphire substrate, a SiC substrate, A buffer layer 51 and a GaN layer 52 are formed as a template layer (S10). The buffer layer 51 and the GaN layer 52 may be formed by a vacuum deposition method in process equipments such as hydride vapor phase epitaxy (HVPE), metal-organic chemical vapor deposition (MOCVD), and chemical vapor deposition (CVD)

In the case of deposition using MOCVD or CVD, the buffer layer 51 has a composition formula such as In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) The nitride semiconductor layer may be formed to a thickness of 10 to 20000 angstroms at any temperature in the range of 400 to 1100 DEG C and the GaN layer 52 may be formed of a high temperature undoped GaN layer at a high temperature, And may be formed to have a thickness of 10 to 20000 angstroms. At this time, the GaN layer 52 may be a layer of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + y? 1) And may be a p-type doped GaN layer or an n-type doped GaN layer doped with impurities such as Si. Further, at the time of vapor deposition using HVPE, the buffer layer 51 and the GaN layer 52 may be formed to have a thickness of 1 탆 to 100 탆 and a thickness of 10 탆 to 10 탆, respectively, in the above manner.

For example, when a sapphire substrate is used, a template layer made of a polar nitride semiconductor layer may be formed on a crystal plane C-plane (for example, (0001) plane) (For example, (11-20) plane), an M-plane (e.g., (10-10) plane), or an R-plane A template layer made of a non-polar or semi-polar nitride semiconductor layer may be formed on the crystal plane.

Next, the template layer made of the buffer layer 51 and the GaN layer 52 is surface-modified in a porous manner (S20). At this time, it is preferable to carry out surface modification in a porous manner by an in-situ process using HVPE, MOCVD, CVD equipment or the like which injects HCL gas at high temperature for rapid etching, And the buffer layer 51 and the GaN layer 52 may be formed by MOCVD or CVD, and then the surface modification may be performed in a porous manner in the HVPE equipment. At this time, H ₂ , Ar, N ₂ , or another inert gas is supplied as a carrier gas through a gas supply tube into a reactor such as HVPE, MOCVD, or CVD equipment which injects HCl gas and reacts at a high temperature, Lt; RTI ID = 0.0 > HCl. ≪ / RTI > As a result, a reaction material such as GaCl is formed from a portion where crystal dislocations such as line defects and surface defects are present, and the template layer is surface-etched to form various etched surface shapes 53. At this time, NH ₃ gas may be supplied to control the degree of etching together with HCl as an etching gas. Depending on the supply ratio of HCl and NH ₃ , nano holes may be formed as shown in FIGS. 2A and 2B, A nano cone, a nano rod, or the like may be formed. In this case, the temperature range of the reactor for porous surface modification is 600 to 1200 ° C., the time is 1 to 60 minutes, the gas supply ratio of HCl and NH ₃ is 3000: 1 to 1: 1, 1.1 (atm). The surface modification 53 of the nano hole, the nano cone, the nano rod and the like according to the surface modification treatment by the dry etching method has a diameter of 10 to 1000 nm And the distribution thereof may be 10 ⁵ to 10 ¹⁰ (/ cm ² ). In addition, the length of the etch surface form 53 or the resulting hole or void depth may be 10 nm to 10 μm.

When the surface modification process is completed, the nitride semiconductor layer 54 is again formed on the GaN layer 52 that has undergone the surface modification treatment by vacuum deposition of the in-situ process, such as In _x Al _y Ga _{1 -x- y} N (0 1, 0? Y? 1, 0? X + y? 1) is regenerated to complete the template layer (S30). In this case, the In _x Al _y Ga _{1 -x- y} N layer to be regrown may be an undoped undoped GaN layer, but in some cases, it may be a p-type doping doped with an impurity such as Mg or an n-type doping doped with an impurity such as Si Layer. Although it is advantageous in the process of performing the in-situ process in the HVPE, MOCVD, and CVD equipment that injects the HCl gas and reacts at a high temperature when the nitride semiconductor layer 54 is re-grown, the present invention is not limited thereto , The buffer layer 51 and the GaN layer 52 or the nitride semiconductor layer 54 to be regrown may be formed in different manners. For example, only the surface modification step S20 is performed in the HVPE equipment, and the nitride semiconductor layers 51, 52 and 54 are formed before or after the surface modification in the reactor of the MOCVD or CVD equipment.

Such a re-growth process on the GaN layer 52 in the modified surface of the GaN layer is _{In x Al y Ga 1 -xy N} (0≤x≤1, 0≤y≤1, 0≤x + y≤1) layer (54 ) Grows in the pores of the porous etched surface 53 such as a nano hole, a nano cone, a nano rod, or the like, _x Al _y Ga _{1 -x- y} N (0 x 1, 0 y 1, 0 x + y 1) and the GaN layer 52 is grown by the porous etched surface shape 53, The dislocation of the In _x Al _y Ga _{1 -x- y} N layer 54 is prevented from being influenced upward and some defects are folded and the regrown In _x Al _y Ga _{1 -x- y} N layer 54 grows to a certain thickness , It is possible to obtain the nitride semiconductor layer 54 in which the dislocations (TDs) and the basal stacking faults (BSFs) are greatly reduced as shown in FIG. In addition, expansion of such crystal dislocation is prevented by a void, and interlayer lattice mismatching or strain relaxation is caused to improve the crystallization of the regrowth layer. The thickness of the regrown In _x Al _y Ga _{1 -x- y} N layer 54 may be between 1 μm and 10 mm.

In the analysis of AFM (atomic force microscopy) of the regrown nitride semiconductor layer 54 as shown in FIG. 3, the Roughness RMS is 7 nm or less, and thus the crystallization improvement can be confirmed. The results of XRD (X-ray diffraction analysis) measurement of the regrown nitride semiconductor layer 54 were as shown in Fig. As compared with the reference substrate (a structure having only a GaN layer grown to the same thickness without modification of the porous surface) in various plane directions from the top of the substrate to the various in-plane directions of the substrate by tilting the substrate, The full-width half maximum (FWHM) value of the inventive substrate is small. As described above, in the structure of the template layer having the In _x Al _y Ga _{1 -x- y} N layer 54 regrown after the porous surface modification as in the present invention, in the structure having only the GaN layer grown to the same thickness without modification of the porous surface The measured FWHM is much smaller, indicating that the crystallinity is high in the structure in which the GaN layer is regrowthed after the porous surface modification.

5 is a graph for explaining the light emission intensity of the template layer formed using the process of FIG. In the case of the template layer subjected to the surface modification treatment as in the present invention, the luminescence intensity (PL (luminescence) Intensity) was found to be higher than that of the reference without porous surface modification by 5 times or more at the visible light wavelength Respectively.

Such an effect can be obtained by forming a sapphire substrate having a crystal plane A-plane (for example, (11-20) plane), M-plane (for example, (10-10) plane) , (1-102) plane), it is confirmed that the degree of crystallization is further improved by the surface modification because more defects are distributed in the template layer. That is, for example, when a sapphire substrate is used, compared with the case of forming a template layer composed of a polar nitride semiconductor layer on a crystal plane C-plane (for example, (0001) plane) (E.g., (10-20) plane), an R-plane (e.g., (1-102) plane), an A-plane The nitride semiconductor layer 54 is formed by further reducing the influence of the dislocations TDs and the stacking faults BSFs by the surface modification treatment as described above, The template layer formed can be obtained.

As described above, various semiconductor device structures may be formed on the template layer having the nitride semiconductor layer formed on the substrate, thereby improving reliability of the semiconductor device and improving performance such as brightness. For example, in order to form a semiconductor electronic device such as a general diode or a transistor in addition to a nitride semiconductor optical device such as a light emitting diode, a laser diode, a photo detector, or a solar cell, A template layer having a semiconductor layer can be used.

6, a structure in which a light emitting diode (LED) layer 130 is formed on a template layer 120 having a nitride semiconductor layer formed on the substrate 110 will be described as an embodiment.

As illustrated in FIG. 6, a semiconductor optical device 100 according to an embodiment of the present invention may include a sapphire substrate 110, a template layer 120 formed thereon, and a light emitting diode (LED) layer 130. Include.

For example, the sapphire substrate 110 and the template layer 120 formed thereon are as described in FIG. 1, and when a light emitting diode (LED) layer 130 is formed on the template layer 120 The light emitting diode (LED) layer 130 may have a structure including the active layers 132 and 133 between the n-type nitride semiconductor layer 131 and the p-type nitride semiconductor layer 134, as shown in FIG.

The n-type nitride semiconductor layer 131 may be formed by growing a GaN layer doped with impurities such as Si to a thickness of about 2 micrometers.

An active layer (132, 133) is a GaN barrier layer (7.5-nm or so) and In _{0 .15} Ga _{0 .85} N quantum well layer (2.5 nm) several times (e.g., five times), repeat to form It may include: (electron blocking layer EBL) (133) MQW (multi quantum well) layer 132 and the Al _{0 .12} Ga _{0 .88} N layer (about 20 nm), an electron blocking layer made of.

The InGaN quantum well layer and the GaN barrier layer of the MQW layer 132 may both be doped with an Si dopant concentration of about 1 * 10 ¹⁹ and the electron blocking layer 133 may be doped with an Mg dopant concentration of about 5 * 10 ¹⁹ have. On the InGaN quantum well layer is heard, but an example layer In _{0 .15} Ga _{0 .85} N, not limited to this, as shown in the _{In x Ga 1 -x N (0} <x <1), the ratio of In and Ga and alternatively may be, also, an electron blocking layer 133 is Al _{0 .12} Ga _{0 .88} N layer for, but not limited thereto heard Al _x Ga _{1 -} and _{x N (0 <x <1} ) Likewise, the ratio of Al to Ga may be different. The InGaN quantum well layer and the GaN barrier layer of the MQW layer 132 may be doped with at least one of O, S, C, Ge, Zn, Cd, and Mg in addition to Si as described above.

The p-type nitride semiconductor layer 134 may be formed by growing a GaN layer Mg-doped (Mg dopant concentration of about 5 * 10 ¹⁹ ) to a thickness of about 100 nanometers.

Electrodes 141 and 142 for applying power may be formed on the n-type nitride semiconductor layer 131 and the p-type nitride semiconductor layer 134, respectively. It can be mounted to function as an individual optical device.

As described above, the light emitting diode (LED) layer 130 is not formed on the template layer 120 as shown in FIG. 6, and other semiconductor optical device structures such as a laser diode, a photodetector, or a solar cell, Alternatively, other semiconductor electronic devices such as transistors may be formed. By the use of the template layer 120 formed as shown in FIG. 1, the piezo-electric effect can be suppressed to improve the recombination rate of electrons and holes and improve the quantum efficiency It is possible to contribute to the improvement of the brightness and the like of the device.

As described above, the present invention has been described by way of limited embodiments and drawings, but the present invention is not limited to the above embodiments, and those skilled in the art to which the present invention pertains various modifications and variations from such descriptions. This is possible. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the equivalents of the claims, as well as the claims.

Claims (11)

A method of manufacturing a substrate for forming a semiconductor element on a template layer,
Forming a nitride semiconductor layer on the substrate,
After the surface of the nitride semiconductor layer is modified to be porous,
A nitride semiconductor layer is grown on the surface-modified nitride semiconductor layer to form a template layer,
The surface modification is a method of manufacturing a substrate for a semiconductor device, characterized in that the dry etching method by the etching gas containing HCl supplied into the reactor in a predetermined carrier gas atmosphere supplied into the reactor of the process equipment. The method of claim 1,
The nitride semiconductor layer or the regrown nitride semiconductor layer before the surface modification with a porous structure may be formed of In _x Al _y Ga _{1 -x- y} N (0? X? 1, 0? _Y? 1, 0? _X + ) Layer, a non-doped GaN layer, an n-type doped GaN layer, or a p-type doped GaN layer. The method of claim 1,
The substrate comprises a sapphire substrate, a SiC substrate, or a Si substrate manufacturing method for a semiconductor device substrate, characterized in that. The method of claim 1,
Wherein when the substrate is a sapphire substrate, the nitride semiconductor layer is formed on the crystal plane C-plane, A-plane, M-plane, or R-plane of the substrate. The method of claim 1,
The carrier gas comprises H ₂ , Ar, N ₂ , or other inert gas,
Wherein a gas supply ratio of HCl and NH ₃ contained in the etching gas is 3000: 1 to 1: 1. The method of claim 1,
Wherein a temperature range for the surface modification is 600 to 1200 占 폚 for 1 to 60 minutes or a gas pressure in the reactor is 0.1 to 1.1 atm. The method of claim 1,
Wherein the surface of the semiconductor substrate has a depth of 10 nm to 10 탆 and an etch pattern of 10 to 1000 nm in diameter distributed at 10 ⁵ to 10 ¹⁰ (/ cm ² ). The method of claim 1,
Wherein the nitride semiconductor layer regrown on the surface-modified nitride semiconductor layer is formed to a thickness of 1 to 10 mm. The method of claim 1,
The semiconductor device includes a light emitting diode, a laser diode, a photodetecting device, or an electronic device including an optical device including a solar cell or a transistor. The method of claim 1,
The surface modification step and the step of forming the nitride semiconductor layer before and after the surface modification are both performed in a hydride vapor phase epitaxy (HVPE), a metal-organic chemical vapor deposition (MOCVD) or a chemical vapor deposition (CVD) situ method. &lt; / RTI &gt; The method of claim 1,
Wherein only the surface modification step is performed in the HVPE equipment, and the step of forming the nitride semiconductor layer before or after the surface modification is performed in an MOCVD (Chemical-Organic Chemical Vapor Deposition) or CVD (Chemical Vapor Deposition) / RTI &gt;

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