KR20130109743A - Light emitting diode package and fabrication method for the same - Google Patents

Abstract

PURPOSE: A light emitting diode package and a manufacturing method thereof improve light output efficiency by electrically connecting a bump and a bonding pad using an adhesive layer having conductive particles. CONSTITUTION: A package substrate (21) includes a bonding pad (23a, 23c). A light emitting diode chip (10) includes a bump (17a, 17b) disposed toward the bonding pad. An adhesive layer (30) is disposed between the bonding pad and the bump. The adhesive layer includes insulating resin (33) and conductive particles (35) connected to the bonding pad and the bump. A passivation layer (40) is disposed on the light emitting chip.

Description

Light Emitting Diode Package and Fabrication Method for the Same

The present invention relates to a semiconductor package, and more particularly, to a light emitting diode package.

The light emitting diode is an element including an n-type semiconductor layer, a p-type semiconductor layer, and an active layer located between the n-type and p-type semiconductor layers. When a forward electric field is applied to the n-type and p-type electrodes respectively connected to the n-type and p-type semiconductor layers, electrons and holes are injected into the active layer, and holes and electrons injected into the active layer are recombined, Release.

In manufacturing such a package of light emitting diodes, the n-type and p-type electrodes are electrically connected to the bonding pads of the package substrate, using wire bonding in general. However, it is known that the light emitted from the light emitting diodes can be reflected back to the inside by the wires, so that the light output efficiency is lowered due to the wires. In addition, there is a risk that the wire is broken by an external impact.

The problem to be solved by the present invention is to provide a light emitting diode package having a high light output efficiency and strong against external impact and a manufacturing method thereof.

One aspect of the present invention to achieve the above object provides a light emitting diode package. The light emitting diode package has a package substrate having bonding pads. A light emitting diode chip having a bump positioned toward the bonding pad is disposed on the package substrate. An adhesive layer is positioned between the bonding pad and the bump, and the adhesive layer includes conductive particles connected to the bonding pad and the bump. The adhesive layer may further include an insulating resin, and the conductive particles may be located in the insulating resin.

An encapsulation layer may be positioned on the light emitting diode chip. Phosphors may be dispersed in the encapsulation layer.

The light emitting diode chip may include a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on an upper surface of the device substrate. The bump may be connected to any one of the semiconductor layers. The light emitting diode chip may further include a mesa etching region exposing the first semiconductor layer, and the bump may include a first bump connected to the first semiconductor layer and a second bump connected to the second semiconductor layer. can do. The bonding pad may include a first bonding pad connected to the first bump and a second bonding pad connected to the second bump. A substrate concave-convex structure may be formed in the lower surface of the device substrate. A phosphor layer may be conformally formed on the substrate uneven structure. A reflective layer may be positioned on the first semiconductor layer and the second semiconductor layer.

The bonding pad may have a pad uneven structure in an upper surface thereof. The distance between the convex portions of the pad uneven structure may be equal to or larger than the diameter of the conductive particles.

Another aspect of the present invention to achieve the above object provides a light emitting diode package manufacturing method. The light emitting diode package manufacturing method includes providing a package substrate having a bonding pad. The adhesive bond layer provided with electroconductive particle is arrange | positioned on the said bonding pad. A light emitting diode chip having a bump positioned toward the bonding pad is disposed on the adhesive layer. Pressing the light emitting diode chip, the conductive particles electrically connect the bump and the bonding pad.

According to the present invention, by electrically connecting the bumps and the bonding pads using an adhesive layer having conductive particles, the use of the bonding wires can be reduced or omitted, and the light output efficiency can be improved. In addition, the adhesive layer may adhere and fix the light emitting diode chip on the package substrate, thereby preventing the electrical connection from being broken by an external impact.

When the pad uneven structure is formed in the upper surface of the bonding pad, the contact area between the conductive particles and the bonding pad may be increased. Thus, the electrical connection between the bump and the bonding pad can be strengthened. In addition, since the contact area between the insulating resin and the bonding pad can also be increased, the adhesion can also be improved.

When the reflective layer is positioned on the first semiconductor layer and the second semiconductor layer, the light traveling from the active layer to the reflective layer may be reflected by the reflective layer and extracted to the outside. In addition, when the substrate concave-convex structure is formed in the lower surface of the device substrate can improve the light extraction efficiency through the device substrate. In addition, when the phosphor layer is conformally coated on the substrate concave-convex structure, the light emitted through the device substrate may travel about the same distance in the phosphor layer, and thus travel different distances in the phosphor layer. Compared to the case, the color deviation may be reduced.

1A to 1C are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.
2 is a cross-sectional view showing a light emitting diode according to another embodiment of the present invention.
3 is a cross-sectional view showing a light emitting diode according to another embodiment of the present invention.
4 is a cross-sectional view showing a light emitting diode according to another embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms.

Where a layer is referred to herein as "on" another layer or substrate, it may be formed directly on the other layer or substrate, or a third layer may be interposed therebetween. In the present specification, directional expressions of the upper side, the upper side, the upper side, and the like can be understood as meaning lower, lower (lower), lower, and the like. That is, the expression of the spatial direction should be understood in a relative direction, and it should not be construed as definitively as an absolute direction. In addition, in this specification, "first" or "second" should not be construed as limiting the elements, but merely as terms for distinguishing the elements.

Further, in the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like reference numerals designate like elements throughout the specification.

1A to 1C are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 1A, a package substrate 21 having a device region and a peripheral region is provided. The package substrate 21 may be a silicon substrate, a metal substrate, a ceramic substrate, or a resin substrate. When the package substrate 21 itself has conductivity, an insulating film may be coated on the outer surface of the package substrate 21. The device region may be a region in which the LED chip described below is mounted, and the peripheral region may be another region.

The first bonding pad 23a and the second bonding pad 23c may be disposed on the device region of the package substrate 21. External connection terminals (not shown) connected to the bonding pads 23a and 23c may be disposed outside the package substrate 21, respectively. The bonding pads 23a and 23c and the external connection terminals may be provided in the lead frame. The bonding pads 23a and 23c may be copper, nickel, or iron pads.

The heat sink 27 may be disposed on the bottom surface of the package substrate 21. The heat sink 27 may be made of metal.

The housing 25 having the cavity 25a may be disposed on the peripheral area of the package substrate 21. Portions of the bonding pads 23a and 23c may be exposed in the cavity 25a. The housing 25 may be formed of silicon, metal, ceramic, or resin. When the housing 25 itself has conductivity, an insulating film may be coated on the outer surface of the housing 25. In addition, the housing 25 may be formed by a molding method, or may be formed by a method of forming a housing layer on the package substrate 21 and then patterning the housing layer.

The package substrate 21 and the housing 25 may be integrally separated from each other. In this case, the package substrate 21 and the housing 25 may be integrally injection molded with the bonding pads 23a and 23c interposed therebetween.

A mask layer 24 may be disposed on the bonding pads 23a and 23c and may have an opening that exposes an upper portion of the bonding pads 23a and 23c. Pad uneven structures R may be formed in upper surfaces of the bonding pads 23a and 23c exposed by the mask layer 24.

The adhesive layer 30 is formed on the bonding pads 23a and 23c exposed in the cavity 25a. The adhesive layer 30 may include an insulating resin 33 and conductive particles 35 dispersed in the insulating resin 33. A coupling agent (not shown) may be coated on the outer surface of the conductive particles 35. In this case, the conductive particles 35 may be uniformly dispersed in the insulating resin 33 and precipitation may be prevented. The conductive particles 35 may be nickel, gold, or silver particles, and the diameter may be 1 to 10 μm, for example, 3 to 5 μm. The insulating resin 33 may be a thermosetting or thermoplastic resin, for example an epoxy resin. The adhesive layer 30 may be formed by placing an adhesive in the form of a film on the bonding pads 23a and 23c. Alternatively, the adhesive in the form of a paste may be used by dispensing the bonding pads 23a, It may be located on 23c).

Referring to FIG. 1B, a light emitting diode chip 10 is provided. The light emitting diode chip 10 includes a device substrate 11. The device substrate 11 includes sapphire (Al 2 O 3), silicon carbide (SiC), gallium nitride (GaN), indium gallium nitride (InGaN), aluminum gallium nitride (AlGaN), aluminum nitride (AlN), gallium oxide (Ga 2 O 3), Or a silicon substrate. Specifically, the device substrate 11 may be a sapphire substrate. A substrate uneven structure 11a may be formed in the lower surface of the device substrate 11 to improve light extraction efficiency through the device substrate 11.

The first semiconductor layer 13a, the active layer 13b, and the second semiconductor layer 13c may be disposed on the upper surface of the device substrate 11. A portion of the first semiconductor layer 13a may be exposed in the mesa etching region. The first semiconductor layer 13a may be a nitride based semiconductor layer and may be a layer doped with an n-type dopant. As an example, the first semiconductor layer 13a may have Si as an n-type dopant in an In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1) layer. It may be a doped layer. Specifically, the first semiconductor layer 13a may be a GaN layer doped with Si. The active layer 13b may be an In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) layer, and may have a single quantum well structure or a multi quantum well structure ( multi-quantum wells (MQW). As an example, the active layer 13b may have a single quantum well structure having an InGaN layer or an AlGaN layer, or a multi-quantum well structure having a multilayer structure of InGaN / GaN, AlGaN / (In) GaN, or InAlGaN / (In) GaN. Can be. The wavelength emitted from the active layer 13b may be adjusted by adjusting the composition of In or Al in the active layer 13b. Specifically, visible light, ultraviolet light, or infrared light may be emitted from the active layer 13b, and the visible light may be blue, green, yellow, or red. The second semiconductor layer 13c may also be a nitride-based semiconductor layer or a layer doped with a p-type dopant. As an example, the second semiconductor layer 13c may be a p-type dopant in an In _x Al _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) layer. It may be a layer doped with Mg or Zn. Specifically, the second semiconductor layer 13c may be a GaN layer doped with Mg.

The reflective layer 15 may be formed on the first semiconductor layer 13a and the second semiconductor layer 13c exposed in the mesa etching region. In this case, the light propagated from the active layer 13b to the reflective layer 15 may be reflected by the reflective layer 15 and extracted to the outside. The reflective layer 15 may be a reflective insulating film or a reflective metal film. The reflective insulating layer may be a distributed bragg reflector (DBR), in which a pair of insulating layers having different refractive indices are alternately stacked. The refractive index and the optical thickness of each of the insulating layers constituting the DBR may be adjusted to effectively reflect the light emitted from the active layer 13b. The insulating layers constituting the DBR include SiO ₂ (n = 1.4), Al ₂ O ₃ (n = 1.6), SiN _x (0.5 <x <1.8, n = 2.05 to 2.25), and TiO ₂ (n = 2.1). It may be a pair of insulating films selected from the group consisting of. The reflective metal film may be a silver or aluminum film having high reflectivity. As such, when the reflective layer 15 is a reflective metal film, current spreading may also be improved due to the conductivity of the metal film.

The first bump 17a and the second bump 17c may be connected to the first semiconductor layer 13a and the second semiconductor layer 13c, respectively. Top surfaces of the first bump 17a and the second bump 17c may have substantially the same level.

Referring to FIG. 1C, the light emitting diode chip 10 may face the bonding pads 23a and 23c exposed in the mask 24 on the adhesive layer 30. Flip to place. Thereafter, the light emitting diode chip 10 is pressed to allow the bumps 17a and 17c to be electrically connected to the bonding pads 23a and 23c. Specifically, some of the conductive particles 35 in the adhesive layer 30 may be disposed between the bumps 17a and 17c and the bonding pads 23a and 23c so as to be connected to the bumps 17a and 17c. The bonding pads 23a and 23c are electrically connected to each other. Meanwhile, in other regions of the adhesive layer 30, the conductive particles 35 may be uniformly dispersed in the insulating resin 33 without being connected to each other, thereby indicating insulation. Heat may be applied in the process of pressing the light emitting diode chip 10. In this case, the adhesive layer 30 may specifically fix the light emitting diode chip 10 while the insulating resin 33 is cured. .

As such, the bumps 17a and 17c and the bonding pads 23a and 23c are electrically connected by using the adhesive layer 30 having the conductive particles 35 to thereby reduce or eliminate the use of bonding wires. It can be expected to improve the light output efficiency. In addition, the adhesive layer 30 may adhere and fix the light emitting diode chip 10 to the package substrate 21, thereby preventing the electrical connection from being broken by an external impact.

In the case where the pad uneven structure R is formed in the upper surfaces of the bonding pads 23a and 23c, the contact area between the conductive particles 35 and the bonding pads 23a and 23c may be increased. The electrical connection between the bumps 17a and 17c and the bonding pads 23a and 23c may be strengthened. To this end, the distance between the convex portions of the pad uneven structure R may be equal to or larger than the diameter of the conductive particles 35. In addition, since the contact area between the insulating resin 33 and the bonding pads 23a and 23c can also be increased, adhesiveness can also be improved.

Thereafter, an encapsulation layer 40 may be formed on the light emitting diode chip 10. Forming the encapsulation layer 40 may include doping the encapsulating fluid using a printing method or a dispensing method, and then curing the doped encapsulation fluid. The encapsulation fluid may fill the cavity 25a. The encapsulating fluid may be a light transmissive resin, for example, the light transmissive resin may be a silicone resin or an epoxy resin.

The encapsulation fluid, that is, the encapsulation layer 40 may further include phosphor (P). As a result, the white light may be realized by converting the light generated from the light emitting diode chip 10 into light having a lower wavelength. For example, when the light emitting diode chip 10 is a device for generating ultraviolet rays, a white device may be implemented by including a red phosphor, a green phosphor, and a blue phosphor in the encapsulation layer 40, and the light emitting diode chip When 10 is a device generating blue color, a white device may be realized by providing a yellow phosphor in the encapsulation layer 40.

In the above description, a method of manufacturing a flip chip type light emitting diode package has been described, but the present invention is not limited thereto, and one side bump of the vertical light emitting diode is electrically connected to the bonding pad of the package substrate by the adhesive layer described above, and the other side thereof. Bumps can also be connected using wires. However, even in this case, the wire process on one side may be omitted, so that both sides may increase light emission efficiency and may be stronger against external impact than when the wire process is used.

2 is a cross-sectional view showing a light emitting diode package according to another embodiment of the present invention. The light emitting diode package according to the present embodiment is similar to the light emitting diode package described with reference to FIGS. 1A to 1C except as described below.

Referring to FIG. 2, the phosphor layer PL may be formed on the substrate uneven structure 11a. The phosphor layer PL may be conformally coated on the substrate uneven structure 11a. In this case, the light emitted through the substrate 11 may travel substantially the same distance in the phosphor layer PL, so that the color deviation may be reduced as compared with the case where the other distance is traveled in the phosphor layer. Since the phosphor layer PL is formed on the substrate uneven structure 11a, the encapsulation layer 40 may not include additional phosphor.

3 is a cross-sectional view showing a light emitting diode package according to another embodiment of the present invention. The light emitting diode package according to the present embodiment is similar to the light emitting diode package described with reference to FIGS. 1A to 1C except as described below.

Referring to FIG. 3, an encapsulation layer 40 may be formed. To this end, it may be omitted to form the housing (25 of Figure 1a). Forming the encapsulation layer 40 may include doping the encapsulating fluid using a printing method or a dispensing method, and then curing the doped encapsulation fluid. The encapsulation fluid, that is, the encapsulation layer 40 may further include phosphor (P).

4 is a cross-sectional view showing a light emitting diode package according to another embodiment of the present invention. The light emitting diode package according to the present embodiment is similar to the light emitting diode package described with reference to FIGS. 1A to 1C except as described below.

Referring to FIG. 4, the package substrate 21 may be a printed circuit board. In addition, a plurality of light emitting diode chips 10 may be mounted on the package substrate 21 using the method described with reference to FIG. 1C. The plurality of light emitting diode chips 10 may be connected in series and / or in parallel by wires (not shown) printed in the package substrate 21. After mounting the light emitting diode chips 10, the sidewall 60 is disposed on a peripheral area of the region where the light emitting diode chips 10 are mounted, and then an encapsulation layer 40 is formed on the light emitting diode chips 10. ) Can be formed. Forming the encapsulation layer 40 may include doping the encapsulating fluid using a printing method or a dispensing method, and then curing the doped encapsulation fluid. The encapsulation fluid may fill an area defined by the sidewall 60. The encapsulation fluid, that is, the encapsulation layer 40 may further include phosphor (P).

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, This is possible.

21: package substrate 23a, 23c: bonding pad
24: mask layer 27: heat sink
10: light emitting diode chip 11: element substrate
13a: first semiconductor layer 13b: active layer
13c: second semiconductor layer 15: reflective layer
17a, 17c: bump 25: housing
40: sealing layer P: phosphor
30: adhesive layer 33: insulating resin
35: conductive particles

Claims (22)

A package substrate having a bonding pad;
A light emitting diode chip having bumps disposed toward the bonding pads; And
A light emitting diode package disposed between the bonding pad and the bump and including an adhesive layer having conductive particles connected to the bonding pad and the bump. The method of claim 1,
The adhesive layer further includes an insulating resin, wherein the conductive particles are located in the insulating resin light emitting diode package. The method of claim 1,
A light emitting diode package further comprising an encapsulation layer on the light emitting diode chip. The method of claim 3,
The LED package further comprises a phosphor dispersed in the encapsulation layer. The method of claim 1,
The light emitting diode chip includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on an upper surface of the device substrate.
The bump is connected to any one of the semiconductor layer light emitting diode package. The method of claim 5,
The light emitting diode chip has a mesa etching region exposing the first semiconductor layer,
The bump includes a first bump connected to the first semiconductor layer and a second bump connected to the second semiconductor layer,
The bonding pad includes a first bonding pad connected to the first bump and a second bonding pad connected to the second bump. The method according to claim 6,
A light emitting diode package having a substrate uneven structure formed in a lower surface of the device substrate. The method of claim 7, wherein
A light emitting diode package further comprising a phosphor layer conformally formed on the substrate uneven structure. The method according to claim 6,
The light emitting diode package of claim 1, further comprising a reflective layer on the first semiconductor layer and the second semiconductor layer. The method of claim 1,
The bonding pad is a light emitting diode package having a pad uneven structure in the upper surface thereof. The method of claim 10,
The light emitting diode package of claim 1, wherein the distance between the convex portions of the pad uneven structure is greater than or equal to the diameter of the conductive particles. Providing a package substrate having a bonding pad,
An adhesive bond layer provided with electroconductive particle is arrange | positioned on the said bonding pad,
Arranging a light emitting diode chip having a bump located toward the bonding pad on the adhesive layer;
And pressing the light emitting diode chip so that the conductive particles electrically connect the bump and the bonding pad. The method of claim 12,
The adhesive layer further comprises an insulating resin, wherein the conductive particles are located in the insulating resin light emitting diode package manufacturing method. The method of claim 12,
The method of manufacturing a light emitting diode package further comprising forming an encapsulation layer on the light emitting diode chip. 15. The method of claim 14,
The encapsulation layer is a light emitting diode package manufacturing method comprising a phosphor dispersed therein. The method of claim 12,
The light emitting diode chip includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked on an upper surface of the device substrate.
The bump is connected to any one of the semiconductor layer manufacturing method of the light emitting diode package. 17. The method of claim 16,
The light emitting diode chip has a mesa etching region exposing the first semiconductor layer,
The bump includes a first bump connected to the first semiconductor layer and a second bump connected to the second semiconductor layer,
The bonding pad includes a first bonding pad connected to the first bump and a second bonding pad connected to the second bump. 18. The method of claim 17,
A light emitting diode package manufacturing method having a substrate uneven structure formed in a lower surface of the device substrate. 19. The method of claim 18,
A method of manufacturing a light emitting diode package further comprising conformally forming a phosphor layer on the substrate uneven structure. 18. The method of claim 17,
The light emitting diode chip manufacturing method of a light emitting diode package further comprises a reflective layer located on the first semiconductor layer and the second semiconductor layer. The method of claim 12,
The bonding pad is a light emitting diode package manufacturing method having a pad concave-convex structure in the upper surface thereof. The method of claim 21,
The method of manufacturing a light emitting diode package having a distance between the convex portions of the pad uneven structure is greater than or equal to the diameter of the conductive particles.

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