KR20130086565A - Method for forming capacitor - Google Patents

Abstract

PURPOSE: A method for manufacturing a capacitor is provided to implement a high selectivity with silicon nitride by etching a silicon layer made of polysilicon or amorphous silicon at high speed. CONSTITUTION: An aqueous solution is applied to a silicon layer over 60 degrees centigrade. The aqueous solution includes quaternary alkyl ammonium hydroxide and silicon. The silicon layer is etched to retain a bottom electrode (50). The concentration of the quaternary alkyl ammonium hydroxide is between 7 wt% and 25 wt%. The kind of the quaternary alkyl ammonium hydroxide included in the aqueous solution is one.

Description

Capacitor Formation Method {METHOD FOR FORMING CAPACITOR}

The present invention relates to a method of forming a capacitor.

Conventionally, a concave type has been adopted as a capacitor structure of DRAM. In this structure, the lower electrode film is formed in the cylinder bore, and only the inner surface thereof functions as an electrode. According to this, although the area which a capacitor occupies can be made small certainly, the diameter of a cylinder hole also inevitably reduces. On the other hand, the capacity required for DRAM device operation must be secured. In order to satisfy both of them, the depth of the cylinder hole has become deeper, and it has become difficult to cope with the microfabrication technique.

It is not easy to form a fine cylinder structure constituting a capacitor or to form a hole by precisely processing it. Normally, this processing is performed by wet etching. That is, the internal and external members must be removed so that a normal structure having a cylinder wall with a depth of nanometer to submicrometer size is left on the semiconductor substrate by the etching solution. In particular, the removal of the member in the cylinder hole or between the cylinder structures involves a difficulty as processing performed by wet etching to remove the material from the enclosed space.

Japanese Patent Application Laid-Open No. 2006-351813 Japanese Patent Application Laid-Open No. 2006-054363

There is an example in which an alkali compound is mainly used as an etching solution for single crystal silicon (see Patent Documents 1 and 2, etc.). However, there are few research examples on the removability of polycrystalline silicon films or amorphous silicon films, and new research and development have been desired.

In particular, in the formation of the above-mentioned capacitor, it is necessary to remove the sacrificial film around the member so that the member made of silicon nitride (SiN) remains, and thus the selectivity with respect to etching is indispensable. The present inventors have focused on achieving both the speed and selectivity of etching in capacitor formation when polycrystalline silicon or amorphous silicon, which has not been elucidated as described above, is used as the sacrificial film. Thus, the present invention provides a method for forming a capacitor which realizes good selectivity with silicon nitride (SiN) by etching a silicon film made of polycrystalline silicon or amorphous silicon at high speed without using an alkali metal that affects a semiconductor element. The purpose.

The above problem has been solved by the following means.

(1) A method of forming a capacitor having a modeled lower electrode, wherein the quaternary alkylammonium hydroxide and silicon are 20 ppm in their ion concentration in etching a silicon film made of polycrystalline silicon or amorphous silicon in the vicinity thereof so that the lower electrode remains. A method for forming a capacitor, wherein the silicon film is etched by applying an aqueous solution containing above to the silicon film under a condition of 60 ° C. or higher.

(2) The method for forming a capacitor according to (1), wherein the concentration of the quaternary alkylammonium hydroxide is 7% by mass or more and 25% by mass or less.

(3) The method for forming a capacitor according to (1) or (2), wherein the quaternary alkylammonium hydroxide contained in the aqueous solution is only one kind.

(4) The capacitor forming method according to any one of (1) to (3), wherein the lower electrode comprises a Ti compound, and selectively etches the silicon film portion with respect to the Ti compound.

(5) The capacitor forming method according to any one of (1) to (4), wherein the application of the aqueous solution to the silicon film is performed in an inert atmosphere.

(6) The capacitor forming method according to any one of (1) to (5), wherein an uneven shape required for the lower electrode is formed by removing part or all of the silicon film.

(7) The capacitor forming method according to (6), wherein an uneven shape has a cylinder structure having an aspect ratio (depth / opening width) of 15 to 100.

(8) The capacitor forming method according to any one of (1) to (7), wherein the silicon film is a film in which a polycrystalline silicon film, an amorphous silicon film, or both thereof is laminated.

(9) The method of forming a capacitor according to any one of (1) to (8), wherein the silicon film is formed by laminating an amorphous silicon film.

(10) The method for forming a capacitor according to (1), wherein the aqueous solution is applied under a condition of 80 ° C or higher.

(11) A method of manufacturing a capacitor having a modeled lower electrode, comprising: preparing a semiconductor substrate having a modeled conductive film and a silicon sacrificial film made of polycrystalline silicon or amorphous silicon in the vicinity thereof;

Preparing an aqueous solution containing at least 20 ppm of a quaternary alkylammonium hydroxide and silicon at its ion concentration, and

And applying the aqueous solution to the silicon sacrificial layer to etch the remaining conductive layer to form a lower electrode of the capacitor.

(12) The method according to any one of (1) to (11), wherein the hydroxylamine compound is not included in the aqueous solution.

(13) The method according to any one of (1) to (11), wherein the ion concentration of the silicon is quantified by ICP-MS.

(14) A method for producing a semiconductor substrate product, which is produced through the capacitor forming method described in (12).

According to the method for forming the capacitor of the present invention, the etching of a silicon film made of amorphous silicon or polycrystalline silicon can be performed quickly and accurately at high speed without using an etching liquid containing an alkali metal as an essential component, which may be deteriorated in performance of a semiconductor device. Can be implemented by implementing the selectivity. In addition, the high-speed etching that realizes the above-mentioned high quality can be achieved with an extremely simple configuration, and has the advantage that it is particularly suitable for forming the lower electrode on which the capacitor stands.

BRIEF DESCRIPTION OF THE DRAWINGS It is sectional drawing which shows typically the manufacturing process example of the capacitor structure applied to this invention.
It is sectional drawing which shows typically the example of the manufacturing process of the capacitor structure applied to this invention (continuation of FIG. 1).
3 is a cross-sectional view schematically showing an example of the manufacturing process of the capacitor structure applied to the present invention (continued in FIG. 2).
It is sectional drawing which shows typically the example of the manufacturing process of the capacitor structure applied to this invention (continuation of FIG. 3).
5 is a cross-sectional view schematically showing another example of a capacitor structure applied to the present invention.
6 is a cross-sectional view schematically showing another example of the manufacturing process of the capacitor structure applied to the present invention.
FIG. 7 is a cross-sectional view taken along the line VII-VII shown in FIG. 6. FIG.
8 is a device configuration diagram showing a part of a removal device according to a preferred embodiment of the present invention.

[Formation of Capacitor Structure]

First, before describing the etching liquid by this invention, the manufacture example of the capacitor structure which can be suitably employ | adopted in this invention is demonstrated based on attached drawing. In addition, although the following detailed description mainly explains formation of the capacitor structure which is a preferable application object of the etching method of this invention, this invention is limited to this and is not interpreted.

(Step a)

In the manufacturing example of this embodiment, the 1st shaping | molding film 1 and the 2nd shaping film (sacrifice film) 2 are formed on the silicon wafer 3. The 1st molded film 1 is an etching stopper film | membrane at the time of opening of a cylinder hole, and is a film | membrane which has an etching rate ratio in the 2nd molded film 2 and an anisotropic dry etching process. The sacrificial film 2 may have a multilayer structure formed by laminating stepwise. Forming by laminating stepwise means forming by laminating | stacking the some layer from which the material of a sacrificial film, an etching rate, etc. differ. As the 1st molded film 1, the nitride film formed by the LP-CVD (Low-Pressure Chemical Vapor Deposition) process, etc. are mentioned, for example. In this embodiment, silicon nitride (SiN) is applied as this first molded film, and selective etching of the second molded film 2 is required.

In addition, in this embodiment, the 2nd shaping | molding film 2 employ | adopts a polycrystalline silicon or an amorphous silicon film. Although not shown, a protective film may be provided.

In addition, although the silicon wafer 3 is greatly simplified and shown as a single | mono layer, normally, the predetermined circuit structure is formed here. For example, those using a separation insulating film, a gate oxide film, a gate electrode, a diffusion layer region, a polysilicon plug, a silicon oxide film, a silicon nitride film, a bit line, a metal plug, a nitride film, a plasma oxide film, a BPSG film, and the like can be mentioned. For example, refer to the said patent document 1). In addition, although not hatching in particular in FIGS. 1-6, the cross section of each member is shown.

(Step b)

Next, the photoresist 4 is patterned using a photolithography step and then opened by anisotropic dry etching (concave portion Ka). As for the photoresist 4 and the method of dry etching at this time, a normal one or a method applied to the kind of product may be applied.

(Step c), (step d)

Further, after the opening, embedding for protecting the conductive film 5 and the conductive film 5 made of TiN along the wall surface Wa of the recess Ka and the upper surface Wb of the molded film (silicon film) 2 is formed. A film (sacrifice film) 6 (for example, polycrystalline silicon or amorphous silicon film) is formed sequentially. At this time, the recessed part formed intermediately (after formation of the conductive film 5) is shown as Kb.

(Step e), (step f)

After the deposition film 6 is formed, a portion of the buried film 6 and the conductive film 5 (FIGS. 2 and 3) on the wafer surface are removed by CMP (Chemical Mechanical Polishing) to the etch back line E. FIG. Expose Here, the second molded film 2 and the buried film 6 are removed by wet etching. When the 2nd shaping | molding film (sacrifice film) 2 is laminated | stacked in stages, you may remove it in stages or at once. In this invention, this process is important and the etching liquid by this invention mentioned later exhibits a high effect. Through this step, a cylindrical lower electrode (cylinder wall) 50 (FIG. 3) having a cylinder hole Kc standing on the semiconductor substrate in the center is formed. Although the depth h ₂ of the cylinder hole wall is not particularly limited, it is practical that it is 500 to 2000 nm considering the normal structure of this kind of device. Moreover, it is preferable to apply the etching liquid of this invention to the surface smoothed by etch back etc. as mentioned above, and to remove a buried film from this, and to form a trench structure.

In addition, Japanese Patent Laid-Open No. 2006-114896 discloses a processing method using the above-described laminated sacrificial film.

It is practical that the height h ₁ of the cylinder is similarly 500-2000 nm.

(Process g)

After forming the lower electrode 50 of the capacitor formed as described above, the capacitor insulating film 9 is formed, and then the capacitor structure 10 is formed by sequentially forming the plate electrode (upper electrode) (not shown). can do. In the present specification, the capacitor structure may be either the capacitor itself or a structural portion constituting a part of the capacitor. In the example shown in FIG. 4, the capacitor structure 10 is formed by the lower electrode 50 and the capacitor insulating film 9. It is shown. In addition, although shown in the figure as the structure which separated the lower electrode 50 and the wafer 3 by the shaping | molding film 1, it is the structure which both electrically connected at the cross section or another position of the same drawing as needed. You may interpret it. For example, the plug structure or the damascene structure may be formed on the portion of the molding film 1 to ensure conduction, or the lower electrode 50 may be formed to penetrate the molding film 1 . The capacitor insulating film 9 may be formed not only on the lower electrode 50 but also on the other substrate surface.

5 shows a modification of the capacitor structure of the above embodiment. In this example, the bottom portion 81 and the main portion 82 of the lower electrode (cylinder structure) are made of different materials. For example, the bottom portion 81 is made of Si ₃ N ₄ and the main portion 82 is made of TiN.

(Process a ')

6 shows a modification of the production example of the above embodiment. A first molding film 1, a second molding film 2, a third molding film 21 and a fourth molding film 31 are formed in this order on a silicon wafer 3. The 1st molded film 1 is an etching stopper film at the time of opening of a cylinder hole, and the 2nd molded film 2 is a film which has an etching rate ratio in an anisotropic dry etching process. As the first molded film 1, for example, a nitride film formed by an LP-CVD process can be given. The second molded film 2, the third formed film 21 and the fourth formed film 31 are preferably a combination of a film having no etching rate ratio in anisotropic dry etching and an etching rate ratio obtained in isotropic etching, and at the time of capacitor formation. It is preferable to form the second molded film 2, the third molded film 21 and the fourth molded film 31 into a film which can be removed at once by the same wet etching solution.

The etching rate ratio in the isotropic etching is that the second molded film 2 and the fourth molded film 31 have the same etching rate, and the third molded film 21 has the second molded film 2 and the fourth molded film. It is preferable that the film has a large etching rate compared with (31). In addition, the 2nd molded film 2 and the 4th molded film 31 may apply the same film, or may apply another film. Although not shown, a protective film may be provided. In addition, although the silicon wafer 3 is greatly simplified and shown as a single layer, as mentioned above, the predetermined circuit structure is normally formed here. In addition, although hatching is not shown in particular in FIG. 6, the cross section of each member is shown, and in FIG. 7, hatching is shown and the flat sectional drawing is shown.

(Process b ')

Next, after the photoresist 4 is patterned using a photolithography step, it is opened by anisotropic dry etching (concave portion Ka). What is necessary is just to apply the normal thing or method applied to this kind of product about the photoresist 4 and the method of dry etching at this time.

After opening, isotropic etching is performed to form the concave portion Va in the portion of the third molded film 21, and then the electrode protective film 7 is grown. The electrode protective film 7 is a molded film having a sufficient etching rate ratio with respect to the etching liquid used for removing the second molded film 2, the third molded film 21 and the fourth molded film 31 at the time of capacitor formation. It is preferable that it is a film which can form a film uniformly in the whole of recessed part Ka, and can fully embed the recessed part 7 formed in the overlapping part of recessed part Ka. For example, a nitride film, a tantalum pentoxide (Ta ₂ O ₅ ) film, etc. using ALD (Atomic Layer Deposition) method are mentioned.

After the growth of the electrode protective film 7, the electrode protective film 7 is removed by etching. At this time, the electrode protecting film 7 in the concave portion Va remains without being removed.

(Step c ')

In the same manner as in the steps (c) to (g), the lower electrode (cylinder wall) 50 of the capacitor having the cylinder Kc is formed. In the same manner as in the above production example, the capacitor insulating film 9 is formed after the lower electrode 50 of the capacitor is formed, and then the capacitor structure can be formed by sequentially forming plate electrodes (upper electrodes) (not shown). In addition, in this specification, a capacitor structure may be a capacitor itself or the structural part which comprises a part of capacitor.

[Silicon etching solution]

Next, preferable embodiment of the silicon etching liquid in this invention which can be used very effectively for the wet etching demonstrated by the said process e is described.

The etching solution of the present invention is characterized by containing quaternary ammonium hydroxide at a specific concentration. It is preferable to include in 7 mass% or more and 25 mass% or less specifically, and it is more preferable that it is 9 mass% or more. By setting the etching rate to be equal to or more than the lower limit value, it is possible to exert a very effective etching force in the high-temperature etching described later.

The upper limit is not particularly limited, but if the amount is too large, it is preferable to limit the amount to an appropriate amount because the rise of the etching effect reaches a limit point or vice versa. Specifically, the quaternary ammonium hydroxide is more preferably 18% by mass or less, and even more preferably 15% by mass or less.

The etching liquid in this invention contains 20 ppm or more (mass basis) or more of silicon by its ion concentration, Preferably it contains it by the density | concentration of 30 ppm or more. A silicon compound is mentioned as a source of silicon, For example, what melt | dissolved in the aqueous solution of a quaternary alkylammonium hydroxide and produced | generated the ion of a silicon compound can be used. Specifically, monocrystalline silicon, polycrystalline silicon, amorphous silicon can be used suitably. By containing the silicon component of the said concentration, etching liquid can hold | maintain sufficient etching rate of polycrystal silicon and amorphous silicon, and can suppress the etching of SiN effectively. In addition, increasing the etching selectivity of polycrystalline silicon and amorphous silicon and silicon nitride (SiN) is not easy because it is required to give the difference between the same silicon compounds in view of solubility. On the contrary, according to the present invention, the coexistence of a small amount of silicon components can effectively give a difference to both etching rates, thereby realizing excellent selectivity. Although there is no upper limit in particular, it is practical that it is 1000 ppm or less. But even from the etching solution and the silicon is present in any state, for example, ortho-silicate ions (SiO _{⁴ 4} ^-) can be given as a present. However, the silicon concentration is defined as the concentration of silicon (Si) identified by ICP-MS or the like.

The ratio between the etching rate (R _Si ) of the silicon film made of polycrystalline silicon or amorphous silicon and the etching rate (R _SiN ) of _SiN is not particularly limited, but is preferably large, and the ratio (R _Si / R _SiN ) of both is 300 or more. It is preferable, it is more preferable that it is 1000 or more, and it is especially preferable that it is 2000 or more. Although there is no upper limit in particular, it is practical that it is 100,000 or less.

It is preferable that the etching liquid by this invention performs a crude liquid and an etching process in the form which prevents mixing of carbon dioxide by an inert gas etc .. This is because the pH in the liquid becomes acidic due to the incorporation of carbon dioxide and the etching is lowered. CO ₂ concentration in the solution is more preferably a preferably suppressed to less than 1ppm (mass basis), and is suppressed to 0.1ppm or less. The lower limit of the CO ₂ concentration is not particularly limited, but it is practically 0.001 ppm or more in consideration of unavoidable additions.

· Quaternary ammonium hydroxide

As the quaternary ammonium hydroxide, tetraalkylammonium hydroxide is preferable. Specific examples include tetramethylammonium hydroxide (TMAH), tetraethylammonium hydroxide (TEAH), benzyltrimethylammonium hydroxide, ethyltrimethylammonium hydroxide, 2-hydroxyethyltrimethylammonium hydroxide, benzyltriethylammonium hydroxide, hexadecyltrimethylammonium hydroxide , Tetrabutylammonium hydroxide, tetrahexylammonium hydroxide, tetrapropylammonium hydroxide, and the like.

And tetraalkylammonium hydroxides having at least three methyl groups and / or ethyl groups are more preferred. Most preferably, it is tetramethylammonium hydroxide or ethyltrimethylammonium hydroxide.

Although quaternary ammonium hydroxide may be used in combination of multiple types, it is preferable to use only 1 type limitedly. Thus, by using only 1 type of quaternary ammonium hydroxide, it can be set as the process liquid of simple structure, and a sharp etching effect can be acquired. In addition, it is preferable that the component of a process liquid is simpler, and, as mentioned above, it is preferable not to use 2 or more types of quaternary ammonium hydroxides together, or to use no other additive, and it is preferable to use 1 quaternary ammonium hydroxide and water. Preference is given to a primary system, a real binary system of one quaternary ammonium hydroxide and water, or a real ternary system of one quaternary ammonium hydroxide, a metal concealer and water.

In this invention, it is preferable not to contain a hydroxylamine compound in an etching liquid. The hydroxylamine compound here is a general term of hydroxylamine and its salt. The hydroxylamine compound is not suitable for continuous use because it is easy to decompose from the beginning, but when combined with the above quaternary alkylammonium hydroxide such as TMAH, the tendency becomes more remarkable.

Moreover, it is preferable that the etching liquid of this invention consists only of the said quaternary alkylammonium hydroxide substantially. "Substantially" means here that it may contain the trace component which has an inevitable impurity or a small influence on an effect. Examples of such trace components include Na, K, Ca, Mn, Fe, Cu, Mg, trimethylamine, various particles, and the like. In addition, it is preferable to reduce these trace components as much as possible based on the etching solution of this invention being a semiconductor use. It is preferable that it is 10 ppm or less (mass basis) as a content rate of these trace components specifically ,.

In addition, in this specification, a compound (for example, said quaternary ammonium hydroxide) is used by the meaning containing the salt and its ion other than the said compound. Moreover, it is the meaning containing the derivative | guide_body which changed predetermined part in the range which shows a desired effect.

[Processing conditions]

In the present invention, a solution (chemical solution) of quaternary ammonium hydroxide is applied to a polycrystalline silicon film or amorphous silicon film (hereinafter sometimes referred to simply as "silicon film") under conditions of 60 ° C or more. Moreover, it is more preferable that it is 70 degreeC or more. Particularly preferably not lower than 80 캜. In addition, when etching the sacrificial film laminated | stacked in stages, it is preferable that it is 80 degreeC or more, and 90 degreeC or more is more preferable. Although an upper limit does not have a restriction | limiting in particular, When considering boiling of a chemical | medical solution etc., it is more preferable that it is 99 degrees C or less, and it is especially preferable that it is 95 degrees C or less. The application temperature is a temperature on the wafer. This temperature is taken as the value measured as shown in a later Example. In addition, the higher the temperature on the wafer, the faster the etching rate is usually, and from that point of view, it is preferable to increase the processing temperature.

In the present invention, when the sheet type device is used, it is preferable to discharge the heated chemical liquid so that the temperature on the wafer becomes the specific temperature and contact the silicon film. In addition, when using a batch type bathtub, it is preferable to adjust the bath temperature of etching so that the temperature on a wafer may become the said specific temperature, and to etch by immersing a silicon film in it.

In all cases, in the etching of the amorphous silicon film, it is preferable to omit the pretreatment for removing the oxide film by an aqueous solution of hydrofluoric acid or the like, and to set the temperature of the chemical liquid in the tank and / or in-line or the bath temperature of the etching to 60 ° C or higher. desirable.

According to the present invention, it is more preferable to use the sheet-type cleaning apparatus to process the sheets one by one rather than the batch method in which the chemical solution is placed in the etching bath and the wafer is immersed.

8 is a device configuration diagram showing an example of a sheet type device that can be suitably used in the present invention. When the removal process of this embodiment is demonstrated using the same figure, the adjusted removal liquid (liquid composition) is supplied from the supply part A, and it transfers to the discharge port 13 through the flow path fc after that. Thereafter, the etching liquid is injected from the discharge port 13 and applied to the upper surface of the semiconductor substrate S in the reaction vessel 11. The flow path fd represents the return flow path for reusing the chemical liquid. In this embodiment, the semiconductor substrate S is on the rotary table 12, and is rotated with the rotary table by the rotary drive part M. As shown in FIG.

[Supply system and heating]

In the present invention, the heated chemical liquid supply line type is not particularly limited, but preferable examples are described below.

Example of supply line of chemical liquid

1) a) chemical storage tank → b) heating tank → c) inline heating → d) discharge to wafer → a) or b)

2) a) chemical tank → b) heating tank → d) discharge to wafer → a) or b)

3) a) chemical tank → c) inline heating → d) discharge to wafer → a)

4) a) chemical solution tank b) heating tank e) etching bath (circulation heating)

5) a) Chemical liquid tank → e) Etching bath (circulation heating)

6) b) heating tank → d) discharge to wafer → b)

7) b) heating tank → c) inline heating → d) discharge to wafer → b)

8) b) heating tank → e) etching bath (circulation heating).

The chemical solution used in the method of the present invention can be circulated and reused. Preferably, the method is recycled without recycling (not reused). Circulation can be performed for 1 hour or more after heating, and repeated etching can be performed. Although there is no particular upper limit time for circulating reheating, the exchange rate within one week is preferable because the etching rate is deteriorated. It is more preferable within 3 days, and it is especially preferable to replace with a new liquid every day. In addition, since the alkaline chemical liquid has a property of absorbing carbon dioxide, it is preferable to use it in a closed system or with nitrogen flowing as much as possible. Nitrogen flowing is more preferred. In addition, although the measurement position of the heating temperature of the said chemical | medical solution in the said line-type etching may be suitably determined by a line structure or a relationship with a wafer, you may manage by the said tank temperature typically. If measurement and management are possible, such as when a more stringent condition is required in performance, it may be defined according to the wafer surface temperature.

EMBODIMENT OF THE INVENTION Below, the preferable modified example of this invention is demonstrated.

In the manufacturing method of this invention, it is preferable to perform the said etching after the washing | cleaning process of a semiconductor substrate by ultrapure water, the removal process of a silicon oxide film, and the water washing process of a semiconductor substrate by ultrapure water again. Thereby, the effect of reducing defect (residual residue, defect, particle | grains, etc.) can be anticipated. Moreover, it is also preferable from the same viewpoint to wash with ultrapure water heated after warming (for example, 50-80 degreeC) after a silicon oxide film removal process. Moreover, it is also preferable to preheat (for example, 50-80 degreeC by wafer surface temperature) after the said washing | cleaning process by ultrapure water again from the same viewpoint, and to perform the said etching after that. The ultra pure water is preferably nitrogen-substituted ultra pure water.

In the present invention, the etching is preferably performed by any one of the following A and B processes as described above.

[A: An aqueous solution of the specific temperature is discharged in the heating tank and / or inline, and the solution is brought into contact with the silicon film.]

[B: the aqueous solution in the bath is set to the above specified temperature, and the silicon film is immersed in the aqueous solution and brought into contact.]

In the said A process, it is preferable to etch at 1000 rpm or more of rotations of a semiconductor substrate. In addition, in the A process, the chemical liquid nozzle is preferably etched while moving at least 20 cm / min in parallel with the center of the semiconductor substrate by 2 cm or more. By doing in this way, the effect of the improvement of in-plane uniformity can be anticipated.

[additive]

The chemical liquid used in the present invention may contain additives other than quaternary ammonium hydroxide. For example, a metal masking agent, an etching promoter, an etching inhibitor for members other than silicon, and the like can be given. Among them, it is preferable to add a metal masking agent.

Although there is no restriction | limiting in particular as a metal concealer to add, Complexsons are preferable. Amino polycarboxylic acids are more preferable, EDTA (ethylenediamine tetraacetic acid), DTPA (diethylenetriamine pentaacetic acid), and CyDTA (cyclohexanediamine tetraacetic acid) are more preferable.

It is preferable to contain 0.00001-1 mass%, and, as for an addition amount, it is more preferable to contain 0.0001-0.1 mass%.

By applying the present invention, it is possible to accurately remove the polycrystalline silicon film or amorphous silicon film by forming the above-mentioned concave-convex capacitor structure without damaging a member such as an electrode.

Generally, solubility tends to increase with increasing temperature, but the solubility sequence does not necessarily match the sequence of dissolution rate. The method of increasing the solubility varies depending on the material, and the salt (sodium chloride) and the like increase the solubility slightly, but the alum (potassium aluminum sulfate) and the like rapidly increase the solubility. The solubility of the amorphous silicon and amorphous silicon used in the present invention is substantially the same, and the solubility is rapidly increased in accordance with the temperature rise. However, these two dissolution rates are different, and in the alkaline solution, polycrystalline silicon generally has a higher dissolution rate. However, in the method of the present invention, it is possible to accurately remove the silicon film irrespective of the difference and regardless of the process, which is one of the advantages of the present invention.

In addition, in this specification, the liquid containing the specific agent or the combined liquid means not only the liquid composition containing the said agent, but also means as a kit which mixes each agent and the liquid containing it before use, and uses it. It is to include.

It is preferable that the etching liquid of this invention has few impurities, such as metal powder, in consideration of the use use.

(Vessel)

The etching solution of the present invention can be stored, transported and used by filling into any container as long as large corrosion resistance and the like are not a problem. Further, it is preferable that the cleanliness of the container is high and the elution of the impurities is small for semiconductor applications. As a usable container, AICELLO CHEMICAL CO., LTD. `` Clean Bottle '' series of products, KODAMA PLASTICS Co., Ltd. "Pure Bottle" etc. of products are mentioned, but it is not limited to these.

(pH)

It is preferable that the silicon etching liquid of this invention is alkaline, and is adjusted to pH11 or more. This adjustment can be made by adjusting the amount of the alkali compound and other additives. However, as long as the effect of this invention is not impaired, you may use pH of the said range using another pH adjuster. The pH of the silicon etching solution is preferably 12 or more, more preferably 13 or more. Sufficient etching rate can be obtained when this pH is more than the said lower limit. There is no particular upper limit on the pH, but it is practically 14 or less. In addition, in this invention, pH is a value measured by F-51 (brand name) of HORIBA product at room temperature (25 degreeC), unless it rejects in particular.

(Aqueous medium)

The etching solution of this embodiment is preferably an aqueous liquid composition (aqueous solution) using an aqueous medium as a medium. An aqueous medium is an aqueous solution in which a solute soluble in water and water is dissolved. Examples of the solutes include alcohols and salts of inorganic compounds. However, even when the solute is applied, the amount is preferably suppressed in the range in which the desired effect is exerted. In addition, the said aqueous composition-aqueous solution mean that water is a main medium, It is preferable that the majority (mass reference | standard) of media other than solid content is water, 80 mass% or more is more preferable, It is especially 85 mass% or more desirable.

In addition, it goes without saying that it is preferable that water is basically small in the case of considering the application to the manufacturing use of the semiconductor, which is a suitable use of the present invention. Specifically, other than the fluorine-containing a metal powder, the present invention that may affect the semiconductor halogen anions (Cl ^-, Br ^-, etc.), and other impurities are preferably as small as possible. An ion exchange method etc. are mentioned as a method of obtaining such water.

(Silicon substrate surface treatment)

In this embodiment, it is preferable to apply especially to an amorphous silicon film, without combining the oxide film removal process naturally formed in the silicon substrate surface. Thereby, it is not necessary to apply before the said etching liquid, and it leads to shortening of the time. Although the method of surface treatment is not limited as long as the oxide film formed can be removed, For example, processing with the acidic aqueous solution containing a fluorine atom is mentioned. The acidic aqueous solution containing a fluorine atom is preferably hydrofluoric acid, and the content of hydrofluoric acid is preferably about 0.1 to about 5% by mass, more preferably 0.5 to 1.5% by mass relative to the total mass of the liquid of the present embodiment. desirable.

In addition, in this specification, a semiconductor substrate is used by the meaning containing not only a wafer but the whole substrate structure in which the circuit structure was provided. The semiconductor substrate member refers to a member constituting the semiconductor substrate defined above, and may be composed of one material or a plurality of materials. In addition, the processed semiconductor substrate may be distinguished and referred to as a semiconductor substrate product. If necessary, the chip and the processed product which are further distinguished, processed, diced, and drawn out are referred to as a semiconductor element. In other words, semiconductor elements are broadly belonging to semiconductor substrate products.

(Workpiece)

Although the material etched by applying the etching liquid of this embodiment is not specifically limited, Polycrystalline silicon or amorphous silicon is mentioned as a board | substrate material used for manufacture of a general capacitor, and this may be laminated | stacked step by step. From the viewpoint of eliminating the pretreatment for removing the oxide film, a laminated film containing at least one amorphous silicon layer is preferable, a laminated film whose at least uppermost layer is an amorphous silicon layer is more preferable, and a laminated film composed of only the amorphous silicon layer is particularly preferable. The above-mentioned Japanese Patent Application Laid-Open No. 2006-114896 can be referred to for diversification of the electrode shape by changing the lamination state of the sacrificial film.

On the other hand, as the electrode material forming the core of the capacitor structure, a Ti compound such as titanium nitride (TiN) may be mentioned. May be used). In other words, it is preferable that the etchant of this embodiment has a large ratio (ERs / ERe) of the etching rate ERs of the substrate material to the etching rate ERe of the constituent members such as the electrode material. Although the value of a specific ratio depends also on a kind of material and a structure, It does not specifically limit, It is preferable that ERs / ERe is 100 or more, and it is preferable that it is 200 or more. Although there is no upper limit in particular, it is practical that it is 100,000 or less.

In this specification, using an etching liquid so as to etch a silicon substrate is called "application", However, the embodiment is not specifically limited. Typically, the etching solution is in contact with a substrate to etch. In this case, you may immerse and etch by a batch type, for example, or you may etch by discharge by a single | leaf type. The Ti compound means Ti itself and a compound containing it. In addition to TiN, Ti, and the compound compound of Ti, N, C, etc. are mentioned. Among them, TiN is preferable.

Although the shape and the dimension of the capacitor structure to be processed are not particularly limited, it is preferable to have a cylinder structure as described above, particularly when the aspect ratio of the cylinder hole is 5 or more, in which the high effect of the etching solution of the present embodiment is exhibited. It is preferable that aspect ratio is 10 or more from a similar viewpoint, It is more preferable that it is 15 or more, It is further more preferable that it is 20 or more. Although there is no upper limit, it is practical that the aspect ratio is 100 or less. Although the opening diameter d _c of a cylinder hole is not specifically limited, It is preferable that it is 20-80 nm in view of the effect exhibited in this embodiment and the miniaturization of the recent capacitor structure. In addition, in this specification, a trench or its structure is a concept including a cylinder structure, and if it is a structure which shows concave shape in a specific cross section, it will not specifically limit, Not only groove shape but hole shape, conversely needle shape Peripheral etc. which protrude many structures may be sufficient as it. Referring to FIG. 3 as an example, the concave portion Kd corresponds to a trench structure formed around a plurality of needle-shaped structure portions protruding, and the cylinder hole Kc corresponds to a hole-shaped trench structure. The aspect ratio is a value obtained by dividing the depth h ₂ of the concave portion by the width d _c with respect to the cylinder hole Kc. The aspect ratio of the recessed part Kd which forms the periphery with which many needle-shaped structure parts protruded is the value which divided | divided the depth h ₁ of the recessed part by the width d _d , for example.

In view of the above, in the present invention, it is preferable to etch the polycrystalline silicon film or the amorphous silicon film while leaving the capacitor constituent member including TiN at least on the wall surface of the uneven structure. This constituent member may include HfOx, SiN, SiO _2, etc. in addition to TiN. In addition, TiN typically forms an electrode film. In addition, a semiconductor substrate having a substantially flat surface having the polycrystalline silicon film or amorphous silicon film is prepared, and the etching solution is applied to the surface of the semiconductor substrate to remove the polycrystalline silicon film or amorphous silicon film, and the removed portion is removed. It is preferable to set it as a recessed part and to use a convex part left in the board | substrate as a capacitor. At this time, it is preferable that a TiN film remains on the wall surface of the concave portion. In other words, according to the etching solution of the preferred embodiment of the present invention, a capacitor structure composed of an electrode having a cylinder structure can be supported, if necessary, and the polycrystalline silicon film inside the cylinder hole or the like (including the hole outside the portion where the cylinder structure is dense). Alternatively, the amorphous silicon film can be selectively removed.

In general, the silicon materials include monocrystalline silicon, polycrystalline silicon (polysilicon), and amorphous silicon (amorphous silicon). In the present invention, polycrystalline silicon or amorphous silicon is used.

Single crystal silicon is a silicon crystal in which the direction of the atomic arrangement is aligned throughout the crystal, but in reality, various defects exist when observed at the atomic level.

Polycrystalline silicon is a block or layered silicon composed of a plurality of single crystal grains having different crystal orientations. It may consist only of Si, or may be doped with boron, phosphorus or the like. In addition, various defects and impurities similar to those described above may be present in a range in which a desired effect is exerted. The manufacturing method is not specifically limited, either, What was formed by the CVD method, etc. are mentioned.

Amorphous silicon means that the constituent element of an amorphous semiconductor is silicon. Specifically, it is silicon in a state not having the following long-distance periodic structure. Atom arrangements are not completely disordered bonds, but include any local order. Due to the disorderly bonding, unbonded bonds (dangle bonds) are occupied by electrons that do not participate in the bond because the silicon atoms lose their covalent bonds. The unbonded (bonded) hydrogen by hydrogen bonding is called hydrogenated amorphous silicon, and has a stable solid shape. In the present specification, simply referred to as amorphous silicon, the present invention refers to both amorphous silicon that is not hydrogenated and amorphous silicon that is hydrogenated.

In the present invention, in the case of a silicon film made of polycrystalline silicon or amorphous silicon, it means that an impurity or an accessory may be included within the range in which the effect of the present invention is exhibited. It is preferable that it is a silicon film which consists essentially only of a polycrystalline silicon film or an amorphous silicon film without such a component.

The process requirements concerning the manufacturing method of a preferable semiconductor substrate product in this invention are described below.

(1) a step of preparing a semiconductor substrate having a silicon film (which may be a laminated sacrificial film) made of a polycrystalline silicon film or an amorphous silicon film, and a step of etching at least a portion of the silicon film by applying a specific etching solution to the semiconductor substrate It includes.

(2) In the step of preparing the semiconductor substrate, a multilayer film structure including the silicon film is formed, and irregularities are formed on the semiconductor substrate.

A step of forming a conductive film on at least the upper surface and the concave wall surface of the uneven surface,

A step of providing a buried film on the conductive film to fill the concave portion with the buried film,

Removing a portion of the conductive film and a portion of the buried film provided on the upper surface to expose a silicon film of the semiconductor substrate, and then

In the etching process of the silicon film, the etching liquid is applied to the semiconductor substrate to remove the exposed silicon film and the buried film while leaving the conductive film on the wall surface of the recess.

(3) A semiconductor substrate having a substantially flat surface is prepared, the etching solution is applied to the surface of the semiconductor substrate to remove the silicon film and the buried film, and the removed portion is a recessed portion, and the residue left in the substrate The convex part containing a conductive film is used as an electrode of a capacitor.

In addition, in this invention, preparation means including procurement by only purchasing, etc. other than preparing or manufacturing using a raw material.

Example

≪ Example 1 >

It contained in the composition (mass reference | standard) shown to the component shown in the following Table 1, and the following prescription, and prepared the etching liquid. Test No. All the etching solutions 101 to 111 were pH 13 or more. In addition, the amount of silicon (Si) was measured using ICP-MS (Indectively Coupled Plasma Mass Spectrometry) after immersing an amorphous silicon wafer in an alkali compound of each concentration. Specifically, PerkinElmer Inc. Quantitative determination was performed using the product's ICP-OES apparatus Optima 7300DV. Then, the silicon concentration of each etching liquid was adjusted by adding the aqueous solution which quantified the dissolved silicon concentration to each alkali compound.

<T (wafer) measurement method>

HORIBA, Ltd. The radiation thermometer IT-550F of the product was fixed at a height of 30 cm on the wafer in the single wafer apparatus. The temperature was measured while flowing the chemical liquid toward the thermometer on the wafer surface 2 cm outside from the center of the wafer. The temperature was digitally output from the radiation thermometer and recorded by a personal computer. The value which averaged the temperature of the last 10 second of processing time among these temperatures was made into the temperature on a wafer.

<Etching test>

Test wafer: A 100 nm silicon oxide film was formed on single crystal silicon, and a wafer of amorphous silicon with a thickness of 1000 nm formed on the silicon oxide film was prepared. On the other hand, pre-treatment is carried out with a 0.5% hydrofluoric acid solution (23 ° C., 2 L / min, 500 rpm, 1 minute) using a sheet type device (SPS-Europe BV product, POLOS (trade name)), followed by pure water (23 ° C., 2 L / Minutes, 500 rpm, for 30 seconds) After rotating at 2000 rpm for 30 seconds to completely remove water, etching was performed under the following conditions, and an evaluation test was performed, and a 50 nm film formed on a single crystal <100> silicon. A wafer of silicon nitride having a film thickness of was prepared, and was etched under the following conditions, and an evaluation test was carried out, and a wafer having a diameter of 300 mm was used, and the average etching rate Av was measured using an ellipsometer ( Film thickness measurement method using a spectroscopic ellipsometer) The measurement was set equally to five points from the center to the edge of the wafer and evaluated from the results of these five points.

· Chemical solution temperature: listed in Table 1

Discharge amount: 2 L / min.

Wafer rotation speed 1000 rpm

Test No. c ＊＊ Comparative example (other example)

ppm by mass

TMAH: Tetramethylammonium Hydroxide

T (Tank): Etchant Temperature in Tank

T (wafer): surface temperature of the wafer

a-Si ER: Etch Rate of Amorphous Silicon

SiN ER: Etch Rate of SiN

ER ratio: [a-Si ER] / [SiN ER]

As shown in the above table, according to the capacitor formation method of the present invention, sufficient etching rate was achieved for amorphous silicon. Furthermore, the etching rate of SiN was suppressed and good selectivity was realized. Moreover, the silicon etching liquid of this invention confirmed that the damage to each film | membrane to TiN which is a structural member, such as an electrode material of an element, is very small.

On the other hand, in the comparative example, the etching rate of amorphous silicon was low or the etching rate of SiN was high.

<Example 2>

Except having changed the amorphous silicon of Example 1 into polycrystalline silicon, it evaluated similarly all. In addition, abbreviated-name of the following table | surface is as above. However, poly-Si ER represents the etching rate of polysilicon, and ER ratio represents [poly-Si ER] / [SiN ER].

As shown in the above table, according to the capacitor forming method of the present invention, sufficient etching rate and high selectivity are realized even for polycrystalline silicon.

<Example 3>

Except having changed the amorphous silicon of Example 1 into two layers of amorphous silicon of 500 nm each, it evaluated similarly. Evaluation of the laminated amorphous silicon film visually measured the time required until the residual film disappeared.

As shown in the above table, according to the capacitor formation method of the present invention, sufficient etching rate was realized even for two layers of amorphous silicon, and the selectivity was shown for SiN.

<Example 4>

Except having changed the amorphous silicon 2 layer of Example 3 into 2 each of 500 nm polycrystalline silicon layers, it evaluated similarly.

As shown in the above table, according to the capacitor formation method of the present invention, sufficient etching rate was realized even for two layers of polycrystalline silicon, and the selectivity was shown for SiN.

<Example 5>

The evaluation was carried out in the same manner except that the two layers of the amorphous silicon of Example 3 were changed to each of the 500 nm amorphous silicon (lower layer) and the polycrystalline silicon (upper layer).

As shown in the above table, according to the capacitor formation method of the present invention, sufficient etching rate was realized even for the silicon film of two layers of amorphous silicon / polycrystalline silicon, and showed selectivity with respect to SiN.

<Example 6>

Except having changed the amorphous silicon 2 layer of Example 3 into each of 500 nm polycrystalline silicon (lower layer) and amorphous silicon (upper layer), it evaluated similarly.

As shown in the above table, according to the capacitor formation method of the present invention, sufficient etching rate was realized even for the silicon film of two layers of polycrystalline silicon / amorphous silicon, and showed selectivity with respect to SiN.

1: first molded film 2: second molded film (sacrificial film)
3: Silicon wafer 4: Photoresist
5: conductive film 6: buried film
7: protective member 9: capacitance insulating film
10, 20: capacitor structure 50: lower electrode (cylinder wall)

Claims (13)

A method of forming a capacitor having a modeled bottom electrode:
In etching a silicon film made of polycrystalline silicon or amorphous silicon around the lower electrode so that the lower electrode remains, an aqueous solution containing 20 ppm or more of quaternary alkylammonium hydroxide and silicon at an ion concentration thereof is applied to the silicon film under a condition of 60 ° C. or higher. And the silicon film is etched. The method of claim 1,
And the concentration of the quaternary alkylammonium hydroxide is 7% by mass or more and 25% by mass or less. The method of claim 1,
The quaternary alkyl ammonium hydroxide contained in the aqueous solution is a capacitor formation method, characterized in that only one kind. The method of claim 1,
And the lower electrode comprises a Ti compound, and selectively etches the silicon film portion with respect to the Ti compound. The method of claim 1,
Application of the aqueous solution to the silicon film is carried out in an inert atmosphere. The method of claim 1,
And removing part or all of the silicon film to form the uneven shape required for the lower electrode. The method according to claim 6,
And a cylinder structure having an aspect ratio (depth / opening width) of 15 to 100 as the concave-convex shape. The method of claim 1,
And the silicon film is a polycrystalline silicon film, an amorphous silicon film, or a film of both. The method of claim 1,
And the silicon film is formed by laminating an amorphous silicon film. The method of claim 1,
Capacitor forming method characterized in that the aqueous solution is applied at 80 ℃ or more conditions. A method of manufacturing a capacitor having a molded lower electrode:
Preparing a semiconductor substrate having a molded conductive film and a silicon sacrificial film made of polycrystalline silicon or amorphous silicon in the vicinity thereof;
Preparing an aqueous solution containing at least 20 ppm of a quaternary alkylammonium hydroxide and silicon at its ion concentration, and
And applying the aqueous solution to the silicon sacrificial layer and etching the remaining conductive layer to form a lower electrode of the capacitor. 12. The method according to any one of claims 1 to 11,
Characterized in that the ion concentration of the silicon is quantified by ICP-MS. It is manufactured by the method of Claim 12, The manufacturing method of the semiconductor substrate product characterized by the above-mentioned.

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