KR20130037626A - Semiconductor manufacturing apparatus and semiconductor manufacturing method - Google Patents

Abstract

PURPOSE: An apparatus for manufacturing semiconductor and a method thereof are provided to supply a large number of substrates where a buffer layer is attached by using a vertical pressure decompression CVD device, thereby reducing manufacturing costs. CONSTITUTION: A remote plasma device(203) cleans the inner part of an inner quartz tube(402). Cleaning gas includes Ar gas(103), O2 gas(104), and NF3 gas(106). A wafer(302) is mounted in a quartz board(301) by using a handling device. The quartz board is mounted in the inner quartz tube by using an elevating unit(201). The inner parts of an outer quartz tube and the inner quartz tube are ventilated by using an exhaust pipe(204).

Description

Semiconductor manufacturing apparatus and manufacturing method

The present invention relates to a CVD apparatus for forming a buffer layer or a base film used for an LED or a SiC device, and a method of forming the same.

Conventionally, GaN LED devices used for illumination have formed AlN or GaN buffer layers on the sapphire substrate at a low temperature of 500 to 700 ° C or at a high temperature of 1100 ° C in order to increase the crystallinity of the epi layer. That form the epitaxial layer at a high temperature of about 1000 ~ 1200 ℃ above, and in accordance with the photolithography (Photolithography) technique to form the LED device.

In recent years, since Si substrates are processed by etching, or porous Si is formed, a method of forming a GaN buffer layer at 600 to 700 ° C. and then forming an epi layer at a high temperature has begun to be studied. Here, the AlN and GaN buffer layers and the epi layer are formed by a chamfer type MOCVD apparatus. (Patent Documents 1 and 2)

In addition, a SiC power device forms a SiC epitaxial layer on a SiC substrate, and forms a metal film thereon to manufacture a Schottky device. Alternatively, a source and a drain are formed by ion implantation to form a MOS device. (Patent Documents 3 and 4)

[Patent Document 1] JP 2008-294482 [Patent Document 2] US Patent No. 7,327,036 [Patent Document 3] Japanese Patent Laid-Open No. 11-102917 [Patent Document 4] Japanese Patent Laid-Open No. 2008-108669

However, in Patent Literature 1, using a MOCVD apparatus, a GaN buffer layer is first formed on a sapphire substrate at atmospheric pressure at a temperature of about 600 to 700 캜, and then the temperature is raised to 1100 to 1200 캜 in the same apparatus. It forms a tactile layer.

However, since the formation of the buffer layer is conventionally performed by the epitaxial layer forming apparatus, the number of treatments is small, and only 6 sheets are processed at most on a 6-inch sapphire substrate. Furthermore, after forming a sapphire layer, the temperature is raised and an epitaxial layer is formed.

Similarly, in forming a SiC device, a buffer layer is formed in a MOCVD apparatus having a small number of high frequency heating treatments, and an epitaxial film is formed in the same MOCVD apparatus.

For this reason, forming a buffer layer and an epitaxial layer in a MOCVD apparatus as in the prior art has a drawback in that it takes a lot of time and decreases the processing capacity, compared with simply forming an epitaxial layer. For mass production, there was a drawback that many MOCVD devices were required.

Therefore, in order to carry out mass production of a buffer film and mass production of an epitaxial layer, many MOCVD apparatuses are needed and the manufacturing cost of a CVD film rose. For this reason, reduction of the manufacturing cost of a CVD film was a big problem. In addition, the sapphire substrate is expensive, and there is a drawback in that processing takes time. As for the SiC substrate, since the SiC single crystal substrate is particularly expensive, the device cost is large. For this reason, using a low cost board | substrate and reducing manufacturing cost was a big problem.

In view of the above, the object is to shorten the processing time of the MOCVD apparatus or to reduce the number of treatments, and to reduce the cost of LED devices or SiC devices by using a low-cost substrate.

For this reason, as a specific means, the present invention forms a buffer film which is inevitable in forming a good epitaxial layer used for an LED device or a SiC device, a load lock chamber, a remote plasma device, and a GaN, AlN, GaAlN, SiOC, SiC buffer film. For this reason, a hot-walled hot plasma remote plasma CVD apparatus having gas selection supply means is employed.

In the same way, the load lock chamber, the remote plasma apparatus, the double inner tube, and the GaN, AlN, GaAlN, SiOC, and SiC buffer films are formed in the same manner, so that a mass production hotwall type remote plasma CVD apparatus having gas selection supply means can be provided. To employ.

In addition, the hot-wall type remote plasma CVD apparatus employs a double quartz tube composed of an outer tube and an inner tube having many holes for Ar, N ₂ and NH ₃ gas plasma supply.

In addition, as to the substrate for LED devices, or SiC devices, employs an expensive sapphire substrate and SiC substrate other than the single crystal Si, polycrystalline Si, SiO _2, a device, a polycrystalline SiC, armor Force (amorphous) carbon and SiC substrates.

As a means for forming a good epitaxial GaN or SiC film on these substrates, the stress of the first epitaxial film must be alleviated, so that deep grooves are continuously formed in the device region, and the second further reduces the bonding of the epitaxial film. In order to make the crystal orientation constant, an etching pattern is used on the surface of the substrate by anisotropic etching or isotropic etching. The surface is etched so that a deep groove is formed in each substrate, and then a buffer film is formed on the substrate. .

Subsequently, as for the GaN device formation, a means for forming a SiO ₂ pattern and forming a good GaN epilayer by micro epitaxy on the buffer film is employed.

Then, a means for removing a large portion of the bonding of the SiO ₂ pattern, newly forming the SiO ₂ pattern in another portion, and again forming a good GaN epilayer by micro epitaxy is adopted.

As for SiC device formation, a buffer layer is formed directly on SiC and a single crystal Si substrate, and a polySi, SiOC, SiC film is formed on a SiC, an amorphous SiC, and a carbon substrate on a polycrystalline Si, SiO ₂ , element, and polycrystalline substrate. A means for forming a film is employed.

However, when a GaN epitaxial layer is formed at a high temperature of about 1000 to 2000 ° C in a MOCVD apparatus using a substrate on which an AlN or GaN buffer film formed by vertical pressure reduction CVD is formed, the oxide film on the surface of the buffer layer is formed by HCl or the like. It is necessary to etch.

It also employs a remote plasma etching device for throughput improvement and particle reduction.

According to the present invention, an AlN, GaN, AlGaN, InGaN, SiC buffer film is formed at a time on a single crystal Si, polycrystalline Si, SiO ₂ , element, polycrystalline SiC, amorphous SiC or carbon substrate which is less expensive than sapphire and sapphire as an LED substrate. It can be formed in a large amount of ˜200 sheets. Therefore, compared with the expensive chamber type MOCVD apparatus, since the board | substrate with a buffer film can be provided in large quantities by the low cost vertical pressure reduction CVD apparatus, there exists an effect which can reduce manufacturing cost. In addition, since the buffer film can be formed on polycrystalline Si, SiO ₂ , element, polycrystalline SiC, armor force SiC or carbon substrate, the width of the substrate that can be used can be widened, and the device price can be reduced. In addition, the remote plasma has an effect of cleaning, reducing particles, and improving the production rate of the device.

In the same manner, a SiC buffer layer can be formed in large quantities with 50 to 200 sheets of SiC buffer layer at a time on a single crystal Si, polycrystalline Si, SiO ₂ , a device, an amorphous SiC or a carbon substrate. Therefore, compared with a SiC single crystal substrate, since a low cost buffer layer or a board | substrate with a buffer film on a base film can be provided in large quantities, it is effective in reducing manufacturing cost.

1 is a diagram showing a sapphire (0001) substrate or a Si (111) substrate subjected to three symmetric anisotropic etching processes. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section.
Fig. 2 shows a single crystal Si (100) substrate subjected to four symmetric anisotropic etching processes. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section.
3 is a diagram showing a substrate subjected to four symmetric anisotropic etching processes. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section.
4 is a diagram showing a substrate subjected to a circular isotropic etching process. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section.
Fig. 5 is a diagram showing a sapphire and a single crystal Si substrate subjected to anisotropic etching on a line. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section. (e) is another detailed sectional drawing.
Fig. 6 is a diagram showing a substrate subjected to isotropic etching on a line. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing. (d) is a detailed cross section.
7 shows a substrate having a roughened surface. (a) is a board | substrate surface drawing. (b) is a top view. (c) is sectional drawing.
[8] the left SiO ₂ pattern to the altar parts of the substrate of Figure 1, a block diagram that shows the type forming the AlN buffer layer thereon.
Fig. 9 is a diagram in which SiO ₂ patterns are formed on the substrates of Figs. 1, 2, 5, or 8, AlN, GaN, and SiC buffer layers are formed, and single crystal GaN is further formed. (a) is a diagram showing a GaN single crystal transverse epitaxial growth method. (b) shows the GaN single crystal transverse epitaxial growth method after etching.
10 is a diagram in which a PolySi film, a buffer film, a GaN film, a SiO ₂ pattern, and a single crystal GaN film are formed on the substrates of FIGS. 1, 3, 4, 6, or 7. (a) is a diagram in which a single crystal n-type GaN is formed on a substrate as in FIG. 9 (a). (b) is a figure in which the single crystal n-type GaN was formed like FIG.9 (a) on the SiC film | membrane formed in the board | substrate.
Fig. 11 is a diagram in which a single crystal GaN film is formed on the substrate of Figs. 1, 3, 4, 6 or 7, in the same manner as in Fig. 9B. (a) is a figure in which the single crystal n-type GaN was formed in the board | substrate similarly to FIG. 9 (b). (b) is a diagram in which single crystal n-type GaN is formed on the substrate of FIG.
Fig. 12 is a diagram in which a single crystal GaN film is formed in the same manner as in Fig. 10 on the SiC film formed on the substrates of Figs. 3, 4, 6 or 7. (a) is a figure in which the single crystal n-type GaN was formed in the board | substrate similarly to FIG. (b) is a figure which formed the SiC film in the board | substrate, performed the same process as FIG. 10, and formed single crystal n-type GaN.
Fig. 13 is a diagram in which a SiC film is formed on the substrates of Figs. 3, 4, 6 or 7, and single crystal GaN is formed in the same manner as in Fig. 9B. (a) is a figure in which SiC (SiOC) is formed in a board | substrate, and single crystal n-type GaN is formed similarly to FIG. 9 (b). (b) is a diagram in which SiOC (SiC) is formed on a substrate and single crystal n-type GaN is formed in the same manner as in FIG.
Fig. 14 is a diagram showing a hotwall type vertical pressure reducing CVD apparatus using Al (CH ₃ ) ₃ gas, Ga (CH ₃ ) ₃ gas or In (CH ₃ ) ₃ gas and NH ₃ gas of the present invention.
Fig. 15 is a diagram showing a remote plasma vertical CVD apparatus using methyl silane or methyl methoxy silane gas of the present invention.
Fig. 16 shows a remote plasma type CVD apparatus using Al (CH ₃ ) ₃ gas, Ga (CH ₃ ) ₃ gas or In (CH ₃ ) ₃ gas and NH ₃ gas of the present invention.
Fig. 17 shows a remote plasma vertical CVD apparatus using methylsilane and methylmethoxysilane gas of the present invention.
Fig. 18 is a mimic diagram showing an open double inner quartz tube of a groove used in a remote plasma longitudinal CVD apparatus of the present invention and an Ar or N ₂ or NH ₃ gas inlet activated by a remote plasma.
Fig. 19 shows an LED device using a buffer film formed by the hotwall CVD apparatus of the present invention. (a) is a figure which shows the state in which the device was formed in the board | substrate. (b) shows a state where the supporting substrate is bonded and the electrode is formed in the n region.
Fig. 20 shows a SiC device using a buffer film formed by the hotwall CVD apparatus of the present invention. (a) is a figure which shows a Schottky diode. (b) shows a MOS transistor.

EMBODIMENT OF THE INVENTION Hereinafter, embodiment of this invention is described with reference to drawings. In addition, the same code | symbol is attached | subjected to the same part in each figure. The substrate may be a sapphire, monocrystalline Si, polycrystalline silicon, SiO ₂ , element, armored SiC, polycrystalline SiC, and carbon substrate, but the present invention is described with respect to the polycrystalline silicon, SiO ₂ , element, armored SiC, polycrystalline SiC and carbon substrate. Polycrystalline Si, SiOC or SiC films are formed from 100 to 500 nm from the reduced pressure CVD apparatus or the remote plasma CVD apparatus of the present invention.

In the case of an SiOC film, after about 100 nm is formed, 100-500 nm of polycrystalline Si and SiC films are laminated | stacked. The reason why the polycrystalline Si and SiC films are formed thick is that, for example, in polycrystalline Si, the crystal orientation tends to be directed in the (110) direction and crystallinity is obtained.

(Embodiment 1)

In FIG. 1, the epitaxial film | membrane stress relief recess used in Embodiment 1 is formed, and the board | substrate with which the surface was etched is shown. Moreover, in Embodiment 1, the board | substrate processed similarly to what was shown in FIGS. 2-8 can also be used. The detail of each figure is demonstrated below.

9 to 13 show an imitation diagram for the application of forming a buffer film and forming a GaN epitaxial film in the hotwall type pressure-sensitive CVD apparatus of the present invention.

FIG. 1 is a view showing a sapphire (0001) substrate or an Si (111) substrate subjected to anisotropic etching for manufacturing an LED or a SiC device.

(a) is a figure which shows the surface of a board | substrate. (b) is a diagram showing a substrate surface having a stress relief etching groove and a three-time object etching pattern.

(c) is a figure which shows the cross section of the whole board | substrate.

(d) is a figure which shows the cross section of an anisotropic etching pattern.

FIG. 2 shows anisotropically etched single crystal Si (100) substrates used in LED or SiC device fabrication.

(a) is a diagram showing the substrate surface. (b) shows the surface of a substrate with an etching groove for stress relaxation and an etching pattern of four symmetry.

(c) A diagram showing a cross section of the entire substrate.

(d) is a figure which shows an anisotropic etching cross section.

FIG. 3 is a diagram showing a substrate subjected to four symmetric isotropic etching processes used for manufacturing an LED or a SiC device.

(a) is a diagram showing the substrate surface.

(b) shows the surface of a substrate with a stress relief etching groove and a four symmetric isotropic etching pattern.

(c) is a figure which shows the cross section of the whole board | substrate.

(d) is a figure which shows the cross section of the 4th symmetric isotropic etching pattern.

4 shows a circular isotropically etched substrate used for fabricating an LED or SiC device.

(a) is a diagram showing the substrate surface.

(b) shows the surface of a substrate having a stress relief etching groove and a circular isotropic etching pattern.

(c) is a figure which shows the cross section of the whole board | substrate.

(d) is a figure which shows the cross section of a circular isotropic etching pattern.

FIG. 5 shows anisotropically etched sapphire and single crystal Si substrates used for fabricating LEDs or SiC devices.

(a) is a diagram showing the substrate surface.

(b) shows the surface of a substrate with a stress relief etching groove and a linear etching pattern.

(c) is a figure which shows the cross section of the whole board | substrate.

(d) is a figure which shows the cross section of a triangular etching pattern in cross section.

(e) is a figure which shows the cross section of a short etching pattern.

Fig. 6 is a diagram showing an isotropically etched substrate used for LED or SiC device fabrication.

(a) is a diagram showing the substrate surface.

(b) shows the surface of a substrate with an etching groove for stress relaxation and a linear isotropic etching pattern.

(c) is a diagram showing a substrate surface having an etching groove for stress relaxation and a linear isotropic etching pattern.

(d) shows the board | substrate cross section which has a stress relief etching groove and a linear isotropic etching pattern.

7 is a diagram showing a substrate having a roughened substrate surface used for fabricating a SiC device.

(a) is a diagram showing the substrate surface.

(b) shows the stress relief etching groove and the roughened substrate surface.

(c) is a figure which shows the cross section of the whole board | substrate.

(d) is a figure which shows the board | substrate cross section which made the surface rough. Surface roughness (roughness) is 0.1-1.0 micrometer.

Figure 8 is a view like to SiO ₂ pattern to the altar parts of the substrate of Figure 4 (or to form), displays the form of the formation of the AlN buffer layer thereon.

FIG. 9 forms an LED device substrate on which the SiO ₂ pattern is left and formed on the substrate of FIGS. 1, 2, 5, or 8, and an AlN, GaN, SiC sapphire layer 30 nm is formed, and a single crystal n-type GaN is further formed; It is a degree.

(a) is a diagram showing a lateral epitaxial growth method for obtaining a high quality GaN single crystal with few defects.

(b) is a diagram showing a lateral epitaxial growth method for obtaining a high quality GaN single crystal with few defects after etching the epitaxial layer between SiO ₂ patterns once.

FIG. 10 is a view showing an LED device substrate in which a PolySi film is formed on the substrates of FIGS. 3, 4, 6, or 7 to form a buffer film, a GaN film, a SiO ₂ pattern, and a GaN film.

(a) shows an LED device substrate on which a PolySi film is formed on a substrate of 300 to 500 nm, and the same process as in FIG. 9 (a) is performed to form a single crystal n-type GaN.

(b) shows an LED device substrate on which a polysilicon film is formed on a substrate of 300 to 500 nm, on which a SiC film is formed, and on which 30 nm is formed, a single crystal n-type GaN is formed by performing the same process as in FIG.

Fig. 11 is a view showing an LED device substrate on which a GaN film is formed in the same manner as in Fig. 9, on which a PolySi film is formed on the Figs. 3, 4, 6 or 7 substrate.

(a) is a figure which shows the LED device which formed the single crystal n-type GaN by performing the same process as FIG. 9 (b) on the 300-500 nm PolySi layer formed in the board | substrate.

(b) shows a LED device substrate in which a single crystal n-type GaN is formed in the same manner as in FIG. 9 (b) above, when a PolySi film is formed on a substrate of 300 to 500 nm, and a SiC film is formed on 30 nm.

Fig. 12 is a view showing an LED device substrate on which a GaN film is formed in the same manner as in Fig. 9A on the SiC film formed on the substrates of Figs. 3, 4, 6 or 7.

(a) is a figure which shows the LED device board | substrate which formed the single crystal n-type GaN by performing the same process as FIG.9 (a) on the SiC film | membrane 100-300 nm formed in the board | substrate.

(b) shows that the SiC film is formed on the substrate 100 to 300 nm, on which the PolySi film is formed 100 to 500 nm, the AlN buffer film is formed to 30 nm, and the same process as shown in Fig. 9 (a) is carried out. It is a figure which shows the LED device board | substrate which formed the type | mold.

FIG. 13 is a diagram showing an LED device substrate in which a SiC film is formed on the substrate of FIGS. 3, 4, 6, or 7, the same method as in FIG. 9 (b) is performed, and again a SiO ₂ pattern is formed, and further a GaN film is formed.

(a) An LED device substrate in which SiOC (SiC) is formed on a substrate in a range of 100 to 300 nm, and the same process as in FIG. 9 (b) is performed to form a SiO ₂ padan thereon, and further a single crystal n-type GaN is formed. Is a diagram showing.

(b) performs the same process as SiOC (SiC) of 100 ~ 300nm is formed, and 100 ~ 500nm which 9 above, forming 30nm AlN buffer film is formed (b) a film Polysi over the substrate, and over SiO ₂ Fig. 2 shows a LED device substrate in which a pattern is formed and further a single crystal n-type GaN is formed.

The substrate is sapphire and single crystal Si. In the case of monocrystalline Si, SiO ₂ , an element, an amorphous or polycrystalline SiC, and a carbon substrate, a buffer film is formed on the base film. The width and depth of the etching grooves or the roughness of the etching pattern and the surface are the same as described in FIG.

Fig. 14 shows a hotwall type pressure reducing CVD apparatus of the present invention. In order to form an AlN film, this apparatus uses N ₂ gas 101, H ₂ gas 102, Ar gas 103, NH ₃ gas 105, Al (CH ₃ ) ₃ gas or In (CH ₃ ) 3 gas 107, Ga (CH ₃ ) ₃ gas 108 and SiH ₄ gas 109, further comprising a remote plasma apparatus 203 for cleaning the inner quartz tube 402 and Ar gas 103, O ₂ gas 104 and NF ₃ gas 106 used therein. An embodiment in which an AlN, GaN, AlGaN or InGaN film is formed in the reduced pressure CVD apparatus of the present invention is shown.

The quartz board 301 is lowered from the upper and lower spheres 201, and the wafer 302 is mounted on the quartz board 301 by a handing device (not shown). The number of wafers 302 is 50 to 200 sheets. Thereafter, the board 301 is placed in the inner quartz tube 402 by the upper and lower openings 201. Thereafter, the inner quartz tube 402 and the outer quartz tube 402 are exhausted using an exhaust pipe 204 by an exhaust pump (not shown).

At this time, the temperature of the inner quartz tube 402 heated by the heater 405 becomes 400 degrees C or less when the quartz board 301 enters the inner quartz tube 402, and prevents the wafer 302 from being heated rapidly. After exhausting, the N ₂ gas 103 is controlled by the Maspro controller 124 to open the valve 123 and flows into the inner quartz tube using the stainless pipe 122. Usually, N ₂ gas 101 is flowed at about 1000 to 3000 cc / min so that the pressure is 0.5 to 2.0 Torr.

After flowing N ₂ gas, the temperature of the inner quartz tube 402 is raised to 1050 ° C. In the case of single crystal Si or PolySi, H ₂ gas 102 is flowed at 2000 to 3000 cc / min to remove the oxide film on the surface. After that, it is set at 600 to 1050 캜, which is an AlN formation temperature. Thereafter, the H ₂ gas 102 is stopped, and 50-100 cc / min of Al (CH ₃ ) ₃ gas 107 is flown. Or NH ₃ gas 105 is flowed at 3000 to 5000 cc / min.

At that time, 200 to 1000 cc / min of H ₂ gas 102 is flowed into the inner quartz tube 402 through the strainless pipe 121 as the diluent gas. In addition, He gas (not shown) may be flown instead of H ₂ gas. An AlN film is formed on the wafer 302 by the reaction of Al (CH ₃ ) ₃ gas 107 and NH ₃ gas 105. The Ga (CH ₃ ) ₃ gas or the In (CH ₃ ) ₃ gas may be added to 50 to 100 cc / min to form an AlGaN or InGan film. Deposition Rate is 1-5 nm / min. The film thickness is 10-50 nm.

In the cleaning of the inner quartz tube 402, the outer quartz tube 404 and the quartz board 301, plasma of Ar gas 102, O ₂ gas 104 and NF ₃ gas 105 is generated by the remote plasma 203. The remote plasma output is at 1-5KW and the pressure is 1-10Torr. The flow rate of Ar gas 102 is 50 to 2000 cc / min, the flow rate of O ₂ gas 104 is 500 to 1000 cc / min, and the flow rate of NF ₃ gas 105 is 1000 to 4000 cc / min.

(Embodiment 2)

Fig. 2 shows a substrate on which an epitaxial film stress relieving groove used in Embodiment 2 is formed and the surface is etched. Moreover, in Embodiment 2, the board | substrate shown in FIG. 1 and FIGS. 3-8 can also be used.

Fig. 15 shows a hotwall type pressure reducing CVD apparatus of the present invention. This device is used to form N ₂ gas 101, H ₂ gas 102, Ar gas 103 and O ₂ gas 104, SiH ₄ gas 109, SiH ₃ (CH ₃ ) ₃ gas 110, SiH ₃ (OCH ₃ ) to form SiC or SiOC film. It is composed of a gas 111 and a C 2 H ₄ gas 112, or a remote plasma apparatus 203 for cleaning inside the inner quartz tube 402 and Ar gas 103, O ₂ gas 104 and NF ₃ gas 106 used therein. An embodiment of forming SiC in the pressure-sensitive CVD apparatus of the present invention is shown.

In the same manner as in the first embodiment, the inner quartz tube 402 and the outer quartz tube 404 are exhausted.

The inner quartz tube was heated in the same manner as in the first embodiment, and the N ₂ gas 101 was flowed about 1000 to 3000 cc / min so that the pressure was from 05 to 2.0 Torr.

After flowing N ₂ gas, the temperature of the inner quartz tube 402 is raised to 600 to 1050 ° C, which is a SiC formation temperature. Thereafter, N ₂ gas 101 is stopped, and 100 to 500 cc / min of SiH ₃ (CH ₃ ) gas 107 is flowed. At that time, 200-1000 cc / min of Ar gas 103 flows into the inner quartz pipe 402 through the stainless pipe 122 as a dilution gas. In addition, He gas (not shown) may be flown instead of Ar gas. The SiC film is formed on the wafer 302 by decomposition of the SiH ₃ (CH ₃ ) gas 110. The deposition rate is 3-15 nm / min. The film thickness is 10-50 nm.

In _{addition, SiH 3 (CH 3) SiHx} (CH 3) 110 may be used instead of ₄ -x gas. Alternatively, in order to change the ratio of Si and C, 50 to 300 cc / min of SiH ₄ gas 109 or 100 to 300 cc / min of C ₂ H ₄ gas 112 may be added.

Cleaning of the inner quartz tube 402, the outer quartz tube 404 and the quartz board 301 is carried out in the same manner as in the remote first embodiment.

Embodiment 3

In Fig. 3, the epitaxial film stress relieving groove used in the third embodiment is formed, and the substrate whose surface is etched is shown. In addition, in Embodiment 3, the board | substrate shown in FIG. 1, 2 and FIGS. 4-8 can also be used.

In the case of the carbon substrate, the polycrystalline Si0 ₂ , the element, the amorphous SiC, and the polycrystalline SiC shown in FIGS. 3, 4, 6, and 7 are formed in advance, and the polycrystalline Si film is formed in advance in the first and second embodiments. The AlN or SiC buffer film shown is formed.

Fig. 14 shows a hotwall type pressure reducing CVD apparatus of the present invention. In order to form an AlN film, this apparatus is used to form N ₂ gas 101, H ₂ gas 102, Ar gas 103, NH ₃ gas 105, Al (CH ₃ ) ₃ gas or In (CH ₃ ) ₃ gas 107, Ga (CH ₃ ) ₃ from a remote plasma apparatus 203 and Ar gas 103, O ₂ gas 104 and NF ₃ gas 106 used for cleaning in the inner quartz tube 402, which are composed of ₃ gas 108 and SiH ₄ gas 109 to form a polycrystalline Si film. Is done. The embodiment which forms a polycrystalline Si film by this pressure reduction CVD apparatus is shown.

In the same manner as in the first embodiment, the inner quartz tube 402 and the outer quartz tube 404 are exhausted.

The inner quartz tube was heated in the same manner as in the first embodiment, and the N ₂ gas 101 composed of 0.5 to 2.0 Torr was flowed at about 1000 to 3000 cc / min.

After flowing N ₂ gas, the temperature of the inner quartz tube 402 is raised to 625 ° C., which is the formation temperature of polycrystalline Si. Thereafter, the N ₂ gas 101 is stopped and 50 to 300 cc / min of SiH ₄ gas 109 is flowed. At that time, Ar (He) gas 103 flows into the inner quartz tube 402 through the stainless pipe 122 as diluent gas from 0 to 1000 cc / min. The decomposition of SiH ₄ gas 109 forms a polycrystalline Si film on the wafer 302. Deposition is 10-50 nm / min. The film thickness is 300-500 nm.

Thereafter, an Al film was formed in the range of 10 to 30 nm in the same manner as in the first embodiment. In addition, a SiC film is formed by 10 to 30 nm in the same manner as in the second embodiment.

Cleaning of the inner quartz tube 402, the outer quartz tube 404 and the quartz board 301 is carried out in the same manner as in the remote first embodiment.

(Fourth Embodiment)

Fig. 4 shows a substrate on which an epitaxial film stress relieving groove used in Embodiment 4 is formed and the surface is etched. Moreover, in Embodiment 4, the board | substrate shown in FIGS. 1-3 or 5-8 can also be used.

In the case of the carbon substrate, polycrystalline Si, SiO ₂ , element, amorphous SiC, and polycrystalline SiC shown in FIGS. 3, 4, 6, and 7 are formed in advance, and 100 to 500 nm of the polycrystalline Si film is formed thereon. Laminated. On top of that, the AlN or SiC buffer films shown in Embodiments 1 and 2 are further formed.

Fig. 15 shows a hotwall type vertical pressure reduction CVD apparatus of the present invention. This device is designed to form SiO ₂ or SiC films such as N ₂ gas 101, H ₂ gas 102, Ar gas 102, O ₂ gas 104, SiH ₄ gas 109, SiH ₃ (CH ₃ ) ₃ gas 110, SiH ₃ (OCH ₃ ) 111 is made of a gas and C ₂ H ₄ gas 112, also it comprises a remote plasma device 203, and there are 103 Ar gas, O ₂ gas, and NF ₃ gas 104 106 for use in order to clean only the inner quartz tube 402 inside. An embodiment in which a SiO C film is formed in the reduced pressure CVD apparatus of the present invention is shown.

The inner quartz tube 402 and the outer quartz tube 404 were evacuated in the same manner as in the first embodiment.

The inner quartz tube was heated in the same manner as in the first embodiment, and the N ₂ gas 103 composed of 0.5 to 2.0 Torr was flowed about 1000 to 3000 cc / min.

After flowing N ₂ gas, the temperature of the inner quartz tube 402 is raised to 600 to 1050 ° C, which is a SiOC formation temperature. Thereafter, N ₂ gas 101 is stopped, and 100 to 500 cc / min of SiH ₃ (OCH ₃ ) gas 111 is flown. At that time, Ar gas 103 is flowed into the inner quartz tube 402 through the stainless pipe 122 as a diluent gas from 0 to 1000 cc / min. Alternatively, He gas (not shown) may be flown in place of Ar gas. The SiOC film is formed on the wafer 302 by decomposition of the SiH ₃ (OCH ₃ ) gas 111.

At this time, in order to adjust the ratio of Si and O, SiH ₃ (CH ₃ ) gas 110 or SiH ₃ (OCH ₃ ) gas 111 is used.

SiH ₄ Gas 107 may be added at 50 to 100 cc / min. Alternatively, the O ₂ gas 104 may be added at 50 to 100 CC / min. As a result, an SiOC film can be formed on the wafer 302. The deposition rate is 10-50 nm / min. Alternatively, SiHx (OCH ₃ ) ₄ -x and SiHx (CH ₃ ) ₄ -x gases may be used instead of SiH ₃ (OCH ₃ ) and SiH ₃ (CH ₃ ) ₃ gases 110. The film thickness is 100-500 nm.

Thereafter, 100 to 500 nm of polycrystalline Si is formed by the same method as in the third embodiment, and 10 to 30 nm of Al film is formed thereon by the same method as in the first embodiment. In addition, a SiC film is formed by 10 to 30 nm in the same manner as in the second embodiment.

The inner quartz tube 402, the outer quartz tube 404 and the quartz board 301 are cleaned in the same manner as in the remote first embodiment.

(Embodiment 5)

5, the epitaxial film | membrane stress relief recess used in Embodiment 5 is formed, and the board | substrate with which the surface was etched is shown. In Embodiment 5, the board | substrate shown in FIGS. 1-4 or 6-8 can also be used.

Fig. 16 shows a hotwall type remote plasma CVD apparatus of the present invention. This apparatus is used to form an AlN film such as N ₂ gas 101, H ₂ gas 102, Ar gas 103, NH ₃ gas 105, Al (CH ₃ ) ₃ gas or In (CH ₃ ) ₃ gas 107, Ga (CH ₃ ) _3. And a remote plasma apparatus 203 for plasmalizing N ₂ gas 101, Ar gas 103, or NH ₃ gas 105 to promote the reaction. There is made in the remote plasma device 203, and there is Ar gas 103, O ₂ gas, and NF ₃ gas 104 106 403 used for cleaning eyes in order to double the inner quartz tube. An embodiment of forming an AlN film in the hotwall type remote plasma CVD apparatus of the present invention is shown.

In the same manner as in the first embodiment, the double inner quartz tube 403 and the outer quartz tube 404 are exhausted.

The double inner quartz tube 403 is heated in the same manner as in the first embodiment, and the N ₂ gas 103 is flowed about 1000 to 3000 cc / min so that the pressure is 0.5 to 2.0 Torr.

After flowing N ₂ gas, the temperature of the double inner quartz tube 403 is raised to 1050 ° C. When the substrate is monocrystalline Si, polycrystalline Si, or when the substrate is a polycrystalline Si or SiC film, 2000 to 3000 cc / min of H ₂ gas 102 is flowed in order to remove the oxide film on the surface. Thereafter, the H ₂ gas 102 is stopped and the temperature of the double inner quartz tube 403 is lowered to 500 to 900 ° C., which is an AlN formation temperature. Thereafter, the N ₂ gas 101 is stopped and Al (CH ₃ ) ₃ gas 107 is flowed into the 50 to 100 cc / min double inner quartz tube 403 inside. Or NH ₃ gas 105 is flowed at 1000 to 5000 cc / min. At this time, H ₂ gas 102 is passed through the stainless steel pipe 110 as a diluting gas, and 200 to 1000 cc / min is passed through the double inner quartz tube 403.

NH ₃ gas 105 (or Ar gas 103, N ₂ gas 101) by the remote plasma 203 is analyzed and flows into the double inner quartz tube 403. At this time, the power of the plasma is 1-4KW. The flow rate of NH ₃ gas 105 (or Ar gas 103, N ₂ gas 101) flows from 1000 to 3000 cc / min. The plasmaized NH ₃ gas 105 (or Ar gas 103, N ₂ gas 101) is formed from the ring-shaped remote plasma inlet 203a and the remote plasma inlet 203b shown in FIG. placed between the parts of the quartz tube exterior 403b, the double quartz tube tube holes into dispersed in 403c to the interior of the double inner quartz tube 403, Al (CH ₃₎ mixed with a _third gas 107, and Al (CH _{3) 3} gas 107 Decompose

The reason why the plasmaized NH ₃ gas 105 flows through the inlet of the double inner quartz tube 403 and the hole of the double inner quartz tube 403c is to control the decomposition of the Al (CH ₃ ) ₃ gas 107 so that the AlN film is uniformly applied to the internal wafer 302. Because it forms. That is, in order to make the film thickness distribution between wafers good. As a result, an AlN film can be formed on the wafer 302. The deposition rate is 3-15 nm / min. The film thickness is 10-50 nm.

In addition, a Ga (CH ₃ ) ₃ gas or an In (CH ₃ ) ₃ gas 108 may be used for the Al (CH ₃ ) ₃ gas 107. When this is added, an AlGaN or AlIn film is formed.

Cleaning of the double inner quartz tube 403, outer quartz tube 404 and quartz board 301 is performed in the same manner as in the remote first embodiment.

(Embodiment 6)

Fig. 6 shows a substrate on which an epitaxial film stress relieving groove used in Embodiment 6 is formed and the surface is etched. In addition, in Embodiment 6, the board | substrate shown in FIGS. 1-5, 7, or 8 can also be used.

In the case of the carbon substrate after the polycrystalline Si, SiO ₂ , element, amorphous SiC, and polycrystalline SiC as shown in FIGS. 3, 4, 6, and 7, a SiOC film is formed in advance of 100 to 500 nm, and a polycrystalline Si film is stacked on top of 100 to 500 nm. do. On top of that, the AlN or SiC buffer films shown in Embodiments 1 and 2 are further formed.

Fig. 17 shows a hotwall type remote plasma CVD apparatus of the present invention. The device is designed to form a SiC or SiOC film by using N ₂ gas 101, H ₂ gas 102, Ar gas 103, O ₂ gas 104, SiH ₄ gas 109,

It consists of SiH ₃ (CH ₃ ) gas 110, SiH ₃ (OCH ₃ ) gas 111, and C ₂ H ₂ gas, and Ar gas 103 is composed of a remote plasma apparatus 203 for plasma formation to promote the reaction. Further, since the inner double quartz tube 403 is cleaned, the remote plasma apparatus 203 and Ar gas 103, O ₂ gas 104 and NF ₃ gas 106 used therein are used. An embodiment in which an SiC film is formed by the hotwall type remote plasma CVD apparatus is shown.

In the same manner as in the first embodiment, the double inner quartz tube 403 and the outer quartz tube 404 are exhausted.

The double inner quartz tube 403 was heated in the same manner as in the first embodiment, and N ₂ gas 101 was flowed at about 1000 to 3000 cc / min so that the pressure was 0.5 to 2.0 Torr.

After flowing N ₂ gas, the temperature of the double inner quartz tube 403 is raised to 1050 ° C. When the substrate is monocrystalline Si, polycrystalline Si, or when the substrate is a polycrystalline Si or SiC film, since the oxide film on the surface is removed, H ₂ gas 102 is flowed at 2000 to 3000 cc / min.

After flowing H ₂ gas, the temperature of the double inner quartz tube 403 is lowered to 500 to 900 ° C., which is a SiC formation temperature. Thereafter, the H ₂ gas 102 is stopped, and the SiH ₃ (CH ₃ ) gas 110 is flowed into the 500 to 300 cc / min double inner quartz tube 403. At that time, 100-1000 cc / min of Ar gas 103 flows into the double inner quartz tube 403 through the stainless pipe 122 as a diluent gas. Alternatively, He gas (not shown) may be flown in place of Ar gas. Or 200 to 1000 cc / min of H ₂ gas 102.

Ar gas is decomposed by the remote plasma apparatus 203 and flown into the double inner quartz tube 403. At this time, the plasma power is 1-4 KW. Ar flows at 1000-3000 cc / min. The plasmaized Ar gas enters a portion between the double quartz tube appearance 403a and the double quartz tube appearance 403b of the inner inner quartz tube 403 in the ring-shaped remote plasma inlet 203a and the remote plasma inlet 203b, and the double quartz tube the penetration into the interior of the dispersed double inner quartz tube 403 from the hole 403, SiH ₃ (CH ₃₎ mixed with the gas 110 and, SiH ₃ (CH ₃₎ carries out the decomposition of the gas 110.

The reason why the plasmaized Ar gas 102 flowed through the double inner quartz tube 403 inlet and the double inner quartz tube inner tube hole 403c is to control the decomposition of the SiH ₃ (CH ₃ ) gas 110 to form an SiC film evenly on the internal wafer 302. Because. In other words, the film thickness distribution between wafers is good. An SiC film is formed on the wafer 302.

As a result, a SiC film can be formed on the wafer 302. The deposition rate is 6-30 nm / min. The film thickness is 10-50 nm.

In _{addition, SiH 3 (CH 3) SiHx} (CH 3) in 110 instead of the _4-X may be used for gas. Alternatively, in order to change the ratio of Si and C, 20 to 200 cc / min of SiH ₄ gas 109 or 50 to 150 cc / min of C ₂ H ₄ gas 112 may be added.

Cleaning of the double inner quartz tube 403, outer quartz tube 404 and quartz board 301 is carried out in the same manner as in the remote first embodiment.

(Seventh Embodiment)

Fig. 7 shows a substrate on which the epitaxial film stress relieving grooves used in Embodiment 7 are formed and the surface is etched. In Embodiment 7, the substrate shown in FIGS. 1 to 6 or 8 can also be used.

In the case of the carbon substrate, the substrate is formed with 100 to 500 nm of the SiC film in advance, or the polycrystalline Si film is formed as it is or on top of the polycrystalline Si, SiO ₂ , element, amorphous SiC, and polycrystalline SiC shown in FIGS. 3, 4, 6, and 7 Stack 50 nm. On it, the AlN or SiC buffer films shown in Embodiments 1 and 2 are further formed.

Fig. 17 shows a remote plasma CVD apparatus of the hotwall type of the present invention. The device is made of N ₂ gas 101, Ar gas 103, O ₂ gas 104, SiH ₄ gas 109, SiH ₃ (CH ₃ ) gas 110, SiH ₃ (OCH ₃ ) gas 111, and C to form SiC or SiOC film. _It consists of a remote plasma apparatus 203 to plasma Ar gas 103 to promote the reaction, which is composed of ₂ H ₄ gas 112.

In order further to cleaning out the double inner quartz tube 403 inside of a gas composed of Ar 103, O ₂ gas, and NF ₃ gas 104 used in the 203 and 106 there is a remote plasma apparatus. An embodiment of forming a SiC film in the hotwall type remote plasma CVD apparatus is shown.

In the same manner as in Embodiment 1, the inner inner quartz tube 403 and the outer quartz tube 404 were exhausted.

The double inner quartz tube 403 is heated in the same manner as in the first embodiment, or the N ₂ gas 101 is flowed about 1000 to 3000 cc / min so that the pressure is 0.5 to ₂ Torr.

After flowing N ₂ gas, the temperature of the double inner quartz tube 403 is raised to 500 to 900 ° C., which is a SiC formation temperature. Thereafter, the N ₂ gas 101 is stopped and the SiH ₃ (CH ₃ ) gas 110 is flowed into the 100 to 500 cc / min double inner quartz tube 403. At that time, 100-1000 cc / min of Ar gas 103 flows into the double inner quartz tube 403 through the stainless pipe 122 as a dilution gas. In addition, He gas (not shown) may be flown instead of Ar gas.

The Ar gas is decomposed by the remote plasma apparatus 203 and flown into the double inner quartz tube 403. At this time, the plasma power is 1-4 KW. Ar flows at 1000-3000 cc / min. The plasma-formed Ar gas enters a portion between the double quartz tube exterior 403a and the double quartz tube exterior 403b of the double inner quartz tube 403 at the ring-shaped remote plasma inlet 203a and the remote plasma inlet 203b shown in FIG. the penetration tube holes into it from dispersing in the interior of the double inner quartz tube _{403 403c, SiH 3 (CH 3} ) mixed with the gas 110 and, SiH ₃ (CH ₃₎ carries out a decomposition gas 110.

The reason why the plasmaized Ar gas 102 flows through the inlet of the double inner quartz tube 403 and the hole of the double inner quartz inner tube 403c is to control the decomposition of the SiH ₃ (CH ₃ ) gas 110 to form the SiC film evenly on the wafer 302 inside. For that. That is, in order to make the film thickness distribution between wafers good. An SiC film is formed on the wafer 302.

As a result, a SiC film can be formed on the wafer 302. The deposition rate is 10-50 nm / min. The film thickness is 100-500 nm.

Alternatively, SiH _X (CH ₃ ) ₄ - _X gas may be used instead of SiH ₃ (CH ₃ ) gas 110. In order to change the ratio of Si and C, 20 to 100 cc / min of SiH ₄ gas 109 or 50 to 150 cc / min of C ₂ H ₄ gas 112 may be added.

Thereafter, 100 to 500 nm of polycrystalline Si is formed as is or in the same manner as in the third embodiment, and 10 to 30 nm of AlN film is formed thereon by the same method as in the first embodiment. Alternatively, a SiC film is formed by 10 to 30 nm in the same manner as in the second embodiment.

Cleaning of the double inner quartz tube 403, outer quartz tube 404 and quartz board 301 is carried out in the same manner as in the remote first embodiment.

Embodiment 8

8 shows a substrate in which an epitaxial film stress relieving groove used in Embodiment 8 is formed and the surface is etched. Moreover, in Embodiment 8, the board | substrate shown to FIGS. 1-7 can also be used.

Fig. 17 shows a hot plasma type remote plasma CVD apparatus of the present invention. This device is used to form N ₂ gas 101, H ₂ gas 102, Ar gas 103, O ₂ gas 104, SiH ₄ gas 109, SiH ₃ (CH ₃ ) ₃ gas 110, SiH ₃ (CH ₃ ) to form SiC or SiOC film. A gas 111, and a C ₂ H ₄ gas 112 gas, and a remote plasma apparatus 203 for plasmalizing Ar gas 103 to promote the reaction. Furthermore, it consists of a remote plasma apparatus 203 and Ar gas 103, O ₂ gas 104 and NF ₃ gas 106 used therein for cleaning in the double inner quartz tube 403. An embodiment in which an SiOC film is formed in a hotwall type remote plasma CVD apparatus is shown.

In the same manner as in the first embodiment, the double inner quartz tube 403 and the outer quartz tube 404 are exhausted.

The double inner quartz tube 403 is heated in the same manner as in the first embodiment, or the N ₂ gas 101 is flowed at about 1000 to 3000 cc / min so that the pressure is 0.5 to 2.0 Torr.

After flowing N ₂ gas, the double inner quartz tube 403 temperature is raised to 500 to 900 ° C., which is a SiOC formation temperature. Thereafter, the N ₂ gas 101 is stopped and the SiH ₃ (CH ₃ ) gas 110 is flowed into the 100 to 500 cc / min double inner quartz tube 403. At that time, 100-1000 cc / min of Ar gas 103 flows into the double inner quartz tube 403 through the stainless pipe 122 as a diluent gas. Alternatively, He gas (not shown) may be flown in place of Ar gas.

Ar gas is decomposed from the remote plasma apparatus 203 to flow inside the double inner quartz tube 403. At this time, the plasma power is 1-4KW. The flow rate of Ar flows 1000-3000 cc / min. The plasmaized Ar gas enters a portion between the double quartz tube 403a and the double quartz tube 403b of the double inner quartz tube 403 at the ring-shaped remote plasma inlet 203a and the remote plasma inlet 203b shown in FIG. 403c in dispersed into the inner quartz tube 403 inside the double, SiH ₃ (OCH ₃₎ mixed with the gas 111 and, SiH ₃ (OCH ₃₎ 111 performs the gas decomposition.

The reason why the plasmaized Ar gas 102 flows through the double inner quartz tube 403 inlet and the double inner quartz tube inner tube hole 403c is to control the decomposition of the SiH ₃ (OCH ₃ ) gas 111 to form the SiC film evenly on the wafer 302 inside. to be. That is, in order to make the film thickness distribution between wafers good. Thus, a SiC film is formed on the wafer 302.

As a result, a SiC film can be formed on the wafer 302. The deposition rate is 10-50 nm / min. The film thickness is 100-500 nm.

Alternatively, SiH _X (OCH ₃ ) _{4 -X} gas may be used instead of SiH ₃ (OCH ₃ ) 111. Also it may be changed to the SiH ₄ gas 109 50 ~ 100cc / min, or C ₂ H ₄ gas 112 was added 50 ~ 150cc / min for the ratio of the Si and C.

Thereafter, 100 to 500 nm of polycrystalline Si is formed by the same method as in the third embodiment, and 10 to 30 nm of the AlN film is formed thereon by the same method as in the first embodiment. Alternatively, a SiC film is formed by 10 to 30 nm in the same manner as in the second embodiment.

Cleaning of the double inner quartz tube 403, outer quartz tube 404 and quartz board 301 is carried out in the same manner as in the remote first embodiment.

Table 1 shows the relationship between substrate surface processing, substrate material and buffer film.

Substrate Surface Processing Substrate Material Buffer layer Sapa
Following Single crystal
Si Polycrystalline
Si Polycrystalline
SiC Armor Force SiC Si02 device Carbon AlN GaN 3 symmetric anisotropic etching ○ ○ X X X X X X ○ ○ 4 symmetric anisotropic etching X ○ X X X X X X ○ ○ 4 symmetric isotropic etching ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ Circular isotropic etching ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ Striped Anisotropic Etching ○ ○ X X X X X X ○ ○ stripe
Isotropic Etching X ○ ○ ○ ○ ○ ○ ○ ○ ○ Roughen a surface ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○: required X: not required The SiO 2 pattern may be used for etching the substrate or may be newly formed. (111), (001) plane, etc. are used for single-crystal Si. Sapphire is used in many ways.

Table 2 shows the relationship between the substrate material, the barrier film and the underlying film. Substrate Material Buffer layer Lower curtain SiN film PolySi Film Si0C film SiC film Sapphire X X X X Single crystal X X X X Polycrystalline X X X X Polycrystalline ○ ○ ○ ○ Armafoss ○ ○ ○ ○ Si02 X? ○ ○ ○ device ○ ○ ○ ○ Carbon ○ ○ ○ ○ ○: required X: not required As the barrier film, a SiN film is used for impurity diffusion.

Table 3 shows the conditions of the embodiment. Torr Temperature (℃) SiH (CH3) 3 SiH (CH3) 3 Dilution Ar (He) SiH4 C2H4 O2 Al (CH3) 3 NH3 0.5 to 2.0 600-1050 50-100 3000 ~ 5000 0.5 to 2.0 600-1050 100-500 200-1000 50 to 200 100-300 0.5 to 2.0 625 0-1000 0-1000 50 to 300 0.5 to 2.0 600-1050 100-500 50-100 0-1000 0-1000 50-100 50-100 0.5 to 2.0 500-900 50-100 1000-5000 0.5 to 2.0 500-900 50 to 200 100-1000 100-1000 50 to 150 50 to 150 0.5 to 2.0 500-900 100-1000 50 to 150 50 to 150 0.5 to 2.0 500-900 100-1000 50 to 150 50 to 150 Ga (CH3) 3 In (CH3) 3 Power (KW) Plasma NH3 Plasma Ar Torr Power (KW) Ar 02 NF2 D.R (nm / min) 50-100 50-100 1-10 1-5 500-2000 500-1000 1000-4000 1-5 1-10 1-5 500-2000 500-1000 1000-4000 3-15 1-10 1-5 500-2000 500-1000 1000-4000 10 to 50 1-10 1-5 500-2000 500-1000 1000-4000 10 to 50 1-4 1000-3000 1-10 1-5 500-2000 500-1000 1000-4000 3-15 1-4 1000-3000 1-10 1-5 500-2000 500-1000 1000-4000 6-20 1-4 1000-3000 1-10 1-5 500-2000 500-1000 1000-4000 10 to 50 1-4 1000-3000 1-10 1-5 500-2000 500-1000 1000-4000 10 to 50

Table 4 shows the conditions of the examples. Temperature (℃) SiH3 (OCH3) SiH3 (CH3) Dilution Ar (He) SiH4 C2H4 O2 Al (CH3) 3 NH3 H2 800 75 3000 500 800 3000 500 750 200 500 750 150 500 50 625 500 800 200 500 700 75 2000 500 700 2000 500 650 150 1000 650 100 1000 50 650 200 1000 650 200 1000 In (CH3) 3 Power (KW) Plasma NH3 Plasma Ar Torr Power (KW) Ar O2 NF3 D.R (nm / min) 3 3 1000 750 3000 3 3 3 1000 750 3000 3 3 3 1000 750 3000 7 3 3 1000 750 3000 6 3 3 1000 750 3000 20 3 3 1000 750 3000 15 2 2000 3 3 1000 750 3000 6 2 2000 3 3 1000 750 3000 6 2 2000 3 3 1000 750 3000 14 2 2000 3 3 1000 750 3000 12 2 2000 3 3 1000 750 3000 20 2 2000 3 3 1000 750 3000 20

1. Substrate 2. Etching Pattern
2a. PolySi 2b. rough surface
3. Etching Groove 4. AlN (GaN)
5.SiO ₂ Pattern 6.GaN
7. Defective GaN 8. SiO ₂ Pattern
9.GaN 10.PolySi
11.SiN 12.SiC (SiOC)
20. Substrate 21. Sapphire layer
22. n-type GaN 23. Multiple quantum depletion (5MQWs)
24. p-clad layer 25. p-type GaN
31. Process metal 32. Support substrate (metal)
33. Electrode (n-type contact) 51. Back electrode
52a. Etching Groove 52b. Etching hole
53. SiC buffer layer 54. SiC epitaxial layer
55. Withstand voltage termination (P ⁺ ) 56. Schottky electrode
61.P month 62.Source and drain
63. Gate oxide 64. Gate electrode
65. Source and drain electrodes 101. N ₂
102.H ₂ (Ar) 103.Ar
104.O ₂ 105.NH ₃
106.NF ₃ 107.Al (CH ₃ ) ₃ is or In (CH ₃ ) ₃
108.Ga (CH ₃ ) ₃ 109.SiH ₃
110.SiH ₃ (CH ₃ ) 111.SiH ₃ (0CH ₃ )
112.C ₂ H ₄ 121.Stainless steel pipe for O ₂ gas
122. Strainless pipes for reactive gases 123. Valves
124. Mass Pro Controller 201.
202. Manufacture 203. Remote Plasma
203a. Remote Plasma Inlet 203b. Remote plasma introduction port
204. Exhaust Pipe 301. Quartz Port
302. Wafer 402. Inner quartz tube
403. Double inner quartz tube 403a. Double quartz appearance
403b. Double quartz tube 403c. Duplex Quartz Tube Bore
404. Outer quartz tube 405. Heater
501. SiO ₂ Pattern 502. SiC Buffer Layer
503. 503 Annealed SiC layer 504. N-type GaN layer
505.MQW layer 506.P type GaN layer
507. LED Pattern 508. Heat Sink
509.SiON + SiO ₂ 601.SiC buffer layer
602. 503 Annealed SiC layer 604. N-type SiC layer
605. P Wall 606. Gate Si0 ₂ Film
607.Gate electrode 608.N-type source, drain
609 SiO ₂ 610. Wiring connection hole
611. Wiring

Claims (14)

A load lock chamber for evacuating the chamber and preventing oxidation of the deposition film; And
Remote plasma apparatus; And
Top and bottom of the board; And
At least one gas supply system selected from methyl gallium, methyl aluminum, methyl indium, silane, ammonia, alcohol, hydrogen, and nitrogen; And
In the semiconductor manufacturing apparatus including the CVD apparatus provided with the gas selection supply means which selects and supplies any one or more of said gases to the processed board | substrate,
The CVD apparatus is a pressure reduction CVD apparatus and a semiconductor manufacturing apparatus of a plurality of wafer deposition treatment vertical hotwall type.
A load lock chamber which exhausts the chamber and prevents oxidation of the deposition film; And
Remote plasma apparatus; And
Double inner quartz tube; And
Boards; And
At least one feed system selected from methyl gallium, methyl aluminum, methyl indium, silane, ammonia, alcohol, hydrogen, nitrogen; And
A semiconductor manufacturing apparatus comprising a CVD apparatus having a gas selective supply means for selecting and supplying at least one gas selected from the above gases to a processed substrate,
The CVD apparatus is a plurality of wafer deposition processing vertical hotwall type remote plasma CVD apparatus and semiconductor manufacturing apparatus.
A load lock chamber for evacuating the chamber and preventing oxidation of the deposition film; And
Remote plasma apparatus; And
Boards; And
A gas supply system of at least one of the above gases selected from silane, methylsilane, methylmethoxysilane, ethylene (or hydrocarbon), ammonia, alcohol, hydrogen, nitrogen; And
A semiconductor manufacturing apparatus comprising a CVD apparatus having a gas selection supply means for selecting and supplying any one or more selected gases to a processed substrate.
And said CVD apparatus is a vertical hotwall type pressure reducing CVD apparatus and semiconductor manufacturing apparatus for a plurality of wafer deposition processes.
A load lock chamber for evacuating the chamber and preventing oxidation of the deposition film; And
Remote plasma apparatus; And
Double inner quartz tube; And
Top and bottom of the board; And
At least one gas supply system selected from silane, methylsilane, methylmethoxysilane, ethylene, hydrocarbon, ammonia, alcohol, hydrogen, nitrogen; And
A semiconductor manufacturing apparatus comprising a CVD apparatus having a gas selection supply means for selecting and supplying any one or more selected gases from the gases to a processed substrate.
The CVD apparatus is a plurality of wafer deposition treatment vertical hotwall type remote plasma CVD apparatus and semiconductor manufacturing apparatus.
The method according to any one of claims 2 to 4,
A double inner quartz tube has an outer tube and a plurality of grooved inner tubes for supplying Ar, N ₂ or NH ₃ gas plasma.
The method according to any one of claims 1 to 5,
Design a groove around the device area,
The substrate is a substrate etched surface is a semiconductor manufacturing apparatus, characterized in that any one or more selected from sapphire, single crystal Si, polycrystalline Si, Si0 ₂ , element, polycrystalline SiC, armored SiC or carbon.
Designing a groove around the device area; And
Forming a polycrystalline Si or SiC film on the substrate for etching the surface; And
And forming at least one buffer film selected from AlN, GaN, AlGaN, GaInN or AlIn on the polycrystalline Si or SiC film.
Designing a groove around the device area; And
Forming a SiOC film on the substrate for etching the surface of the LED; And
Forming a polycrystalline Si or SiC film on the formed SiOC film; And
Of the AlN, GaN, AlGaN, GaInN or AlInN film on the formed polycrystalline Si or SiC film
A method for manufacturing a semiconductor manufacturing device, comprising forming at least one selected buffer film.
Designing a groove around the device area; And
Forming a Si0C film on the substrate for an SiC device whose surface is etched; And
Forming a polycrystalline Si or SiC film on the formed Si 0 C film.
Designing a groove around the device area; And
Forming a SiC film on a substrate for an SiC device whose surface is etched; And
And forming a polycrystalline Si or SiC film in the same manner on the formed SiC film.
Designing a groove around the device area; And
Forming a polycrystalline Si film and a SiC film on the substrate for etching the surface thereof; And
Forming at least one buffer film selected from AlN, GaN, AlGaN, GaInN or AlIn film on the polycrystalline Si film and SiC film; And
A GaN microphone channel epitaxial is performed using a Si0 ₂ pattern to form a GaN single crystal film.
Designing a groove around the device area; And
Forming a polycrystalline Si film and a SiC film on the substrate for etching the surface thereof; And
Forming at least one buffer film selected from AlN, GaN, AlGaN, GaInN, or AlIn film on the polycrystalline Si film and SiC film; And
Using the SiO ₂ pattern subjected to epitaxial GaN microchannel, to a different location to form a SiO ₂ pattern, it performs the re-GaN microchannel epitaxial process for producing a semiconductor manufacturing apparatus so as to form a GaN single crystal film.
Designing a groove around the device area; And
Forming a polycrystalline Si film and a SiC film on the substrate for etching the surface thereof; And
Forming at least one buffer film selected from an AlN, GaN, AlGaN, GaInN or AlInN film on the polycrystalline Si film and SiC film; And
GaN microchannel epitaxial is performed using an SiO2 pattern, the GaN crystals between the Si02 patterns are etched, a Si0 ₂ pattern is formed at another position, a Si02 pattern is formed again, and a GaN microchannel epitaxial is performed again, GaN A semiconductor manufacturing apparatus manufacturing method characterized by forming a single crystal film.
Designing a groove around the device area; And
Forming a SiC or Si0C buffer film on the substrate whose surface is etched; And
And forming a SiC epitaxial film on the SiC or Si0C buffer film.

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