KR20130028583A - Method of manufacturing circuit board and circuit board prepared by the same - Google Patents

Abstract

PURPOSE: A circuit board and a manufacturing method thereof are provided to prevent the etching defect of a circuit pattern by forming a bump later after forming a micro circuit pattern first. CONSTITUTION: A second insulation layer(232) is formed in an area except a bump(222). The outer surface of the second insulation layer is formed to be flat against the outer surface of the bump materially. A third insulation layer is formed on the first insulation layer. A second conductive layer is formed on the outer surface of the third insulation layer. The second conductive layer equips with a second circuit pattern.

Description

Method for manufacturing circuit board and circuit board {Method of manufacturing circuit board and circuit board prepared by the same}

The present invention relates to a method for manufacturing a circuit board and a circuit board, and more particularly, to a method for manufacturing a circuit board and a circuit board from which etching defects of a circuit pattern are removed.

In recent years, the number of components has been increasing due to the smaller size of electronic components and consumers preferring one product to have various functions. Therefore, a technique for mounting a large number of electronic components on a circuit board at a high density is required. A multi-layer circuit board is a component of an electronic device in which a plurality of substrates are stacked in a multilayer manner to mount electronic components. The multilayer circuit board is capable of performing a number of complicated functions electrically in comparison with a single-sided or double-sided board, and is widely used in various electronic apparatuses because it enables high-density mounting of electronic components.

Multi-layered circuit boards form wiring for electrically connecting components to the substrates of each layer, stack a plurality of substrates, and then drill holes for electrically connecting the respective layers and plate the holes. Or a conductive paste is filled into the holes. In the case of manufacturing the multilayer circuit board, the thickness of the substrate becomes thick, and there is a problem in that the ultra-thin multilayer circuit board cannot be manufactured.

In addition, the multilayer circuit board may include bumps and microcircuit patterns. Often, when the microcircuit pattern is formed, etching defects occur to obtain a desired pattern.

One embodiment of the present invention is to provide a circuit board manufacturing method and a circuit board is removed from the etching defect of the circuit pattern.

According to an embodiment of the present invention for achieving the above object, the step of forming a first circuit pattern to remove a portion of the conductive substrate on one surface of the conductive substrate; A first insulating layer is formed by filling an insulating material in a portion of the first circuit pattern from which the conductive substrate is removed, wherein the outer surface of the first insulating layer is substantially flat with the outer surface of the first circuit pattern. Embedding the insulating material; Forming a protruding bump by removing a portion of the conductive substrate on the other surface opposite to the one surface on which the first circuit pattern is formed; And forming a second insulating layer on a portion of the conductive substrate from which a portion of the conductive substrate is removed to form the bump, wherein the outer surface of the second insulating layer is formed to be substantially flat with the outer surface of the bump; It provides a method of manufacturing a circuit board comprising a.

According to another feature of the invention, the insulating material is a liquid resin or a liquid solder resist.

According to another feature of the invention, the second insulating layer is formed using a resin or prepreg that is the same as the liquid resin or larger in viscosity than the liquid resin.

According to another feature of the invention, the step of forming the first circuit pattern, the step of forming a first preliminary pattern including an opening in a photosensitive resist on one surface of the conductive substrate; Forming the first circuit pattern by supplying an etchant to an opening of the first preliminary pattern to remove a portion of the conductive substrate; And removing the first preliminary pattern. It includes.

According to another feature of the present invention, the forming of the bumps may include forming a second preliminary pattern including openings on the other surface of the conductive substrate with photosensitive resists; Forming the bumps by supplying an etchant to the openings of the second prepattern to remove a portion of the conductive substrate; And removing the second preliminary pattern. It includes.

According to another feature of the invention, forming a third insulating layer and a conductive layer including a second circuit pattern on the surface on which the first circuit pattern is formed; It includes.

According to another feature of the invention, the step of mounting a chip electrically connected to the bump on the surface formed bump; It includes.

According to another feature of the invention, forming a third insulating layer including the same material as the second insulating layer on the surface on which the first circuit pattern is formed; Forming a conductive layer on an outer surface of the third insulating layer; Forming a third preliminary pattern including openings on the outer surface of the conductive layer using photosensitive resists; Forming the second circuit pattern by supplying an etchant to the opening of the third prepattern to remove a portion of the conductive layer; And removing the third preliminary pattern. It includes.

According to another feature of the invention, removing the portion of the third insulating layer, forming a hole for electrically connecting the first circuit pattern and the second circuit pattern; It includes.

According to another feature of the invention, after the step of forming the first insulating layer, the step of bonding the two conductive substrates having the first circuit pattern and the first insulating layer with a separation film therebetween; Forming the protruding bumps on each of the conductive substrates; Forming a second insulating layer on each of the conductive substrates; And separating each of the conductive substrates from the separation film. .

According to an embodiment of the present invention for achieving the above object, a first conductive layer having a first circuit pattern on one surface, and having a bump protruding opposite the first circuit pattern on the other surface; A first insulating layer buried in a concave portion of the first circuit pattern and having an outer surface substantially buried with an outer surface of the first circuit pattern; A second insulating layer formed on a portion other than the protruding bumps and having an outer surface substantially flat with an outer surface of the bumps; A third insulating layer formed on the first insulating layer; A second conductive layer formed on an outer surface of the third insulating layer and having a second circuit pattern; .

According to another feature of the invention, it further comprises a hole for electrically connecting the first circuit pattern and the second circuit pattern.

According to another feature of the invention, the chip is electrically connected to the bump and mounted on the surface having the bump of the first conductive layer; .

According to the exemplary embodiment of the present invention as described above, the etching defect of the circuit pattern is removed, the thickness of the circuit board is reduced, and the chip can be stably mounted on the surface having excellent surface flatness. You can get the effect.

1 to 10 are cross-sectional views schematically showing a method of manufacturing a circuit board according to an embodiment of the present invention.
11A and 11B are comparative examples for showing the effect of the circuit board manufacturing method of the present invention.
12 and 13 are cross-sectional views schematically illustrating a method of manufacturing a circuit board according to another embodiment of the present invention.
14 to 18 are schematic cross-sectional views illustrating a method of manufacturing a circuit board according to still another embodiment of the present invention.

As the present invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. It is to be understood, however, that the invention is not to be limited to the specific embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The terms first, second, etc. may be used to describe various elements, but the elements should not be limited by terms. The terms are used only to distinguish one component from another.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In the present application, the terms "comprises", "having", and the like are used to specify that a feature, a number, a step, an operation, an element, a component, Should not be construed to preclude the presence or addition of one or more other features, integers, steps, operations, elements, parts, or combinations thereof.

Hereinafter, with reference to the preferred embodiment of the present invention shown in the accompanying drawings will be described in detail the present invention.

1 to 10 are cross-sectional views schematically showing a method of manufacturing a circuit board according to an embodiment of the present invention.

Referring to FIG. 1, first, a conductive substrate 210 is prepared.

Since the substrate 210 is a part for forming a pattern for transmitting an electrical signal in the multilayer circuit board, the substrate 210 may include a material that conducts electricity such as copper (Cu) or silver (Ag).

Although the substrate 210 has a flat plate shape, the substrate 210 is cut in the thickness direction to illustrate a cross section. In the method of manufacturing a circuit board described below, various materials including the substrate 210 may be provided in a form wound on a reel, and are etched with respect to the substrate 210 released from the reel as the reel rotates. A process or a process of applying another material can be carried out.

2 to 4, the first circuit pattern 221 is formed on one surface of the conductive substrate 210.

In detail, after applying a photoresist to one surface of the substrate 210 and then applying an exposure process and a developing process through a mask, a portion of the photosensitive resist on one surface of the substrate 210 is removed, and thus shown in FIG. 2. As described above, a first preliminary pattern 221a including an opening is formed. The first preliminary pattern 221a is formed at the position where the first circuit pattern 221 is to be formed on the substrate 210.

When a wet etching process is applied by supplying an etchant to the openings in the substrate 210, portions of the substrate corresponding to the openings of the first preliminary pattern 221a are removed by the etchant, as shown in FIG. 3. The first circuit pattern 221 is formed in a portion corresponding to the first preliminary pattern 221a.

As illustrated in FIG. 4, the first preliminary pattern 221a is removed after the first circuit pattern 221 is formed.

According to one embodiment of the present invention, the first circuit pattern 221 is characterized in that the fine circuit pattern of less than about 80 pitch (pitch). Here, the pitch means a distance from one side of one circuit line to one side of another adjacent circuit line, and 80 pitches or less means a fine circuit pattern having one pitch of 80 nm or less. However, the standard of the first circuit pattern 221 is not limited to the above description, and may be variously modified as necessary.

Referring to FIG. 5, a first insulating layer 231 is formed on a surface on which the first circuit pattern 221 is formed.

In detail, the first insulating layer 231 is formed by filling an insulating material in a recess in which a portion of the substrate 210 is removed from the first circuit pattern 221. Here the insulating material completely fills the recess. In addition, the outer surface of the first insulating layer 231 fills the insulating material to be substantially flat with the outer surface of the first circuit pattern 221. Referring to the enlarged view of FIG. 5, the depth t of the concave portion of the first circuit pattern 221 is substantially the same as the height t of the first insulating layer 231. Therefore, the virtual line extending the outer surface of the first insulating layer 231 and the virtual line extending the outer surface of the first circuit pattern 221 substantially coincide with each other.

On the other hand, the insulating material constituting the first insulating layer 231 is characterized in that the liquid insulating material. Only then, the insulating material may completely fill the recessed portion of the first circuit pattern 221. The insulating material may be, for example, a liquid resin or a liquid solder resist. Since the liquid resin is easy to control the viscosity, the concave portion of the first circuit pattern 221 may be completely filled. Since the liquid solder resist is a material such as a thin liquid, the concave portion of the first circuit pattern 221 may be completely filled. On the other hand, the insulating material may be a first insulating layer 231 through a process of hardening after filling the concave portion in the liquid phase.

According to an embodiment of the present invention, the outer surface of the first insulating layer 231 is buried with an insulating material so as to be substantially flat with the outer surface of the first circuit pattern 221, whereby the first circuit pattern 221 is a buried pattern ( buried pattern). From such a structure, the overall thickness of the circuit board can be reduced to produce an ultra-thin circuit board.

6 and 7, bumps 222 are formed on the other surface of the substrate 210.

In detail, after the photosensitive resist is applied to the other surface of the substrate 210 and then subjected to an exposure process and a developing process through a mask, a portion of the photosensitive resist on one surface of the substrate 210 is removed to open the opening as shown in FIG. 6. A second preliminary pattern 222a including a is formed. The second preliminary pattern 222a is formed at the position where the bump 222 is to be formed on the substrate 210.

When a wet etching process is applied by supplying an etchant to the openings in the substrate 210, portions of the substrate corresponding to the openings of the second preliminary pattern 222a are removed by the etchant, as shown in FIG. 7. The bumps 222 are formed in portions corresponding to the second preliminary patterns 222a. After the bump 222 is formed, the second preliminary pattern 222a is removed.

According to one embodiment of the present invention, the bump 222 has the same configuration as the filled via hole. That is, the bump 222 is integrally formed with the first circuit pattern 221 to electrically connect with the chip or other circuit pattern to be formed on the other surface of the substrate 210.

According to an embodiment of the present invention, the first circuit pattern 221 is formed first and the bumps 222 are formed later, so that the bumps 222 are formed first and the first circuit patterns 221 are formed later. There is an effect of eliminating the unetched failure of the fine circuit pattern. This will be described in detail later with reference to FIGS. 11A and 11B.

Referring to FIG. 8, a second insulating layer 232 is formed on the surface on which the bumps 222 are formed.

In detail, the second insulating layer 232 is formed in the recess in which a part of the substrate 210 is removed to form the bump 222. The second insulating layer 232 includes a material that is not electrically conductive and has a rigidity to support the substrate 210.

Similar to the first insulating layer 231, the outer surface of the second insulating layer 232 is formed to be substantially flat with the outer surface of the bump 222. Referring to the enlarged view of FIG. 5, the virtual line extending the outer surface of the second insulating layer 232 and the virtual line extending the outer surface of the bump 222 substantially coincide with each other. That is, the second insulating layer 232 covers the substrate 210 to protrude only the upper surface of the bump 222, not the side surface thereof.

Meanwhile, the second insulating layer 232 includes a material capable of maintaining the rigidity of the circuit board. The second insulating layer 232 may include a material for manufacturing a rigid substrate. For example, the second insulating layer 232 may include resin or prepreg. In this case, the resin may be the same resin as the resin of the first insulating layer 231 or may have a higher viscosity than the resin of the first insulating layer 231. Only then can the resin be filled to a certain thickness. Meanwhile, the prepreg may be attached by applying a predetermined heat and pressure to the other surface of the substrate on which the bumps 222 are formed as the uncured film type. Since the resin and the prepreg constituting the second insulating layer 232 have a high viscosity or a film type, when the materials constituting the second insulating layer 232 are applied to the first insulating layer 231, the width and the prepreg thereof are about the same. There may be a problem that the filling of the concave portion of the fine first circuit pattern 221 that is several tens of nm or less may occur completely. On the other hand, it may be a second insulating layer 232 through a process of curing after the resin or prepreg is formed.

9, protective layers 241 and 242 are further formed on the substrate.

The protective layers 241 and 242 may use a photo solder resist (PSR), and may include a component in which an acrylate is included in the exposeable epoxy, but is not limited thereto. The protective layers 241 and 242 protect the first circuit patterns 221 and the bumps 222 from the outside, and the protective layers 241 and 242 have openings so that the first circuit patterns 221 and the bumps 222 may be formed. Expose some.

Referring to FIG. 10, solder bumps 251 and the like are formed to connect chip bonding or another substrate.

For example, a solder bump 251 for board connection is attached to the first circuit pattern 221 exposed under the circuit board. Although not shown, the chip may be mounted on the surface of the bump 222 exposed to the upper side of the circuit board through the solder bumps for chip attachment.

11A and 11B are comparative examples for showing the effect of the circuit board manufacturing method of the present invention.

In the comparative example, the bump 222 is first formed differently from the exemplary embodiment of the present invention, and the first circuit pattern 221 (that is, the fine circuit pattern) is formed. In FIG. 11A, the bump 222 is formed by partially removing the upper surface of the circuit board, and the second insulating layer 232 is formed on the surface on which the bump 222 is formed, and then the first preliminary pattern 221a is disposed below the circuit board. ) Is a schematic cross-sectional view showing a process of forming the first circuit pattern 221 by generating a. Reference numeral 242 corresponds to a protective layer and may be omitted.

FIG. 11B is an enlarged photograph of the inside of a dotted line in FIG. 11A.

Referring to FIG. 11B, when the bump 222 is first formed and the microcircuit pattern 221 is formed, there is a problem in that the unetching failure of the microcircuit pattern 221 occurs. In detail, the bump 222 or the microcircuit pattern 221 is formed by wet etching, wherein the substrate is isotropically etched by the etching solution. Isotropic etching means that etching occurs at the same speed in any direction, and as shown in FIG. 11B, the etching portion has a constant curvature. Accordingly, the portion of the concave portion between the bump 222 and the bump 222 that is close to the bump 222 has a smaller depth to be etched than the portion farther from the bump 222. Accordingly, the concave portion of the microcircuit pattern 221 formed at the portion close to the bump 222 among the concave portions of the microcircuit pattern 221 formed between the bump 222 and the bump 222 is indicated by the arrow of FIG. 11B. As indicated, defects that are not etched are bound to occur. In this case, when the microcircuit pattern 221 is deeply etched to solve the unetched defect, the formation of a microcircuit such as short or open may be caused by isotropic etching. .

However, according to the method of manufacturing a circuit board according to an embodiment of the present invention, by first forming the first circuit pattern 221 which is the fine circuit pattern and then forming the bump 222, the conventional etching of the fine circuit pattern is performed. It is effective in eliminating defects. In detail, when forming the microcircuit pattern, the depth is formed deeper than the comparative example in consideration of the distance of the concave portion included in the microcircuit pattern in advance. The depth of the fine circuit pattern is set by reflecting the over etching tolerance. If the microcircuit pattern is formed first, and then bumps are formed, there is an effect of solving the unetching defect of the conventional microcircuit pattern.

12 and 13 are cross-sectional views schematically illustrating a method of manufacturing a circuit board according to another embodiment of the present invention.

In this embodiment, the process of FIGS. 1 to 8 described above is the same as the previous embodiment, but includes steps 12 to 13 instead of steps 9 and 10. Therefore, since the processes previously described with reference to FIGS. 1 to 8 are overlapping descriptions, only the steps of FIGS. 12 and 13 specific to the present embodiment will be described in detail.

Referring to FIG. 12, a third insulating layer 331 and a second circuit pattern 321 are further formed on one surface of the circuit board manufactured in FIG. 8.

In detail, the third insulating layer 331 including the same material as the second insulating layer 232 is formed on the surface on which the first circuit pattern 221 is formed. Next, a conductive layer is further formed on the outer surface of the third insulating layer 331. Here, the outer surface of the third insulating layer 331 means a surface facing the surface on which the first circuit pattern 221 is formed. Thereafter, a third preliminary pattern (not shown) including an opening is formed on the outer surface of the conductive layer, and the second circuit pattern 321 is removed by supplying an etchant to the opening of the third prepattern to remove a portion of the conductive layer. ). Finally, the third preliminary pattern is removed by a stripping and ashing process.

In addition, referring to FIG. 12, a hole (VH) machining process may be further included. In detail, after the conductive layer is formed on the outer surface of the third insulating layer 331, holes VH are formed in the conductive layer and the third insulating layer 331 by using a laser drill. The second circuit pattern 321 and the first circuit pattern 221 are electrically connected to each other by filling or plating a conductive material on the inner surface of the hole VH thus formed.

According to another exemplary embodiment of the present invention, an insulating layer and a circuit pattern may be further formed on a surface on which the first circuit pattern 221 is formed to manufacture a multilayer circuit board having increased layers. Although only one layer is increased in FIG. 12, the present invention is not limited thereto, and additional insulating layers and circuit patterns may be continuously formed to manufacture a multilayer circuit board having a multilayer layer desired by a customer.

Referring to FIG. 13, the chip 260 is mounted on the other surface of the circuit board manufactured in FIG. 12.

In detail, the chip 260 may be a flip chip, and the chip 260 is mounted on a surface on which the bump 222 of the circuit board manufactured in FIG. 12 is formed. In order to electrically connect the bump 222 and the chip 260, a solder bump 252 for attaching the chip may be further interposed. In FIG. 13, reference numerals 242 and 341 correspond to protective layers.

According to another embodiment of the present invention, since the chip 260 is mounted on the surface on which the bump 222 having excellent surface flatness is formed, the assembly reliability of the circuit board and the chip 260 is excellent. The surface on which the bump 222 is formed in the circuit board has better surface flatness than the surface on which the second circuit pattern 321 is formed. As shown in FIG. 13, since the second circuit pattern 321 is not a buried pattern, the surface of the circuit board is not flat and convex. Therefore, when the chip 260 is mounted on the surface on which the second circuit pattern 321 is formed, the surface is uneven, so that a defect may occur in the assembling process. However, since the top surface of the second insulating layer 232 is formed to be substantially flat with the top surface of the bump 222, the surface on which the bump 222 is formed is excellent in surface flatness, and thus, when the chip 260 is mounted, the surface is formed. Excellent reliability

14 to 18 are schematic cross-sectional views illustrating a method of manufacturing a circuit board according to still another embodiment of the present invention.

In this embodiment, the processes of FIGS. 1 to 5 described above are the same as in the previous embodiment, but include steps 14 to 18 instead of steps 6 to 8. Therefore, since the processes previously described with reference to FIGS. 1 to 5 are overlapping descriptions, only the steps of FIGS. 14 to 18 that are specific to this embodiment will be described in detail. For convenience of understanding, in FIG. 14 to FIG. 18, x and y are described after the reference numerals of the existing embodiments, and x and y are the same configuration when the same reference numerals are described.

Referring to FIG. 14, two circuit boards manufactured in FIG. 5 are bonded to each other with the separation film 10 interposed therebetween.

In detail, the surfaces on which the first circuit patterns 221x and 221y of each circuit board are formed are bonded to each other with the separation film 10 interposed therebetween.

Here, the separation film 10 is a film that facilitates separation of two circuit boards attached with the separation film 10 therebetween when a predetermined heat and force are applied, for example, a foam film or a release film. Since the process of forming bumps 222x and 222y is performed simultaneously with respect to the two circuit boards after FIG. 14, the surfaces on which the bumps 222x and 222y of each circuit board are to be formed are separated outward. A circuit board is bonded to the film 10.

Referring to FIG. 15, similar to FIG. 6, second preliminary patterns 222ax and 222ay are formed on surfaces of each of the circuit boards exposed to the outside.

Referring to FIG. 16, similar to FIG. 7, bumps 222x and 222y are formed on each circuit board by removing a portion of the substrates 210x and 210y through the second preliminary patterns 222ax and 222ay.

Referring to FIG. 17, similar to FIG. 8, second insulating layers 232x and 232y are formed on the surfaces of bumps 222x and 222y of each circuit board.

Referring to FIG. 18, each circuit board is separated from the separation film 10 by applying a predetermined heat and force. From this, it is possible to manufacture two circuit boards in one process, thereby reducing the processing time, doubling the productivity, and reducing the processing cost, thereby increasing economic efficiency.

After FIG. 18, the processes of FIGS. 9 and 10, which are embodiments of the present invention, may be performed on each circuit board. Meanwhile, the process of FIGS. 12 and 13, which is another embodiment of the present invention, may be performed on each circuit board after FIG. 18.

In the drawings for describing an embodiment of the present invention, a predetermined hole including a via hole and a plated through hole (PTH), and a circuit pattern of a predetermined shape are illustrated. For the sake of clarity, the present invention is not limited thereto, and other forms, different numbers, and other patterns may be included as long as the present invention is not significantly deviated from the manufacturing method.

In the present specification, the present invention has been described with reference to limited embodiments, but various embodiments are possible within the scope of the present invention. In addition, although not described, equivalent means will also be referred to as incorporated in the present invention. Therefore, the true scope of the present invention will be defined by the claims below.

210: substrate 221a: first preliminary pattern
221: first circuit pattern 231: first insulating layer
222a: second preliminary pattern 222: bump
232: second insulating layer 241, 242: protective layer
251 and 252: solder bump 331: third insulating layer
321: second circuit pattern 341: protective layer
260: chip

Claims (13)

Forming a first circuit pattern having a portion of the conductive substrate removed on one surface of the conductive substrate;
A first insulating layer is formed by filling an insulating material in a portion of the first circuit pattern from which the conductive substrate is removed, wherein the outer surface of the first insulating layer is substantially flat with the outer surface of the first circuit pattern. Embedding the insulating material;
Forming a protruding bump by removing a portion of the conductive substrate on the other surface opposite to the one surface on which the first circuit pattern is formed; And
Forming a second insulating layer on a portion of the conductive substrate from which a portion of the conductive substrate is removed to form the bumps, wherein the outer surface of the second insulating layer is formed to be substantially flat with the outer surface of the bumps;
Method of manufacturing a circuit board comprising a. The method of claim 1,
The insulating material is a method of manufacturing a circuit board is a liquid resin or a liquid solder resist. The method according to claim 2, wherein
And the second insulating layer is formed of a resin or prepreg having a viscosity greater than that of the liquid resin. The method of claim 1,
Forming the first circuit pattern,
Forming a first preliminary pattern including openings on one surface of the conductive substrate using photosensitive resists;
Forming the first circuit pattern by supplying an etchant to an opening of the first preliminary pattern to remove a portion of the conductive substrate; And
Removing the first preliminary pattern; Method of manufacturing a circuit board comprising a. The method of claim 1,
Forming the bumps,
Forming a second preliminary pattern including openings on the other surface of the conductive substrate using photosensitive resists;
Forming the bumps by supplying an etchant to the openings of the second prepattern to remove a portion of the conductive substrate; And
Removing the second preliminary pattern; Method of manufacturing a circuit board comprising a. The method of claim 1,
Forming a third insulating layer on a surface on which the first circuit pattern is formed and forming a conductive layer including a second circuit pattern; Method of manufacturing a circuit board comprising a. The method according to claim 6,
Mounting a chip electrically connected to the bumps on a surface where the bumps are formed; Method of manufacturing a circuit board comprising a. The method according to claim 6,
Forming a third insulating layer including the same material as the second insulating layer on a surface on which the first circuit pattern is formed;
Forming a conductive layer on an outer surface of the third insulating layer;
Forming a third preliminary pattern including openings on the outer surface of the conductive layer using photosensitive resists;
Forming the second circuit pattern by supplying an etchant to the opening of the third prepattern to remove a portion of the conductive layer; And
Removing the third prepattern; Method of manufacturing a circuit board comprising a. 9. The method of claim 8,
Removing a portion of the third insulating layer to form a hole for electrically connecting the first circuit pattern and the second circuit pattern;
Method of manufacturing a circuit board comprising a. The method of claim 1,
After forming the first insulating layer,
Bonding two conductive substrates having the first circuit pattern and the first insulating layer therebetween with a separation film therebetween;
Forming the protruding bumps on each of the conductive substrates;
Forming a second insulating layer on each of the conductive substrates; And
Separating each of the conductive substrates from the separation film; Method of manufacturing a circuit board further comprising. A first conductive layer having a first circuit pattern on one surface and a bump protruding on the other surface of the first circuit pattern;
A first insulating layer buried in a concave portion of the first circuit pattern and having an outer surface substantially buried with an outer surface of the first circuit pattern;
A second insulating layer formed on a portion other than the protruding bumps and having an outer surface substantially flat with an outer surface of the bumps;
A third insulating layer formed on the first insulating layer;
A second conductive layer formed on an outer surface of the third insulating layer and having a second circuit pattern; Circuit board comprising a. The method of claim 11,
The circuit board further comprises a hole for electrically connecting the first circuit pattern and the second circuit pattern. The method of claim 11,
A chip electrically connected to the bump and mounted on a surface of the first conductive layer including the bump; The circuit board further comprising.

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