KR20130026744A - Magenetic memory of performing bidirectional switching operation - Google Patents

Abstract

PURPOSE: A magnetic memory is provided to perform a bidirectional switching operation by modeling the magnetic memory to a different zener diode according to a bias direction. CONSTITUTION: A bidirectional switching layer is modeled to a zener diode according to an applied bias. An MTJ layer is formed on the bidirectional switching layer. The bidirectional switching layer includes a bottom wiring layer(210), a middle semiconductor layer(220), and a conductive buffer layer(230). The middle semiconductor layer is doped with a p-type and forms a schottky junction.

Description

Magnetic Memory for Performing Bidirectional Switching Operation

The present invention relates to a magnetic memory having a switching element, and more particularly to a magnetic memory having a bidirectional switching element using a Schottky Barrier.

Recently, a method of reducing the size of a device for high integration of memory devices exposes certain limitations. Therefore, researches to improve the degree of integration of devices by changing conditions other than the size of devices have been actively conducted. As technologies proposed to improve the density, MLC (Multi Level Cell) technology that can store a plurality of information in one memory cell is actively discussed. The MLC technology has been evaluated as a technology having a considerable efficiency because the data storage capacity of each cell is improved and the existing manufacturing process is not changed much.

In addition, there is a technology to reduce the size of the chip is completed packaging or to increase the storage capacity in the same size by improving the density of the stack structure of the existing chip through the packaging process. This technique is in line with the technique of forming a laminated structure in three dimensions. This is a technology in which a plurality of chips can be stacked in the same planar space by connecting electrode pads by realizing a wiring structure between substrates during wafer bonding. As a result, a plurality of chips in which memory cells are formed may be integrated.

In addition, recently discussed technologies include a cross-point memory using a variable resistance material as a cell, arranging the cells in a matrix form, and then connecting wirings to the top and bottom of the cell.

The cross-point memory has a structure in which the variable resistance material is provided with two wires above and below the resistance change layer. The two wirings have a shape of perpendicularly intersecting with each other, and a resistance change layer is provided at the crossing points. In order to perform the individual read and write operations for the above-mentioned cross point memory, a selection device must be connected to the resistance change layer. That is, even if a predetermined bias is applied to the two wirings, the selectivity of the cell can be secured only when a selection element having a characteristic of turning on only a bias having a specific level is arranged.

A transistor is considered as a selection element for securing cell selectivity. However, the transistor occupies a large area and is difficult to form on the upper or lower portion of the resistance change layer. When placed on top of the resistive change layer, there is a burden that an epitaxial process for the formation of silicon single crystals or polycrystals must be added. In addition, when the transistor is disposed below and the resistance change layer is formed on the top, there is a problem that an interlayer insulating film must intervene between the transistor and the resistance change layer, and a via contact penetrating through the interlayer insulating film is formed.

In addition, a technique of forming a diode from the selection element is discussed in addition to the technique of using the transistor as the selection element.

1 is a cross-sectional view showing a magnetic memory using a diode as a selection device according to the prior art.

Referring to FIG. 1, a p region 110 is formed on an n-type substrate 100, an insulating layer 120 is formed on the p region 110, and a lower wiring 130 penetrating through the insulating layer 120. ) Is provided. In addition, a resistance change layer 140 is formed on the lower wiring 130. In addition, the upper wiring 150 is formed on the resistance change layer 140.

In particular, the resistance change layer 140 forms a typical structure of an STT-MRAM employing a method of inverting magnetization of a free layer according to a spin transfer torque method.

When the STT-MRAM device is used as the resistance change layer 140, bidirectional driving is essentially required due to the driving principle. This means that the selectivity of the cell cannot be secured only by the conventional unidirectional p / n junction diode structure. That is, when the diode is composed of only the p region 110 formed on the n-type substrate 100 in FIG. 1, bidirectional driving of the resistance change layer 140 may be achieved due to the inherent rectifying characteristics of the diode. No problem is exposed. That is, only a forward current may be formed in the direction of the substrate 100 through the p region 110, and thus only a current path from the upper wiring 150 to the lower wiring 130 is formed. This means that the reverse current cannot be formed in the diode formed between the p region 110 and the substrate 100.

Unidirectional driving is also required in order to invert the magnetization to the resistance change layer 140, but bidirectional driving is efficient due to the characteristics of the device. However, in FIG. 1, a problem occurs in that bidirectional driving cannot be performed.

The present invention for solving the above problems is to provide a magnetic memory capable of driving the MTJ layer, which is a resistance change layer in both directions.

The present invention for achieving the above object, Bidirectional switching layer modeled as a Zener diode in accordance with the bias applied; And an MTJ layer formed on the bidirectional switching.

According to the present invention described above, an intermediate semiconductor layer doped with p type is interposed between the conductive lower wiring layer and the conductive buffer layer. The intermediate semiconductor layer has a pinch-off shape in which the depletion region is enlarged and the bulk region disappears according to the applied bias. The pinch-off causes breakdown in the lower wiring layer and the conductive buffer layer depending on the size of the bias, which is modeled as a Zener diode. In addition, since it can be modeled with different zener diodes according to the direction of the bias, it is possible to perform a bidirectional switching operation.

1 is a cross-sectional view showing a magnetic memory using a diode as a selection device according to the prior art.
2 is a cross-sectional view showing a magnetic memory having a bidirectional selection device according to a preferred embodiment of the present invention.
3 to 7 are conceptual diagrams and band diagrams for describing an operation of the bidirectional switching layer illustrated in FIG. 2 according to a preferred embodiment of the present invention.

The present invention is capable of various modifications and various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Example

2 is a cross-sectional view showing a magnetic memory having a bidirectional selection device according to a preferred embodiment of the present invention.

Referring to FIG. 2, the magnetic memory according to the present embodiment includes a bidirectional switching layer 200 and a magnetic tunneling junction (MTJ) layer 300. In addition, the upper wiring layer 400 is provided on the MTJ layer 300.

The bidirectional switching layer 200 has a lower wiring layer 210, an intermediate semiconductor layer 220, and a conductive buffer layer 230.

The lower wiring layer 210 is made of a conductive material and is required to have a predetermined work function. Preferably, the lower wiring layer 210 includes TiN.

In addition, the intermediate semiconductor layer 220 is formed on the lower wiring layer 210 and is formed of a semiconductor material such as Si, GaAs, or the like. In particular, the intermediate semiconductor layer 220 is doped with p type. For example, when the intermediate semiconductor layer 220 includes Si, B or Ga may be used as the dopant.

A conductive buffer layer 230 is disclosed above the intermediate semiconductor layer 220. The conductive buffer layer 230 facilitates the formation of a magnetic tunneling junction (MTJ) layer 300, and forms a bidirectional switching device together with the lower wiring layer 210 and the intermediate semiconductor layer 220.

The MTJ layer 300 is provided on the bidirectional switching layer 200.

The MTJ layer 300 includes an input free layer 310, a nonmagnetic metal layer 320, and an input pinned layer 330.

The input free layer 310 and the input pinned layer 330 are made of a ferromagnetic material, and the nonmagnetic metal layer 320 includes a nonmagnetic metal such as Cu, Al, or Cr.

In addition, the input free layer 310 and the input pinned layer 330 may be formed by changing their positions. When a current equal to or greater than a certain threshold is applied to the MTJ layer 300 so that the spin transfer torque is applied, the magnetization direction of the input free layer 310 is changed and is the same as or different from the magnetization direction of the input pinned layer 330. Is formed.

When the magnetization directions of the input free layer 310 and the input pinned layer 330 are the same, the MTJ layer 300 implements a low resistance state, and the magnetization directions of the input free layer 310 and the input pinned layer 330 are different. The MTJ layer 300 implements a high resistance state.

The input free layer 310 may be made of soft magnetic metal, and may be made of CoFeB or FePt. In addition, the input pinned layer 330 may be composed of multiple thin films of a diamagnetic metal and a soft magnetic metal, IrMn or FeMn may be used as the diamagnetic metal, and Co, Fe, Ni, or an alloy thereof may be used as the soft magnetic metal. Can be used. In addition, the input free layer 310 and the input pinned layer 330 may be formed by changing their positions.

3 to 7 are conceptual diagrams and band diagrams for describing an operation of the bidirectional switching layer illustrated in FIG. 2 according to a preferred embodiment of the present invention.

Referring to FIG. 3, the state before the joining is started.

That is, the bidirectional switching layer includes the lower wiring layer 210, the intermediate semiconductor layer 220, and the conductive buffer layer 230.

For convenience of explanation, it is assumed that the lower wiring layer 210 and the conductive buffer layer 230 are made of the same material. Therefore, the work functions of the lower wiring layer 210 and the conductive buffer layer 230 are the same.

In addition, it is assumed that the intermediate semiconductor layer 220 is Si doped with p-type. In addition, the work function of the lower wiring layer 210 and the conductive buffer layer 230 is set lower than the work function of the intermediate semiconductor layer 220.

Before the junction is made, the Fermi level E _FS of the intermediate semiconductor layer 220 maintains a level higher than the Fermi level E _FM1 of the lower wiring layer 210 disposed on both sides and the Fermi level E _FM2 of the conductive buffer layer 230. This is based on the assumption that the work function of the intermediate buffer layer 220 is higher. Since the work function is the energy required to move the Fermi level electrons to the vacuum, a high work function means that the Fermi level has a lower Fermi level than other films. In particular, since the intermediate semiconductor layer 220 is doped with p type, the Fermi level is maintained lower than the level of the intrinsic semiconductor.

Referring to FIG. 4, a band diagram at the junction of the lower wiring layer 210, the intermediate semiconductor layer 220, and the conductive buffer layer 230 is illustrated. When the junction is made, the transfer of charges occurs until an equilibrium state in which the Fermi levels of the respective membranes coincide.

That is, electrons of the lower wiring layer 210 and the conductive buffer layer 230 of the conductive metal material move to the intermediate semiconductor layer 220 by the diffusion phenomenon. Therefore, a depletion region is formed in the intermediate semiconductor layer 220 by recombination of electrons and holes. In addition, a positive charge region is disclosed in the lower wiring layer 210 and the conductive buffer layer 230 made of a metal material. However, on the energy diagram, the potential of the conductor is the same, so there is no distortion of the Fermi level.

The diffusion phenomenon of the carrier occurs by the bonding, and when the equilibrium state is reached, the Fermi levels of the lower wiring layer 210, the intermediate semiconductor layer 220, and the conductive buffer layer 230 coincide. In addition, negative charges due to the movement and disappearance of holes exist in the depletion region. Therefore, the phenomenon in which electrons, which are carriers of the metal, is diffused into the intermediate semiconductor layer 220 is blocked by the potential barrier formed in the depletion region. Therefore, a Schottky barrier appears at the interface between the junction of the lower wiring layer 210 and the intermediate semiconductor layer 220 and the junction of the intermediate semiconductor layer 220 and the conductive buffer layer 230.

Referring to FIG. 5, a bias is applied from the lower wiring layer 210 toward the conductive buffer layer 220. That is, a voltage of positive polarity is applied to the lower wiring layer 210, and a voltage of negative polarity is applied to the conductive buffer layer 230. Thus, the bias applied is from the lower wiring layer 210 toward the conductive buffer layer 230. This means that a reverse bias is applied to the lower wiring layer 210 / intermediate semiconductor layer 220, and that a positive bias is applied to the intermediate semiconductor layer 220 / conductive buffer layer 230.

In the lower wiring layer 210 and the intermediate semiconductor layer 220 to which the reverse bias is applied, the level of the energy barrier is increased by the reverse bias. In addition, the depletion region formed in the intermediate semiconductor layer 220 has a tendency to be enlarged. The reverse bias forms a difference between the Fermi level E _FM1 of the lower wiring layer 210 and the Fermi level E _FS of the intermediate semiconductor layer. That is, due to reverse bias, the Fermi level E _FS of the intermediate semiconductor layer 220 has a higher value than the Fermi level E _FM1 of the lower wiring layer 210. Thus, the formation of a barrier tends to interrupt the flow of current.

In the intermediate semiconductor layer 220 / conductive buffer layer 230 to which positive bias is applied, the level of the energy barrier is reduced. That is, the Fermi level E _FS of the intermediate semiconductor layer 220 has a lower value than the Fermi level E _FM2 of the conductive buffer layer 230. In addition, the width of the depletion region formed in the intermediate semiconductor layer 220 tends to decrease.

Depletion regions appear in regions of the intermediate semiconductor layer 220 adjacent to the lower interconnection layer 210 and the conductive buffer layer 230. The bulk region of the intermediate semiconductor layer 220 may exist between the depletion regions formed at both sides. In the bulk region of the intermediate semiconductor layer 220, the energy bands of the conduction band Ec and the valence band E _V remain smooth.

Referring to FIG. 6, a higher level of bias is applied from the lower wiring layer 210 toward the conductive buffer layer 230 compared to the bias shown in FIG. 5.

In the lower wiring layer 210 and the intermediate semiconductor layer 220 to which the reverse bias is applied, the depletion region of the intermediate semiconductor layer 220 is enlarged due to the increased reverse bias. In addition, in the intermediate semiconductor layer 220 / conductive buffer layer 230 to which positive bias is applied, the width of the depletion region tends to decrease. The depletion region is enlarged at the junction interface between the lower wiring layer 210 and the intermediate semiconductor layer 220 to which the reverse bias is applied. That is, a pinch-off phenomenon occurs in which the depletion region of the intermediate semiconductor layer 220 is enlarged so that the entire intermediate semiconductor layer 220 is composed of the depletion region. This means that the bulk region having the smooth energy band disappears.

Therefore, even if the size of the bias is further increased between the lower wiring layer 210 and the conductive buffer layer 230, the increase in current does not occur additionally.

This difference of the energy band between the lower wiring layer 210 and the conductive buffer layer (230) E _FM2 - E means that _FM1 is greatly increased. In addition, a Zener breakdown phenomenon generated at a normal low voltage occurs between the lower wiring layer 210 and the intermediate semiconductor layer 220 to which the reverse bias is applied. That is, when the potential barrier formed by the intermediate semiconductor layer 220 disposed between the lower wiring layer 210 and the conductive buffer layer 230 is sufficiently narrow in width, tunneling of electrons occurs, and the lower wiring layer is formed from the conductive buffer layer 230. Tunneling of electrons toward 210 occurs. Therefore, the current flows from the lower wiring layer 210 toward the conductive buffer layer 230 due to the tunneling of the electrons.

The above-described structure may be modeled as a Zener diode is formed between the lower wiring layer 210 and the conductive buffer layer 230. That is, when a voltage above a predetermined level is applied, the zener diode is turned on, and when a voltage below a certain level is applied, the zener diode blocks the flow of current.

Thus, the flow of current from the lower wiring layer 210 to the MTJ layer 300 can be controlled.

Referring to FIG. 7, a bias is applied from the conductive buffer layer 230 toward the lower wiring layer 210. Accordingly, reverse bias is applied between the conductive buffer layer 230 and the intermediate semiconductor layer 220, and positive bias is applied between the intermediate semiconductor layer 220 and the lower wiring layer 210. When the bias applied has a high level, as shown in FIG. 6, the depletion region is enlarged by the reverse bias between the conductive buffer layer 230 and the intermediate semiconductor layer 220, and the intermediate semiconductor layer 220 is pinched. -Off.

Therefore, a Zener diode is formed between the conductive buffer layer 230 and the lower wiring layer 220. However, the zener diode disclosed in FIG. 6 is reversed. That is, the positive direction of the zener diode in FIG. 7 is directed from the lower wiring layer 210 to the conductive buffer layer 230. Accordingly, when a bias is applied from the conductive buffer layer 230 and a voltage of a predetermined level or more is applied, the zener diode is turned on and a condition that a current can flow is established. This means that when a bias is applied through the conductive buffer layer 230, current can flow only at a voltage higher than a certain level. Through this, the switching operation of the zener diode from the conductive buffer layer 230 toward the lower wiring layer 210 may be controlled.

As shown in FIGS. 6 and 7 of the present invention, even if the direction of bias is set between the lower electrode layer 210 and the conductive buffer layer 230, a zener diode is formed in the bidirectional switching layer 200, and a specific level is provided. The switching characteristic is turned on only when the above bias is applied. This means that the bidirectional switching layer 200 is modeled as a zener diode regardless of the direction of the bias. Through this, the turn-on operation may be selectively performed on the MTJ layer 300, and data writing and reading operations may be performed.

200: bidirectional switching layer 210: lower wiring layer
220: intermediate semiconductor layer 230: conductive buffer layer
300: MTJ layer 310: input free layer
320: nonmagnetic metal layer 330: input pinned layer

Claims (5)

A bidirectional switching layer modeled as a zener diode in accordance with an applied bias; And
And a MTJ layer formed on the bidirectional switching. The method of claim 1, wherein the bidirectional switching layer,
The lower wiring layer;
An intermediate semiconductor layer formed on the lower wiring layer; And
And a conductive buffer layer formed on the intermediate semiconductor layer. The magnetic memory of claim 2, wherein the lower wiring layer or the conductive buffer layer is a conductive material including a metal, and the intermediate semiconductor layer is doped with a p-type. The magnetic memory of claim 3, wherein a work function of the intermediate semiconductor layer is greater than a work function of the lower wiring layer or the conductive buffer layer. The magnetic memory of claim 3, wherein the intermediate semiconductor layer is in a pinch-off state in which only a depletion region exists according to an applied bias.

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