KR20130007271A - Method for controlling write operation and storage device using the same - Google Patents

Method for controlling write operation and storage device using the same Download PDF

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Publication number
KR20130007271A
KR20130007271A KR1020110064963A KR20110064963A KR20130007271A KR 20130007271 A KR20130007271 A KR 20130007271A KR 1020110064963 A KR1020110064963 A KR 1020110064963A KR 20110064963 A KR20110064963 A KR 20110064963A KR 20130007271 A KR20130007271 A KR 20130007271A
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South Korea
Prior art keywords
compensation value
repeatable runout
write
write operation
storage medium
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KR1020110064963A
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Korean (ko)
Inventor
이준범
이동욱
김경수
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시게이트 테크놀로지 인터내셔날
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Priority to KR1020110064963A priority Critical patent/KR20130007271A/en
Publication of KR20130007271A publication Critical patent/KR20130007271A/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/48—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed
    • G11B5/58—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following
    • G11B5/596—Disposition or mounting of heads or head supports relative to record carriers ; arrangements of heads, e.g. for scanning the record carrier to increase the relative speed with provision for moving the head for the purpose of maintaining alignment of the head relative to the record carrier during transducing operation, e.g. to compensate for surface irregularities of the latter or for track following for track following on disks
    • G11B5/59627—Aligning for runout, eccentricity or offset compensation

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE: A write operation control method and a storage device using the same are provided to perform normal write operation by correcting a repeated run out component by using a repeated run out correcting code of a disk. CONSTITUTION: In case of generating an error write operation, a storage device performs write retry operation(S810-S830). In case of performing write retry operation, the storage device generates RRO(Repeatable RunOut) compensation values(S840,S860). The storage device performs the write operation by using the generated run out component(S870). [Reference numerals] (AA) Start; (BB,DD,EE) No; (CC,FF,GG) Yes; (HH) End; (S810) Executing writing operation; (S820) Are errors generated?; (S830) Executing writing retry operation; (S840) Writing retry number=n?; (S850) Storing a PRO compensation value in a memory by generating the PRO compensation value; (S860) Executing writing operation again by using a PRO compensation value; (S870) Is writing operation complete?

Description

Method for controlling write operation and storage device using the same

The present invention relates to a write operation control method and a storage device, and more particularly, to a write operation control method using a new Repeatable RunOut (RRO) compensation value and a storage device using the method.

A disk drive, which is one of the storage devices, contributes to the operation of a computer system by writing data to or reading data from a storage medium according to a command issued from a host device. The disk drive may normally write the data to the storage medium by performing a write retry operation when an error occurs while writing the data to the storage medium.

An object of the present invention is to provide a write operation control method for performing a write operation using a new Repeatable RunOut (RRO) compensation value.

Another object of the present invention is to provide a storage device using the write operation control method.

According to another aspect of the present invention, there is provided a method of controlling a write operation, when an error occurs while performing a write operation, performing a write retry operation, wherein the write retry operation is performed n times (n is a natural number). The method may include generating at least one repeatable runout (RRO) compensation value and performing the write operation again using the generated at least one repeatable runout compensation value.

The generating of the at least one repeatable runout compensation value may include generating the at least one repeatable runout compensation value by using a measured position error signal (PES) when the write retry operation is performed n times. It may be a step.

The generating of the at least one repeatable runout compensation value may include performing at least one repeatable runout compensation value or the write operation on at least one data sector to perform the write operation when the write retry operation is performed n times. Generating repeatable runout compensation values for the track including the data sector to be performed.

The write operation control method may further include storing the generated at least one repeatable runout compensation value in a memory.

The storing in the memory may include deleting at least one repeatable runout compensation value stored in the memory when there is no space to store the generated at least one repeatable runout compensation value in the memory. And storing the repeatable runout compensation value in the memory.

The performing of the write operation may be performed again by adjusting the position of the head using the generated repeatable runout compensation value to perform the write operation again.

The repeatable runout compensation value may be a repeatable runout correction code (RCC).

According to another aspect of the present invention, there is provided a storage device including: a storage medium in which data is stored; a storage medium interface for writing data to or reading data from the storage medium; And a processor configured to generate at least one repeatable runout (RRO) compensation value when the write retry operation is performed n times (n is a natural number) during the write operation, wherein the processor is configured to generate the at least one. The storage medium interface may be controlled to perform a write operation again after compensating for a position error signal (PES) by using a repeatable runout compensation value of.

The processor may generate the at least one repeatable runout compensation value using the uncompensated position error signal.

According to an exemplary embodiment of the present invention, a method of controlling a write operation and a storage device using the method include a repeatable runout that cannot be compensated using a repeatable runout correction code (RCC) stored on a disk. (RRO: Repeatable RunOut) Compensates the component to perform the normal write operation. That is, the write operation control method and the storage device using the method according to an embodiment of the inventive concept compensate for the position error signal when a high position error signal (PES) is measured and write normally. There is an advantage to performing the operation.

BRIEF DESCRIPTION OF THE DRAWINGS In order to better understand the drawings cited in the detailed description of the invention, a brief description of each drawing is provided.
1 is a block diagram of a computer system according to an exemplary embodiment of the inventive concept.
FIG. 2 is a software operating system diagram of the storage device shown in FIG. 1.
3 is a plan view of a head disk assembly of a disk drive according to an embodiment of the inventive concept.
4 is a diagram illustrating an electrical circuit configuration of a disk drive according to an embodiment of the storage device of FIG. 1.
5 is a diagram illustrating a sector structure of one track in a disk, which is an embodiment of a storage medium to which the present invention can be applied.
FIG. 6 is a diagram illustrating a structure of the servo region illustrated in FIG. 5.
7 is a block diagram of a storage device according to an example embodiment of the inventive concept.
8 is a flowchart illustrating a write operation control method according to an embodiment of the inventive concept.
9 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.
10 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.
11 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.
FIG. 12 is a diagram illustrating an embodiment of the storage medium 730 of FIG. 7.
FIG. 13A is a diagram illustrating an embodiment of a table stored in the memory 740 of FIG. 7.
FIG. 13B is a diagram illustrating another embodiment of a table stored in the memory 740 of FIG. 7.

In order to fully understand the present invention, operational advantages of the present invention, and objects achieved by the practice of the present invention, reference should be made to the accompanying drawings and the accompanying drawings which illustrate preferred embodiments of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the preferred embodiments of the present invention with reference to the accompanying drawings. Like reference symbols in the drawings denote like elements.

1 is a block diagram of a computer system 100 according to an embodiment of the inventive concept.

Referring to FIG. 1, a computer system 100 according to an embodiment of the inventive concept includes a storage device 101, a host device 102, and a connector 103.

In detail, the storage device 101 may include a processor 110, a read only memory (ROM) 120, a random access memory (RAM) 130, a storage medium interface 140, a storage medium 150, and a host interface 160. And a bus 170.

The host device 102 issues a command for operating the storage device 101, transmits the command to the storage device 101 connected through the connector 103, and transmits data with the storage device 101 according to the issued command. Or perform a receiving process.

The connector 103 is a means for electrically connecting the interface port of the host device 102 and the interface port of the storage device 101, and may include a data connector and a power connector. As an example, in the case of using a Serial Advanced Technology Attachment (SATA) interface, the connector 103 may include a 7-pin SATA data connector and a 15-pin SATA power connector.

First, the constituent means of the storage device 101 will be described.

The processor 110 interprets the command and controls the constituent means of the data storage device according to the interpreted result. The processor 110 includes a code object management unit, and loads the code object stored in the storage medium 150 into the RAM 130 using the code object management unit. The processor 110 loads the code objects into the RAM 130 to execute the write operation control method of FIGS. 8 to 11.

Then, the processor 110 may execute a task for the write operation control method of FIGS. 8 to 11 using the code objects loaded in the RAM 130. The write operation control method executed by the processor 110 will be described in detail later with reference to FIGS. 8 through 11.

The ROM 120 stores program codes and data necessary for operating the data storage device. The RAM 130 is loaded with program codes and data stored in the ROM 120 or the storage medium 150 under the control of the processor 110.

The storage medium 150 may include a disk or a nonvolatile semiconductor memory device as a main storage medium of the storage device. The storage device may include a disk drive as an example, and the detailed configuration of the head disk assembly 100 including the disk and the head in the disk drive is shown in FIG. 3.

3 is a plan view of a head disk assembly 300 of a disk drive according to an embodiment of the inventive concept.

Referring to FIG. 3, the head disk assembly 300 includes at least one disk 12 that is rotated by the spindle motor 14. The disk drive also includes a head 16 positioned adjacent to the disk 12 surface.

The head 16 can read or write information to the rotating disk 12 by sensing and magnetizing the magnetic field of each disk 12. Typically the head 16 is coupled to the surface of each disk 12. Although illustrated and described as a single head 16, it should be understood that this consists of a recording head for magnetizing the disc 12 and a separate reading head for sensing the magnetic field of the disc 12. The read head is constructed from Magneto-Resistive (MR) elements. The head 16 may also be referred to as a magnetic head or a transducer.

Head 16 may be integrated into slider 20. The slider 20 is configured to create an air bearing between the head 16 and the surface of the disk 12. The slider 20 is coupled to the head gimbal assembly 22. The head gimbal assembly 22 is attached to an actuator arm 24 having a voice coil 26. The voice coil 26 is located adjacent to the magnetic assembly 28 to specify a voice coil motor 30 (VCM). The current supplied to the voice coil 26 generates a torque for rotating the actuator arm 24 relative to the bearing assembly 32. Rotation of the actuator arm 24 causes the head 16 to move across the disk 12 surface.

The information is typically stored in an annular track of the disc 12. Each track 34 includes a plurality of sectors. The sector configuration for one track is shown in FIG.

5 is a diagram illustrating a sector structure of one track in a disk, which is an embodiment of a storage medium to which the present invention can be applied.

As illustrated in FIG. 5, one servo sector section T may include a servo area S and a data area, and the data area may include a plurality of data sectors D. Of course, a single data sector D may be included in one servo sector section. The data sector D may also be referred to as a sector. In the servo area S, signals as shown in FIG. 6 are recorded in detail.

FIG. 6 is a diagram illustrating a structure of the servo region S shown in FIG. 5.

As shown in FIG. 6, the servo region S includes a preamble 601, a servo synchronization indication signal 602, a gray code 603, burst signals Burst 604, and repeatable runout correction. The code (RCC: Repeatable Runout Correction Code) is recorded.

The preamble 601 provides clock synchronization when reading servo information, and also provides a constant timing margin by putting a gap in front of the servo sector. Then, it is used to determine the gain of the automatic gain control (AGC) circuit.

The servo synchronization indication signal 602 is composed of a servo address mark (SAM) and a servo index mark (SIM). The servo address mark is a signal indicating the start of a servo sector, and the servo index mark is a signal indicating the start of the first servo sector in the track.

The gray code 603 provides track information, and the burst signal 604 is a signal used to control the head 16 to follow the center of the track 34. For example, A, B, C, and D are four signals. It consists of a pattern. That is, the four burst patterns are combined to generate a position error signal used in the track following control.

The repeatable runout (RRO) component and the non-repeatable runout (NRRO) component may be generated when a hard disk drive follows a track. The repeatable runout component may occur for disc warpage, bending of the disc surface, placement of the disc relative to the spindle center, incomplete spindle motor bearings, or harmonics during rotation. The non-repeatable runout component may be caused by random perturbation and longation due to irregularities in the bearings. In order to compensate for the repeatable runout component, the repeatable runout correction code RCC may be recorded in the servo area S during the manufacturing process of the hard disk drive. That is, when the hard disk drive writes data, the write operation may be performed while compensating for the repeatable runout component using the repeatable runout correction code RCC recorded in the servo area S of the disk.

The disk 12 is divided into a maintenance cylinder area inaccessible to the user and a user data area inaccessible to the user. The maintenance cylinder area is also called a system area. Various information necessary for controlling the disk drive is stored in the maintenance cylinder area, and of course, information necessary for performing the write operation control method according to the present invention may also be stored.

The head 16 is moved across the surface of the disc 12 to read or write information on other tracks. The disk 12 may store a plurality of code objects for implementing various functions as a disk drive. As an example, a code object for performing an MP3 player function, a code object for performing a navigation function, a code object for performing various video games, and the like may be stored in the disk 12.

Referring back to FIG. 1, the storage medium interface 140 is a component that processes the processor 110 to access the storage medium 150 to write or read information. The storage medium interface 140 in a storage device implemented as a disk drive includes a head disk assembly including a head, a servo circuit for controlling the head disk assembly, and a read and write channel circuit for performing signal processing for data read and write. It may include.

The host interface 160 is a means for executing data transmission / reception processing with the host device 102 such as a personal computer, a mobile device, and the like, for example, a Serial Advanced Technology Attachment (SATA) interface and a Parallel Advanced Technology Attachment (PATA) interface. Various standard interfaces such as USB and Universal Serial Bus (USB) interfaces are available.

The bus 170 serves to transfer information between the constituent means of the storage device.

Next, a software operating system of a hard disk drive, which is an example of a storage device, will be described with reference to FIG. 2. 2 is a software operating system diagram of the storage device 100 shown in FIG. 1.

As illustrated in FIG. 2, a plurality of code objects 1 to N are stored in the disk 150A, which is a hard disk drive (HDD) storage medium.

The ROM 120 stores a boot image and a packed RTOS image.

A plurality of code objects CODE OBJECT 1 to N are stored in the disk 150A, which is a hard disk drive (HDD) storage medium. The code objects stored in the disk 150A may include not only code objects required for the operation of the disk drive but also code objects related to various functions that can be extended to the disk drive. In particular, code objects for executing the write operation control method according to the flowcharts of FIGS. 8 to 11 are stored in the disk 150A which is an HDD storage medium. Of course, code objects for executing the write operation control method of FIGS. 8 to 11 may be stored in the ROM 120 instead of the disk 150A which is an HDD storage medium. In addition, code objects that perform various functions such as an MP3 player function, a navigation function, a video game function, and the like may also be stored on a disk.

The RAM 130 loads an unpacked RTOS image by reading a boot image from the ROM 120 during a booting process. Code objects necessary for performing a host interface stored in the disk 150A, which is an HDD storage medium, are loaded into the RAM 130. Of course, an area DATA AREA for storing data is also allocated to the RAM 130.

The channel circuit 200 includes circuits necessary to perform signal processing for data read and write, and the servo circuit SERVO 210 includes a head disk assembly 300 to perform data read and write operations. The circuits needed to control this are built in.

RTOS (Real Time Operating System) 110A is a real-time operating system program, a multi-program operating system using a disk. Depending on the task, multi-processing is performed in real time in the foreground with high priority, and batch processing is performed in the background with low priority. Then, the code object from the disk is loaded and the code object is unloaded to the disk.

RTOS (Real Time Operating System) 110A is a Code Object Management Unit (COMU) 110-1, Code Object Loader (COL, 110-2), Memory Handler (Memory Handler; MH, 110-3), the channel control module (CCM) 110-4 and the servo control module (SCM) 110-5 are managed to execute a task according to the requested command. The RTOS 110A also manages application programs 220.

In detail, the RTOS 110A loads code objects necessary for disk drive control into the RAM 130 during the booting process of the disk drive. Therefore, after executing the booting process, the disk drive may be operated using the code objects loaded in the RAM 130.

The COMU 110-1 stores the positional information where the code objects are recorded, and performs a process of arbitrating the bus. It also stores information about the priority of tasks that are running. It also manages task control block (TCB) information and stack information necessary for performing tasks on code objects.

The COL 110-2 loads the code objects stored in the disk 150A, which is an HDD storage medium, to the RAM 130 using the COMU 110-1, or the code objects stored in the RAM 130. Processing to unload the data into the disk 150A which is an HDD storage medium. Accordingly, the COL 110-2 may load code objects for executing the write operation control method of FIGS. 8 to 11 stored in the disk 150A, which is an HDD storage medium, into the RAM 130.

The RTOS 110A may execute the write operation control method of FIGS. 8 to 11 to be described below using the code objects loaded in the RAM 130.

The MH 110-3 performs a process of writing or reading data to the ROM 120 and the RAM 130.

The CCM 110-4 performs channel control necessary to perform signal processing for data read and write, and the SCM 110-5 performs servo control including a head disk assembly to perform data read and write. do.

4 is a diagram illustrating an electrical circuit configuration of the disk drive 400, which is an embodiment of the storage device 100 of FIG. 1.

As shown in FIG. 4, the disk drive 400 according to an embodiment of the inventive concept may include a preamplifier 410, a read and write channel 420 (R / W CHANNEL), a processor 430, The voice coil motor driver 440 (VCM driver), the spindle motor driver 450 (SPM driver), the ROM 460, the RAM 470, and the host interface 480 are provided.

The processor 430 may be a digital signal processor (DSP), a microprocessor, a microcontroller, or the like. The processor 430 reads and writes channels for reading information from or writing information to the disk 12 according to a command received from the host device 102 through the host interface 480. Control 420.

The processor 430 is coupled to a voice coil motor (VCM) driver 440 that supplies a driving current for driving the voice coil motor 30 (VCM). The processor 430 supplies a control signal to the VCM driver 440 to control the movement of the head 16.

The processor 430 is also coupled to a SPM (Spindle Motor) driver 450 that supplies a drive current for driving the spindle motor 14 (SPM). When power is supplied, the processor 430 supplies a control signal to the SPM driver 450 to rotate the spindle motor 14 at a target speed.

Processor 430 is coupled to ROM 460 and RAM 470, respectively. The ROM 460 stores firmware and control data for controlling the disk drive. Program codes and information for executing the write operation control method of FIGS. 8 to 11 may be stored in the ROM 460. Of course, program codes and information for executing the write operation control method of FIGS. 8 to 11 may be stored in the maintenance cylinder region of the disk 12 instead of the ROM 460.

In the RAM 470, program codes stored in the ROM 460 or the disk 12 are loaded in the initialization mode under the control of the processor 430, and are read from the data or the disk 12 received through the host interface 480. The generated data is stored temporarily.

The RAM 470 may be implemented with DRAM or SRAM. In addition, the RAM 470 may be designed to be driven by a single data rate (SDR) method or a double data rate (DDR) method.

In addition, the processor 430 may control the disk drive to execute the write operation control method of FIGS. 8 to 11 by using program codes and information stored in the maintenance cylinder area of the ROM 460 or the disk 12. .

Next, the data read operation and the data write operation of the disk drive will be described.

In the data read mode, the disc drive amplifies in the preamplifier 410 the electrical signal sensed by the head 16 from the disc 12. Then, amplify the signal output from the preamplifier 410 by an automatic gain control circuit (not shown) that automatically varies the gain in accordance with the magnitude of the signal in the read and write channels 420, and this is a digital signal. After conversion to, decoding is performed to detect data. After the processor 430 performs an error correction process using the Reed Solomon code, which is an error correction code, as an example, the data is converted into stream data and transmitted to the host device 102 through the host interface 480.

In the data write mode, the disk drive receives data from the host device through the host interface 480, adds an error correction symbol by the Reed Solomon code in the processor 430, and read and write channels 420. After the encoding process is performed so as to suit the recording channel, the recording current is amplified by the preamplifier 410 and recorded on the disc 12 through the head 16.

7 is a block diagram of a storage device 700 according to an embodiment of the inventive concept.

The storage device 700 of FIG. 7 is a diagram schematically illustrating the storage device 101 of FIG. 1 in order to describe an embodiment of the inventive concept. Referring to FIG. 7, the storage device 700 may include a processor 710, a storage medium interface 720, a storage medium 730, and a memory 740. The processor 710 of FIG. 7 corresponds to the processor 110 of FIG. 1, the storage medium interface 720 of FIG. 7 corresponds to the storage medium interface 140 of FIG. 1, and the storage medium 730 of FIG. 7. 1 may correspond to the storage medium 150 of FIG. 1, and the memory 740 of FIG. 7 may correspond to the RAM 130 of FIG. 1.

The storage medium 730 may store data as described with reference to FIG. 1. When the storage device 700 is a hard disk drive, the storage medium 730 may be a disk (12 of FIG. 3 and 12 of FIG. 4). When storage medium 730 is disk 12, storage medium 730 may include a plurality of tracks, each track comprising a plurality of sectors. The configuration of the sector has been described in detail with reference to FIG. 5, and the servo region of the sector has been described in detail with reference to FIG. 6.

The storage medium interface 140 is a constituent means for processing the processor 110 to access the storage medium 150 to write or read data. The storage medium interface 140 in a storage device implemented as a disk drive includes a head disk assembly including a head, a servo circuit for controlling the head disk assembly, and a read and write channel circuit for performing signal processing for data read and write. It may include.

The processor 710 may generate at least one repetitive runout (RRO) compensation value when the write retry operation is performed n times (n is a natural number) while the storage medium interface 720 performs the write operation. The processor 710 may control the storage medium interface 720 to perform the write operation again using the generated at least one repeatable runout (RRO) compensation value. For example, after the processor 710 compensates for the position error signal (PES) using the generated at least one repeatable runout (RRO) compensation value, the storage medium interface 720 resumes the write operation. Can be controlled to perform. The position of the head is adjusted when the processor 710 compensates for the position error signal PES using the generated at least one repeatable runout (RRO) compensation value. That is, the processor 710 adjusts the current value for determining the position of the head by using the generated at least one repetitive runout (RRO) compensation value, and the position of the head is adjusted, and the storage medium interface 720 The write operation may be performed again using the adjusted head.

The processor 710 may generate the at least one repeatable runout compensation value by using the uncompensated position error signal PES. The processor 710 may generate the at least one repeatable runout compensation value using the uncompensated position error signal PES and the current value controlling the storage medium interface 720 (eg, the head). . Although not shown in FIG. 7, the storage device 700 may further include a voice coil motor for controlling the head, and a current value for controlling the storage medium interface 720 may be a current value applied to the voice coil motor. . The current value controlling the storage medium interface 720 may be obtained from the uncompensated position error signal PES. The uncompensated position error signal may be a value measured before performing the write retry operation n times or may be a value measured after performing the write retry operation n times.

The processor 710 may store the generated at least one repeatable runout compensation value in the memory 740. The memory 740 may be a volatile memory, for example, the RAM 130 of FIG. 1. If there is no space in the memory 740 to store the generated at least one repeatable runout compensation value, the processor 710 deletes the at least one repeatable runout compensation value stored in the memory 740 and the at least one generated. The repeatable runout compensation value of may be stored in the memory 740.

The repeatable runout compensation value may be a repeatable runout correction code (RCC). The repeatable runout correction code (RCC) described with reference to FIG. 6 is information stored in a servo area of a disc in a disc drive manufacturing process, and the repeatable runout compensation value of the present invention is information generated by the processor 710. May contain information. Therefore, even when the repeatable runout compensation value is the repeatable runout correction code RCC, the repeatable runout compensation value and the repeatable runout correction code RCC stored in the disk in FIG. 6 may include different information.

Hereinafter, a light operation control method according to various embodiments of the inventive concept will be described with reference to FIGS. 8 to 11.

8 is a flowchart illustrating a write operation control method according to an embodiment of the inventive concept.

7 and 8, when a write command is received, the processor 710 may control the storage medium interface 720 to perform a write operation of writing data to the storage medium 730 (S810). The processor 710 may determine whether an error occurs while performing the write operation (S820). When an error occurs while performing the write operation, the processor 710 may control the storage medium interface 720 to perform the write retry operation (S830). In operations S810 and S830, the processor 710 may control the storage medium interface 720 to perform a write operation by using the repeatable runout correction code (RCC) stored in the disk illustrated in FIG. 6.

The processor 710 may determine whether the number of times of performing the write retry operation is n (S840). When the number of times the write retry operation is performed is less than n times, the processor 710 may determine whether the write operation is completed by performing the write retry operation (S850). If the write operation is not completed, the operation may be performed again from step S830. If the write operation is completed, the write operation may be terminated.

When the number of times of the write retry operation is performed n times, the processor 710 may generate at least one repeatable runout compensation value and store it in the memory 740 (S860). In operation S860, the processor 710 may generate the at least one repeatable runout compensation value using the measured position error signal. If there is no space in the memory 740 to store the generated at least one repeatable runout compensation value, the processor 710 deletes the at least one repeatable runout compensation value stored in the memory 740 and the at least one generated. The repeatable runout compensation value of may be stored in the memory 740. The processor 710 may control the storage medium interface 720 to perform the write operation again using the generated at least one repeatable runout compensation value (S870). That is, in operation S870, the processor 710 performs the write operation using the at least one repeatable runout compensation value generated in operation S860 without using the repeatable runout correction code RRC stored in the disk illustrated in FIG. 6. The storage medium interface 720 can be controlled to perform.

9 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.

7 and 9, when a write command is received, the processor 710 may control the storage medium interface 720 to perform a write operation of writing data to the storage medium 730 (S910). The processor 710 may determine whether an error occurs while performing the write operation (S920). When an error occurs while performing the write operation, the processor 710 may control the storage medium interface 720 to perform the write retry operation (S930). In operations S910 and S930, the processor 710 may control the storage medium interface 720 to perform a write operation by using the repeatable runout correction code (RCC) stored in the disk illustrated in FIG. 6.

The processor 710 may determine whether the number of times of performing the write retry operation is n (S840). When the number of times the write retry operation is performed is less than n times, the processor 710 may determine whether the write operation is completed by performing the write retry operation (S950). If the write operation is not completed, the process may be performed again from step S930, and if the write operation is completed, the write operation may be terminated.

When the number of times of the write retrain operation is performed n times, the processor 710 measures a position error signal (S960), and generates the at least one repeatable runout compensation value using the measured position error signal. The generated at least one repeatable runout compensation value may be stored in the memory 740 (S970). If there is no space in the memory 740 to store the generated at least one repeatable runout compensation value, the processor 710 deletes the at least one repeatable runout compensation value stored in the memory 740 and the at least one generated. The repeatable runout compensation value of may be stored in the memory 740. The processor 710 may control the storage medium interface 720 to perform the write operation again using the generated at least one repeatable runout compensation value (S980). That is, in operation S980, the processor 710 may perform a write operation using the at least one repeatable runout compensation value generated in operation S970 without using the repeatable runout correction code RCC stored in the disk shown in FIG. 6. The storage medium interface 720 can be controlled to perform.

10 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.

7 and 10, when a write command is received, the processor 710 may control the storage medium interface 720 to perform a write operation of writing data to the storage medium 730 (S1010). The processor 710 may determine whether an error occurs while performing the write operation (S1020). When an error occurs while performing the write operation, the processor 710 may measure a position error signal (S1030) and control the storage medium interface 720 to perform a write retry operation (S1040). In an operation S1010 and an operation S1040, the processor 710 may control the storage medium interface 720 to perform a write operation by using the repeatable runout correction code (RCC) stored in the disk illustrated in FIG. 6.

The processor 710 may determine whether the number of times of performing the write retry operation is n (S1050). When the number of times the write retry operation is performed is less than n times, the processor 710 may determine whether the write operation is completed by performing the write retry operation (S1060). If the write operation is not completed, the operation may be performed again from step S1030. If the write operation is completed, the write operation may be terminated.

When the number of times of performing the write retrain operation is n, the processor 710 generates the at least one repeatable runout compensation value by using the measured position error signal, and generates the at least one repeatable runout compensation value. It may be stored in the memory 740 (S1070). If there is no space in the memory 740 to store the generated at least one repeatable runout compensation value, the processor 710 deletes the at least one repeatable runout compensation value stored in the memory 740 and the at least one generated. The repeatable runout compensation value of may be stored in the memory 740. The processor 710 may control the storage medium interface 720 to perform the write operation again using the generated at least one repeatable runout compensation value (S1080). That is, in step S1080, the processor 710 performs the write operation using the at least one repeatable runout compensation value generated in step S1070 without using the repeatable runout correction code RCC stored in the disk shown in FIG. 6. The storage medium interface 720 can be controlled to perform.

11 is a flowchart illustrating a write operation control method according to another exemplary embodiment of the inventive concept.

7 and 11, when a write command is received, the processor 710 may control the storage medium interface 720 to perform a write operation of writing data to the storage medium 730 (S1110). The processor 710 may measure a position error signal while performing the write operation (S1120), and compare the measured position error signal with a threshold value (S1130). The threshold is a value that is a reference for normally performing the write operation. When the measured position error signal is greater than or equal to the threshold, it may be determined that the write operation cannot be normally performed. When the measured position error signal is less than the threshold, the write operation may be normally performed. It can be determined. Therefore, when the measured position error signal is greater than or equal to the threshold in operation S1130, the processor 710 may control the storage medium interface 720 to perform a write retry operation in operation S1140. In operations S1110 and S1140, the processor 710 may control the storage medium interface 720 to perform a write operation by using the repeatable runout correction code (RCC) stored in the disk illustrated in FIG. 6.

The processor 710 may determine whether the number of times of performing the write retry operation is n (S1150). When the number of times of performing the write retry operation is less than n times, the processor 710 may determine whether the write operation is completed by performing the write retry operation (S1160). If the write operation is not completed, the operation may be performed again from step S1120, and if the write operation is completed, the write operation may be terminated.

When the number of times the write retry operation is performed is n, the processor 710 generates the at least one repeatable runout compensation value using the measured position error signal, and generates the at least one repeatable runout compensation value. It can be stored in the memory 740 (S1170). If there is no space in the memory 740 to store the generated at least one repeatable runout compensation value, the processor 710 deletes the at least one repeatable runout compensation value stored in the memory 740 and the at least one generated. The repeatable runout compensation value of may be stored in the memory 740. The processor 710 may control the storage medium interface 720 to perform the write operation again using the generated at least one repeatable runout compensation value (S1180). That is, in operation S1180, the processor 710 performs the write operation using the at least one repeatable runout compensation value generated in operation S1170 without using the repeatable runout correction code RCC stored in the disk illustrated in FIG. 6. The storage medium interface 720 can be controlled to perform.

For example, when a disk deformation occurs due to a high temperature or a low temperature while performing the write operation, the write operation may not be performed normally and an error may occur. In this case, the position error signal has a larger value than the conventional one, and the write operation cannot be normally performed by the conventional method. However, according to an embodiment of the inventive concept, the write operation is normally performed by compensating the position error signal using the newly generated at least one repeatable runout compensation value under the above conditions and performing a write operation. The operation can be completed.

FIG. 12 is a diagram illustrating an embodiment of the storage medium 730 of FIG. 7.

In the following description, it is assumed that the storage medium 730 of FIG. 7 is a disk. As described with reference to FIGS. 3, 5, and 6, the disc may include a plurality of tracks, each track including a plurality of data regions and a plurality of servo regions. In FIG. 12, it is assumed that only one track TR1 is shown in the disc 1200, and that one track TR1 includes eight data areas DR1, DR2,..., And DR8. do. However, the present invention is not limited to this case, and the number of data areas included in the track may vary. In FIG. 12, illustration of the servo regions is omitted for convenience of description. The one track TR1 may include the servo area between at least one data area of the data areas DR1, DR2,..., And DR8.

FIG. 13A illustrates an embodiment of a table stored in the memory 740 of FIG. 7, and FIG. 13B illustrates another embodiment of a table stored in the memory 740 of FIG. 7. Figure is shown.

7 to 13B, when the write operation is performed n times, the processor 710 may perform at least one repetitive runout compensation value for at least one data sector to perform the write operation. Repeatable runout compensation values for a track including a data sector to perform the write operation may be generated.

It is assumed that data sectors for writing data in response to the received write command are included in the data regions DR1, DR2, and DR3. When the write retry operation is performed n times, the processor 710 may generate a new repeatable runout compensation value NRCC1 corresponding to the data region DR1 and a new region corresponding to the data region DR2 as shown in FIG. 13A. A new repeatable runout compensation value NRCC3 corresponding to the repeatable runout compensation value NRCC2 and the data area DR3 may be generated and stored in the memory 740.

Alternatively, when the write retry operation is performed n times, the processor 710 may include the data areas of the track TR1 including the data areas DR1, DR2, and DR3 to be written as shown in FIG. 13B. New repeatable runout compensation values NRCC1, NRCC2,..., NRCC8 corresponding to each of DR1, DR2,..., And DR8 may be generated and stored in the memory 740. That is, the processor 710 may generate a new repeatable runout compensation value NRCC1 corresponding to the data area DR1, a new repeatable runout compensation value NRCC2 corresponding to the data area DR2, and a new repeatability corresponding to the data area DR3. Repetitive runout compensation value NRCC3, new repeatable runout compensation value NRCC4 corresponding to data area DR4, new repeatable runout compensation value NRCC5 corresponding to data area DR5, corresponding to data area DR6 A new repeatable runout compensation value NRCC6, a new repeatable runout compensation value NRCC7 corresponding to the data area DR7, and a new repeatable runout compensation value NRCC8 corresponding to the data area DR8 are generated and stored in the memory 740. Can be stored.

As described above, when the new repeatable runout compensation values are stored in the memory 740, the processor 740 performs operations S870, S980, S1080, and S1180. When the write operation is performed in the data region DR1, the data region ( When the write operation is performed using the new repeatable runout compensation value NRCC1 corresponding to DR1, and when the write operation is performed in the data area DR2, a new repeatable runout compensation value corresponding to the data area DR2 ( The write operation is performed using NRCC2, and when the write operation is performed in the data region DR3, the write operation is performed using a new repeatable runout compensation value NRCC3 corresponding to the data region DR3. Can be.

In an exemplary embodiment of the present invention, the write operation is performed using the newly generated repeatable runout compensation value, so the write operation is performed with the position error signal reduced. However, according to the prior art, the position error signal cannot be compensated as in the present invention. According to another conventional technology, when a write retry operation is performed a predetermined number of times, a write operation may be performed on another data sector (a spare data sector). However, according to an exemplary embodiment of the inventive concept, the seek operation for searching for another data sector is not performed as in the other prior art.

The invention can be practiced as a method, apparatus, system, or the like. When implemented in software, the constituent means of the present invention are code segments that necessarily perform the necessary work. The program or code segments may be stored in a processor readable medium. Examples of processor-readable media include electronic circuits, semiconductor memory devices, ROMs, flash memory, erasable ROM (EROM), floppy disks, optical disks, hard disks, and the like.

As described above, optimal embodiments have been disclosed in the drawings and the specification. Although specific terms have been employed herein, they are used for purposes of illustration only and are not intended to limit the scope of the invention as defined in the claims or the claims. Therefore, those skilled in the art will appreciate that various modifications and equivalent embodiments are possible without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

Claims (10)

Performing a light retry operation when an error occurs while performing a write operation.
Generating at least one repeatable runout (RRO) compensation value when the write retry operation is performed n times (n is a natural number); and
And performing the write operation again using the generated at least one repeatable runout compensation value. The method of claim 1, wherein generating the at least one repeatable runout compensation value comprises:
And when the write retry operation is performed n times, generating the at least one repeatable runout compensation value using a measured position error signal (PES). The method of claim 2, wherein generating the at least one repeatable runout compensation value comprises:
Measuring the position error signal when the write retry operation is performed n times; and
Generating the at least one repeatable runout compensation value using the measured position error signal. The method of claim 2, wherein generating the at least one repeatable runout compensation value comprises:
Measuring the position error signal; and
And generating the at least one repeatable runout compensation value by using the measured position error signal when the write retry operation is performed n times. The method of claim 1, wherein generating the at least one repeatable runout compensation value comprises:
When the write retry operation is performed n times, at least one repeatable runout compensation value for at least one data sector to perform the write operation or repeatable runout compensation for a track including the data sector to perform the write operation. And generating values. The method of claim 1, wherein the write operation control method comprises:
And storing the generated at least one repeatable runout compensation value in a memory. The method of claim 6, wherein the storing in the memory comprises:
If there is no space to store the generated at least one repeatable runout compensation value in the memory, deleting at least one repeatable runout compensation value stored in the memory; and
And storing the generated at least one repeatable runout compensation value in the memory. The method of claim 1, wherein the repeatable runout compensation value,
And a repeatable runout correction code (RCC). Storage medium on which data is stored
A storage medium interface for writing data to or reading data from the storage medium
And a processor configured to generate at least one repeatable runout (RRO) compensation value when the write retry operation is performed n times (n is a natural number) while the storage medium interface is performing the write operation.
The processor comprising:
And the storage medium interface performs a write operation again after compensating a position error signal (PES) using the generated at least one repeatable runout compensation value. 10. The apparatus of claim 9,
And generate the at least one repeatable runout compensation value using the uncompensated position error signal.
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