KR20120134249A - Solar cell apparatus and method of fabricating the same - Google Patents

Abstract

PURPOSE: A solar cell and a manufacturing method thereof are provided to increase open circuit voltage by alternately forming a barrier layer and a well layer on a light absorption layer. CONSTITUTION: A back surface electrode layer(150) is arranged on a substrate. A light absorption layer(200) is arranged on the back surface electrode layer. A buffer layer(300) is formed on the light absorption layer. The buffer layer is formed by alternately laminating the barrier layer and a well layer. A window layer is arranged on the buffer layer.

Description

SOLAR CELL AND MANUFACTURING METHOD THEREOF {SOLAR CELL APPARATUS AND METHOD OF FABRICATING THE SAME}

An embodiment relates to a solar cell and a manufacturing method thereof.

Recently, as the demand for energy increases, development of solar cells for converting solar energy into electrical energy is in progress.

Particularly, a CIGS-based solar cell which is a pn heterojunction device of a substrate structure including a glass substrate, a metal back electrode layer, a p-type CIGS light absorbing layer, a high resistance buffer layer, an n-type window layer and the like is widely used.

In such a solar cell, research is being conducted to improve electrical characteristics such as low resistance and high transmittance.

The embodiment is to improve the problem of environmental pollution and to provide a solar cell and a method of manufacturing the improved photo-electric conversion efficiency.

Solar cell according to one embodiment includes a substrate; A back electrode layer disposed on the substrate; A light absorbing layer disposed on the back electrode layer; A buffer layer formed by alternately stacking a barrier layer and a well layer on the light absorbing layer; And a window layer disposed on the buffer layer.

A solar cell manufacturing method according to an embodiment includes disposing a back electrode layer on a substrate; Forming a light absorbing layer on the back electrode layer; Alternately stacking a barrier layer and a well layer on the light absorbing layer to form a buffer layer; And forming a window layer on the buffer layer.

According to the embodiment, the barrier layer and the well layer are alternately formed on the light absorbing layer, so that the open-circuit voltage (Voc) increases due to the trapping effect of electrons, thereby improving the photoelectric conversion efficiency.

1 is a cross-sectional view showing a solar cell according to an embodiment.
2 to 4 are views illustrating a process of manufacturing a solar cell according to the embodiment.
5 is a view showing a band gap change of the barrier layer and the well layer in the solar cell according to the embodiment.

In the description of the embodiments, where each substrate, layer, film, or electrode is described as being formed "on" or "under" of each substrate, layer, film, or electrode, etc. , “On” and “under” include both “directly” or “indirectly” other components. In addition, the upper or lower reference of each component is described with reference to the drawings. The size of each component in the drawings may be exaggerated for the sake of explanation and does not mean the size actually applied.

1 is a cross-sectional view showing a solar cell according to an embodiment. Referring to FIG. 1, the solar cell panel includes a support substrate 100, a back electrode layer 150, a light absorbing layer 200, a buffer layer 300, and a window layer 400.

The support substrate 100 has a plate shape and supports the back electrode layer 150, the light absorbing layer 200, the buffer layer 300, and the window layer 400.

The support substrate 100 may be an insulator. The support substrate 100 may be a glass substrate, a plastic substrate such as a polymer, or a metal substrate. In addition, a ceramic substrate such as alumina, stainless steel (SUS), a flexible polymer, or the like may be used as the material of the support substrate 100. The support substrate 100 may be transparent, rigid, or flexible.

The back electrode layer 150 is disposed on the support substrate 100. The back electrode layer 150 is a conductive layer. The back electrode layer 150 may allow electric charges generated in the light absorbing layer 200 of the solar cell to move so that current flows to the outside of the solar cell. The back electrode layer 150 should have high electrical conductivity and low specific resistance in order to perform this function.

In addition, the back electrode layer 150 should be maintained at a high temperature during heat treatment in a sulfur (S) or selenium (Se) atmosphere accompanying the formation of the CIGS compound. In addition, the back electrode layer 150 should be excellent in adhesion with the support substrate 100 so that peeling does not occur with the support substrate 100 due to a difference in thermal expansion coefficient.

The back electrode layer 150 may be formed of molybdenum (Mo), gold (Au), aluminum (Al), chromium (Cr), tungsten (W) and copper (Cu) or an alloy of the above materials. Among them, in particular, molybdenum (Mo) has a small difference between the support substrate 100 and the coefficient of thermal expansion compared to other elements, and thus excellent adhesion can be prevented from occurring in the peeling phenomenon. Overall required properties can be met.

The back electrode layer 150 may include two or more layers. In this case, each of the layers may be formed of the same metal, or may be formed of different metals.

The light absorbing layer 200 may be formed on the back electrode layer 150. The light absorbing layer 200 includes a group I-III-VI compound. For example, the light absorbing layer 200 may be formed of a copper-indium-gallium-selenide-based (Cu (In, Ga) Se ₂ ; CIGS-based) crystal structure, copper-indium-selenide-based, or copper-gallium-selenide It may have a system crystal structure.

The buffer layer 300 is disposed on the light absorbing layer 200. The solar cell having the CIGS compound as the light absorbing layer 200 forms a pn junction between the CIGS compound thin film as the p-type semiconductor and the window layer 400 thin film as the n-type semiconductor. However, since the two materials have a large difference in lattice constant and band gap energy, a buffer layer having a band gap in between the two materials is required to form a good junction.

CdS has excellent efficiency as a material for forming the buffer layer 300, but there is a problem of environmental pollution due to cadmium. To improve this, solar cells using various alternative materials such as ZnS or In ₂ S ₃ have been developed, but there is room for improvement in efficiency compared to existing CdS.

In the present invention, the buffer layer 300 is formed in a multilayer structure. In detail, a first barrier layer 310, a first well layer 320, a second barrier layer 330, and a second well layer 340 may be formed on the light absorbing layer 200. That is, the well layer and the barrier layer may be formed alternately.

The thickness of the well layer and the barrier layer may be formed in the range of 2nm to 40nm. The band gap of the barrier layer may range from 2 eV to 4 eV, and the band gap of the well layer may be formed to have a value smaller than that of the adjacent barrier layer.

In the embodiment, the well layer is formed before the barrier layer, but is not limited thereto.

Energy of the well layer and the barrier layer formed toward the upper portion of the buffer layer 300 may decrease, respectively.

FIG. 5 is a diagram illustrating a band gap change between the barrier layer and the well layer in the solar cell according to the embodiment. Since the barrier layer and the well layer are alternately formed, the energy band gap is increased and decreased repeatedly.

The well layer and the barrier layer may include a metal material and may include sulfur or selenium-based material. The band gap can be changed by changing the type of metal element included in the well layer and the barrier layer. The metal elements included in the well layer and the barrier layer may include cadmium (Cd), zinc (Zn), gallium (Ga), or indium (In).

The energy band values of the well layer and the barrier layer may be formed in a zigzag form while satisfying the following conditions.

Eg _{barrier n} > Eg _{well n} , n = 1, 2, 3... ;

Eg _{barrier n} ≦ Eg _{barrier n + 1;}

Eg _{well n} ≤ Eg _{well n + 1}

Band Gap Table by Material (Variable below Decimal Point)

matter Bandgap (eV) matter Bandgap (eV) CdS 2.4 ZnS 3.6 CdSe 1.73 ZnSe 2.7 CdZnS ≥2.4 In2S3 2.1 GaS 2.5 In (OH) xSy 2.54 AgInS2 1.93 AgInSe2 1.2

A high resistance buffer layer (not shown) may be formed on the buffer layer 300. The high resistance buffer layer includes zinc oxide (i-ZnO) that is not doped with impurities.

The window layer 400 is disposed on the buffer layer 300. The window layer 400 is transparent and is a conductive layer. In addition, the resistance of the window layer 400 is higher than the resistance of the back electrode layer 150.

The window layer 400 includes an oxide. For example, the window layer 400 may include zinc oxide, indium tin oxide (ITO), or indium zinc oxide (IZO).

In addition, the window layer 400 may include aluminum doped zinc oxide (AZO) or gallium doped zinc oxide (GZO).

According to the solar cell according to the embodiment of the present invention, since a material having a different band gap is repeatedly stacked to form a buffer layer, an open-circuit voltage (Voc) is increased, thereby improving photoelectric conversion efficiency.

2 to 4 are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment. For a description of the present manufacturing method, refer to the description of the solar cell described above. The description of the solar cell described above may be essentially combined with the description of the present manufacturing method.

Referring to FIG. 2, the back electrode layer 150 may be formed on the support substrate 100. The back electrode layer 150 may be deposited using molybdenum. The back electrode layer 150 may be formed by physical vapor deposition (PVD) or plating.

In addition, an additional layer such as a diffusion barrier may be interposed between the support substrate 100 and the back electrode layer 150.

Next, the light absorbing layer 200 is formed on the back electrode layer 150. The light absorbing layer 200 may be, for example, copper, indium, gallium, or selenium, while simultaneously or separately evaporating a copper-indium-gallium-selenide-based (Cu (In, Ga) Se 2; CIGS-based) light absorbing layer ( The method of forming 200 and the method of forming a metal precursor film and forming it by the selenization process are widely used.

After the metal precursor film is formed and then subjected to selenization, a metal precursor film is formed on the back electrode 200 by a sputtering process using a copper target, an indium target, and a gallium target.

Subsequently, the metal precursor film is formed of a copper-indium-gallium-selenide (Cu (In, Ga) Se 2; CIGS-based) light absorbing layer 200 by a selenization process.

Alternatively, the copper target, the indium target, the sputtering process using the gallium target, and the selenization process may be performed simultaneously.

Alternatively, the CIS-based or CIG-based light absorbing layer 200 may be formed by using only a copper target and an indium target, or by a sputtering process and a selenization process using a copper target and a gallium target.

3 and 4, the buffer layer 300 is formed on the light absorbing layer 200 by a metal organic chemical vapor deposition (MOCVD) process or a chemical bath depositon (CBD). The buffer layer 300 may be formed by stacking layers having different band gaps. For example, the first barrier layer 310 is ZnSe, the first well layer 320 is In ₂ S ₃ , and the second barrier is formed. Layer 330 may be formed of ZnS.

Next, a transparent conductive material is deposited on the buffer layer 300 to form a window layer 400.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (9)

Board;
A back electrode layer disposed on the substrate;
A light absorbing layer disposed on the back electrode layer;
A buffer layer formed by alternately stacking a barrier layer and a well layer on the light absorbing layer; And
And a window layer disposed on the buffer layer. The method of claim 1,
The buffer layer includes a first barrier layer, a first well layer, a second barrier layer, and a second well layer, and the band gaps of the first and second barrier layers are greater than the band gaps of the first and second well layers. Solar cell formed to have a value. The method of claim 2,
The energy band value of the well layer and the barrier layer satisfies the following conditions.
Eg _{barrier n} > Eg _{well n} , n = 1, 2, 3... ; Eg _{barrier n} ≦ Eg _{barrier n + 1} ; Eg _{well n} ≤ Eg _{well n + 1} The method of claim 1,
The well layer and the barrier layer are each formed in the range of 2nm to 40nm. The method of claim 1,
The well layer and the barrier layer comprises a metal element, the solar cell comprising sulfur or selenium. The method of claim 1,
The band gap of the barrier layer is in the range of 2eV to 4eV, the band gap of the well layer is formed to have a value smaller than the band gap of the adjacent barrier layer. Disposing a back electrode layer on the substrate;
Forming a light absorbing layer on the back electrode layer;
A barrier layer and a well layer are alternately stacked on the light absorbing layer to form a buffer layer; And
Forming a window layer on the buffer layer; The method of claim 7, wherein
The buffer layer is a solar cell manufacturing method comprising a metal element, sulfur or selenium formed. The method of claim 7, wherein
The metal element included in the well layer and the barrier layer includes a cadmium (Cd), zinc (Zn), gallium (Ga) or indium (In).

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