KR20120125823A - Liquid crystal display device and Method of manufacturing the same - Google Patents

Abstract

PURPOSE: A liquid crystal display device and a manufacturing method thereof are provided to prevent a disconnection in a pixel electrode which is formed on an upper end of a protective layer. CONSTITUTION: A semiconductor layer(250) is formed in a middle layer between a gate electrode(210) and source/drain electrodes(320,340). A contact hole(360) is formed on an insulating layer(600) and a thin film transistor protective layer(380). A pixel electrode is laminated on an upper end of the protective layer. The common electrode has a plate shape. The pixel electrode has a finger shape.

Description

Liquid crystal display device and method of manufacturing the same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device in a transverse electric field mode and a method for manufacturing the same, and more particularly, to a liquid crystal display device and a method for manufacturing the same, which can reduce the number of masks.

Liquid crystal display devices have a wide variety of applications ranging from notebook computers, monitors, spacecrafts and aircraft to the advantages of low power consumption and low power consumption and being portable.

The liquid crystal display device includes a lower substrate, an upper substrate, and a liquid crystal layer formed between the two substrates, and the arrangement of the liquid crystal layers is adjusted according to whether an electric field is applied, and accordingly, light transmittance is adjusted to display an image.

Such a liquid crystal display device has a twisted nematic (TN) mode, a vertical alignment (VA) mode, an in plane switching (IPS) mode, and an advanced horizontal in-plane switching (AH-IPS) mode according to a method of adjusting the arrangement of the liquid crystal layer. It is developed in various ways.

Here, the IPS mode and the AH-IPS mode are arranged in such a manner that the pixel electrode and the common electrode are disposed on the lower substrate to adjust the arrangement of the liquid crystal layer by the transverse electric field between the pixel electrode and the common electrode.

The IPS mode is a method of controlling the arrangement of the liquid crystal layer by generating a transverse electric field between the two electrodes by alternately arranging the pixel electrode and the common electrode in parallel. In the IPS mode, the liquid crystal layer is disposed at the upper portion of the pixel electrode and the common electrode. There is a disadvantage in that the transmittance of light in the region is lowered because the arrangement of is not controlled.

AH-IPS mode is designed to solve the shortcomings of the IPS mode. The AH-IPS mode is also called a FFS (Fringe Field Switching) mode, in which the pixel electrode and the common electrode are spaced apart from each other with an insulating layer interposed therebetween, and at least one electrode is configured in a finger shape. By controlling the arrangement of the liquid crystal layer through the fringe field (Fringe Field) generated between the two electrodes.

On the other hand, the liquid crystal display device using the AH-IPS mode as described above is mainly used in small terminals such as mobile terminals.

1 is an exemplary view showing a cross section of a liquid crystal display device manufactured by a conventional liquid crystal display device manufacturing method, and in particular, an exemplary view showing a cross section of an AH-IPS mode liquid crystal display device.

As shown in FIG. 1, a conventional AH-IPS mode liquid crystal display includes a gate, a semiconductor layer, a source / drain electrode SD, an insulating layer 60, a common electrode Vcom 50, and a protective layer 70. ) And the pixel electrode PXL 40.

In particular, in the conventional AH-IPS mode liquid crystal display device, the protective layer 70 is formed on the common electrode using a CVD process, and then the protective layer is etched through a dry etching (DE) process using a mask. Thereafter, after the common electrode 50 is formed by an etching process using the protective layer as a mask, the pixel electrode 40 is formed on the upper portion of the protective layer 70.

That is, as the common electrode exposed to the outside of the protective layer 70 is etched through an etching process (wet etching process), the common electrode is removed from the surface of the substrate, and then the protective layer 70 and the insulating layer 60 are removed. The pixel electrode 40 is formed on the top.

However, as part of the common electrodes stacked on the lower end of the protective layer 70 are etched during the etching process for the common electrode, undercut is generated at the end of the protective layer 70 to protect the insulating layer 60 and the protective layer 70. An empty space (indicated by (B) in FIG. 1) is formed between the layers 70.

Therefore, when the pixel electrode 40 covering the insulating layer 60 and the protective layer 70 is formed in a subsequent process, disconnection (A in FIG. 1 (A) of the pixel electrode 40 passing through the empty space B is performed. May be caused).

That is, the conventional method of manufacturing the AH-IPS mode liquid crystal display device has a problem that the process is complicated because the CDV process and the dry etching (DE) process are required to form the protective layer 70.

In the conventional AH-IPS mode liquid crystal display, undercut is generated at the lower end of the protective layer 70 during the etching process for forming the common electrode 50, so that the insulating layer 60 and the protective layer 70 are formed. By being spaced apart, an empty space B is formed between the insulating layer and the protective layer, and as the pixel electrodes 40 are stacked to pass through these spaced spaces, disconnection A may occur in the pixel electrodes. have.

The present invention is to solve the above-mentioned problems, by using a soluble (Soluble) material capable of etching by the mask process to form a protective layer laminated on the top of the common electrode, the soluble material after etching the common electrode is a common electrode An object of the present invention is to provide a liquid crystal display and a method of manufacturing the same, which cover the exposed portions of the film.

According to an aspect of the present invention, there is provided a liquid crystal display device comprising: a thin film transistor formed in a pixel area on a substrate and including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode; A protective layer stacked on top of the thin film transistor to expose the drain electrode through a contact hole; A common electrode stacked on an outer side of the contact hole at an upper end of the protective layer; A soluble protective layer stacked on an outer side of the contact hole while covering an end of the common electrode facing the contact hole at an upper end of the common electrode; And a pixel electrode stacked on top of the passivation layer while being connected to the drain electrode through the contact hole.

In addition, the liquid crystal display device manufacturing method according to the present invention for achieving the above technical problem, forming a gate electrode on the substrate using a first mask; Stacking a semiconductor layer material and a source / drain electrode material on the entire surface of the substrate including the gate electrode, and then forming a semiconductor layer and a source / drain electrode using a second mask; Stacking an insulating layer on the entire surface of the substrate including the electrode layer, and forming a contact hole in the insulating layer using a third mask to expose the drain electrode; Sequentially stacking a common electrode material and a soluble protective layer material on a front surface of the substrate including the contact hole, and forming a protective layer pattern on the outer side of the contact hole using a fourth mask; Etching the common electrode material using the protective layer pattern as a mask to form a common electrode and a protective layer; And depositing a pixel electrode material on the entire surface of the substrate including the protective layer, and then forming a pixel electrode using a fifth mask.

According to the above solution, the present invention provides the following effects.

That is, the present invention forms a protective layer stacked on top of the common electrode using a soluble material that can be etched by a mask process, so that the soluble material covers the exposed portion of the common electrode after etching of the common electrode. This provides the effect that disconnection does not occur in the pixel electrode stacked on the top of the protective layer.

In addition, since the present invention forms a protective layer using a soluble material that can be etched by a mask process, the effect of preventing complicated processes such as chemical vapor deposition (CVD) and dry etching (DE) is avoided. To provide.

1 is an exemplary view showing a cross section of a liquid crystal display device manufactured by a conventional liquid crystal display device manufacturing method.
2 is a plan view of a liquid crystal display device according to the present invention;
3 is a cross-sectional view taken along the line AA ′ of FIG. 2.
4A to 4I are schematic process cross-sectional views showing a method of manufacturing a liquid crystal display device according to the present invention;

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a plan view of the liquid crystal display device according to the present invention, in particular, an exemplary view showing a lower substrate. 3 is a cross-sectional view taken along the line AA ′ of FIG. 2.

In the liquid crystal display according to the present invention, an upper substrate (not shown) and a lower substrate on which a color filter and a black matrix are formed are bonded to each other with a liquid crystal interposed therebetween, of which the lower substrate is illustrated in FIGS. 2 and 3. As shown in FIG. 1, the substrate 100 includes a substrate 100, a gate line 200, a data line 300, a thin film transistor T, a pixel electrode 400, and a common electrode 500.

First, the gate lines 200 are arranged in the horizontal direction, and the data lines 300 are arranged in the vertical direction. As such, the gate line 200 and the data line 300 are arranged to cross each other, thereby defining one pixel area (pixel).

Next, the thin film transistor T is formed in an area where the gate line 200 and the data line 300 cross each other. The thin film transistor T includes a gate electrode 210, a semiconductor layer 250, a source electrode 320, and a drain electrode 340.

Here, the gate electrode 210 extends from the gate line 200.

The semiconductor layer 250 is formed in an intermediate layer between the gate electrode 210 and the source / drain electrodes 320 and 340 to serve as a channel through which electrons move when the thin film transistor operates. Meanwhile, the semiconductor layer 250 includes a semiconductor layer constituting a channel through which electrons move and an ohmic contact layer formed between the semiconductor layer and the source / drain electrodes 320 and 340 to lower the barrier of movement of electrons. It may be done.

The source electrode 320 extends from the data line 300, and the drain electrode 340 is spaced apart from the source electrode 320 at predetermined intervals to face each other.

The thin film transistor T is not limited to the structure as shown in the drawing, and thus, the source electrode 320 may be modified in various forms known in the art, such as a structure having a U shape.

The source electrode and the drain electrode applied to the present invention are aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), chromium (Cr), molybdenum (molybdenum); Low resistance opaque conductive materials such as Mo) and molybdenum alloys.

Next, the insulating layer (PAC) 600 is applied to the entire surface of the substrate including the source / drain electrodes 320, 340 is formed. In particular, the present invention has a feature that a photo acryl, which can lower power consumption, is used as the insulating layer PAC.

Meanwhile, a thin film transistor protective layer 380 may be further formed between the source / drain electrodes 320 and 340 and the insulating layer (PAC) 600 to protect the source / drain electrodes.

The contact hole 360 is formed in the insulating layer 600 and the thin film transistor protective layer 380 so that the pixel electrode 400 described below may be connected to the drain electrode 340.

Next, the common electrode 500 is formed in the pixel area, and is insulated from the source / drain electrodes 320 and 340 with the insulating layer (PAC) 600 interposed therebetween, and the protective layer (PAS) 700. It is insulated from the pixel electrode 400 with the gap therebetween. The common electrode 500 is deposited in a flat plate shape on the insulating layer PAC.

That is, as shown in FIGS. 2 and 3, the common electrode 500 is deposited in a flat shape on the entire surface of the substrate except for the inside of the contact hole 360 direction.

Next, the pixel electrode 400 is formed in the pixel region and is electrically connected to the drain electrode 340 of the thin film transistor T through the contact hole 360.

The pixel electrode 400 is to form a fringe field together with the common electrode 500, and is formed in a finger shape on the passivation layer (PAS) 700.

The pixel electrode 400 is connected to the drain electrode 340 through the insulating layer 600 and the transistor protection layer 380 through the contact hole 360 as described above.

Lastly, the protective layer 700 is formed between the common electrode 500 and the pixel electrode 400 to insulate the common electrode and the pixel electrode. In particular, the protective layer 700 may be used for the exposure, development, and etching processes using a mask. It is characterized by being formed of soluble (Soluble) material that can be removed by.

That is, in order to pattern the common electrode (Vcom) 500 on the insulating layer (Photo Acryl) (PAC) 600, the present invention provides a protective layer (PAS) that can be exposed. 700), it is possible to eliminate the CVD process and the DE process, which was conventionally required for the formation of the protective layer, to use the low dielectric constant of the soluble material, and the capacitance (Cst) due to the high thickness of 1㎛ It has a feature that can reduce. In addition, the present invention has the feature that it can be applied to large TV models due to the characteristics of the soluble material as described above.

On the other hand, the protective layer 700 is also deposited in the shape of a flat plate on the entire surface of the substrate except the inner side of the contact hole 360 direction.

In addition, since the common electrode 500 and the protective layer 700 are stacked on top of the insulating layer 600 where the contact holes are formed, as shown in FIGS. 2 and 3, the outer portion of the contact hole 360 is illustrated. It is formed in the area.

On the other hand, the protective layer 700 is stacked on top of the common electrode 500, but as shown in Figure 3, because it is formed in a form surrounding the end of the common electrode 500 facing the contact hole, Figure 2 As shown in FIG. 6, the common electrode 500 is formed on the outer side of the protective layer 700 when viewed based on the contact hole 360.

That is, since the present invention uses the protective layer 700 made of a soluble material, an undercut is generated at the bottom of the protective layer 700 while the common electrode at the bottom of the protective layer is etched by wet etching. In addition, as the protective layer of the soluble material (Soluble) is recessed between the spaces spaced by the undercut, the ends of the common electrode are covered, and thus, the common electrode 500 is a protective layer (see the contact hole). More than 700).

Hereinafter, a method of manufacturing a liquid crystal display device according to the present invention will be described in detail with reference to FIGS. 4A to 4I.

4A to 4I are schematic cross-sectional views illustrating a method of manufacturing a liquid crystal display device according to the present invention, which illustrates the manufacturing process of the liquid crystal display device shown in FIGS. 2 and 3. Thus, FIGS. 4A-4I show an A-AI 'cross section, shown in FIG.

First, as shown in FIG. 4A, the gate electrode 210 is formed on the substrate 100.

The gate electrode 210 deposits a predetermined metal material on the substrate 100, deposits a photoresist on the predetermined metal material, and then performs a process of exposing, developing, and etching sequentially using a first mask. It may be formed using a mask process.

Although not shown, in the process of forming the gate electrode 210, the gate line 200 connected to the gate electrode 210 is simultaneously formed.

In addition, the gate electrode 210 may be formed by depositing one metal material as described above, but may also be formed by depositing two metal materials as shown in FIG. 4A.

Next, as shown in FIG. 4B, the gate insulating layer 220, the semiconductor layer material 251, and the source / drain electrode material 321 are sequentially stacked on the entire surface of the substrate 100 including the gate electrode 210. After the photoresist 810 is stacked thereon, an exposure and development process is performed using the second mask.

The gate insulating layer 220 may be formed using a plasma enhanced chemical vapor deposition (PECVD) or the like.

Next, as shown in FIG. 4C, the source / drain electrode material 321 and the semiconductor layer material 251 are etched using the photoresist 810 exposed and developed by the second mask, so that the source electrode 320 is etched. The drain electrode 340 and the semiconductor layer 250 are formed.

That is, through the above process, the semiconductor layer 250 is formed on the gate insulating layer 220, and the source electrode 320 and the source electrode 320 extending from the data line 300 on the semiconductor layer 250. The drain electrode 340 is formed to face.

Here, a halftone mask may be used to simultaneously form the source / drain electrodes and the semiconductor layer.

Next, as shown in FIG. 4D, an insulating layer 600 (and a transistor protection layer 380) is stacked on the entire surface of the substrate 100 including the source / drain electrodes, and then, an insulating layer is formed using a third mask. As the 600 and the transistor protection layer 380 are etched, the contact hole 360 is formed. In this case, the transistor protection layer 380 may be omitted.

That is, through the mask process using the third mask, a contact hole is formed to expose the drain electrode 340 of the thin film transistor to the insulating layer 600.

Next, as shown in FIG. 4E, a common electrode material 510 is stacked on the entire surface of the substrate 100 including the contact hole, and a protective layer material 710 is stacked on the upper surface of the upper surface of the substrate 100. Through the process, the protective layer material 710 around the contact hole 360 is removed.

That is, the common electrode material 510 and the protective layer material 710 are stacked on the front surface of the substrate, and in particular, as the protective layer material 710, as described above, a soluble material (PAS) capable of exposure is used. do.

Accordingly, the protective layer material 710 around the contact hole 360 is etched by an exposure and development process using a fourth mask, thereby leaving a shape as shown in FIG. 4E.

Next, as shown in FIG. 4F, the common electrode material of the protective layer pattern 720 is etched by wet etching using the remaining protective layer material 710 as a mask through the process of FIG. 4E. The electrode 500 is formed.

Meanwhile, as shown in FIG. 4F, during the wet etching process of etching the common electrode material 510 to form the common electrode 500, an undercut is generated at the lower end of the protective layer pattern 720, thereby forming the protective layer pattern 720. And spaced apart between the insulating layer 600 is generated.

That is, since the common electrode material 510 is laminated to a thin thickness of about 300 GPa, the common electrode material formed at the outer edge of the lower end of the protective layer pattern 720 by wet etching is the outer edge of the protective layer pattern. Etching from the end to the inside of about 0.3㎛ about, due to this, under the end of the protective layer pattern 720, the common electrode material is removed to form a space spaced apart from the protective layer pattern 720 and the insulating layer 600 do.

Next, as can be seen in Figure 4g, during the wet etching process of Figure 4f, the protective layer pattern 720 is recessed into a space spaced between the end of the protective layer pattern 720 and the protective layer 600, the spaced apart The filled space is filled, through which the protective layer 700 is formed.

That is, since the protective layer pattern 720 formed of a soluble material has fluidity, the protective layer pattern 720 fills the spaced space while being recessed into the spaced space. At the same time, generation of the protective layer 700 is completed.

Next, as shown in FIG. 4H, the pixel electrode material 410 is stacked on the front surface of the substrate 100 including the protective layer 700 in a thin thickness of about 300 μs, and the photoresist 820 is formed on the top of the substrate 100. After the lamination, the exposure and development processes are performed using the fifth mask.

Finally, the pixel electrode material 410 is etched using the photoresist 820 pattern formed in the above process, thereby finally forming the pixel electrode 400.

Here, the pixel electrode 400 is formed in a finger shape on the passivation layer (PAS) 700 to form a fringe field together with the common electrode 500.

As shown in FIG. 2 and FIG. 4I, the liquid crystal display device according to the present invention, which has undergone the above-described process, has an insulating layer 600 and a protective layer 700 in the outer direction centering on the contact hole 360. ) And the common electrode 500 are sequentially disposed.

As described above, the present invention relates to an AH-IPS structured liquid crystal display device using a protective layer (PAS) 700 formed of a soluble material, and is manufactured using five masks. Capacitance can be reduced by using dielectric constant and high thickness.

That is, in order to pattern the common electrode (Vcom) 500 on the insulating layer (Photo Acryl) (PAC) 600, the present invention provides a protective layer (PAS) that can be exposed. 700), it is possible to eliminate the CVD process and the DE process, which was conventionally required for the formation of the protective layer, to use the low dielectric constant of the soluble material, and the capacitance (Cst) due to the high thickness of 1㎛ It has a feature that can reduce. Therefore, the present invention has the feature that it can be applied to large TV models due to the characteristics of the soluble materials as described above.

In addition, in the present invention, the soluble protective layer 700 fills the undercut portion of the lower end of the protective layer formed during the formation of the common electrode, whereby the common electrode 500 is shorted with the pixel electrode 400. The phenomenon in which the pixel electrode 400 is disconnected can be prevented.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: substrate 200: gate line
210: gate electrode 220: gate insulating film
250: semiconductor layer 300: data line
320: source electrode 340: drain electrode
360: contact hole 380: thin film transistor protective layer
400: pixel electrode 500: common electrode
600: insulating layer (PAC) 700: protective layer (PAS)

Claims (13)

A thin film transistor formed in the pixel area on the substrate, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode, and a drain electrode;
A protective layer stacked on top of the thin film transistor to expose the drain electrode through a contact hole;
A common electrode stacked on an outer side of the contact hole at an upper end of the protective layer;
A soluble protective layer stacked on an outer side of the contact hole while covering an end of the common electrode facing the contact hole at an upper end of the common electrode; And
And a pixel electrode stacked on an upper end of the passivation layer while being connected to the drain electrode through the contact hole. The method of claim 1,
And the common electrode is formed in a plate shape, and the pixel electrode is formed in a finger shape. The method of claim 1,
And the protective layer covers an end of the common electrode while being recessed into an undercut portion formed at a lower end of the protective layer in the process of forming the common electrode. The method of claim 1,
The protective layer is formed on the outside of the contact hole, the liquid crystal display device, characterized in that deposited on the entire surface of the substrate except the inner side of the contact hole direction. The method of claim 4, wherein
The common electrode is formed outside the protective layer around the contact hole, and is deposited on the entire surface of the substrate except the inner side of the contact hole direction. The method of claim 1,
The protective layer is formed by etching by a mask process. The method of claim 1,
And the common electrode is etched and formed by a wet etching process using the protective layer as a mask. The method of claim 1,
The insulating layer is a liquid crystal display, characterized in that formed of Photo Acryl (Photo Acryl). Forming a gate electrode on the substrate using a first mask;
Stacking a semiconductor layer material and a source / drain electrode material on the entire surface of the substrate including the gate electrode, and then forming a semiconductor layer and a source / drain electrode using a second mask;
Stacking an insulating layer on the entire surface of the substrate including the electrode layer, and forming a contact hole in the insulating layer using a third mask to expose the drain electrode;
Sequentially stacking a common electrode material and a soluble protective layer material on a front surface of the substrate including the contact hole, and forming a protective layer pattern on the outer side of the contact hole using a fourth mask;
Etching the common electrode material using the protective layer pattern as a mask to form a common electrode and a protective layer; And
And depositing a pixel electrode material on the entire surface of the substrate including the protective layer, and then forming a pixel electrode using a fifth mask. The method of claim 9,
The insulating layer is a liquid crystal display device, characterized in that formed of Photo Acryl (Photo Acryl). The method of claim 9,
Forming the common electrode and the protective layer,
Etching the common electrode material using the protective layer pattern as a mask to form the common electrode; And
During the etching of the common electrode material, forming the protective layer by recessing the common electrode material into a space formed by an undercut under the protective layer. The method of claim 9,
The etching of the common electrode material is performed by a wet etching process. The method of claim 9,
And forming the protective layer to cover the end of the common electrode facing the contact hole.

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